From nobody Sun Nov 24 07:56:05 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1AD8D21265A for ; Thu, 7 Nov 2024 13:26:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.12 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730985981; cv=none; b=gYQ/wN9KjmeoddXb0qd4RbuPRTq/Uk8+Ffz8H5Plyd6IpiMiTRY/ZiZACp8/rtaDgkWnvsKahbVvOWTibJNpQ4BFYUcgF1ux1eLl/tzkWKW6hZGc0VQWZrTEpFhc87K43aF1+Yb2apm7oLlJlXQiA4I/wHUYsWGFIh/jthuF400= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730985981; c=relaxed/simple; bh=R9LBHos6EPNDBzE7YLc/RrcV/z+kP6sGeS2TPTcexMo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IVq1aD7Kasbw324O5MxcyqoW0i3lL7G8Bwqv6u2H6v9bis9yTraQQf5hwpYAYOzOi/NNcB+rXY+m0XQ//upAt663fB56vRP7d9aiW+u9hrYIg3jxZGEeUo5Pml+hDbaNq8H9uf+5hM0VcNg0kmg6Uo8ClS6VNoXoiJTMxar2ivU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=XlJLSA5K; arc=none smtp.client-ip=192.198.163.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="XlJLSA5K" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730985980; x=1762521980; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=R9LBHos6EPNDBzE7YLc/RrcV/z+kP6sGeS2TPTcexMo=; b=XlJLSA5KeTJ2vZvnezWClZmez5nz7IGc/CHM2P6zPwLmgAY/aGCbaXPu EcTiTGlHKMjP60FqIxhx0pM8lQasNxh2X+T63k+rL8B+DYJizbD5Uu+Sv 7ZY9JYyiS4z9dXG47ALBq9nIFari2i8rdAGoCIGjePN8W1UDOGrOiDO+0 TdnwYvf3m32hVXkTX8iNE1MMuZDijdP9GrF62lvS+WnfTsAqyub3E/0TJ fxzClDJ7w+YA5aAz1RY39jpIwOL1qKWFHy6kd2F2gl24RDvsfpPZsXIhJ r40jLnz6acbDFROtp0a7XzmzDQB7tj7B5n0EvItHXA1V+uxI+hNe935P3 g==; X-CSE-ConnectionGUID: LQxWu2i1SWyvh9RfG5hEhw== X-CSE-MsgGUID: 6rwrIrBJR+y9BFM8VJlhBg== X-IronPort-AV: E=McAfee;i="6700,10204,11249"; a="34750761" X-IronPort-AV: E=Sophos;i="6.12,266,1728975600"; d="scan'208";a="34750761" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Nov 2024 05:26:19 -0800 X-CSE-ConnectionGUID: 8c8j9AKhQ6K8hMZVm9AwJA== X-CSE-MsgGUID: DwrRtAhRRIyu7FNqtrl7Vg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,266,1728975600"; d="scan'208";a="89921720" Received: from sannilnx-dsk.jer.intel.com ([10.12.231.107]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Nov 2024 05:26:16 -0800 From: Alexander Usyskin To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin Cc: Oren Weil , linux-mtd@lists.infradead.org, dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, Alexander Usyskin Subject: [PATCH v2 05/10] mtd: intel-dg: align 64bit read and write Date: Thu, 7 Nov 2024 15:13:51 +0200 Message-ID: <20241107131356.2796969-6-alexander.usyskin@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241107131356.2796969-1-alexander.usyskin@intel.com> References: <20241107131356.2796969-1-alexander.usyskin@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" GSC NVM controller HW errors on quad access overlapping 1K border. Align 64bit read and write to avoid readq/writeq over 1K border. Signed-off-by: Alexander Usyskin --- drivers/mtd/devices/mtd-intel-dg.c | 35 ++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/drivers/mtd/devices/mtd-intel-dg.c b/drivers/mtd/devices/mtd-i= ntel-dg.c index 76ef7198fff8..230bf444b7fe 100644 --- a/drivers/mtd/devices/mtd-intel-dg.c +++ b/drivers/mtd/devices/mtd-intel-dg.c @@ -238,6 +238,24 @@ static ssize_t idg_write(struct intel_dg_nvm *nvm, u8 = region, len_s -=3D to_shift; } =20 + if (!IS_ALIGNED(to, sizeof(u64)) && + ((to ^ (to + len_s)) & GENMASK(31, 10))) { + /* + * Workaround reads/writes across 1k-aligned addresses + * (start u32 before 1k, end u32 after) + * as this fails on hardware. + */ + u32 data; + + memcpy(&data, &buf[0], sizeof(u32)); + idg_nvm_write32(nvm, to, data); + if (idg_nvm_error(nvm)) + return -EIO; + buf +=3D sizeof(u32); + to +=3D sizeof(u32); + len_s -=3D sizeof(u32); + } + len8 =3D ALIGN_DOWN(len_s, sizeof(u64)); for (i =3D 0; i < len8; i +=3D sizeof(u64)) { u64 data; @@ -295,6 +313,23 @@ static ssize_t idg_read(struct intel_dg_nvm *nvm, u8 r= egion, from +=3D from_shift; } =20 + if (!IS_ALIGNED(from, sizeof(u64)) && + ((from ^ (from + len_s)) & GENMASK(31, 10))) { + /* + * Workaround reads/writes across 1k-aligned addresses + * (start u32 before 1k, end u32 after) + * as this fails on hardware. + */ + u32 data =3D idg_nvm_read32(nvm, from); + + if (idg_nvm_error(nvm)) + return -EIO; + memcpy(&buf[0], &data, sizeof(data)); + len_s -=3D sizeof(u32); + buf +=3D sizeof(u32); + from +=3D sizeof(u32); + } + len8 =3D ALIGN_DOWN(len_s, sizeof(u64)); for (i =3D 0; i < len8; i +=3D sizeof(u64)) { u64 data =3D idg_nvm_read64(nvm, from + i); --=20 2.43.0