From nobody Sun Nov 24 06:36:48 2024 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0E6B2212188; Thu, 7 Nov 2024 12:52:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730983972; cv=none; b=Sd0fZ0rY0aY2JsRONJWePdeof0e8ZrtP1aidAhIBUXYB5v3xeQV1i5Pyf10u8//CY7X9k+fAbSLjHNSiGryuT8hDWMH3tJLW6RmFCwjai8YEisuPNgjGoQus/mqHuHDOJkKbvuyEIEiqL7IfgoEMwbi03upousCkDlQ01OyWzR8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730983972; c=relaxed/simple; bh=0zA88ojAQhYclRfbpCEidZHhpgM1g/WSCdBILP5PXO8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=cVnQWHiaXpB3tqqABd5J4Vu6EiEdwzBXYh+xn6dqIV0CSKIk7B+gg6jJ0QFZ6tXQE9sIvN2J5YauOrfORgtYff84722M6+XubTaRhEfnOkdIzSUT4Aopl2+PvQaMUoPGCeqZZDhjEDAXaE9Amo7MZFU1WyDE0nULCRkKKfaoPoc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=grNSQncn; arc=none smtp.client-ip=198.47.19.142 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="grNSQncn" Received: from lelv0265.itg.ti.com ([10.180.67.224]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 4A7CqhpN049061; Thu, 7 Nov 2024 06:52:43 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1730983963; bh=V7tfcBB0+f4u5HvHRbGAKLVJq8+z08unEIMxXvXXpb8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=grNSQncnhrhYOqrnelRPOFwtV/b5pWJSuf5JENAY2X7HZ4TPOWby3P2GMcKInlALQ PpELcWlU7NPbqK5VbkSobj0rzgQ8XJanhNBxPCvQrFO216+YSkCTt6f9kOntz32+fr mxMOB6Daj6hGso3lpjxvb+LalSUlldEDg20pvfnE= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 4A7CqhgA011118 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 7 Nov 2024 06:52:43 -0600 Received: from DLEE108.ent.ti.com (157.170.170.38) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 7 Nov 2024 06:52:42 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DLEE108.ent.ti.com (157.170.170.38) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 7 Nov 2024 06:52:42 -0600 Received: from localhost (udb0389739.dhcp.ti.com [137.167.1.149]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4A7Cqgqx038388; Thu, 7 Nov 2024 06:52:42 -0600 From: Michael Nemanov To: Kalle Valo , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , CC: Sabeeh Khan , Michael Nemanov Subject: [PATCH v5 04/17] wifi: cc33xx: Add sdio.c, io.c, io.h Date: Thu, 7 Nov 2024 14:51:56 +0200 Message-ID: <20241107125209.1736277-5-michael.nemanov@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241107125209.1736277-1-michael.nemanov@ti.com> References: <20241107125209.1736277-1-michael.nemanov@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" sdio.c implements SDIO transport functions. These are bound into struct cc33xx_if_operations and accessed via io.h in order to abstract multiple transport interfaces such as SPI in the future. The CC33xx driver supports the SDIO in-band IRQ option so the IRQ from the device received here as well. Unlike wl1xxx products, there is no longer mapping between HW and SDIO / SPI address space of any kind. There are only 3 valid addresses for control, data and status transactions each with a predefined structure. Signed-off-by: Michael Nemanov --- drivers/net/wireless/ti/cc33xx/io.c | 129 +++++++ drivers/net/wireless/ti/cc33xx/io.h | 26 ++ drivers/net/wireless/ti/cc33xx/sdio.c | 530 ++++++++++++++++++++++++++ 3 files changed, 685 insertions(+) create mode 100644 drivers/net/wireless/ti/cc33xx/io.c create mode 100644 drivers/net/wireless/ti/cc33xx/io.h create mode 100644 drivers/net/wireless/ti/cc33xx/sdio.c diff --git a/drivers/net/wireless/ti/cc33xx/io.c b/drivers/net/wireless/ti/= cc33xx/io.c new file mode 100644 index 000000000000..59696004efe9 --- /dev/null +++ b/drivers/net/wireless/ti/cc33xx/io.c @@ -0,0 +1,129 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti= .com/ + */ + +#include "cc33xx.h" +#include "debug.h" +#include "io.h" +#include "tx.h" + +bool cc33xx_set_block_size(struct cc33xx *cc) +{ + if (cc->if_ops->set_block_size) { + cc->if_ops->set_block_size(cc->dev, CC33XX_BUS_BLOCK_SIZE); + cc33xx_debug(DEBUG_CC33xx, + "Set BLKsize to %d", CC33XX_BUS_BLOCK_SIZE); + return true; + } + + cc33xx_debug(DEBUG_CC33xx, "Could not set BLKsize"); + return false; +} + +void cc33xx_disable_interrupts_nosync(struct cc33xx *cc) +{ + cc->if_ops->disable_irq(cc->dev); +} + +void cc33xx_irq(void *cookie); +void cc33xx_enable_interrupts(struct cc33xx *cc) +{ + cc->if_ops->enable_irq(cc->dev); + + cc33xx_irq(cc); +} + +void cc33xx_io_reset(struct cc33xx *cc) +{ + if (cc->if_ops->reset) + cc->if_ops->reset(cc->dev); +} + +void cc33xx_io_init(struct cc33xx *cc) +{ + if (cc->if_ops->init) + cc->if_ops->init(cc->dev); +} + +/* Raw target IO, address is not translated */ +static int __must_check cc33xx_raw_write(struct cc33xx *cc, int addr, + void *buf, size_t len, bool fixed) +{ + int ret; + + if (test_bit(CC33XX_FLAG_IO_FAILED, &cc->flags) || + WARN_ON((test_bit(CC33XX_FLAG_IN_ELP, &cc->flags) && + addr !=3D HW_ACCESS_ELP_CTRL_REG))) + return -EIO; + + ret =3D cc->if_ops->write(cc->dev, addr, buf, len, fixed); + if (ret && cc->state !=3D CC33XX_STATE_OFF) + set_bit(CC33XX_FLAG_IO_FAILED, &cc->flags); + + return ret; +} + +int __must_check cc33xx_raw_read(struct cc33xx *cc, int addr, + void *buf, size_t len, bool fixed) +{ + int ret; + + if (test_bit(CC33XX_FLAG_IO_FAILED, &cc->flags) || + WARN_ON((test_bit(CC33XX_FLAG_IN_ELP, &cc->flags) && + addr !=3D HW_ACCESS_ELP_CTRL_REG))) + return -EIO; + + ret =3D cc->if_ops->read(cc->dev, addr, buf, len, fixed); + if (ret && cc->state !=3D CC33XX_STATE_OFF) + set_bit(CC33XX_FLAG_IO_FAILED, &cc->flags); + + return ret; +} + +int __must_check cc33xx_write(struct cc33xx *cc, int addr, + void *buf, size_t len, bool fixed) +{ + return cc33xx_raw_write(cc, addr, buf, len, fixed); +} + +void claim_core_status_lock(struct cc33xx *cc) +{ + /* When accessing core-status data (read or write) the transport lock + * should be held. + */ + cc->if_ops->interface_claim(cc->dev); +} + +void release_core_status_lock(struct cc33xx *cc) +{ + /* After accessing core-status data (read or write) the transport lock + * should be released. + */ + cc->if_ops->interface_release(cc->dev); +} + +void cc33xx_power_off(struct cc33xx *cc) +{ + int ret =3D 0; + + if (!test_bit(CC33XX_FLAG_GPIO_POWER, &cc->flags)) + return; + + if (cc->if_ops->power) + ret =3D cc->if_ops->power(cc->dev, false); + if (!ret) + clear_bit(CC33XX_FLAG_GPIO_POWER, &cc->flags); +} + +int cc33xx_power_on(struct cc33xx *cc) +{ + int ret =3D 0; + + if (cc->if_ops->power) + ret =3D cc->if_ops->power(cc->dev, true); + if (ret =3D=3D 0) + set_bit(CC33XX_FLAG_GPIO_POWER, &cc->flags); + + return ret; +} diff --git a/drivers/net/wireless/ti/cc33xx/io.h b/drivers/net/wireless/ti/= cc33xx/io.h new file mode 100644 index 000000000000..cc5abd428d99 --- /dev/null +++ b/drivers/net/wireless/ti/cc33xx/io.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0-only + * + * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti= .com/ + */ + +#ifndef __IO_H__ +#define __IO_H__ + +struct cc33xx; + +void cc33xx_disable_interrupts_nosync(struct cc33xx *cc); +void cc33xx_enable_interrupts(struct cc33xx *cc); +void cc33xx_io_reset(struct cc33xx *cc); +void cc33xx_io_init(struct cc33xx *cc); +int __must_check cc33xx_raw_read(struct cc33xx *cc, int addr, + void *buf, size_t len, bool fixed); +int __must_check cc33xx_write(struct cc33xx *cc, int addr, + void *buf, size_t len, bool fixed); +void claim_core_status_lock(struct cc33xx *cc); +void release_core_status_lock(struct cc33xx *cc); +void cc33xx_power_off(struct cc33xx *cc); +int cc33xx_power_on(struct cc33xx *cc); +int cc33xx_translate_addr(struct cc33xx *cc, int addr); +bool cc33xx_set_block_size(struct cc33xx *cc); + +#endif /* __IO_H__ */ diff --git a/drivers/net/wireless/ti/cc33xx/sdio.c b/drivers/net/wireless/t= i/cc33xx/sdio.c new file mode 100644 index 000000000000..835e627e2514 --- /dev/null +++ b/drivers/net/wireless/ti/cc33xx/sdio.c @@ -0,0 +1,530 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti= .com/ + */ + +#include +#include +#include +#include +#include + +#include "cc33xx.h" +#include "io.h" + +#ifndef SDIO_VENDOR_ID_TI +#define SDIO_VENDOR_ID_TI 0x0097 +#endif + +#define SDIO_DEVICE_ID_CC33XX_NO_EFUSE 0x4076 +#define SDIO_DEVICE_ID_TI_CC33XX 0x4077 + +struct cc33xx_sdio_glue { + struct device *dev; + struct platform_device *core; +}; + +static void cc33xx_sdio_claim(struct device *child) +{ + struct cc33xx_sdio_glue *glue =3D dev_get_drvdata(child->parent); + struct sdio_func *func =3D dev_to_sdio_func(glue->dev); + + sdio_claim_host(func); +} + +static void cc33xx_sdio_release(struct device *child) +{ + struct cc33xx_sdio_glue *glue =3D dev_get_drvdata(child->parent); + struct sdio_func *func =3D dev_to_sdio_func(glue->dev); + + sdio_release_host(func); +} + +static void cc33xx_sdio_set_block_size(struct device *child, + unsigned int blksz) +{ + struct cc33xx_sdio_glue *glue =3D dev_get_drvdata(child->parent); + struct sdio_func *func =3D dev_to_sdio_func(glue->dev); + + sdio_claim_host(func); + sdio_set_block_size(func, blksz); + sdio_release_host(func); +} + +static int __must_check cc33xx_sdio_raw_read(struct device *child, int add= r, + void *buf, size_t len, bool fixed) +{ + int ret; + struct cc33xx_sdio_glue *glue =3D dev_get_drvdata(child->parent); + struct sdio_func *func =3D dev_to_sdio_func(glue->dev); + + sdio_claim_host(func); + + if (unlikely(addr =3D=3D HW_ACCESS_ELP_CTRL_REG)) { + ((u8 *)buf)[0] =3D sdio_f0_readb(func, addr, &ret); + dev_dbg(child->parent, "sdio read 52 addr 0x%x, byte 0x%02x\n", + addr, ((u8 *)buf)[0]); + } else { + if (fixed) + ret =3D sdio_readsb(func, buf, addr, len); + else + ret =3D sdio_memcpy_fromio(func, buf, addr, len); + + dev_dbg(child->parent, "sdio read 53 addr 0x%x, %zu bytes\n", + addr, len); + } + + sdio_release_host(func); + + if (WARN_ON(ret)) + dev_err(child->parent, "sdio read failed (%d)\n", ret); + + return ret; +} + +static int __must_check cc33xx_sdio_raw_write(struct device *child, int ad= dr, + void *buf, size_t len, bool fixed) +{ + int ret; + struct cc33xx_sdio_glue *glue =3D dev_get_drvdata(child->parent); + struct sdio_func *func =3D dev_to_sdio_func(glue->dev); + + sdio_claim_host(func); + + if (unlikely(addr =3D=3D HW_ACCESS_ELP_CTRL_REG)) { + sdio_f0_writeb(func, ((u8 *)buf)[0], addr, &ret); + } else { + if (fixed) + ret =3D sdio_writesb(func, addr, buf, len); + else + ret =3D sdio_memcpy_toio(func, addr, buf, len); + } + + sdio_release_host(func); + + if (WARN_ON(ret)) + dev_err(child->parent, "sdio write failed (%d)\n", ret); + + return ret; +} + +static int cc33xx_sdio_power_on(struct cc33xx_sdio_glue *glue) +{ + int ret; + struct sdio_func *func =3D dev_to_sdio_func(glue->dev); + struct mmc_card *card =3D func->card; + + ret =3D pm_runtime_get_sync(&card->dev); + if (ret < 0) { + pm_runtime_put_noidle(&card->dev); + dev_err(glue->dev, "%s: failed to get_sync(%d)\n", + __func__, ret); + + return ret; + } + + sdio_claim_host(func); + sdio_enable_func(func); + sdio_release_host(func); + + return 0; +} + +static int cc33xx_sdio_power_off(struct cc33xx_sdio_glue *glue) +{ + struct sdio_func *func =3D dev_to_sdio_func(glue->dev); + struct mmc_card *card =3D func->card; + + sdio_claim_host(func); + sdio_disable_func(func); + sdio_release_host(func); + + /* Let runtime PM know the card is powered off */ + pm_runtime_put(&card->dev); + return 0; +} + +static int cc33xx_sdio_set_power(struct device *child, bool enable) +{ + struct cc33xx_sdio_glue *glue =3D dev_get_drvdata(child->parent); + + if (enable) + return cc33xx_sdio_power_on(glue); + else + return cc33xx_sdio_power_off(glue); +} + +/** + * inband_irq_handler - Called from the MMC subsystem when the + * function's IRQ is signaled. + * @func: an SDIO function of the card + * + * Note that the host is already claimed when handler is invoked. + */ +static void inband_irq_handler(struct sdio_func *func) +{ + struct cc33xx_sdio_glue *glue =3D sdio_get_drvdata(func); + struct platform_device *pdev =3D glue->core; + struct cc33xx_platdev_data *pdev_data =3D dev_get_platdata(&pdev->dev); + + if (WARN_ON(!pdev_data->irq_handler)) + return; + + pdev_data->irq_handler(pdev); +} + +static void cc33xx_enable_async_interrupt(struct sdio_func *func) +{ + u8 reg_val; + const int CCCR_REG_16_ADDR =3D 0x16; + const int ENABLE_ASYNC_IRQ_BIT =3D BIT(1); + + reg_val =3D sdio_f0_readb(func, CCCR_REG_16_ADDR, NULL); + reg_val |=3D ENABLE_ASYNC_IRQ_BIT; + sdio_f0_writeb(func, reg_val, CCCR_REG_16_ADDR, NULL); +} + +static void cc33xx_sdio_enable_irq(struct device *child) +{ + struct cc33xx_sdio_glue *glue =3D dev_get_drvdata(child->parent); + struct sdio_func *func =3D dev_to_sdio_func(glue->dev); + + sdio_claim_host(func); + cc33xx_enable_async_interrupt(func); + sdio_claim_irq(func, inband_irq_handler); + sdio_release_host(func); +} + +static void cc33xx_sdio_disable_irq(struct device *child) +{ + struct cc33xx_sdio_glue *glue =3D dev_get_drvdata(child->parent); + struct sdio_func *func =3D dev_to_sdio_func(glue->dev); + + sdio_claim_host(func); + sdio_release_irq(func); + sdio_release_host(func); +} + +static void cc33xx_enable_line_irq(struct device *child) +{ + struct cc33xx_sdio_glue *glue =3D dev_get_drvdata(child->parent); + struct platform_device *pdev =3D glue->core; + struct cc33xx_platdev_data *pdev_data =3D dev_get_platdata(&pdev->dev); + + enable_irq(pdev_data->gpio_irq_num); +} + +static void cc33xx_disable_line_irq(struct device *child) +{ + struct cc33xx_sdio_glue *glue =3D dev_get_drvdata(child->parent); + struct platform_device *pdev =3D glue->core; + struct cc33xx_platdev_data *pdev_data =3D dev_get_platdata(&pdev->dev); + + disable_irq_nosync(pdev_data->gpio_irq_num); +} + +static void cc33xx_set_irq_handler(struct device *child, void *handler) +{ + struct cc33xx_sdio_glue *glue =3D dev_get_drvdata(child->parent); + struct platform_device *pdev =3D glue->core; + struct cc33xx_platdev_data *pdev_data =3D dev_get_platdata(&pdev->dev); + + pdev_data->irq_handler =3D handler; +} + +static const struct cc33xx_if_operations sdio_ops_gpio_irq =3D { + .interface_claim =3D cc33xx_sdio_claim, + .interface_release =3D cc33xx_sdio_release, + .read =3D cc33xx_sdio_raw_read, + .write =3D cc33xx_sdio_raw_write, + .power =3D cc33xx_sdio_set_power, + .set_block_size =3D cc33xx_sdio_set_block_size, + .set_irq_handler =3D cc33xx_set_irq_handler, + .disable_irq =3D cc33xx_disable_line_irq, + .enable_irq =3D cc33xx_enable_line_irq, +}; + +static const struct cc33xx_if_operations sdio_ops_inband_irq =3D { + .interface_claim =3D cc33xx_sdio_claim, + .interface_release =3D cc33xx_sdio_release, + .read =3D cc33xx_sdio_raw_read, + .write =3D cc33xx_sdio_raw_write, + .power =3D cc33xx_sdio_set_power, + .set_block_size =3D cc33xx_sdio_set_block_size, + .set_irq_handler =3D cc33xx_set_irq_handler, + .disable_irq =3D cc33xx_sdio_disable_irq, + .enable_irq =3D cc33xx_sdio_enable_irq, +}; + +#ifdef CONFIG_OF +static const struct cc33xx_family_data cc33xx_data =3D { + .name =3D "cc33xx", + .cfg_name =3D "ti-connectivity/cc33xx-conf.bin", + .nvs_name =3D "ti-connectivity/cc33xx-nvs.bin", +}; + +static const struct of_device_id cc33xx_sdio_of_match_table[] =3D { + { .compatible =3D "ti,cc3300", .data =3D &cc33xx_data }, + { } +}; + +static int cc33xx_probe_of(struct device *dev, int *irq, int *wakeirq, + struct cc33xx_platdev_data *pdev_data) +{ + struct device_node *np =3D dev->of_node; + const struct of_device_id *of_id; + + of_id =3D of_match_node(cc33xx_sdio_of_match_table, np); + if (!of_id) + return -ENODEV; + + pdev_data->family =3D of_id->data; + + *irq =3D irq_of_parse_and_map(np, 0); + + *wakeirq =3D irq_of_parse_and_map(np, 1); + + return 0; +} +#else +static int cc33xx_probe_of(struct device *dev, int *irq, int *wakeirq, + struct cc33xx_platdev_data *pdev_data) +{ + return -ENODATA; +} +#endif /* CONFIG_OF */ + +static irqreturn_t gpio_irq_hard_handler(int irq, void *cookie) +{ + return IRQ_WAKE_THREAD; +} + +static irqreturn_t gpio_irq_thread_handler(int irq, void *cookie) +{ + struct sdio_func *func =3D cookie; + struct cc33xx_sdio_glue *glue =3D sdio_get_drvdata(func); + struct platform_device *pdev =3D glue->core; + struct cc33xx_platdev_data *pdev_data =3D dev_get_platdata(&pdev->dev); + + if (WARN_ON(!pdev_data->irq_handler)) + return IRQ_HANDLED; + + pdev_data->irq_handler(pdev); + + return IRQ_HANDLED; +} + +static int sdio_cc33xx_probe(struct sdio_func *func, + const struct sdio_device_id *id) +{ + struct cc33xx_platdev_data *pdev_data; + struct cc33xx_sdio_glue *glue; + struct resource res[1]; + mmc_pm_flag_t mmcflags; + int ret =3D -ENOMEM; + int gpio_irq, wakeirq, irq_flags; + + /* We are only able to handle the wlan function */ + if (func->num !=3D 0x02) + return -ENODEV; + + pdev_data =3D devm_kzalloc(&func->dev, sizeof(*pdev_data), GFP_KERNEL); + if (!pdev_data) + return -ENOMEM; + + glue =3D devm_kzalloc(&func->dev, sizeof(*glue), GFP_KERNEL); + if (!glue) + return -ENOMEM; + + glue->dev =3D &func->dev; + + /* Grab access to FN0 for ELP reg. */ + func->card->quirks |=3D MMC_QUIRK_LENIENT_FN0; + + /* Use block mode for transferring over one block size of data */ + func->card->quirks |=3D MMC_QUIRK_BLKSZ_FOR_BYTE_MODE; + + ret =3D cc33xx_probe_of(&func->dev, &gpio_irq, &wakeirq, pdev_data); + if (ret) + goto out; + + /* if sdio can keep power while host is suspended, enable wow */ + mmcflags =3D sdio_get_host_pm_caps(func); + + sdio_set_drvdata(func, glue); + + /* Tell PM core that we don't need the card to be powered now */ + pm_runtime_put_noidle(&func->dev); + + glue->core =3D platform_device_alloc("cc33xx", PLATFORM_DEVID_AUTO); + if (!glue->core) { + dev_err(glue->dev, "can't allocate platform_device"); + ret =3D -ENOMEM; + goto out; + } + + glue->core->dev.parent =3D &func->dev; + + if (gpio_irq) { + irq_flags =3D irqd_get_trigger_type(irq_get_irq_data(gpio_irq)); + + irq_set_status_flags(gpio_irq, IRQ_NOAUTOEN); + + if (irq_flags & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) + irq_flags |=3D IRQF_ONESHOT; + + ret =3D request_threaded_irq(gpio_irq, gpio_irq_hard_handler, + gpio_irq_thread_handler, + irq_flags, glue->core->name, func); + if (ret) { + dev_err(glue->dev, "can't register GPIO IRQ handler\n"); + goto out_dev_put; + } + + pdev_data->gpio_irq_num =3D gpio_irq; + + if ((mmcflags & MMC_PM_KEEP_POWER) && + (enable_irq_wake(gpio_irq) =3D=3D 0)) + pdev_data->pwr_in_suspend =3D true; + + pdev_data->if_ops =3D &sdio_ops_gpio_irq; + } else { + pdev_data->if_ops =3D &sdio_ops_inband_irq; + } + + if (wakeirq > 0) { + res[0].start =3D wakeirq; + res[0].flags =3D IORESOURCE_IRQ | + irqd_get_trigger_type(irq_get_irq_data(wakeirq)); + res[0].name =3D "wakeirq"; + + ret =3D platform_device_add_resources(glue->core, res, 1); + if (ret) { + dev_err(glue->dev, "can't add resources\n"); + goto out_dev_put; + } + } + + ret =3D platform_device_add_data(glue->core, pdev_data, + sizeof(*pdev_data)); + if (ret) { + dev_err(glue->dev, "can't add platform data\n"); + goto out_dev_put; + } + + ret =3D platform_device_add(glue->core); + if (ret) { + dev_err(glue->dev, "can't add platform device\n"); + goto out_dev_put; + } + return 0; + +out_dev_put: + platform_device_put(glue->core); + + if (pdev_data->gpio_irq_num) + free_irq(pdev_data->gpio_irq_num, func); + +out: + return ret; +} + +static void sdio_cc33xx_remove(struct sdio_func *func) +{ + struct cc33xx_sdio_glue *glue =3D sdio_get_drvdata(func); + struct platform_device *pdev =3D glue->core; + struct cc33xx_platdev_data *pdev_data =3D dev_get_platdata(&pdev->dev); + + /* Undo decrement done above in sdio_cc33xx_probe */ + pm_runtime_get_noresume(&func->dev); + + platform_device_unregister(glue->core); + + if (pdev_data->gpio_irq_num) { + free_irq(pdev_data->gpio_irq_num, func); + if (pdev_data->pwr_in_suspend) + disable_irq_wake(pdev_data->gpio_irq_num); + } else { + sdio_claim_host(func); + sdio_release_irq(func); + sdio_release_host(func); + } +} + +#ifdef CONFIG_PM +static int cc33xx_suspend(struct device *dev) +{ + /* Tell MMC/SDIO core it's OK to power down the card + * (if it isn't already), but not to remove it completely + */ + struct sdio_func *func =3D dev_to_sdio_func(dev); + struct cc33xx_sdio_glue *glue =3D sdio_get_drvdata(func); + struct cc33xx *cc =3D platform_get_drvdata(glue->core); + mmc_pm_flag_t sdio_flags; + int ret =3D 0; + + if (!cc) { + dev_err(dev, "no wilink module was probed\n"); + goto out; + } + + dev_dbg(dev, "cc33xx suspend. keep_device_power: %d\n", + cc->keep_device_power); + + if (cc->keep_device_power) { + sdio_flags =3D sdio_get_host_pm_caps(func); + + if (!(sdio_flags & MMC_PM_KEEP_POWER)) { + dev_err(dev, "can't keep power while host is suspended\n"); + ret =3D -EINVAL; + goto out; + } + + /* keep power while host suspended */ + ret =3D sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); + if (ret) { + dev_err(dev, "error while trying to keep power\n"); + goto out; + } + } +out: + return ret; +} + +static int cc33xx_resume(struct device *dev) +{ + return 0; +} + +static const struct dev_pm_ops cc33xx_sdio_pm_ops =3D { + .suspend =3D cc33xx_suspend, + .resume =3D cc33xx_resume, +}; +#endif + +static const struct sdio_device_id cc33xx_devices[] =3D { + { SDIO_DEVICE(SDIO_VENDOR_ID_TI, SDIO_DEVICE_ID_TI_CC33XX) }, + { SDIO_DEVICE(SDIO_VENDOR_ID_TI, SDIO_DEVICE_ID_CC33XX_NO_EFUSE) }, + {} +}; + +MODULE_DEVICE_TABLE(sdio, cc33xx_devices); + +static struct sdio_driver cc33xx_sdio_driver =3D { + .name =3D "cc33xx_sdio", + .id_table =3D cc33xx_devices, + .probe =3D sdio_cc33xx_probe, + .remove =3D sdio_cc33xx_remove, +#ifdef CONFIG_PM + .drv =3D { + .pm =3D &cc33xx_sdio_pm_ops, + }, +#endif /* CONFIG_PM */ +}; + +module_sdio_driver(cc33xx_sdio_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_DESCRIPTION("SDIO transport for Texas Instruments CC33xx WLAN drive= r"); +MODULE_AUTHOR("Michael Nemanov "); +MODULE_AUTHOR("Sabeeh Khan "); --=20 2.34.1