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Thu, 7 Nov 2024 10:43:06 +0000 (GMT) Received: from epsmgms1p2new.samsung.com (unknown [182.195.42.42]) by epsmtrp2.samsung.com (KnoxPortal) with ESMTP id 20241107104306epsmtrp2682304394b1964b08d9007c0cbc78fd2~Fqauu9-Wa3199131991epsmtrp2F; Thu, 7 Nov 2024 10:43:06 +0000 (GMT) X-AuditID: b6c32a44-93ffa7000000217e-d2-672c99ba09fe Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgms1p2new.samsung.com (Symantec Messaging Gateway) with SMTP id B8.72.08227.AB99C276; Thu, 7 Nov 2024 19:43:06 +0900 (KST) Received: from INBRO002811.samsungds.net (unknown [107.122.5.126]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20241107104304epsmtip23020754976b1b194a62d731110ca25a8~FqaskUF9i2599225992epsmtip2T; Thu, 7 Nov 2024 10:43:04 +0000 (GMT) From: Selvarasu Ganesan To: Thinh.Nguyen@synopsys.com, gregkh@linuxfoundation.org, quic_akakum@quicinc.com, linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org Cc: jh0801.jung@samsung.com, dh10.jung@samsung.com, naushad@samsung.com, akash.m5@samsung.com, rc93.raju@samsung.com, taehyun.cho@samsung.com, hongpooh.kim@samsung.com, eomji.oh@samsung.com, shijie.cai@samsung.com, Selvarasu Ganesan , stable@vger.kernel.org Subject: [PATCH] usb: dwc3: gadget: Add TxFIFO resizing supports for single port RAM Date: Thu, 7 Nov 2024 16:10:35 +0530 Message-ID: <20241107104040.502-1-selvarasu.g@samsung.com> X-Mailer: git-send-email 2.46.0.windows.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrAJsWRmVeSWpSXmKPExsWy7bCmuu7umTrpBu8+MVm8ubqK1eLOgmlM FqeWL2SyaF68ns1i0p6tLBZ3H/5gsbi8aw6bxaJlrcwWn47+Z7W4/Wcvq8WqzjksFkeWf2Sy uPx9J7PFgo2PGC0mHRS1WLXgALuDgMf+uWvYPSbuqfPo27KK0WPL/s+MHp83yQWwRmXbZKQm pqQWKaTmJeenZOal2yp5B8c7x5uaGRjqGlpamCsp5CXmptoqufgE6Lpl5gBdrKRQlphTChQK SCwuVtK3synKLy1JVcjILy6xVUotSMkpMCnQK07MLS7NS9fLSy2xMjQwMDIFKkzIzlj2/AhL wQ6Niql7hRsYPyp0MXJySAiYSLR0dDF1MXJxCAnsZpSY9XMrK4TziVHi2sM5UJlvjBIL135m gmn5v3UPC0RiL6PE3rZuZgjnO6PEpglbgKo4ONgEDCWenbABiYsI9DNKPF/0lBmkm1lgAZNE 62xtEFtYIEziwbWXYHEWAVWJO/fesYPYvAJWEtvOP2eF2KYpsXbvHiaIuKDEyZlPWCDmyEs0 b50NtlhCYCqHRGfzSxaQxRICLhJTbihB9ApLvDq+hR3ClpL4/G4vG4SdLLFn0heoeIbEoVWH mCFse4nVC86wgoxhBtq7fpc+xCo+id7fT5ggpvNKdLQJQVSrSpxqvAw1UVri3pJrUBd7SBzZ ewpsupBArMSPSbsZJzDKzULywCwkD8xCWLaAkXkVo2RqQXFuemqyaYFhXmo5PCqT83M3MYKT qpbLDsYb8//pHWJk4mA8xCjBwawkwusfpZ0uxJuSWFmVWpQfX1Sak1p8iNEUGKoTmaVEk/OB aT2vJN7QxNLAxMzMzMTS2MxQSZz3devcFCGB9MSS1OzU1ILUIpg+Jg5OqQamI43/ryzcNrfo 3ym2/1esf16d9EKiyOxdb63mHLG9Kjy6OU/U2xbO0bo/Y8sLwclsXNrKE+LXxEY4Gr+2u3pn nVjaimM7Jlvmy+1aXZpvLhq4tELsr3nT23k5IfkP3uU47vx3KWypZfnkrwlbLwUvZcu1uPzQ SXR37rdTpfsi/66bEiT2M3+eR8b1n7yOC177nf+XmRLJVCHzJ/agp9Tk/wzddy8nTf/qYaRw TfRzzfPe92+UTh5e8+2pWWbNg3r71C33tCYsZ9l0dVH+7dkfLTc/sF0zIVs2hvnoqn+bpmr9 nqi/9Xew5Son/toSs0yd7b914kydko/VB4deCQxoK4y2sUtIXeq3I+Tx2s1nPyuxFGckGmox FxUnAgCjjNssMwQAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrFLMWRmVeSWpSXmKPExsWy7bCSvO6umTrpBpseK1m8ubqK1eLOgmlM FqeWL2SyaF68ns1i0p6tLBZ3H/5gsbi8aw6bxaJlrcwWn47+Z7W4/Wcvq8WqzjksFkeWf2Sy uPx9J7PFgo2PGC0mHRS1WLXgALuDgMf+uWvYPSbuqfPo27KK0WPL/s+MHp83yQWwRnHZpKTm ZJalFunbJXBlLHt+hKVgh0bF1L3CDYwfFboYOTkkBEwk/m/dw9LFyMUhJLCbUeLGoxVsEAlp idezuhghbGGJlf+es0MUfWWUeNh3HaiDg4NNwFDi2QkbkLiIwGRGiclHz4EVMQusY5KYffwJ M0i3sECIxN3Ts1lAbBYBVYk7996xg9i8AlYS284/Z4XYoCmxdu8eJoi4oMTJmU/A6pkF5CWa t85mnsDINwtJahaS1AJGplWMkqkFxbnpucWGBUZ5qeV6xYm5xaV56XrJ+bmbGMHBr6W1g3HP qg96hxiZOBgPMUpwMCuJ8PpHaacL8aYkVlalFuXHF5XmpBYfYpTmYFES5/32ujdFSCA9sSQ1 OzW1ILUIJsvEwSnVwJQsETZ5fbbGmY+FvtqpayaamRgZTHvqL3j/8cWJy+Iv+yjxqgj47f36 oeKF1PrA7UFsGyuDP0xeuzF+utruHR3vo0MOmjBunVbz2GPBz53TFXSmOZ4M/6Iu06SzeKvd hw920i1fT4reks5ba2+emGi6+unFGpvpNq9MeLit2afN8OffectZ94PveWV52a/vbke9uhd2 xjEsqtBulnvrySvRPuuLq5Ydqty4nj+ixG1dr+GW+YnibHq5F1RMTuy33zfxcdydQ7de2QiI TdX5VvE3cr6itFb7zbUNOSWPGkU8WYstm51sDXSVd2yLM96ceuyQbynXBZXlpZbmvHrvDth+ PPLN/2naG/FAwSlXfimxFGckGmoxFxUnAgDQAzFd7QIAAA== X-CMS-MailID: 20241107104306epcas5p136bea5d14a1bb3fe9ba1a7830bf366c6 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20241107104306epcas5p136bea5d14a1bb3fe9ba1a7830bf366c6 References: This commit adds support for resizing the TxFIFO in USB2.0-only mode where using single port RAM, and limit the use of extra FIFOs for bulk transfers in non-SS mode. It prevents the issue of limited RAM size usage. Fixes: fad16c823e66 ("usb: dwc3: gadget: Refine the logic for resizing Tx F= IFOs") Cc: stable@vger.kernel.org # 6.12.x: fad16c82: usb: dwc3: gadget: Refine th= e logic for resizing Tx FIFOs Signed-off-by: Selvarasu Ganesan --- drivers/usb/dwc3/core.h | 4 +++ drivers/usb/dwc3/gadget.c | 56 ++++++++++++++++++++++++++++++--------- 2 files changed, 48 insertions(+), 12 deletions(-) diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index eaa55c0cf62f..8306b39e5c64 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -915,6 +915,7 @@ struct dwc3_hwparams { #define DWC3_MODE(n) ((n) & 0x7) =20 /* HWPARAMS1 */ +#define DWC3_SPRAM_TYPE(n) (((n) >> 23) & 1) #define DWC3_NUM_INT(n) (((n) & (0x3f << 15)) >> 15) =20 /* HWPARAMS3 */ @@ -925,6 +926,9 @@ struct dwc3_hwparams { #define DWC3_NUM_IN_EPS(p) (((p)->hwparams3 & \ (DWC3_NUM_IN_EPS_MASK)) >> 18) =20 +/* HWPARAMS6 */ +#define DWC3_RAM0_DEPTH(n) (((n) & (0xffff0000)) >> 16) + /* HWPARAMS7 */ #define DWC3_RAM1_DEPTH(n) ((n) & 0xffff) =20 diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 2fed2aa01407..d3e25f7d7cd0 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -687,6 +687,42 @@ static int dwc3_gadget_calc_tx_fifo_size(struct dwc3 *= dwc, int mult) return fifo_size; } =20 +/** + * dwc3_gadget_calc_ram_depth - calculates the ram depth for txfifo + * @dwc: pointer to the DWC3 context + */ +static int dwc3_gadget_calc_ram_depth(struct dwc3 *dwc) +{ + int ram_depth; + int fifo_0_start; + bool spram_type; + int tmp; + + /* Check supporting RAM type by HW */ + spram_type =3D DWC3_SPRAM_TYPE(dwc->hwparams.hwparams1); + + /* If a single port RAM is utilized, then allocate TxFIFOs from + * RAM0. otherwise, allocate them from RAM1. + */ + ram_depth =3D spram_type ? DWC3_RAM0_DEPTH(dwc->hwparams.hwparams6) : + DWC3_RAM1_DEPTH(dwc->hwparams.hwparams7); + + + /* In a single port RAM configuration, the available RAM is shared + * between the RX and TX FIFOs. This means that the txfifo can begin + * at a non-zero address. + */ + if (spram_type) { + /* Check if TXFIFOs start at non-zero addr */ + tmp =3D dwc3_readl(dwc->regs, DWC3_GTXFIFOSIZ(0)); + fifo_0_start =3D DWC3_GTXFIFOSIZ_TXFSTADDR(tmp); + + ram_depth -=3D (fifo_0_start >> 16); + } + + return ram_depth; +} + /** * dwc3_gadget_clear_tx_fifos - Clears txfifo allocation * @dwc: pointer to the DWC3 context @@ -753,7 +789,7 @@ static int dwc3_gadget_resize_tx_fifos(struct dwc3_ep *= dep) { struct dwc3 *dwc =3D dep->dwc; int fifo_0_start; - int ram1_depth; + int ram_depth; int fifo_size; int min_depth; int num_in_ep; @@ -773,7 +809,7 @@ static int dwc3_gadget_resize_tx_fifos(struct dwc3_ep *= dep) if (dep->flags & DWC3_EP_TXFIFO_RESIZED) return 0; =20 - ram1_depth =3D DWC3_RAM1_DEPTH(dwc->hwparams.hwparams7); + ram_depth =3D dwc3_gadget_calc_ram_depth(dwc); =20 switch (dwc->gadget->speed) { case USB_SPEED_SUPER_PLUS: @@ -792,10 +828,6 @@ static int dwc3_gadget_resize_tx_fifos(struct dwc3_ep = *dep) break; } fallthrough; - case USB_SPEED_FULL: - if (usb_endpoint_xfer_bulk(dep->endpoint.desc)) - num_fifos =3D 2; - break; default: break; } @@ -809,7 +841,7 @@ static int dwc3_gadget_resize_tx_fifos(struct dwc3_ep *= dep) =20 /* Reserve at least one FIFO for the number of IN EPs */ min_depth =3D num_in_ep * (fifo + 1); - remaining =3D ram1_depth - min_depth - dwc->last_fifo_depth; + remaining =3D ram_depth - min_depth - dwc->last_fifo_depth; remaining =3D max_t(int, 0, remaining); /* * We've already reserved 1 FIFO per EP, so check what we can fit in @@ -835,9 +867,9 @@ static int dwc3_gadget_resize_tx_fifos(struct dwc3_ep *= dep) dwc->last_fifo_depth +=3D DWC31_GTXFIFOSIZ_TXFDEP(fifo_size); =20 /* Check fifo size allocation doesn't exceed available RAM size. */ - if (dwc->last_fifo_depth >=3D ram1_depth) { + if (dwc->last_fifo_depth >=3D ram_depth) { dev_err(dwc->dev, "Fifosize(%d) > RAM size(%d) %s depth:%d\n", - dwc->last_fifo_depth, ram1_depth, + dwc->last_fifo_depth, ram_depth, dep->endpoint.name, fifo_size); if (DWC3_IP_IS(DWC3)) fifo_size =3D DWC3_GTXFIFOSIZ_TXFDEP(fifo_size); @@ -3090,7 +3122,7 @@ static int dwc3_gadget_check_config(struct usb_gadget= *g) struct dwc3 *dwc =3D gadget_to_dwc(g); struct usb_ep *ep; int fifo_size =3D 0; - int ram1_depth; + int ram_depth; int ep_num =3D 0; =20 if (!dwc->do_fifo_resize) @@ -3113,8 +3145,8 @@ static int dwc3_gadget_check_config(struct usb_gadget= *g) fifo_size +=3D dwc->max_cfg_eps; =20 /* Check if we can fit a single fifo per endpoint */ - ram1_depth =3D DWC3_RAM1_DEPTH(dwc->hwparams.hwparams7); - if (fifo_size > ram1_depth) + ram_depth =3D dwc3_gadget_calc_ram_depth(dwc); + if (fifo_size > ram_depth) return -ENOMEM; =20 return 0; --=20 2.17.1