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charset="utf-8" RTC fields are located in bits [1:0]. Correct the _MASK and _SHIFT macros to use the appropriate mask and shift. Signed-off-by: Ley Foon Tan Reviewed-by: Simon Horman --- drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/eth= ernet/stmicro/stmmac/dwmac4.h index 0c050324997a..184d41a306af 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h @@ -393,8 +393,8 @@ static inline u32 mtl_chanx_base_addr(const struct dwma= c4_addrs *addrs, =20 #define MTL_OP_MODE_EHFC BIT(7) =20 -#define MTL_OP_MODE_RTC_MASK 0x18 -#define MTL_OP_MODE_RTC_SHIFT 3 +#define MTL_OP_MODE_RTC_MASK GENMASK(1, 0) +#define MTL_OP_MODE_RTC_SHIFT 0 =20 #define MTL_OP_MODE_RTC_32 (1 << MTL_OP_MODE_RTC_SHIFT) #define MTL_OP_MODE_RTC_64 0 --=20 2.34.1 From nobody Sun Nov 24 03:36:02 2024 Received: from CHN02-SH0-obe.outbound.protection.partner.outlook.cn (mail-sh0chn02on2125.outbound.protection.partner.outlook.cn [139.219.146.125]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B0D6195B37; Thu, 7 Nov 2024 06:37:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=139.219.146.125 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730961425; cv=fail; b=noIfzzrUN8ZS2I/WcsCSTmj/bYij+vhVJ4OWt5f40Exv/MBZkBW+V7xBZsvAIz9koeAtYLr+MZfgjwRCisnzoUEDKzT7Kv9NLROZ3IvRn9Pp4k4KsDKgNk2sMwmqnFD4R/GhQbNoBsNhdb3U6xYXIWeYIdDsfu4LHtUPdVgt7+I= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730961425; c=relaxed/simple; bh=TiX/6hfIvI5Rz8xzUEHjrzY+6xSXKBO6/werOAN2m9M=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=JVi8GMO3F/2EflD/6mk6Hj1+DOmcwjWziHK3AXgYW6m3PUC91smi/XeAFbPwSYDaz3UIq2oHMCtEgzQG+KOha7QwbJpB500kzu9COTMyuiqZTY/Lx4SZjmlbCKUL3fCQKtv4L/J7FKEfhD1c1GkB7jEIuLMLMCveuAyjchZAPjc= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=starfivetech.com; spf=pass smtp.mailfrom=starfivetech.com; arc=fail smtp.client-ip=139.219.146.125 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=starfivetech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=starfivetech.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=eUFdKuYu2Lxa8Seu94K3B3chbnKh0reIKC6p2rtJe6Rnvtuu+jcuJH3WvWB1mn5xWnOchRDvkzyK+QCe+r4kzUGgDqf6mgfMI401Ip49YdSG9lac2eOlxgr899yuXozb5tLk8a0Pq/c50uSqrbtLHC5kk48m0JANm3Q7wP1KoRyOKB8Y4oGVZWKHxe4oKyvNyVLKafO7BEmFBxDDbi/AA1/nzmwGfbruhcsCp+dp8DJcAmNbaSqzYhuso7+kOYNrA4dAZL0PgDzeZFybjdkfqeldJdNS86/5xNYikJJNbsrEX2XjT2HicQS4CuZE9FlxuIoGg/clKueuBgAID5aRZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=7q650lvcqo1SL87Anl6PkbcWcCrWtX06HNbpAIc0c4I=; b=c1RFuZuD4iRXfINB88ATm+uEYflGhqIGQhuufaouN4b8g9OLi8P7M4uJ1r2/+XOEp25GIxkz++ADD+FwXH1YxBIwGkcvczKHG1epO3Hqda+1cAVGVpUm5Df8iy0O4hW0rMHQmKDAnxzOqaUaPRzTt0fkfFmLzRTXoPkHAoOrWzVMF/XZEcHjs1gPY6NL5wQS4ZjphdG18zBKNRd4ye2qN4+DPqL5AeSRiUTBGiOUOnPxkcrJ+NlfpPR1PzbJ6hN4Jp6FOS99oOddkk6dr6kPDsliD31JNdsIgu6+rV4lKdr2cEp4hZQS3OZyo50sVMyx0Hh+HvJyVxZ0l5ymPvtHng== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=starfivetech.com; dmarc=pass action=none header.from=starfivetech.com; dkim=pass header.d=starfivetech.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=starfivetech.com; Received: from ZQZPR01MB0979.CHNPR01.prod.partner.outlook.cn (2406:e500:c550:f::12) by ZQZPR01MB0963.CHNPR01.prod.partner.outlook.cn (2406:e500:c550:f::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8114.26; Thu, 7 Nov 2024 06:37:07 +0000 Received: from ZQZPR01MB0979.CHNPR01.prod.partner.outlook.cn ([fe80::617c:34a2:c5bf:8095]) by ZQZPR01MB0979.CHNPR01.prod.partner.outlook.cn ([fe80::617c:34a2:c5bf:8095%5]) with mapi id 15.20.8114.023; Thu, 7 Nov 2024 06:37:07 +0000 From: Ley Foon Tan To: Alexandre Torgue , Jose Abreu , Andrew Lunn Cc: "David S . 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charset="utf-8" In order to mask off the bits, we need to use the '~' operator to invert all the bits of _MASK and clear them. Signed-off-by: Ley Foon Tan Reviewed-by: Simon Horman --- drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net= /ethernet/stmicro/stmmac/dwmac4_dma.c index 22a044d93e17..0cb84a0041a4 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c @@ -274,7 +274,7 @@ static void dwmac4_dma_rx_chan_op_mode(struct stmmac_pr= iv *priv, } else { pr_debug("GMAC: disable RX SF mode (threshold %d)\n", mode); mtl_rx_op &=3D ~MTL_OP_MODE_RSF; - mtl_rx_op &=3D MTL_OP_MODE_RTC_MASK; + mtl_rx_op &=3D ~MTL_OP_MODE_RTC_MASK; if (mode <=3D 32) mtl_rx_op |=3D MTL_OP_MODE_RTC_32; else if (mode <=3D 64) @@ -343,7 +343,7 @@ static void dwmac4_dma_tx_chan_op_mode(struct stmmac_pr= iv *priv, } else { pr_debug("GMAC: disabling TX SF (threshold %d)\n", mode); mtl_tx_op &=3D ~MTL_OP_MODE_TSF; - mtl_tx_op &=3D MTL_OP_MODE_TTC_MASK; + mtl_tx_op &=3D ~MTL_OP_MODE_TTC_MASK; /* Set the transmit threshold */ if (mode <=3D 32) mtl_tx_op |=3D MTL_OP_MODE_TTC_32; --=20 2.34.1 From nobody Sun Nov 24 03:36:02 2024 Received: from CHN02-SH0-obe.outbound.protection.partner.outlook.cn (mail-sh0chn02on2125.outbound.protection.partner.outlook.cn [139.219.146.125]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F07A7198831; Thu, 7 Nov 2024 06:37:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=139.219.146.125 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730961428; cv=fail; b=aVLJ1u5js0JddIhKa1q7KqoURWOzqasgwlhhz2Ikfk3OuEn35Sgvl4HzDtRx0TpqyfdaC3K8MuGNORvKNx+/3Q9SqilVEX7hnoBRkGhWYURvox/raaNAPcA5XxRjFxiA8hOXlGo18siVlCS53H8rZjGwrdIp0mnT1qQa09JqFdc= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730961428; c=relaxed/simple; bh=OM5WEevAgbRAKoz+cI1l9NaI0Va1L6Uet5N29LpnIZg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=hAsg3Ke7w3DMMruNpdRTSm1+Nl6uSH/mtfqe+IB64pJ++bZO9YbR/oGT7xJx/gDcb7csym5w5xnh/dpCKQfUfhqUE2XlLZhPNlmnWR+oY2NJxxjKJQ9Y9mW+yeO0PdUtSCXrjIeH1HMj7eP7tPrlso/p4VljIntQI7nzxmLEVxw= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=starfivetech.com; spf=pass smtp.mailfrom=starfivetech.com; arc=fail smtp.client-ip=139.219.146.125 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=starfivetech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=starfivetech.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=O4i8+7Y/fw0F1TjUJK0HFdXjjzfCeiufGirA2nI5Vi7LLvwMDfXVY3sBO1oa2RJcgAtIEUBhASfXVULBbbtFD5ofXUv2mLQRh4psjONCeXpdY9s1k3pHvTtGE2vYx+09estYs7CTSPWhDBRX9u1LeAaLXkptgmPQD0ODf1QSzncgVz4aEYhEWLmd53A6x1N7CyaxkX9Ddwexo9BN9y1S91sFz/sqy3/TKADl2q89ylP1w9nwTH+GNg6G1QKFAygKaKXy6HehpDBPU/F2j/JTxDkdgBYo0t6G4p5Rn23VIl5PojYuVuatxd6xPm0DUkD4YRVxPDHUn3yKBe9/4NFFNA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=J39ztJJPp5Nd4R5VpwzQyK2Ms6KeAXzG+PM4hDlqzSM=; b=hPzqSSfX4gFt49/iHNq8O9rpKuaHoq05My7NrQZ903+bPD4k5mR+zZ/t75zmnd6Iu1JV8MEzkgtjSqfKson9LgZR8GVxwzQZSNITstTgZI4NAe4eEZERvwF8hFBc8x/11UHtGEF8Pd3BrNpvLKUALLkLU1bWoCSC+hTvFqzCHWwQPpjI9fKP8jCZFmzS4jw/anOh/IpmW6fRKq0AXtBtyV7BHz7U8S/H3D4WNo0ckJNgBYHj8d5IA3GXkPwkl6A7o5u+jMj9PP/Zht2hhkQhl48RQlJhvRZp9wBMbQzRH9X6ByKGPtgIBZ0KRcqZCbi+sr+ABu0r/75hG/Hmr/xGcQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=starfivetech.com; dmarc=pass action=none header.from=starfivetech.com; dkim=pass header.d=starfivetech.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=starfivetech.com; Received: from ZQZPR01MB0979.CHNPR01.prod.partner.outlook.cn (2406:e500:c550:f::12) by ZQZPR01MB0963.CHNPR01.prod.partner.outlook.cn (2406:e500:c550:f::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8114.26; Thu, 7 Nov 2024 06:37:10 +0000 Received: from ZQZPR01MB0979.CHNPR01.prod.partner.outlook.cn ([fe80::617c:34a2:c5bf:8095]) by ZQZPR01MB0979.CHNPR01.prod.partner.outlook.cn ([fe80::617c:34a2:c5bf:8095%5]) with mapi id 15.20.8114.023; Thu, 7 Nov 2024 06:37:09 +0000 From: Ley Foon Tan To: Alexandre Torgue , Jose Abreu , Andrew Lunn Cc: "David S . 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charset="utf-8" The Receive Watchdog Timeout (RWT, bit[9]) is not part of Abnormal Interrupt Summary (AIS). Move the RWT handling out of the AIS condition statement. From databook, the AIS is the logical OR of the following interrupt bits: - Bit 1: Transmit Process Stopped - Bit 7: Receive Buffer Unavailable - Bit 8: Receive Process Stopped - Bit 10: Early Transmit Interrupt - Bit 12: Fatal Bus Error - Bit 13: Context Descriptor Error Signed-off-by: Ley Foon Tan Reviewed-by: Simon Horman --- drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c b/drivers/net= /ethernet/stmicro/stmmac/dwmac4_lib.c index 0d185e54eb7e..57c03d491774 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c @@ -185,8 +185,6 @@ int dwmac4_dma_interrupt(struct stmmac_priv *priv, void= __iomem *ioaddr, x->rx_buf_unav_irq++; if (unlikely(intr_status & DMA_CHAN_STATUS_RPS)) x->rx_process_stopped_irq++; - if (unlikely(intr_status & DMA_CHAN_STATUS_RWT)) - x->rx_watchdog_irq++; if (unlikely(intr_status & DMA_CHAN_STATUS_ETI)) x->tx_early_irq++; if (unlikely(intr_status & DMA_CHAN_STATUS_TPS)) { @@ -198,6 +196,10 @@ int dwmac4_dma_interrupt(struct stmmac_priv *priv, voi= d __iomem *ioaddr, ret =3D tx_hard_error; } } + + if (unlikely(intr_status & DMA_CHAN_STATUS_RWT)) + x->rx_watchdog_irq++; + /* TX/RX NORMAL interrupts */ if (likely(intr_status & DMA_CHAN_STATUS_RI)) { u64_stats_update_begin(&stats->syncp); --=20 2.34.1