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Thu, 07 Nov 2024 07:59:23 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 4A77xMcW001137 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 7 Nov 2024 07:59:22 GMT Received: from hu-pkondeti-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 6 Nov 2024 23:59:18 -0800 From: Pavankumar Kondeti Date: Thu, 7 Nov 2024 13:29:15 +0530 Subject: [PATCH RESEND] iommu/of: Fix pci_request_acs() before enumerating PCI devices Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20241107-pci_acs_fix-v1-1-185a2462a571@quicinc.com> X-B4-Tracking: v=1; b=H4sIAFJzLGcC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDIxNDQwNz3YLkzPjE5OL4tMwKXSMjY8tUg7QkQ3MzCyWgjoKiVKAw2LRopSD XYFc/F6XY2loAnsqmrWUAAAA= To: Joerg Roedel , Will Deacon , "Robin Murphy" , Bjorn Helgaas , "Greg Kroah-Hartman" CC: Joerg Roedel , Rob Herring , "Marek Szyprowski" , Anders Roxell , , , , Xingang Wang , Pavankumar Kondeti X-Mailer: b4 0.13-dev-83828 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: nbmcMKrkHS8BS2iYeBLUo55vRVtzp7rt X-Proofpoint-GUID: nbmcMKrkHS8BS2iYeBLUo55vRVtzp7rt X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1011 priorityscore=1501 mlxscore=0 suspectscore=0 mlxlogscore=999 spamscore=0 adultscore=0 malwarescore=0 phishscore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411070060 From: Xingang Wang When booting with devicetree, the pci_request_acs() is called after the enumeration and initialization of PCI devices, thus the ACS is not enabled. And ACS should be enabled when IOMMU is detected for the PCI host bridge, so add check for IOMMU before probe of PCI host and call pci_request_acs() to make sure ACS will be enabled when enumerating PCI devices. Fixes: 6bf6c24720d33 ("iommu/of: Request ACS from the PCI core when configu= ring IOMMU linkage") Signed-off-by: Xingang Wang Signed-off-by: Pavankumar Kondeti --- Earlier this patch made it to linux-next but got dropped later as it broke PCI on ARM Juno R1 board. AFAICT, this issue is never root caused, so resending this patch to get attention again. https://lore.kernel.org/all/1621566204-37456-1-git-send-email-wangxingang5@= huawei.com/ The original problem that is being fixed by this patch still exists. In my use case, all the PCI VF(s) assigned to a VM are sharing the same group since these functions are attached under a Multi function PCIe root p= ort=20 emulated by the QEMU. This patch fixes that problem. --- drivers/iommu/of_iommu.c | 1 - drivers/pci/of.c | 8 +++++++- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index e7a6a1611d19..f19db52388f5 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -141,7 +141,6 @@ int of_iommu_configure(struct device *dev, struct devic= e_node *master_np, .np =3D master_np, }; =20 - pci_request_acs(); err =3D pci_for_each_dma_alias(to_pci_dev(dev), of_pci_iommu_init, &info); of_pci_check_device_ats(dev, master_np); diff --git a/drivers/pci/of.c b/drivers/pci/of.c index dacea3fc5128..dc90f4e45dd3 100644 --- a/drivers/pci/of.c +++ b/drivers/pci/of.c @@ -637,9 +637,15 @@ static int pci_parse_request_of_pci_ranges(struct devi= ce *dev, =20 int devm_of_pci_bridge_init(struct device *dev, struct pci_host_bridge *br= idge) { - if (!dev->of_node) + struct device_node *node =3D dev->of_node; + + if (!node) return 0; =20 + /* Detect IOMMU and make sure ACS will be enabled */ + if (of_property_read_bool(node, "iommu-map")) + pci_request_acs(); + bridge->swizzle_irq =3D pci_common_swizzle; bridge->map_irq =3D of_irq_parse_and_map_pci; =20 --- base-commit: 59b723cd2adbac2a34fc8e12c74ae26ae45bf230 change-id: 20241107-pci_acs_fix-2239e0fb1768 Best regards, --=20 Pavankumar Kondeti