From nobody Sun Nov 24 12:04:10 2024 Received: from mail-ej1-f41.google.com (mail-ej1-f41.google.com [209.85.218.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F1211DF73D for ; Wed, 6 Nov 2024 09:06:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730883983; cv=none; b=UZK61ymHZz12VGDReyXCVgxM7XVbo4IV5Xg5ZHuaU7BEidK/fRowvd4C+KQ+DkI31W6orH2DP/s5vbJO84ko4s/DkuqUC/GoakaZjifpYHy19lvb4+/b2M3R+4g3ie6tdeKdWNUTsXDJ9csLYMRtdINwRBVOGTac6EXGqrZPAFU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730883983; c=relaxed/simple; bh=DLsE8SY6A8anelIybSwas3SRartaiSrHurtOgVeV0YE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=g/oetl0Gv3EUrHvBtQCk9vkpGDHTfvkVL//sN3wYbqL/3GSv1gdfOX/seoczGc9xYkSBBTEkqcsLK9c7aGwIjHrwwkC8Ktkxxkgf0YbGYPltD1Cil13TbA1/6agVxxKgP0nBrHFqxfmXXlkx9BmfASN7E+j1uEd1x1YgvOro4lw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com; spf=pass smtp.mailfrom=amarulasolutions.com; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b=DD5lr4g9; arc=none smtp.client-ip=209.85.218.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=amarulasolutions.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amarulasolutions.com header.i=@amarulasolutions.com header.b="DD5lr4g9" Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-a93c1cc74fdso1012997866b.3 for ; Wed, 06 Nov 2024 01:06:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amarulasolutions.com; s=google; t=1730883979; x=1731488779; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eK2D5YdiBqlMNYfxLWNo7UJDqbeX8vHqHTifMmfFsII=; b=DD5lr4g9pjAZlHgnk8cT/6wv9vku4bmODCFmEeUpAK8Bio4RSRDTMtUD9oe+0mqIY8 HdpR0xE1Ad+gXIGQRXxByQVAyURzocXEICRmfZHo4iOCZnxz/YTbp7exvebnPKoNIF7e USdlB8wiYEAtBz14Okbu3YOtxY6Yn5Ezo49RA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730883979; x=1731488779; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=eK2D5YdiBqlMNYfxLWNo7UJDqbeX8vHqHTifMmfFsII=; b=or8bAYEGWxK6v4a6Pe0ibwLm3UhrfHOFIpjG1QpcCmtVAZlBK3wyjt/RPmbNgyn/wQ XoCJx+0K2mTnVD957LNFFk4lTFQtVllhUMWyvZLGaGgRV7DeYMPfF9tCqou9KisHq4mv uyT2N44qfZghRtVo7AicFCzCwdcLzJ+9NbRadNCSJWuZ8AXzOxEuzn9wWFgSOtQZ6Kp3 LYTqvEIW9SpX2ZO+fYDRRZuoZFK3MfHLGj81NMnoFXa7fKjYPchjDXZu7jp9hVn/VTyu VHA/SgCwc0dvZJLO0nCqgIodcDq63Rv/cql3hdE/p0cjveMe3oBEI8AmuuPFg9S85gUO C2+w== X-Gm-Message-State: AOJu0YxBFf10jQW3EJ6H/1hjwLeNuZR35f5zF2fekAbIX5/S0Zm1faPs zKWH+eJcR+/lRkTcO5x1EdV2KH+Us/OrIbzN/1/ybgHuRMynYN2/cEgem6vHTXnMc8EezpIsU5y 5 X-Google-Smtp-Source: AGHT+IFR2ALI2nOMRY3tCPEORGk9Pk1VVUWH4SbHWXlpOCHycjnjv8+CE/MFtM052hJoPRrmQx+ifw== X-Received: by 2002:a17:906:b84b:b0:a9e:b68e:909 with SMTP id a640c23a62f3a-a9eb68e0a79mr387359966b.15.1730883979467; Wed, 06 Nov 2024 01:06:19 -0800 (PST) Received: from localhost.localdomain ([2001:b07:6474:ebbf:afb5:f524:6416:8e3]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9eb17f9422sm247781366b.139.2024.11.06.01.06.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Nov 2024 01:06:19 -0800 (PST) From: Dario Binacchi To: linux-kernel@vger.kernel.org Cc: linux-amarula@amarulasolutions.com, Dario Binacchi , Abel Vesa , Fabio Estevam , Michael Turquette , Peng Fan , Pengutronix Kernel Team , Sascha Hauer , Shawn Guo , Stephen Boyd , imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: [PATCH v3 8/8] clk: imx8mp: support spread spectrum clock generation Date: Wed, 6 Nov 2024 09:58:04 +0100 Message-ID: <20241106090549.3684963-9-dario.binacchi@amarulasolutions.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241106090549.3684963-1-dario.binacchi@amarulasolutions.com> References: <20241106090549.3684963-1-dario.binacchi@amarulasolutions.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The patch adds support for spread spectrum clock generation for the audio, video, and DRAM PLLs. Signed-off-by: Dario Binacchi --- Changes in v3: - Use ccm node device Changes in v2: - Add "allOf:" and place it after "required:" block, like in the example schema. - Move the properties definition to the top-level. - Drop unit types as requested by the "make dt_binding_check" command. drivers/clk/imx/clk-imx8mp.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index b2778958a572..e53a688d2cfe 100644 --- a/drivers/clk/imx/clk-imx8mp.c +++ b/drivers/clk/imx/clk-imx8mp.c @@ -410,6 +410,7 @@ static int imx8mp_clocks_probe(struct platform_device *= pdev) struct device *dev =3D &pdev->dev; struct device_node *np, *anatop_np; void __iomem *anatop_base, *ccm_base; + struct imx_pll14xx_ssc pll1443x_ssc; int err; =20 anatop_np =3D of_find_compatible_node(NULL, NULL, "fsl,imx8mp-anatop"); @@ -449,10 +450,14 @@ static int imx8mp_clocks_probe(struct platform_device= *pdev) hws[IMX8MP_SYS_PLL2_REF_SEL] =3D imx_clk_hw_mux("sys_pll2_ref_sel", anato= p_base + 0x104, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)); hws[IMX8MP_SYS_PLL3_REF_SEL] =3D imx_clk_hw_mux("sys_pll3_ref_sel", anato= p_base + 0x114, 0, 2, pll_ref_sels, ARRAY_SIZE(pll_ref_sels)); =20 - hws[IMX8MP_AUDIO_PLL1] =3D imx_clk_hw_pll14xx("audio_pll1", "audio_pll1_r= ef_sel", anatop_base, &imx_1443x_pll); - hws[IMX8MP_AUDIO_PLL2] =3D imx_clk_hw_pll14xx("audio_pll2", "audio_pll2_r= ef_sel", anatop_base + 0x14, &imx_1443x_pll); - hws[IMX8MP_VIDEO_PLL1] =3D imx_clk_hw_pll14xx("video_pll1", "video_pll1_r= ef_sel", anatop_base + 0x28, &imx_1443x_pll); - hws[IMX8MP_DRAM_PLL] =3D imx_clk_hw_pll14xx("dram_pll", "dram_pll_ref_sel= ", anatop_base + 0x50, &imx_1443x_dram_pll); + imx_clk_pll14xx_get_ssc_conf(np, IMX8MP_AUDIO_PLL1, &pll1443x_ssc); + hws[IMX8MP_AUDIO_PLL1] =3D imx_clk_hw_pll14xx_ssc("audio_pll1", "audio_pl= l1_ref_sel", anatop_base, &imx_1443x_pll, &pll1443x_ssc); + imx_clk_pll14xx_get_ssc_conf(np, IMX8MP_AUDIO_PLL2, &pll1443x_ssc); + hws[IMX8MP_AUDIO_PLL2] =3D imx_clk_hw_pll14xx_ssc("audio_pll2", "audio_pl= l2_ref_sel", anatop_base + 0x14, &imx_1443x_pll, &pll1443x_ssc); + imx_clk_pll14xx_get_ssc_conf(np, IMX8MP_VIDEO_PLL1, &pll1443x_ssc); + hws[IMX8MP_VIDEO_PLL1] =3D imx_clk_hw_pll14xx_ssc("video_pll1", "video_pl= l1_ref_sel", anatop_base + 0x28, &imx_1443x_pll, &pll1443x_ssc); + imx_clk_pll14xx_get_ssc_conf(np, IMX8MP_DRAM_PLL, &pll1443x_ssc); + hws[IMX8MP_DRAM_PLL] =3D imx_clk_hw_pll14xx_ssc("dram_pll", "dram_pll_ref= _sel", anatop_base + 0x50, &imx_1443x_dram_pll, &pll1443x_ssc); hws[IMX8MP_GPU_PLL] =3D imx_clk_hw_pll14xx("gpu_pll", "gpu_pll_ref_sel", = anatop_base + 0x64, &imx_1416x_pll); hws[IMX8MP_VPU_PLL] =3D imx_clk_hw_pll14xx("vpu_pll", "vpu_pll_ref_sel", = anatop_base + 0x74, &imx_1416x_pll); hws[IMX8MP_ARM_PLL] =3D imx_clk_hw_pll14xx("arm_pll", "arm_pll_ref_sel", = anatop_base + 0x84, &imx_1416x_pll); --=20 2.43.0