From nobody Sun Nov 24 13:50:38 2024 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C989019993D; Tue, 5 Nov 2024 09:12:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730797970; cv=none; b=nLhBQNjDDBgzW4S29++kGntZj+43lqyA3hy675dlFl09wuF67JgLDNwIR+qxxZgxniXBNgBgcsbESEEK8pJvBcmH6zsgx3iTtn4ekQV74ztpvdpCNvboOhbKWM4sPaU8C9tR4x8njWBZrvYn6ZihSQ82oqeCrJ8x3pXxhCVglLc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730797970; c=relaxed/simple; bh=e3bDNG85v98/JJrTItGwf1O9+AL2cml8r5t6nDtvdVk=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=CcfQ+F8mV5cO7KNRawEtdWAdknEMoVfGhQ753HZBDz4bED6hU19I4boTdVi5DGykggk5OUvokrhi02se057qr3/C0lvtpRHo/Ak++Mi5DvcreKSUBBsbkU8EeUAC3QcrI5RMRDHsITOUdY2ej9LdnVoNXUky8M75+UZjG1EUSRw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=OezhxN4V; arc=none smtp.client-ip=198.47.19.141 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="OezhxN4V" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 4A59CR4b053563; Tue, 5 Nov 2024 03:12:27 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1730797947; bh=pSA2DcK6+VL4PVPhLhuyvaj/CGjejRtTkA3hYib9a0c=; h=From:To:CC:Subject:Date; b=OezhxN4VX9rHbRsTqEjiZODjRuplYhc49cTDGmMVUXNd5Rx/nGN8RvBTta6CUpAo7 HZC7obGcs/5eYu91tqCmhkwrrmyxS3PMaFAd+5eex9JINTcl68+ku7Gk7QbmrvQXG+ TnaMDWMxTX/UT3qUNHyWzcPn81ZGGvfRGu0rv1Gs= Received: from DFLE109.ent.ti.com (dfle109.ent.ti.com [10.64.6.30]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 4A59CRob050273 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 5 Nov 2024 03:12:27 -0600 Received: from DFLE113.ent.ti.com (10.64.6.34) by DFLE109.ent.ti.com (10.64.6.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Tue, 5 Nov 2024 03:12:27 -0600 Received: from lelvsmtp6.itg.ti.com (10.180.75.249) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Tue, 5 Nov 2024 03:12:27 -0600 Received: from localhost ([10.249.128.178]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 4A59CP0q088748; Tue, 5 Nov 2024 03:12:26 -0600 From: Bhavya Kapoor To: , CC: , , , , , , , , , Subject: [PATCH] arm64: dts: ti: k3-j722s-evm: Enable support for mcu_i2c0 Date: Tue, 5 Nov 2024 14:42:24 +0530 Message-ID: <20241105091224.23453-1-b-kapoor@ti.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Enable support for mcu_i2c0 and add pinmux required to bring out the mcu_i2c0 signals on 40-pin RPi expansion header on the J722S EVM. Signed-off-by: Bhavya Kapoor Signed-off-by: Shreyash Sinha Reviewed-by: Prasanth Babu Mantena --- arch/arm64/boot/dts/ti/k3-j722s-evm.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/= ti/k3-j722s-evm.dts index a00f4a7d20d9..796287c76b69 100644 --- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts @@ -406,6 +406,13 @@ &main_uart5 { =20 &mcu_pmx0 { =20 + mcu_i2c0_pins_default: mcu-i2c0-default-pins { + pinctrl-single,pins =3D < + J722S_MCU_IOPAD(0x048, PIN_INPUT, 0) /* (E11) MCU_I2C0_SDA */ + J722S_MCU_IOPAD(0x044, PIN_INPUT, 0) /* (B13) MCU_I2C0_SCL */ + >; + }; + mcu_mcan0_pins_default: mcu-mcan0-default-pins { pinctrl-single,pins =3D < J722S_MCU_IOPAD(0x038, PIN_INPUT, 0) /* (D8) MCU_MCAN0_RX */ @@ -812,3 +819,10 @@ &main_mcan0 { &mcu_gpio0 { status =3D "okay"; }; + +&mcu_i2c0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mcu_i2c0_pins_default>; + clock-frequency =3D <400000>; + status =3D "okay"; +}; --=20 2.34.1