From nobody Sun Nov 24 15:12:10 2024 Received: from mx08-00376f01.pphosted.com (mx08-00376f01.pphosted.com [91.207.212.86]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6F5AE1509AF; Tue, 5 Nov 2024 15:59:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.207.212.86 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730822387; cv=none; b=FExWfDdx333YD/9kD87g2kA+qDY+hXW2f/kh5nNeLn2tYvGvaiNsvUVU/GDTcdq8gCdnu6Bns6RKzrOO7U+QJ2pUOjMgbj6Cbu5dcj7IrYTYRYVO6tTkKMgveEBC15Phf6cCFRzcHy0XEPnTvQ88bdISZyVgtKySqje1KqR+RNE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730822387; c=relaxed/simple; bh=xpvmkOGoJ8kLva6fvxTjzOM3lj7B471NHdnui9EiYKg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=p/cIg7Hcy6/Efo+8vFRhXrTjlgOYB4b3NTy44frfPB+iJOh/3Uz00xp8yzd0Jgz8CzmcpXAEwjc2xCKaZyQBZWl10PNqxGq0w0L+K+HKAz8K7+QlKM5T+nUL4s4DMZRAoh44AeKfU6XplnWh7+npzbzz1AfGlB6M31UMLQLkuPw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=imgtec.com; spf=pass smtp.mailfrom=imgtec.com; dkim=pass (2048-bit key) header.d=imgtec.com header.i=@imgtec.com header.b=sGfvAXTB; arc=none smtp.client-ip=91.207.212.86 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=imgtec.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=imgtec.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=imgtec.com header.i=@imgtec.com header.b="sGfvAXTB" Received: from pps.filterd (m0168888.ppops.net [127.0.0.1]) by mx08-00376f01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4A5EF3v2003827; Tue, 5 Nov 2024 15:58:27 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=imgtec.com; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=dk201812; bh=m 8MK1YmMNs1hdmI79eE3tV5JmoW7c58L5kQGDhzJT8o=; b=sGfvAXTBnHssZO2GP M3UgXbFzSq3kajMLVoI+lsrTF/oSxZOstban6QQIUaGfPEgKhhE0WJ7stP9/TyEJ VF1HBIVUwK6n9lTcMzlYP+ygxqKXZ2YWJnknM/GtBL2cGFd0V3q5CIClRfJBWS34 YLa8AJR//q48d0CXgyseG1OL8f87QW+u3LCINewXIUubitX5VlExh9/HV0gVTalX ELtNYLXEyA6w6bzhJuXcunws66zRg9Szyv7tmvYe4l57o1vKN4SK8lbW9WKJjLh2 9P2deoChaGtvad95gWhlssbF/stWemW/k37H0CZxockWzjTPW7WQie0vvZiHD9HT 81e5Q== Received: from hhmail05.hh.imgtec.org (83-244-153-141.cust-83.exponential-e.net [83.244.153.141]) by mx08-00376f01.pphosted.com (PPS) with ESMTPS id 42nb7wta0s-4 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Tue, 05 Nov 2024 15:58:27 +0000 (GMT) Received: from 1.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.0.ip6.arpa (172.25.16.114) by HHMAIL05.hh.imgtec.org (10.100.10.120) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Tue, 5 Nov 2024 15:58:25 +0000 From: Matt Coster Date: Tue, 5 Nov 2024 15:58:09 +0000 Subject: [PATCH 03/21] dt-bindings: gpu: img: Power domain details Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20241105-sets-bxs-4-64-patch-v1-v1-3-4ed30e865892@imgtec.com> References: <20241105-sets-bxs-4-64-patch-v1-v1-0-4ed30e865892@imgtec.com> In-Reply-To: <20241105-sets-bxs-4-64-patch-v1-v1-0-4ed30e865892@imgtec.com> To: Frank Binns , Matt Coster , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Nishanth Menon , "Vignesh Raghavendra" , Tero Kristo CC: , , , , Randolph Sapp , Darren Etheridge X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1915; i=matt.coster@imgtec.com; h=from:subject:message-id; bh=xpvmkOGoJ8kLva6fvxTjzOM3lj7B471NHdnui9EiYKg=; b=owGbwMvMwCFWuUfy8817WRsYT6slMaRrOcwJDtW9YnZ1UiZfOp+M491JKk5F3ALme6ZkzLazO nZ8zwG7jlIWBjEOBlkxRZYdKyxXqP1R05K48asYZg4rE8gQBi5OAZjI7icM/8MK+9uT+5vOJJ5Y qNq/SMr7tYXfv7rrJ/qOFO20LjA+6c7w30dXe9e77VnVTdPKSlTO6D3kkWY1em2pFdFxo6+aNWg aJwA= X-Developer-Key: i=matt.coster@imgtec.com; a=openpgp; fpr=05A40CFCE7269D61D97100A1747F0A9036F90DFA X-EXCLAIMER-MD-CONFIG: 15a78312-3e47-46eb-9010-2e54d84a9631 X-Authority-Analysis: v=2.4 cv=ddzS3mXe c=1 sm=1 tr=0 ts=672a40a3 cx=c_pps a=AKOq//PuzOIrVTIF9yBwbA==:117 a=AKOq//PuzOIrVTIF9yBwbA==:17 a=hzDjp0mCheYA:10 a=IkcTkHD0fZMA:10 a=VlfZXiiP6vEA:10 a=r_1tXGB3AAAA:8 a=aNuRvPZPtIV8pc9XrW8A:9 a=QEXdDO2ut3YA:10 a=aimXnJ6PnzgsTu0FwM6W:22 a=t8nPyN_e6usw4ciXM-Pk:22 X-Proofpoint-GUID: G43ywWuRVUE1PLqMd0PHqt08M6XrxAwv X-Proofpoint-ORIG-GUID: G43ywWuRVUE1PLqMd0PHqt08M6XrxAwv The single existing GPU (AXE-1-16M) only requires a single power domain. Subsequent patches will add support for BXS-4-64 MC1, which has two power domains. Add infrastructure now to allow for this. Signed-off-by: Matt Coster --- .../devicetree/bindings/gpu/img,powervr-rogue.yaml | 29 ++++++++++++++++++= +++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml b= /Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml index 6924831d3e9dd9b2b052ca8f9d7228ff25526532..55f422be1bc5b7564e3e81f24c4= b93857f3e12fe 100644 --- a/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml +++ b/Documentation/devicetree/bindings/gpu/img,powervr-rogue.yaml @@ -49,7 +49,16 @@ properties: maxItems: 1 =20 power-domains: - maxItems: 1 + minItems: 1 + maxItems: 2 + + power-domain-names: + oneOf: + - items: + - const: a + - items: + - const: a + - const: b =20 required: - compatible @@ -57,10 +66,27 @@ required: - clocks - clock-names - interrupts + - power-domains + - power-domain-names =20 additionalProperties: false =20 allOf: + # Cores with a single power domain + - if: + properties: + compatible: + contains: + anyOf: + - const: img,img-axe-1-16m + then: + properties: + power-domains: + minItems: 1 + maxItems: 1 + power-domain-names: + items: + - const: a # Vendor integrations using a single clock domain - if: properties: @@ -90,4 +116,5 @@ examples: clock-names =3D "core"; interrupts =3D ; power-domains =3D <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>; + power-domain-names =3D "a"; }; --=20 2.47.0