From nobody Sun Nov 24 15:05:28 2024 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B3F36216424; Tue, 5 Nov 2024 21:18:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730841533; cv=none; b=jcKNvaFwKTFEdPqXkwCDscI8lUC2wfym1kVVQA4V3EwSN1kwmQ7NlCD6UBkcKYQTYYKEpsqXYb/VsOmbu3lOnxKWEJeP7zw1IdhVuNmVMlfbzQF8eG3CqYSkSXUheXN93CeLjQ++otr2DAsJVmc1NfQaI0TcnLJEdPc6jMlSgDo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730841533; c=relaxed/simple; bh=En2hPkHBBMmKe1JVp358wJIe+shZ/brfNZXSPnqrzrg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=C6JGFL9fQqY598byjnuNJ1QxB0xU9m2W16msrL8rQZbQoCeL816GWjKVkYkYeQp6gr9bVGUJIMI2iEkcx5Z9b28/6BBWjD9xHx3oUJePy6Nb88yBkTDkPUc/tBan3pDPMe8WmAKxf/ulCQIHMd7/V4rinZMfprJ8Uh7kSAB7cjQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=io0q0Zf9; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="io0q0Zf9" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1A533C4CED4; Tue, 5 Nov 2024 21:18:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1730841533; bh=En2hPkHBBMmKe1JVp358wJIe+shZ/brfNZXSPnqrzrg=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=io0q0Zf9yriBWQH2ety7yUT2nRhznVr1gFCNneaLd1fcJcH5xZ3t20ozKaiiQBuA0 FBuSyXC+nbBnwVE0G4Rb1OvjDpt0x/iCW3KPklj4YnSo1oVNBZ/8jehpbm2LG8XeED ha8F5n2wy9gtDp3GagtwChoBIPmSJrq1Exb2N0zhDbKW4ToKqcD2Ox0gCYjViZjmYa AASSkXsl6TQbQRLtKm3hCD+RdeDkLiFCSCL1unEt04jvEaNOBc5aIRLYHdA/DYy9Oe /7RETzsYXlCjJfTsUr407H+nq0Mti4gIsagDP7MYFAdAvQwLoyAcBtEQLOFFMW4orl 9k8NT0y8q3ENA== From: "Rob Herring (Arm)" Date: Tue, 05 Nov 2024 15:18:40 -0600 Subject: [PATCH RESEND v2 2/2] arm64: dts: lg131x: Update spi clock properties Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241105-dts-spi-fixes-v2-2-623501e5d1ca@kernel.org> References: <20241105-dts-spi-fixes-v2-0-623501e5d1ca@kernel.org> In-Reply-To: <20241105-dts-spi-fixes-v2-0-623501e5d1ca@kernel.org> To: soc@kernel.org, Kuldeep Singh , Suravee Suthikulpanit , Tom Lendacky , Krzysztof Kozlowski , Conor Dooley , Chanho Min , Vladimir Zapolskiy , Piotr Wojtaszczyk Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org X-Mailer: b4 0.15-dev From: Kuldeep Singh PL022 binding require two clocks to be defined but LG1312 and LG1313 platforms don't comply with bindings and define only one clock. Update spi clocks and clocks-names property by adding appropriate clock reference to make it compliant with bindings. CC: Chanho Min Signed-off-by: Kuldeep Singh Signed-off-by: Rob Herring (Arm) --- Arnd, Please apply directly. --- arch/arm64/boot/dts/lg/lg1312.dtsi | 8 ++++---- arch/arm64/boot/dts/lg/lg1313.dtsi | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm64/boot/dts/lg/lg1312.dtsi b/arch/arm64/boot/dts/lg/lg= 1312.dtsi index b864ffa74ea8..bb0bcc6875dc 100644 --- a/arch/arm64/boot/dts/lg/lg1312.dtsi +++ b/arch/arm64/boot/dts/lg/lg1312.dtsi @@ -173,15 +173,15 @@ spi0: spi@fe800000 { compatible =3D "arm,pl022", "arm,primecell"; reg =3D <0x0 0xfe800000 0x1000>; interrupts =3D ; - clocks =3D <&clk_bus>; - clock-names =3D "apb_pclk"; + clocks =3D <&clk_bus>, <&clk_bus>; + clock-names =3D "sspclk", "apb_pclk"; }; spi1: spi@fe900000 { compatible =3D "arm,pl022", "arm,primecell"; reg =3D <0x0 0xfe900000 0x1000>; interrupts =3D ; - clocks =3D <&clk_bus>; - clock-names =3D "apb_pclk"; + clocks =3D <&clk_bus>, <&clk_bus>; + clock-names =3D "sspclk", "apb_pclk"; }; dmac0: dma-controller@c1128000 { compatible =3D "arm,pl330", "arm,primecell"; diff --git a/arch/arm64/boot/dts/lg/lg1313.dtsi b/arch/arm64/boot/dts/lg/lg= 1313.dtsi index 996fb39bb50c..c07d670bc465 100644 --- a/arch/arm64/boot/dts/lg/lg1313.dtsi +++ b/arch/arm64/boot/dts/lg/lg1313.dtsi @@ -173,15 +173,15 @@ spi0: spi@fe800000 { compatible =3D "arm,pl022", "arm,primecell"; reg =3D <0x0 0xfe800000 0x1000>; interrupts =3D ; - clocks =3D <&clk_bus>; - clock-names =3D "apb_pclk"; + clocks =3D <&clk_bus>, <&clk_bus>; + clock-names =3D "sspclk", "apb_pclk"; }; spi1: spi@fe900000 { compatible =3D "arm,pl022", "arm,primecell"; reg =3D <0x0 0xfe900000 0x1000>; interrupts =3D ; - clocks =3D <&clk_bus>; - clock-names =3D "apb_pclk"; + clocks =3D <&clk_bus>, <&clk_bus>; + clock-names =3D "sspclk", "apb_pclk"; }; dmac0: dma-controller@c1128000 { compatible =3D "arm,pl330", "arm,primecell"; --=20 2.45.2