From nobody Sun Nov 24 15:26:12 2024 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4AA5F1FF5E3; Tue, 5 Nov 2024 07:52:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.132.182.106 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730793171; cv=none; b=SFysXnHk0E99nYahct2RQPdVpmNet4HxzUPjla6blKHI3uBeGdbeTdzmdPaq7XWTddYbtXctqmy8xxBy7A0BuDM37mBIVZMIufocuWTDDUQoRpeMVg7Y2YCFsGPuq9RS/PsoqgWu5DOEL3zNcuxqTc+ucVKi0TsWKNbDwsL/XrM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730793171; c=relaxed/simple; bh=0L0wzzkDtib2Wnd8hi1ULjk1/pzs7S/3Q3eiYVfK5O8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-ID:References: In-Reply-To:To:CC; b=KG1KBI/9S0VeKwDXPkySdN1cnMgRWu2OiUQrAVsR3jIuS4H5uyUcDCWalO8TIoKblB4zvdeVeotAh7N5aTltkZFYN5rYn1w6lXE2VLs3GmAgLzS99MvusdIXraRQLYgi/NaF4WkhBvzkLiY3505w7N3BPRnlRNDtPJW0+iPgJG8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=iI7TwTGl; arc=none smtp.client-ip=185.132.182.106 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="iI7TwTGl" Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 4A52Eak7029108; Tue, 5 Nov 2024 08:52:33 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= j5WNgw8r9+Ld0aSEqHvq7bt6ZOBQA4a8Zivto1yf4ZA=; b=iI7TwTGlMXDX638F D9n6O57b+IRnqGMn8yXG8OHJK+PDh/PEy4Ldfwf8Of+SG+huUVI5FijmP+BjTFzz 5x0QKrhecHNui/fTDYnHe8Wm6JKf6jGg42XV0OzfAkzCQ7RPqq+0DqoKYJXfLVTk t6S8/Put7kSnLiIUhPYDpNavGJn8zAYkD+4Dz/j27kPQr//hs04kYfohRzncPIya Aw02za8pa16hdcnVy7geCbm1OAFJ0WHVWNJZ4j/S7OgYz+OhHewiIqIFOWTM3O3j 1ovHYWJlEkTLUGhs+WoMsf3DdyBuT4nvjGnIhu/IS4hryAdLbrlUyjH4//7CvSE6 icjlhw== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 42nd05atae-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 05 Nov 2024 08:52:32 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id 9C65240046; Tue, 5 Nov 2024 08:50:26 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 38827250790; Tue, 5 Nov 2024 08:49:32 +0100 (CET) Received: from localhost (10.129.178.213) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Tue, 5 Nov 2024 08:49:31 +0100 From: Alain Volmat Date: Tue, 5 Nov 2024 08:49:09 +0100 Subject: [PATCH v2 06/15] media: stm32: dcmipp: rename dcmipp_parallel into dcmipp_input Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-ID: <20241105-csi_dcmipp_mp25-v2-6-b9fc8a7273c2@foss.st.com> References: <20241105-csi_dcmipp_mp25-v2-0-b9fc8a7273c2@foss.st.com> In-Reply-To: <20241105-csi_dcmipp_mp25-v2-0-b9fc8a7273c2@foss.st.com> To: Hugues Fruchet , Mauro Carvalho Chehab , Maxime Coquelin , Alexandre Torgue , Hans Verkuil , Sakari Ailus , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel CC: , , , , , Alain Volmat X-Mailer: b4 0.14.2 X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 In preparation of the introduction of dcmipp csi input support, rename the dcmipp_parallel subdev into a generic dcmipp_input which will be in charge of handling both parallel input & csi input. Only structures / variables / functions and file naming are changed without any functional modifications. Signed-off-by: Alain Volmat --- .../media/platform/st/stm32/stm32-dcmipp/Makefile | 2 +- .../platform/st/stm32/stm32-dcmipp/dcmipp-common.h | 4 +- .../platform/st/stm32/stm32-dcmipp/dcmipp-core.c | 12 +- .../{dcmipp-parallel.c =3D> dcmipp-input.c} | 178 ++++++++++-----= ------ 4 files changed, 98 insertions(+), 98 deletions(-) diff --git a/drivers/media/platform/st/stm32/stm32-dcmipp/Makefile b/driver= s/media/platform/st/stm32/stm32-dcmipp/Makefile index 8920d9388a215757381ad7d58bd445c3ba76c792..159105fb40b88b8483368aab03f= 0170b133d4fac 100644 --- a/drivers/media/platform/st/stm32/stm32-dcmipp/Makefile +++ b/drivers/media/platform/st/stm32/stm32-dcmipp/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 -stm32-dcmipp-y :=3D dcmipp-core.o dcmipp-common.o dcmipp-parallel.o dcmipp= -byteproc.o dcmipp-bytecap.o +stm32-dcmipp-y :=3D dcmipp-core.o dcmipp-common.o dcmipp-input.o dcmipp-by= teproc.o dcmipp-bytecap.o =20 obj-$(CONFIG_VIDEO_STM32_DCMIPP) +=3D stm32-dcmipp.o diff --git a/drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-common.h b= /drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-common.h index 7a7cf43baf24dd2b3242a191d2d8d870d26b5f58..fe5f97233f5e8bd2cd778930656= b14464f52d22f 100644 --- a/drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-common.h +++ b/drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-common.h @@ -199,11 +199,11 @@ static inline void __reg_clear(struct device *dev, vo= id __iomem *base, u32 reg, } =20 /* DCMIPP subdev init / release entry points */ -struct dcmipp_ent_device *dcmipp_par_ent_init(struct device *dev, +struct dcmipp_ent_device *dcmipp_inp_ent_init(struct device *dev, const char *entity_name, struct v4l2_device *v4l2_dev, void __iomem *regs); -void dcmipp_par_ent_release(struct dcmipp_ent_device *ved); +void dcmipp_inp_ent_release(struct dcmipp_ent_device *ved); struct dcmipp_ent_device * dcmipp_byteproc_ent_init(struct device *dev, const char *entity_name, struct v4l2_device *v4l2_dev, void __iomem *regs); diff --git a/drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-core.c b/d= rivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-core.c index 7f771ea49b78484560af9f543e916406f4f2945e..50b9b964fbc4674b870189736a4= 9f1d6a02b2503 100644 --- a/drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-core.c +++ b/drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-core.c @@ -95,9 +95,9 @@ struct dcmipp_pipeline_config { =20 static const struct dcmipp_ent_config stm32mp13_ent_config[] =3D { { - .name =3D "dcmipp_parallel", - .init =3D dcmipp_par_ent_init, - .release =3D dcmipp_par_ent_release, + .name =3D "dcmipp_input", + .init =3D dcmipp_inp_ent_init, + .release =3D dcmipp_inp_ent_release, }, { .name =3D "dcmipp_dump_postproc", @@ -111,12 +111,12 @@ static const struct dcmipp_ent_config stm32mp13_ent_c= onfig[] =3D { }, }; =20 -#define ID_PARALLEL 0 +#define ID_INPUT 0 #define ID_DUMP_BYTEPROC 1 #define ID_DUMP_CAPTURE 2 =20 static const struct dcmipp_ent_link stm32mp13_ent_links[] =3D { - DCMIPP_ENT_LINK(ID_PARALLEL, 1, ID_DUMP_BYTEPROC, 0, + DCMIPP_ENT_LINK(ID_INPUT, 1, ID_DUMP_BYTEPROC, 0, MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE), DCMIPP_ENT_LINK(ID_DUMP_BYTEPROC, 1, ID_DUMP_CAPTURE, 0, MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE), @@ -309,7 +309,7 @@ static int dcmipp_graph_notify_bound(struct v4l2_async_= notifier *notifier, } =20 /* Parallel input device detected, connect it to parallel subdev */ - sink =3D dcmipp->entity[ID_PARALLEL]; + sink =3D dcmipp->entity[ID_INPUT]; sink->bus.flags =3D vep.bus.parallel.flags; sink->bus.bus_width =3D vep.bus.parallel.bus_width; sink->bus.data_shift =3D vep.bus.parallel.data_shift; diff --git a/drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-parallel.c= b/drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-input.c similarity index 66% rename from drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-parallel.c rename to drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-input.c index 823c9da336a7fc63dca2aeeb2ac9377821bf6371..689eb4c72e1808bc30a2a175d90= 7229c0910542d 100644 --- a/drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-parallel.c +++ b/drivers/media/platform/st/stm32/stm32-dcmipp/dcmipp-input.c @@ -34,7 +34,7 @@ #define IS_SINK(pad) (!(pad)) #define IS_SRC(pad) ((pad)) =20 -struct dcmipp_par_pix_map { +struct dcmipp_inp_pix_map { unsigned int code_sink; unsigned int code_src; u8 prcr_format; @@ -48,7 +48,7 @@ struct dcmipp_par_pix_map { .prcr_format =3D DCMIPP_PRCR_FORMAT_##prcr, \ .prcr_swapcycles =3D swap, \ } -static const struct dcmipp_par_pix_map dcmipp_par_pix_map_list[] =3D { +static const struct dcmipp_inp_pix_map dcmipp_inp_pix_map_list[] =3D { /* RGB565 */ PIXMAP_SINK_SRC_PRCR_SWAP(RGB565_2X8_LE, RGB565_2X8_LE, RGB565, 1), PIXMAP_SINK_SRC_PRCR_SWAP(RGB565_2X8_BE, RGB565_2X8_LE, RGB565, 0), @@ -74,18 +74,18 @@ static const struct dcmipp_par_pix_map dcmipp_par_pix_m= ap_list[] =3D { * Search through the pix_map table, skipping two consecutive entry with t= he * same code */ -static inline const struct dcmipp_par_pix_map *dcmipp_par_pix_map_by_index +static inline const struct dcmipp_inp_pix_map *dcmipp_inp_pix_map_by_index (unsigned int index, unsigned int pad) { unsigned int i =3D 0; u32 prev_code =3D 0, cur_code; =20 - while (i < ARRAY_SIZE(dcmipp_par_pix_map_list)) { + while (i < ARRAY_SIZE(dcmipp_inp_pix_map_list)) { if (IS_SRC(pad)) - cur_code =3D dcmipp_par_pix_map_list[i].code_src; + cur_code =3D dcmipp_inp_pix_map_list[i].code_src; else - cur_code =3D dcmipp_par_pix_map_list[i].code_sink; + cur_code =3D dcmipp_inp_pix_map_list[i].code_sink; =20 if (cur_code =3D=3D prev_code) { i++; @@ -99,32 +99,32 @@ static inline const struct dcmipp_par_pix_map *dcmipp_p= ar_pix_map_by_index index--; } =20 - if (i >=3D ARRAY_SIZE(dcmipp_par_pix_map_list)) + if (i >=3D ARRAY_SIZE(dcmipp_inp_pix_map_list)) return NULL; =20 - return &dcmipp_par_pix_map_list[i]; + return &dcmipp_inp_pix_map_list[i]; } =20 -static inline const struct dcmipp_par_pix_map *dcmipp_par_pix_map_by_code +static inline const struct dcmipp_inp_pix_map *dcmipp_inp_pix_map_by_code (u32 code_sink, u32 code_src) { unsigned int i; =20 - for (i =3D 0; i < ARRAY_SIZE(dcmipp_par_pix_map_list); i++) { - if ((dcmipp_par_pix_map_list[i].code_sink =3D=3D code_sink && - dcmipp_par_pix_map_list[i].code_src =3D=3D code_src) || - (dcmipp_par_pix_map_list[i].code_sink =3D=3D code_src && - dcmipp_par_pix_map_list[i].code_src =3D=3D code_sink) || - (dcmipp_par_pix_map_list[i].code_sink =3D=3D code_sink && + for (i =3D 0; i < ARRAY_SIZE(dcmipp_inp_pix_map_list); i++) { + if ((dcmipp_inp_pix_map_list[i].code_sink =3D=3D code_sink && + dcmipp_inp_pix_map_list[i].code_src =3D=3D code_src) || + (dcmipp_inp_pix_map_list[i].code_sink =3D=3D code_src && + dcmipp_inp_pix_map_list[i].code_src =3D=3D code_sink) || + (dcmipp_inp_pix_map_list[i].code_sink =3D=3D code_sink && code_src =3D=3D 0) || (code_sink =3D=3D 0 && - dcmipp_par_pix_map_list[i].code_src =3D=3D code_src)) - return &dcmipp_par_pix_map_list[i]; + dcmipp_inp_pix_map_list[i].code_src =3D=3D code_src)) + return &dcmipp_inp_pix_map_list[i]; } return NULL; } =20 -struct dcmipp_par_device { +struct dcmipp_inp_device { struct dcmipp_ent_device ved; struct v4l2_subdev sd; struct device *dev; @@ -142,7 +142,7 @@ static const struct v4l2_mbus_framefmt fmt_default =3D { .xfer_func =3D DCMIPP_XFER_FUNC_DEFAULT, }; =20 -static int dcmipp_par_init_state(struct v4l2_subdev *sd, +static int dcmipp_inp_init_state(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state) { unsigned int i; @@ -157,12 +157,12 @@ static int dcmipp_par_init_state(struct v4l2_subdev *= sd, return 0; } =20 -static int dcmipp_par_enum_mbus_code(struct v4l2_subdev *sd, +static int dcmipp_inp_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_mbus_code_enum *code) { - const struct dcmipp_par_pix_map *vpix =3D - dcmipp_par_pix_map_by_index(code->index, code->pad); + const struct dcmipp_inp_pix_map *vpix =3D + dcmipp_inp_pix_map_by_index(code->index, code->pad); =20 if (!vpix) return -EINVAL; @@ -172,17 +172,17 @@ static int dcmipp_par_enum_mbus_code(struct v4l2_subd= ev *sd, return 0; } =20 -static int dcmipp_par_enum_frame_size(struct v4l2_subdev *sd, +static int dcmipp_inp_enum_frame_size(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_frame_size_enum *fse) { - const struct dcmipp_par_pix_map *vpix; + const struct dcmipp_inp_pix_map *vpix; =20 if (fse->index) return -EINVAL; =20 /* Only accept code in the pix map table */ - vpix =3D dcmipp_par_pix_map_by_code(IS_SINK(fse->pad) ? fse->code : 0, + vpix =3D dcmipp_inp_pix_map_by_code(IS_SINK(fse->pad) ? fse->code : 0, IS_SRC(fse->pad) ? fse->code : 0); if (!vpix) return -EINVAL; @@ -195,20 +195,20 @@ static int dcmipp_par_enum_frame_size(struct v4l2_sub= dev *sd, return 0; } =20 -static void dcmipp_par_adjust_fmt(struct dcmipp_par_device *par, +static void dcmipp_inp_adjust_fmt(struct dcmipp_inp_device *inp, struct v4l2_mbus_framefmt *fmt, __u32 pad) { - const struct dcmipp_par_pix_map *vpix; + const struct dcmipp_inp_pix_map *vpix; =20 /* Only accept code in the pix map table */ - vpix =3D dcmipp_par_pix_map_by_code(IS_SINK(pad) ? fmt->code : 0, + vpix =3D dcmipp_inp_pix_map_by_code(IS_SINK(pad) ? fmt->code : 0, IS_SRC(pad) ? fmt->code : 0); if (!vpix) fmt->code =3D fmt_default.code; =20 /* Exclude JPEG if BT656 bus is selected */ if (vpix && vpix->code_sink =3D=3D MEDIA_BUS_FMT_JPEG_1X8 && - par->ved.bus_type =3D=3D V4L2_MBUS_BT656) + inp->ved.bus_type =3D=3D V4L2_MBUS_BT656) fmt->code =3D fmt_default.code; =20 fmt->width =3D clamp_t(u32, fmt->width, DCMIPP_FRAME_MIN_WIDTH, @@ -222,11 +222,11 @@ static void dcmipp_par_adjust_fmt(struct dcmipp_par_d= evice *par, dcmipp_colorimetry_clamp(fmt); } =20 -static int dcmipp_par_set_fmt(struct v4l2_subdev *sd, +static int dcmipp_inp_set_fmt(struct v4l2_subdev *sd, struct v4l2_subdev_state *sd_state, struct v4l2_subdev_format *fmt) { - struct dcmipp_par_device *par =3D v4l2_get_subdevdata(sd); + struct dcmipp_inp_device *inp =3D v4l2_get_subdevdata(sd); struct v4l2_mbus_framefmt *mf; =20 if (v4l2_subdev_is_streaming(sd)) @@ -235,10 +235,10 @@ static int dcmipp_par_set_fmt(struct v4l2_subdev *sd, mf =3D v4l2_subdev_state_get_format(sd_state, fmt->pad); =20 /* Set the new format */ - dcmipp_par_adjust_fmt(par, &fmt->format, fmt->pad); + dcmipp_inp_adjust_fmt(inp, &fmt->format, fmt->pad); =20 - dev_dbg(par->dev, "%s: format update: old:%dx%d (0x%x, %d, %d, %d, %d) ne= w:%dx%d (0x%x, %d, %d, %d, %d)\n", - par->sd.name, + dev_dbg(inp->dev, "%s: format update: old:%dx%d (0x%x, %d, %d, %d, %d) ne= w:%dx%d (0x%x, %d, %d, %d, %d)\n", + inp->sd.name, /* old */ mf->width, mf->height, mf->code, mf->colorspace, mf->quantization, @@ -254,30 +254,30 @@ static int dcmipp_par_set_fmt(struct v4l2_subdev *sd, if (IS_SINK(fmt->pad)) { mf =3D v4l2_subdev_state_get_format(sd_state, 1); *mf =3D fmt->format; - dcmipp_par_adjust_fmt(par, mf, 1); + dcmipp_inp_adjust_fmt(inp, mf, 1); } =20 return 0; } =20 -static int dcmipp_par_configure(struct dcmipp_par_device *par, +static int dcmipp_inp_configure(struct dcmipp_inp_device *inp, struct v4l2_subdev_state *state) { u32 val =3D 0; - const struct dcmipp_par_pix_map *vpix; + const struct dcmipp_inp_pix_map *vpix; struct v4l2_mbus_framefmt *sink_fmt; struct v4l2_mbus_framefmt *src_fmt; =20 /* Set vertical synchronization polarity */ - if (par->ved.bus.flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) + if (inp->ved.bus.flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) val |=3D DCMIPP_PRCR_VSPOL; =20 /* Set horizontal synchronization polarity */ - if (par->ved.bus.flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) + if (inp->ved.bus.flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) val |=3D DCMIPP_PRCR_HSPOL; =20 /* Set pixel clock polarity */ - if (par->ved.bus.flags & V4L2_MBUS_PCLK_SAMPLE_RISING) + if (inp->ved.bus.flags & V4L2_MBUS_PCLK_SAMPLE_RISING) val |=3D DCMIPP_PRCR_PCKPOL; =20 /* @@ -287,23 +287,23 @@ static int dcmipp_par_configure(struct dcmipp_par_dev= ice *par, * SAV=3D0xff000080 & EAV=3D0xff00009d. * With DCMIPP this means LSC=3DSAV=3D0x80 & LEC=3DEAV=3D0x9d. */ - if (par->ved.bus_type =3D=3D V4L2_MBUS_BT656) { + if (inp->ved.bus_type =3D=3D V4L2_MBUS_BT656) { val |=3D DCMIPP_PRCR_ESS; =20 /* Unmask all codes */ - reg_write(par, DCMIPP_PRESUR, 0xffffffff);/* FEC:LEC:LSC:FSC */ + reg_write(inp, DCMIPP_PRESUR, 0xffffffff);/* FEC:LEC:LSC:FSC */ =20 /* Trig on LSC=3D0x80 & LEC=3D0x9d codes, ignore FSC and FEC */ - reg_write(par, DCMIPP_PRESCR, 0xff9d80ff);/* FEC:LEC:LSC:FSC */ + reg_write(inp, DCMIPP_PRESCR, 0xff9d80ff);/* FEC:LEC:LSC:FSC */ } =20 /* Set format */ sink_fmt =3D v4l2_subdev_state_get_format(state, 0); src_fmt =3D v4l2_subdev_state_get_format(state, 1); =20 - vpix =3D dcmipp_par_pix_map_by_code(sink_fmt->code, src_fmt->code); + vpix =3D dcmipp_inp_pix_map_by_code(sink_fmt->code, src_fmt->code); if (!vpix) { - dev_err(par->dev, "Invalid sink/src format configuration\n"); + dev_err(inp->dev, "Invalid sink/src format configuration\n"); return -EINVAL; } =20 @@ -313,17 +313,17 @@ static int dcmipp_par_configure(struct dcmipp_par_dev= ice *par, if (vpix->prcr_swapcycles) val |=3D DCMIPP_PRCR_SWAPCYCLES; =20 - reg_write(par, DCMIPP_PRCR, val); + reg_write(inp, DCMIPP_PRCR, val); =20 return 0; } =20 -static int dcmipp_par_enable_streams(struct v4l2_subdev *sd, +static int dcmipp_inp_enable_streams(struct v4l2_subdev *sd, struct v4l2_subdev_state *state, u32 pad, u64 streams_mask) { - struct dcmipp_par_device *par =3D - container_of(sd, struct dcmipp_par_device, sd); + struct dcmipp_inp_device *inp =3D + container_of(sd, struct dcmipp_inp_device, sd); struct v4l2_subdev *s_subdev; struct media_pad *s_pad; int ret; @@ -334,16 +334,16 @@ static int dcmipp_par_enable_streams(struct v4l2_subd= ev *sd, return -EINVAL; s_subdev =3D media_entity_to_v4l2_subdev(s_pad->entity); =20 - ret =3D dcmipp_par_configure(par, state); + ret =3D dcmipp_inp_configure(inp, state); if (ret) return ret; =20 /* Enable parallel interface */ - reg_set(par, DCMIPP_PRCR, DCMIPP_PRCR_ENABLE); + reg_set(inp, DCMIPP_PRCR, DCMIPP_PRCR_ENABLE); =20 ret =3D v4l2_subdev_enable_streams(s_subdev, s_pad->index, BIT_ULL(0)); if (ret < 0) { - dev_err(par->dev, + dev_err(inp->dev, "failed to start source subdev streaming (%d)\n", ret); return ret; } @@ -351,12 +351,12 @@ static int dcmipp_par_enable_streams(struct v4l2_subd= ev *sd, return 0; } =20 -static int dcmipp_par_disable_streams(struct v4l2_subdev *sd, +static int dcmipp_inp_disable_streams(struct v4l2_subdev *sd, struct v4l2_subdev_state *state, u32 pad, u64 streams_mask) { - struct dcmipp_par_device *par =3D - container_of(sd, struct dcmipp_par_device, sd); + struct dcmipp_inp_device *inp =3D + container_of(sd, struct dcmipp_inp_device, sd); struct v4l2_subdev *s_subdev; struct media_pad *s_pad; int ret; @@ -369,86 +369,86 @@ static int dcmipp_par_disable_streams(struct v4l2_sub= dev *sd, =20 ret =3D v4l2_subdev_disable_streams(s_subdev, s_pad->index, BIT_ULL(0)); if (ret < 0) { - dev_err(par->dev, + dev_err(inp->dev, "failed to stop source subdev streaming (%d)\n", ret); return ret; } =20 /* Disable parallel interface */ - reg_clear(par, DCMIPP_PRCR, DCMIPP_PRCR_ENABLE); + reg_clear(inp, DCMIPP_PRCR, DCMIPP_PRCR_ENABLE); =20 return 0; } =20 -static const struct v4l2_subdev_pad_ops dcmipp_par_pad_ops =3D { - .enum_mbus_code =3D dcmipp_par_enum_mbus_code, - .enum_frame_size =3D dcmipp_par_enum_frame_size, +static const struct v4l2_subdev_pad_ops dcmipp_inp_pad_ops =3D { + .enum_mbus_code =3D dcmipp_inp_enum_mbus_code, + .enum_frame_size =3D dcmipp_inp_enum_frame_size, .get_fmt =3D v4l2_subdev_get_fmt, - .set_fmt =3D dcmipp_par_set_fmt, - .enable_streams =3D dcmipp_par_enable_streams, - .disable_streams =3D dcmipp_par_disable_streams, + .set_fmt =3D dcmipp_inp_set_fmt, + .enable_streams =3D dcmipp_inp_enable_streams, + .disable_streams =3D dcmipp_inp_disable_streams, }; =20 -static const struct v4l2_subdev_video_ops dcmipp_par_video_ops =3D { +static const struct v4l2_subdev_video_ops dcmipp_inp_video_ops =3D { .s_stream =3D v4l2_subdev_s_stream_helper, }; =20 -static const struct v4l2_subdev_ops dcmipp_par_ops =3D { - .pad =3D &dcmipp_par_pad_ops, - .video =3D &dcmipp_par_video_ops, +static const struct v4l2_subdev_ops dcmipp_inp_ops =3D { + .pad =3D &dcmipp_inp_pad_ops, + .video =3D &dcmipp_inp_video_ops, }; =20 -static void dcmipp_par_release(struct v4l2_subdev *sd) +static void dcmipp_inp_release(struct v4l2_subdev *sd) { - struct dcmipp_par_device *par =3D - container_of(sd, struct dcmipp_par_device, sd); + struct dcmipp_inp_device *inp =3D + container_of(sd, struct dcmipp_inp_device, sd); =20 - kfree(par); + kfree(inp); } =20 -static const struct v4l2_subdev_internal_ops dcmipp_par_int_ops =3D { - .init_state =3D dcmipp_par_init_state, - .release =3D dcmipp_par_release, +static const struct v4l2_subdev_internal_ops dcmipp_inp_int_ops =3D { + .init_state =3D dcmipp_inp_init_state, + .release =3D dcmipp_inp_release, }; =20 -void dcmipp_par_ent_release(struct dcmipp_ent_device *ved) +void dcmipp_inp_ent_release(struct dcmipp_ent_device *ved) { - struct dcmipp_par_device *par =3D - container_of(ved, struct dcmipp_par_device, ved); + struct dcmipp_inp_device *inp =3D + container_of(ved, struct dcmipp_inp_device, ved); =20 - dcmipp_ent_sd_unregister(ved, &par->sd); + dcmipp_ent_sd_unregister(ved, &inp->sd); } =20 -struct dcmipp_ent_device *dcmipp_par_ent_init(struct device *dev, +struct dcmipp_ent_device *dcmipp_inp_ent_init(struct device *dev, const char *entity_name, struct v4l2_device *v4l2_dev, void __iomem *regs) { - struct dcmipp_par_device *par; + struct dcmipp_inp_device *inp; const unsigned long pads_flag[] =3D { MEDIA_PAD_FL_SINK, MEDIA_PAD_FL_SOURCE, }; int ret; =20 - /* Allocate the par struct */ - par =3D kzalloc(sizeof(*par), GFP_KERNEL); - if (!par) + /* Allocate the inp struct */ + inp =3D kzalloc(sizeof(*inp), GFP_KERNEL); + if (!inp) return ERR_PTR(-ENOMEM); =20 - par->regs =3D regs; + inp->regs =3D regs; =20 /* Initialize ved and sd */ - ret =3D dcmipp_ent_sd_register(&par->ved, &par->sd, v4l2_dev, + ret =3D dcmipp_ent_sd_register(&inp->ved, &inp->sd, v4l2_dev, entity_name, MEDIA_ENT_F_VID_IF_BRIDGE, ARRAY_SIZE(pads_flag), pads_flag, - &dcmipp_par_int_ops, &dcmipp_par_ops, + &dcmipp_inp_int_ops, &dcmipp_inp_ops, NULL, NULL); if (ret) { - kfree(par); + kfree(inp); return ERR_PTR(ret); } =20 - par->dev =3D dev; + inp->dev =3D dev; =20 - return &par->ved; + return &inp->ved; } --=20 2.25.1