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Fixes: c5b8425514da ("counter: stm32-timer-cnt: add power management suppor= t") Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder") Signed-off-by: Jiasheng Jiang --- Changelog: v1 -> v2: 1. Add dev_err() to indicate the reason for the error code. --- drivers/counter/stm32-timer-cnt.c | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/drivers/counter/stm32-timer-cnt.c b/drivers/counter/stm32-time= r-cnt.c index 186e73d6ccb4..9c188d9edd89 100644 --- a/drivers/counter/stm32-timer-cnt.c +++ b/drivers/counter/stm32-timer-cnt.c @@ -214,11 +214,17 @@ static int stm32_count_enable_write(struct counter_de= vice *counter, { struct stm32_timer_cnt *const priv =3D counter_priv(counter); u32 cr1; + int ret; =20 if (enable) { regmap_read(priv->regmap, TIM_CR1, &cr1); - if (!(cr1 & TIM_CR1_CEN)) - clk_enable(priv->clk); + if (!(cr1 & TIM_CR1_CEN)) { + ret =3D clk_enable(priv->clk); + if (ret) { + dev_err(counter->parent, "Cannot enable clock %d\n", ret); + return ret; + } + } =20 regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN, TIM_CR1_CEN); @@ -816,7 +822,11 @@ static int __maybe_unused stm32_timer_cnt_resume(struc= t device *dev) return ret; =20 if (priv->enabled) { - clk_enable(priv->clk); + ret =3D clk_enable(priv->clk); + if (ret) { + dev_err(dev, "Cannot enable clock %d\n", ret); + return ret; + } =20 /* Restore registers that may have been lost */ regmap_write(priv->regmap, TIM_SMCR, priv->bak.smcr); --=20 2.25.1