From nobody Thu Nov 28 15:39:02 2024 Received: from mail-pl1-f202.google.com (mail-pl1-f202.google.com [209.85.214.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 193D71CF5CF for ; Fri, 1 Nov 2024 19:21:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.202 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730488879; cv=none; b=o+3BzfTyH+mFc1VuzSlG7nKHyCUfJE1eav+1mlH6+lYBQNpLaKwRSTX1CVWLi+apxAHUkjU0IPGsxHgn6vH/4jYaF0KUhT+/QBvmh7wrnZ/6k1WFj4USKkuymO4d/AIS0nZcGO491h+QNmXiU7aYbcVRyPdYyP+myU7y40JaHIU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730488879; c=relaxed/simple; bh=4aHP8sLShS56T2NW/tyehgRssjrZvgR7eKhwcI7P9DA=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=VAFMSZzgHz0zilaau3ZYdrJCQ1ldCM/Al894rK8rkL9NsF3TNTNhdkyFnnZxz4ed8SiJZJ8L8Tqu5TTBszygr/C+w8ddKvVjyB2q31KemAFQAxRtKp3OwbmeWq8n+tSgK22yQYLPFx7h41MkGpljrPCr0F3UvGioF1TnNLbVnHc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=ZIQbVUeK; arc=none smtp.client-ip=209.85.214.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="ZIQbVUeK" Received: by mail-pl1-f202.google.com with SMTP id d9443c01a7336-20c8d7f9128so29060915ad.1 for ; Fri, 01 Nov 2024 12:21:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1730488877; x=1731093677; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=xI6w6F0Rq/ewsI+CWOomchy6WB54I1EzgId3O/qxAWU=; b=ZIQbVUeKvFJ0LPEMh6P4Jzybq5nPuYEM0vmlpEBPoAxhSvteYoONg91s9szQyNJbNS R5LcZBMF9Voh2MB3MLyS+a9Msxo7SSIb2ScVJg2raNW4gi7/mMyuXF5JSiH6D8rEeCAm +zLPhHLR+PQlQoAXEm8Dm4bFSNJhScA8c5jI8DqG82crpdr4dtr+CCd4Clil/MLvM4UE V2eUMdYBpvaImq4OnnHcSb/OgWyEk06pMvA6dPlwV7AQz+RgHzCMVT6HQL2BESL/0Vda MFSCfPB07GN7+lnMb0sUeobdmsdk3yCSubiZVt7qLaffnicUVvtG5vuCIhE27K+Uh+EI BB1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730488877; x=1731093677; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=xI6w6F0Rq/ewsI+CWOomchy6WB54I1EzgId3O/qxAWU=; b=Dk5qKVzFU61JLrrltvn7NPWE2Z1W+bwVS3lznNNYdJKjKMcq6FlNg6hysYaN16k/Jm EovusGUiQdQQSJeFLkQdmKD3W2iBawrZ11gLcUeoKZCj22GgZh2Q0oV8kdjWkxYPuh+c EWpS8DORxWRrNICZJ/GFT43ntKOEwjAb+sofJMnLiQk9cluQtBAQ7KqrXBXP/mgJ4aKK wXpdZYijrWehm/Jd2TITbQyF5El7cZOBEL2c9MIPGJtafIwKtxzpn1B3bmN/Q8/RdJYq 7pfGgmvSU0hHnGseyNDrEfcgGB+erfRtKm7idmM9+jDGrslRQhHIJ8YpTaCGHJXrK4U/ V1uw== X-Forwarded-Encrypted: i=1; AJvYcCXDrMHLyTgwsYVQqmktJ3iCvLgjeNt74aT206Ij6+j3q+IGZulrsQYs2TeaP5jCcb6cHQNVmyOxZz8A2F8=@vger.kernel.org X-Gm-Message-State: AOJu0Yw5rNMIIBT+NDaB2aYJdadIcG/wvi4a0mWz+e1g8JunvozACDdR 3UCRnTpGJOdgJzmMJ7k5r6Svj4aTQbptoTE2K+U5YFeq/d6kP0ySte4VXLLzxNj1qoBqTCsSHXY iCw== X-Google-Smtp-Source: AGHT+IHACu9yzXMxt2XBd8lJp3UyNmmpGDcPKIHyoyWG0kqfKEdPmB5cvzCvIkxhgVEQQMZPGusL0PGjcmA= X-Received: from zagreus.c.googlers.com ([fda3:e722:ac3:cc00:9d:3983:ac13:c240]) (user=seanjc job=sendgmr) by 2002:a17:903:22cf:b0:20c:857b:5dcb with SMTP id d9443c01a7336-210c6c1493amr1960935ad.4.1730488877405; Fri, 01 Nov 2024 12:21:17 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 1 Nov 2024 12:21:13 -0700 In-Reply-To: <20241101192114.1810198-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20241101192114.1810198-1-seanjc@google.com> X-Mailer: git-send-email 2.47.0.163.g1226f6d8fa-goog Message-ID: <20241101192114.1810198-2-seanjc@google.com> Subject: [PATCH 1/2] KVM: x86: Plumb in the vCPU to kvm_x86_ops.hwapic_isr_update() From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, "=?UTF-8?q?Markku=20Ahvenj=C3=A4rvi?=" , Janne Karhunen , Chao Gao Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Pass the target vCPU to the hwapic_isr_update() vendor hook so that VMX can defer the update until after nested VM-Exit if an EOI for L1's vAPIC occurs while L2 is active. No functional change intended. Cc: stable@vger.kernel.org Signed-off-by: Sean Christopherson Reviewed-by: Chao Gao --- arch/x86/include/asm/kvm_host.h | 2 +- arch/x86/kvm/lapic.c | 11 +++++------ arch/x86/kvm/vmx/vmx.c | 2 +- arch/x86/kvm/vmx/x86_ops.h | 2 +- 4 files changed, 8 insertions(+), 9 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_hos= t.h index 70c7ed0ef184..3f3de047cbfd 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1734,7 +1734,7 @@ struct kvm_x86_ops { bool allow_apicv_in_x2apic_without_x2apic_virtualization; void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); - void (*hwapic_isr_update)(int isr); + void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); void (*set_apic_access_page_addr)(struct kvm_vcpu *vcpu); diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 65412640cfc7..5be2be44a188 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -763,7 +763,7 @@ static inline void apic_set_isr(int vec, struct kvm_lap= ic *apic) * just set SVI. */ if (unlikely(apic->apicv_active)) - kvm_x86_call(hwapic_isr_update)(vec); + kvm_x86_call(hwapic_isr_update)(apic->vcpu, vec); else { ++apic->isr_count; BUG_ON(apic->isr_count > MAX_APIC_VECTOR); @@ -808,7 +808,7 @@ static inline void apic_clear_isr(int vec, struct kvm_l= apic *apic) * and must be left alone. */ if (unlikely(apic->apicv_active)) - kvm_x86_call(hwapic_isr_update)(apic_find_highest_isr(apic)); + kvm_x86_call(hwapic_isr_update)(apic->vcpu, apic_find_highest_isr(apic)); else { --apic->isr_count; BUG_ON(apic->isr_count < 0); @@ -2767,7 +2767,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init= _event) if (apic->apicv_active) { kvm_x86_call(apicv_post_state_restore)(vcpu); kvm_x86_call(hwapic_irr_update)(vcpu, -1); - kvm_x86_call(hwapic_isr_update)(-1); + kvm_x86_call(hwapic_isr_update)(vcpu, -1); } =20 vcpu->arch.apic_arb_prio =3D 0; @@ -3083,9 +3083,8 @@ int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct = kvm_lapic_state *s) kvm_apic_update_apicv(vcpu); if (apic->apicv_active) { kvm_x86_call(apicv_post_state_restore)(vcpu); - kvm_x86_call(hwapic_irr_update)(vcpu, - apic_find_highest_irr(apic)); - kvm_x86_call(hwapic_isr_update)(apic_find_highest_isr(apic)); + kvm_x86_call(hwapic_irr_update)(vcpu, apic_find_highest_irr(apic)); + kvm_x86_call(hwapic_isr_update)(vcpu, apic_find_highest_isr(apic)); } kvm_make_request(KVM_REQ_EVENT, vcpu); if (ioapic_in_kernel(vcpu->kvm)) diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 6ed801ffe33f..fe9887a5fa4a 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -6868,7 +6868,7 @@ void vmx_set_apic_access_page_addr(struct kvm_vcpu *v= cpu) read_unlock(&vcpu->kvm->mmu_lock); } =20 -void vmx_hwapic_isr_update(int max_isr) +void vmx_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr) { u16 status; u8 old; diff --git a/arch/x86/kvm/vmx/x86_ops.h b/arch/x86/kvm/vmx/x86_ops.h index a55981c5216e..48dc76bf0ec0 100644 --- a/arch/x86/kvm/vmx/x86_ops.h +++ b/arch/x86/kvm/vmx/x86_ops.h @@ -48,7 +48,7 @@ void vmx_migrate_timers(struct kvm_vcpu *vcpu); void vmx_set_virtual_apic_mode(struct kvm_vcpu *vcpu); void vmx_apicv_pre_state_restore(struct kvm_vcpu *vcpu); void vmx_hwapic_irr_update(struct kvm_vcpu *vcpu, int max_irr); -void vmx_hwapic_isr_update(int max_isr); +void vmx_hwapic_isr_update(struct kvm_vcpu *vcpu, int max_isr); int vmx_sync_pir_to_irr(struct kvm_vcpu *vcpu); void vmx_deliver_interrupt(struct kvm_lapic *apic, int delivery_mode, int trig_mode, int vector); --=20 2.47.0.163.g1226f6d8fa-goog