From nobody Sun Nov 24 21:45:37 2024 Received: from EUR03-VI1-obe.outbound.protection.outlook.com (mail-vi1eur03on2085.outbound.protection.outlook.com [40.107.103.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A7EF156256; Fri, 1 Nov 2024 08:06:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.103.85 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730448408; cv=fail; b=QBjR01MLUvZ5OzP3REOX6oVk92BVlE7bPraGFuXJsSMpyx6/265jC3IWLJUy3XE6wrVtRESSsO8NwpAKPKc9H4N6gwkMrAo7dkU4E4c/0jx/AuTivuinPkCscxlmRwNmFwfkM1+Eb27VmbF/aNnwQoNFpxmuVv+oCS3GmxWOUqQ= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730448408; c=relaxed/simple; bh=D0Qn3XG+JTSOuK/umMUJ2L9ZqNgCBojDkRRKM3z1C68=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=LPqgjdGF05sf9nhwMh/rmguHVNr/fFky7UUlppNaVZ809cnEhePdGoO0BTiJaXvtzijAEICeLJsyRQ1a6G5FytIBEHBT4oKoAjIqqXP9IN+rlMgIQ4gdROhL2ocZDq5DB2z6J4zzT10k0bFyaPuc1Yof+VTM8Nu6AO5/xF6XBZU= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com; spf=pass smtp.mailfrom=oss.nxp.com; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b=a3uQJWys; arc=fail smtp.client-ip=40.107.103.85 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b="a3uQJWys" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=R27EAMpG9+XrI87vzc2cRnDVx6hZKBRCYkIjWcGrT3+nbC4EAEmhr2wwG29zUBE3/O0DFfTExr+daZc8iB0Uy7eND9xkCX4HmCi2ZHhCaLwG3kCaKME0YCObfRTy2iJ9mC7frkyr37KSSw3JUVpcifBystcX8d7r12IK4uAFK5okMYDPXJNIiVKWQfIBg9xvaVlySzFvQ3PyKLvPhzzwx6m5Eq12Er5R0bFjYLa6jDPNf4AzIFa1zmEvqq4+HyMKxdwvTFLsQWzkKt2ON4JRBqj7p3MEBAx9jfHmWeOgxQqBZyTXkFwL+lXXa69z3qgqIu90eMLXDztBHkYLp3t1rw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=HBvQpHmQxe+/N53r8V12Q8BNuCnFINZOkRnpiGdpv34=; b=X7shKJ85bPn3VFIGQVfXPS+VqMmMDllntl6cCvyRXFdo1gUXK5XtlxCFFyw7eh5cqIuR1n3eIVhFVfHMCayfu2M5KWqR5RRie4ecglE5gzamdg0FNsf1hfHVKPxLX61V50WqGhfSVHLJHHRifXFaA6Sf5HQP3bNoncxxEnNUcW81p55v59maPkW16a9CinnZvMp9XFA+z7PAXNLhXVTjHMgnCGN+aGOtc4pXUTS43vYr6qUm1uNN3y2jm/qlaoXCAytvMc1OYwr6CSU8w8ZBdxQEn2Fs280CLFQX7r5ckYiXU0YRvbJqYe0zuru4gIK6LYk66ppkElJg6eUAUGW3pA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector1-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=HBvQpHmQxe+/N53r8V12Q8BNuCnFINZOkRnpiGdpv34=; b=a3uQJWysQM3NGX6DRpWKOSPQ0QJlcSRnDl7sg3DyFGpwZ2fifdyQ3LehcuupuPB+BjtPulXjo8iO3poRuXXtlHwHt7jgMxHDQzgp/JQYNX/yD5sw9sLhoNgMoleAw0GY0ZH4jdZkO3e0eVQyKqjSWVGA/r1GhuWoPU6PGYqB0iTpMmVl17eRVrsAVuWTgR71hxZv16ElP0dWi3NH4LyKps4wpi5Bmpu0Tt7fHtLtYJkbRyil1veAGjbEiWKaHEL8VljF599XGygkgpgR+w5/W9sy8NVjwnA5m0Aq/STg5HJOZfwM0BaO/kHRY+WobU8aSLWmyHbQXCwwKxeeRr83xg== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) by PR3PR04MB7225.eurprd04.prod.outlook.com (2603:10a6:102:83::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.32; Fri, 1 Nov 2024 08:06:41 +0000 Received: from AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455]) by AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455%5]) with mapi id 15.20.8114.015; Fri, 1 Nov 2024 08:06:41 +0000 From: Andrei Stefanescu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , Larisa Grigore , Andrei Stefanescu , Greg Kroah-Hartman , "Rafael J. Wysocki" , Lee Jones , Shawn Guo , Sascha Hauer , Fabio Estevam , Dong Aisheng , Jacky Bai Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP S32 Linux Team , Christophe Lizzi , Alberto Ruiz , Enric Balletbo , Pengutronix Kernel Team , imx@lists.linux.dev Subject: [PATCH v5 1/7] dt-bindings: mfd: add support for the NXP SIUL2 module Date: Fri, 1 Nov 2024 10:06:07 +0200 Message-ID: <20241101080614.1070819-2-andrei.stefanescu@oss.nxp.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> References: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: AM0PR10CA0115.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:e6::32) To AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM9PR04MB8487:EE_|PR3PR04MB7225:EE_ X-MS-Office365-Filtering-Correlation-Id: d0fd8e5a-0fa1-4055-7892-08dcfa4c1e2d X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|52116014|7416014|366016|376014|921020|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?OS9MSkJ5YlRnRjMwWjZvTElBVzZJN25VZTZ3S2VmK2g2VnFmdklvR1VJMWgy?= =?utf-8?B?MjlPVnp3cVAzdFVKV2Q1Qmo1ZnV4ZnZFNnpYQ281Nnc1aVhWelFMNUR5eTBZ?= =?utf-8?B?a0lqaUIzVldxbVFQRndVcTFVV0hOci9pSTdvOHpLR1VSQVN3VEFWQ3c5bWs3?= =?utf-8?B?Z0dCWkxidE5aeHdaZ3Z0WE5PNUtLdkkzVlVzREtJMW9QOHZibUd2OGJCSE1D?= =?utf-8?B?V2s4UVFEY1l5THdTa1E5STVHTytCVWNyQ2U4NDBFaTJZVHNqamZ0ckpSdzVk?= =?utf-8?B?RnVUVVBKeGozNDlSUmt3OE9GK0JhWXlITDltblBRcWdjdlduS1prQWVabC94?= =?utf-8?B?ZEc0YVBtTGswazgrV1o0aHQvQ3EzY3U3M3lwNW1vZy9oS2NaMUk4U3A5SzJK?= =?utf-8?B?dVJoV0R5SE10Y29id2k2RVBacW1CejBDeVRBU0I3NWFlL3oxbmpINWx2bnhT?= =?utf-8?B?ZnAyTXI0b2l6eSswSTJGeDJ4Y3hYQWRyMXdlY2Nsc1lUNTFrK0MyRUc5YUNu?= =?utf-8?B?VUxxYWVsNXU4L3VuUzBhZTNVbmJkOVY0a0JhQ3Y5cTNYcnQ4RjVVdGs3L1NO?= =?utf-8?B?eHRyL29EZG42V0ErbHVnZGxic043bk1hT2lGTzIrUkdvbEJLNG9KcXVqcWlL?= =?utf-8?B?UERUL0ZySFVqK3RtajVEWk5Bbm5kL3RwUGhlMXZXZVp5V3hGWmJ6b2FGeXNp?= =?utf-8?B?NWJyeEVQQjBHTnhIR2xzWWdpUnkrMDRSTGc5SVNpa0RmdnpyWnNrTStPUkZL?= =?utf-8?B?dk0zUDh4Zy85SHNWU3Q5b216UTBiU3Z5cFZ1QitZNTJmRHJ0VEZ4MFpxY29l?= =?utf-8?B?NVp1OWZqOFFEcGZkQmNMdld5a3k4bEJMM2diQUJNc3N5K2MvY3UrSlN0T25G?= =?utf-8?B?cDVXVXMramN0d0ZKNXpKOTlHREF5d1I5TWUzMWQrZ0dvYUNjNFl6emY1KzUw?= =?utf-8?B?MGZYaUtaV0Vpb1U0anFleHVwR25JelRaT0tpNnYzdXZ4Z2d3M1JtbU0rRUcx?= =?utf-8?B?UTFickdTZm55N2FYK2NEcEpFazFGakR4MzZnODRWK3dQbGxwYnMwZW8zd1A1?= =?utf-8?B?WUQ0WDhtcW03VTV1VU9kQUpBRFhTb2hJU3ZHZ2Z0NnNnWjdJaGpqcXpRZUZY?= =?utf-8?B?elNKb0UzeWtBRVA5K1lJYytKVHprUEZMNTZLOGVsZ0Mybis5RzdxV2I4bkNl?= =?utf-8?B?NFNsakhNeE5VK1JQZEE0OTdEUjV5MjhQWkxQS09HbURFMHdRdjIyemxjRVFW?= =?utf-8?B?aVZrenU5eTlJY0xiRlpKSThVOW5vajExSG9HV1VKSk0yaEd6dG5ONG1wYUxV?= =?utf-8?B?Q0wzMSt3MmlpbTZUczFaOVFlZVNSUkxYdGhONXg2Qm1qRnJqVEE2d0ZYdDg1?= =?utf-8?B?L2N1UnpFRnN5amdIbThSRlJzTU9Fek5ZTWw5V1k4NHBiRUlCNFZzblBaSDkv?= =?utf-8?B?TS85cVRpZGhYbEZuVEk5cm1rM3dhMEx2Y2JjWmdVN3U5aGxLOG94ZlhRNHVz?= =?utf-8?B?YUNWc3dEYjBzNDROTzFnV3JNK3EzMmoxYTc2UUZ0L1JLTTVkUFNib0xCbmNY?= =?utf-8?B?OVJuUVBFMmo4NXk0Wml5RGZxTWlHUHBla3hublFqZ1V1RVRpcitOWVZnakxz?= =?utf-8?B?SjBVYzhBQnppZlVoMXhyczBGMW03dUErTU80WTh1aTNhaDNIem9ZS0hPQnVw?= =?utf-8?B?UGF3L2Nzc0NQWUZTM1JTQUZOTW5ETlhqaWUwdEFZLy9nVm95Zld2TloyWFRp?= =?utf-8?B?cDFGVHVVMWt5d1BBbFJ0Mmc0QUpXWmJDMUNqcTVEMDZjK2dnbkZGTU03cS8w?= =?utf-8?B?ZFFXYUJycU91NVgySldPdz09?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM9PR04MB8487.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(52116014)(7416014)(366016)(376014)(921020)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?WXg0ZUwrRmJ0U1JtZDVjN3RSL01oMmtKa0h2RXd1dEVZT2FPVG16QUVIMmFY?= =?utf-8?B?b1JMdndCY3gzVklNeklINjFnWGJubndReDViUWZ5VU5FQUJ3aUtKYjlGU2Nm?= =?utf-8?B?U2xIQXJleXNVcnh5S28ySU9rb1h6MTgyeXUrRjEyVFp5UCs5M3B0R0hoWVpw?= =?utf-8?B?cXhkWXZyYWZUVWYyTjhOdmpQS1ZYWlpqdGhCY1hSZnZjQjJpSmh5YXRpTjRj?= =?utf-8?B?NEtMRHZSc1k3YjlROXpNUGtJa00reG1YUmVHR0xheVBJRzBaajRLbm9xUWN5?= =?utf-8?B?bjBMRFovQkk4VW8zd0xVOWxmanNVVEJuZEhzUUNZcmRVWHNjV2loMnRlL0dV?= =?utf-8?B?dlJ6dkFRVnVRcGsvbWR3QUZXZ3lVOTJjaWt4R3A0aHQ3NFYzcURhL3JMOUow?= =?utf-8?B?dWlnMjM1L2xhTzZTUDdySm5mWmZkUzFKakh4RmR6aHpFRVJDdXJCQnBmQzlE?= =?utf-8?B?NFhEVVpSbDBlZklLRjFnbnRKQ1lodmg3YWFETjJJU2dOd09mR1dObDY4Zi9o?= =?utf-8?B?Zmo1T0VmeGZFMHlJbFBDNzl5TU1MRTduS1B3N2dxV25RQ2M0RHhkSmJEREpC?= =?utf-8?B?SlIzaHVTM3F3d1NOTEZCRjlQem1qcnBsdWc4WHEvYzNrNUVCVHpGcFpTM3Rq?= =?utf-8?B?di9uaFJiTi9icDVZVzdUb0JHQXd1TmxkODVvNlI3dE1VNXhjUklPL2RZWGVE?= =?utf-8?B?SVJIZm9qOGhJWEdPemZTc3pCL0VDZ3hQSmhZZmV4SnRCd0tGNzVLaTBNUWZm?= =?utf-8?B?SVk2aDR0VElKWVVmNk5RZDJ3TExNb3dxWE9yWmo4OG9PbXNLMnNnK0E3TklW?= =?utf-8?B?WlZEV3BTbngrMEhnd3pyUHBJZmZWeVVMOHBDQldrZG5reHNaeUNOUFowRWlO?= =?utf-8?B?L0hCeXBMbjNkR2wxWmQ3MmNHV3puV1IyQUVSYlFPbEVndXV6cXllb0VkNzJr?= =?utf-8?B?ejRORzVWaVNGL0xsSUNtKzN1K0R0amNuRG5XRHNzbngzbU5MSzh1NUNwZVV1?= =?utf-8?B?LzErT2g0TzA5eDUzdEltWkNOS1BXUkVBZk9SYVVHT1BTNzI4ZW5LOFBxcUN2?= =?utf-8?B?dGZYZzUrbkw2NmpCeHJkQzJFRUY4ZEVDRmlEcHd1eWZNOGlkOE9ZTTdncHZP?= =?utf-8?B?ZUFJb25DbDFySkdHbmh1UWFpTDRDMEkySnFwSzA3OHN2UmFyOXB6TDlxK29v?= =?utf-8?B?ckZtM1dNV284WWEyMmg3UktsVnJJRkNNT2RmWk9KWElKQ1BmTm0vanlLYlp6?= =?utf-8?B?T2s1QzVMcmlEQ1J2WTl4Kyt4RVBhMk1HRVEwemtTNHp4MGpsSm9wZkMveXlq?= =?utf-8?B?UFI0NnF1dVBOVURNUGVNK1hJeXRqREF2bXF2QjczQTZZTVp3Z1Q2QmxOV3RY?= =?utf-8?B?SXFNQjI5QjREVkdaem1FbURpbmp2emZRYjZjTUk2OFhKVjJlVlNXQVhiajRX?= =?utf-8?B?UDlNNlR2dGlHb0hVeDhqWlhuR1BjNEp6ekRybWhQVWI2YkdWcXoxcFJQRDNo?= =?utf-8?B?Q1g0Njd5N0F0K2VQZmpQM0hYT0xaYzRNdDEyU1dxKzREVE4rZnlsQlJoZ1Jz?= =?utf-8?B?WThkQkduT05NUy9Ca2tMRlAxbSt0NDF5WlNvSnFSTGNqMzlWR1NqRkNiamFR?= =?utf-8?B?R1grVkpxanpMcTNmMG81cmkweE1OUVJpTTBORnpDczVmMnFGVk84ZnVpdmMz?= =?utf-8?B?WHJJaVVHV0FuekEzdmFHNWNNSEsxSW41eFpnc3hvRmp6TGttWG1GUEpyMThW?= =?utf-8?B?OWlXbElEMTMreEpiUjVOMHZQalZBZ3JBTGNad3MvUXFvTTdWR0l0MnJtdVdF?= =?utf-8?B?ZUhGYXJHMnRXTlVJVDlSVnNKMWc5WDZ2MTdabUtUOEg3bDVxRHVURnlpN3J3?= =?utf-8?B?YWtsZE5kMEVKVzhmWGswUGdJN1hxbUc0ckRDM2t3S3dqUjNGU0dNd054WDhj?= =?utf-8?B?VUlFZE9iNi9yR09tdjEzNllXRVQwSUF3T2FML1BGTCtTeU9UQU83ZmFMK3NG?= =?utf-8?B?QTNqeEdENnAwMGJpV25BTzV4YzhRYnd2WnBVNzRhT3VDTUJtYXFQMlNweUxG?= =?utf-8?B?RjFGQVhEcUVkY0xha3lPczNuT1pMS25jVTBSckdkaHZka1hlby83dVJvNmk0?= =?utf-8?B?WjNxVGxGMm9hM1F0Qm0xWDdFdGlESjVPWThpdkFpbmx4dDlBU1ZSb2ZjWk9o?= =?utf-8?B?Unc9PQ==?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: d0fd8e5a-0fa1-4055-7892-08dcfa4c1e2d X-MS-Exchange-CrossTenant-AuthSource: AM9PR04MB8487.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Nov 2024 08:06:41.2407 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ym6GdVRw1we3SKaWLpyQPTmE+Qd7iNNwXH+q8OEqr2QxK3gvy48p5MYfcobtg0iYEoD3OIOxCBuJRuj0gpltc3E5AbiFljd0JpSS53QBxBc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PR3PR04MB7225 Content-Type: text/plain; charset="utf-8" Add the dt-bindings for the NXP SIUL2 module which is a multi function device. It can export information about the SoC, configure the pinmux&pinconf for pins and it is also a GPIO controller with interrupt capability. Signed-off-by: Andrei Stefanescu --- .../devicetree/bindings/mfd/nxp,siul2.yaml | 191 ++++++++++++++++++ 1 file changed, 191 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/nxp,siul2.yaml diff --git a/Documentation/devicetree/bindings/mfd/nxp,siul2.yaml b/Documen= tation/devicetree/bindings/mfd/nxp,siul2.yaml new file mode 100644 index 000000000000..141ec1219821 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/nxp,siul2.yaml @@ -0,0 +1,191 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2024 NXP +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/nxp,siul2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: System Integration Unit Lite2 (SIUL2) + +maintainers: + - Andrei Stefanescu + +description: | + SIUL2 is a hardware block which implements pinmuxing, + pinconf, GPIOs (some with interrupt capability) and + registers which contain information about the SoC. + There are generally two SIUL2 modules whose functionality + is grouped together. For example interrupt configuration + registers are part of SIUL2_1 even though interrupts are + also available for SIUL2_0 pins. + + The following register types are exported by SIUL2: + - MIDR (MCU ID Register) - information related to the SoC + - interrupt configuration registers + - MSCR (Multiplexed Signal Configuration Register) - pinmuxing and pin= conf + - IMCR (Input Multiplexed Signal Configuration Register)- pinmuxing + - PGPDO (Parallel GPIO Pad Data Out Register) - GPIO output value + - PGPDI (Parallel GPIO Pad Data In Register) - GPIO input value + + Most registers are 32bit wide with the exception of PGPDO/PGPDI which are + 16bit wide. + +properties: + compatible: + enum: + - nxp,s32g2-siul2 + - nxp,s32g3-siul2 + + reg: + items: + - description: SIUL2_0 module memory + - description: SIUL2_1 module memory + + reg-names: + items: + - const: siul20 + - const: siul21 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + gpio-ranges: + minItems: 2 + maxItems: 2 + + gpio-reserved-ranges: + minItems: 2 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + nvmem-layout: + $ref: /schemas/nvmem/layouts/nvmem-layout.yaml# + description: + This container may reference an NVMEM layout parser. + +patternProperties: + '-hog(-[0-9]+)?$': + required: + - gpio-hog + + '-pins$': + type: object + additionalProperties: false + + patternProperties: + '-grp[0-9]$': + type: object + allOf: + - $ref: /schemas/pinctrl/pinmux-node.yaml# + - $ref: /schemas/pinctrl/pincfg-node.yaml# + description: + Pinctrl node's client devices specify pin muxes using subnodes, + which in turn use the standard properties below. + + properties: + bias-disable: true + bias-high-impedance: true + bias-pull-up: true + bias-pull-down: true + drive-open-drain: true + input-enable: true + output-enable: true + + pinmux: + description: | + An integer array for representing pinmux configurations of + a device. Each integer consists of a PIN_ID and a 4-bit + selected signal source(SSS) as IOMUX setting, which is + calculated as: pinmux =3D (PIN_ID << 4 | SSS) + + slew-rate: + description: Supported slew rate based on Fmax values (MHz) + enum: [83, 133, 150, 166, 208] + + additionalProperties: false + +required: + - compatible + - reg + - reg-names + - gpio-controller + - "#gpio-cells" + - gpio-ranges + - gpio-reserved-ranges + - interrupts + - interrupt-controller + - "#interrupt-cells" + +additionalProperties: false + +examples: + - | + #include + #include + + siul2: siul2@4009c000 { + compatible =3D "nxp,s32g2-siul2"; + reg =3D <0x4009c000 0x179c>, + <0x44010000 0x17b0>; + reg-names =3D "siul20", "siul21"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&siul2 0 0 102>, <&siul2 112 112 79>; + gpio-reserved-ranges =3D <102 10>, <123 21>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; + + jtag_pins: jtag-pins { + jtag-grp0 { + pinmux =3D <0x0>; + input-enable; + bias-pull-up; + slew-rate =3D <166>; + }; + + jtag-grp1 { + pinmux =3D <0x11>; + slew-rate =3D <166>; + }; + + jtag-grp2 { + pinmux =3D <0x40>; + input-enable; + bias-pull-down; + slew-rate =3D <166>; + }; + + jtag-grp3 { + pinmux =3D <0x23c0>, + <0x23d0>, + <0x2320>; + }; + + jtag-grp4 { + pinmux =3D <0x51>; + input-enable; + bias-pull-up; + slew-rate =3D <166>; + }; + }; + + nvmem-layout { + compatible =3D "fixed-layout"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + soc-major@0 { + reg =3D <0 0x4>; + }; + }; + }; +... --=20 2.45.2 From nobody Sun Nov 24 21:45:37 2024 Received: from EUR03-VI1-obe.outbound.protection.outlook.com (mail-vi1eur03on2085.outbound.protection.outlook.com [40.107.103.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B966C156C70; Fri, 1 Nov 2024 08:06:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.103.85 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730448412; cv=fail; b=HucKEUuUSTmvaZNxBeIhCbc2bHWh4tycAa0qmpkaAXM52c5FtGXPq4NAIdu0OAesP2D5jPmQJhJcnBHhjcW8bo4G3kkkGlN8k0sxMJPcQrjkhRxRJIjmNkU01amzfHebuufYsNiE3UCqVs+miN9c7SvtvR5t6u/Eq3upu9K2SwU= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730448412; c=relaxed/simple; bh=4/mBf2ojP3Q01yet7Nty7Et5BM8SX1YFBMh4yIKquPI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=ubwwAgmpjC8XtZgidl4ji5FBzmAy89MjJTBDxA98DuK3B/K8MV3XFlOTpWc5eoRVr8XA7kOjzngxzDAc9oTwsSPnr+RLqpv8BCxiWZlQCPzyONpcfm51QMxudl6hWaL2m0azqub7LWMQTDaS0xZRWiPjZwvTWey6whDXsRpN/TU= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com; spf=pass smtp.mailfrom=oss.nxp.com; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b=ThqB/pG/; arc=fail smtp.client-ip=40.107.103.85 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b="ThqB/pG/" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=IKPAQGTcTli8s3m0cSRN00GgaH+WIISTiCS3u+ntQHr4XHqd+Jt81NefVHF4QzHG1PwqmS4s+i6S8TRtmPd1efH4TICEA/3paEjEXvbdw+ICunsYJhyOH5QzQs5wAcZ8HyBVZbDzpbaT+j28tx3/byNqS9I3KcWSHgjBbuQHfj8m1j6h+I+Kuwp2taDgMTgtv+x5VBp8MlGCP6xD7+rV2K4mzd0oR9bi8fQk17mAslQLKbMkp4Fqq9yrEFsE0r3dNm6ebGRTagc73M1LEn/sTHZyu/4TrlS1RR9yDR/eCRc2amBCluNjD3G5koWoQZ81jNB1WkYcV1CeHzLPsWPdWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=x3jS3mLt5yrfyMvGXECiKNmzrPTHftT4HLVmMTtZ7mE=; b=BUxhNuwD2fXly+ynHaMM8F632MiWnA/SbHaqNlWqYc3/XJqB+l9b5P1lS42WqXyd+oyZt/FZZ5PGX6Bn/JTcCeQfyC2Ya89rAMS5TYOTHBXnpp0U6+WKSUhqkR6btVPHvj7EWOe9Ye8G6cq2Mr+jTibRqaegBkdtRLwCfR9Rv+J7DCJNxOgTFZLOtX9gHzH10wX2wJ6jmyQeb2OeVcdAuVNdoaMnDj458pMo5B0/x9HrTVm25eQPw5j+EAJdZ3364m1VHOjeIIk5toTwS8oFY3aj/zvmJz4rgw6BvYe6MPtN7Ly0F5jIuaNZFDWJvaelSxV1Dys9jMykXbYShvwPvA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector1-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=x3jS3mLt5yrfyMvGXECiKNmzrPTHftT4HLVmMTtZ7mE=; b=ThqB/pG/TdKqItuq18Eq2RtGT0CYoWovzLHjEr/qy7rviScwOXEqUNGUftLtRZXiXEwPrpC7trbzcCJw38y3byexhZCm9gGL6ndQr3UCWRviemkI2vMtinP0vGK/ytwOenbZ0P2ZaIdCUYV7goJmLYLwUXpJUqSqp1lXPad9PduFCeBr4208+0i3RPNpiTCPGs9TdnH+Py7efDfF2iybK0HVh35EVcmSblWsad2KzXudetJpktaiP8iobyyMd9krlb0ZStLdjQIQaimg11bxsCH5zfFd/2paWK5Jz1TWc0ojrlUTp9VNK/+DWKWcsO5gyUY9Aq+15fdFC5WSuLXk6g== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) by PR3PR04MB7225.eurprd04.prod.outlook.com (2603:10a6:102:83::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.32; Fri, 1 Nov 2024 08:06:44 +0000 Received: from AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455]) by AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455%5]) with mapi id 15.20.8114.015; Fri, 1 Nov 2024 08:06:44 +0000 From: Andrei Stefanescu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , Larisa Grigore , Andrei Stefanescu , Greg Kroah-Hartman , "Rafael J. Wysocki" , Lee Jones , Shawn Guo , Sascha Hauer , Fabio Estevam , Dong Aisheng , Jacky Bai Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP S32 Linux Team , Christophe Lizzi , Alberto Ruiz , Enric Balletbo , Pengutronix Kernel Team , imx@lists.linux.dev Subject: [PATCH v5 2/7] mfd: nxp-siul2: add support for NXP SIUL2 Date: Fri, 1 Nov 2024 10:06:08 +0200 Message-ID: <20241101080614.1070819-3-andrei.stefanescu@oss.nxp.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> References: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: AM0PR10CA0115.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:e6::32) To AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM9PR04MB8487:EE_|PR3PR04MB7225:EE_ X-MS-Office365-Filtering-Correlation-Id: 6ce377ff-71c4-4cf3-6a18-08dcfa4c203d X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|52116014|7416014|366016|376014|921020|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?anNLcmFKc3RxajdyakNQeHAxdEZ5ME92d0RWSFlLdFdrRjQ2bXBXbStROUxq?= =?utf-8?B?UTJPYlM1NjVkWXRFdVhKUGIrckhKQmRBRm5QdHRZMEprOWRhRURsYVJpUVZZ?= =?utf-8?B?QUtLbVpsaVlhYUl6cEhpNk1ReC9hV2FxNjFXMFBHeTVxM1pJTVBvSVk3RVpp?= =?utf-8?B?WFdkeVRPTnFsQVdGd0hNWDZZdzBsTjNjU254WHBYSmt1dS9zc1ZmMXg4TEQ5?= =?utf-8?B?WjhSQUtPcFMzZ0d5VzhVL2g3U2V5OUozdlRJTUc5NUxQWEVvS3QzSGhRQUNR?= =?utf-8?B?ekZ0dnd3UDJzNC91aWxBeW8rSmJHcEFRbmk1T0MxL1YzRGtXUmtDdjFSMy9M?= =?utf-8?B?ZGU5V2dIL0RqSStRV0RWWTBNbHE1cHNpM3kzRmRzM2VSRkxGOHlNRmRMSGx1?= =?utf-8?B?RTlCVXBRSWo4cUEzWGM2aVdIUis0SFRsdmFFNzVrM094RGhUTSsxQkNVbUFF?= =?utf-8?B?dVM4bGpORHFBOUJxaGVwck9zVVpySzF6ZjNsY1pwUXQvd2ZGNWVYVk8zUlBr?= =?utf-8?B?UFQ2UnJoWk1qU0Z1bVJtdVk2TGt6SnJQSUJwV01XS0RKQXlEM3lYY21tVEF1?= =?utf-8?B?SDBrS2wxZlJiZmNDRldSb3lzNXNBQkMreEZsZnVKSUlwSDJjMUxKbllaaHNo?= =?utf-8?B?TGxxbnhLS3MySFUrck93WExZRDBHWjNTR2U4UDE2Q2U1RFFXRHdRMytqbHNR?= =?utf-8?B?c2JYWXEzdFY0dTVIdlJ6dWI2SkNQQjRHakYzTEpyWWFzdG5OYUpIenVIbkJ1?= =?utf-8?B?NFhGanFWdWFmNU9OYVlwT25hRFNiWWt6TUNzV2NWeDNKT25nQTc1VkhuSzVw?= =?utf-8?B?Zm9rZ0F5SDc4V253Uyt4Tmd5WEtlTDgvMW5mZEV6VkdQRmZ5aHNCWHVReGhq?= =?utf-8?B?eW44MXk1aFliN3BpY2RudXRJTVloTnlCa1VTZFNuYzY1TWdIOE5kVWtEZGtW?= =?utf-8?B?KzFlSkFuZkhDVXBydHoxcmRXRTVOR245Ym5MWFJzTjhaMDAyTklCU2tNU2NV?= =?utf-8?B?b1pqZzNRalZPYXdYTEdoNHRCRFhMbXpDZXVWV09QdithS2xlR3lvYkJDUTlj?= =?utf-8?B?SUFPeEVpTmFlN3krNmVDc1k5ZXhyOGtFbW1uYUtxWXErVUcvSDFlb2MzL3dm?= =?utf-8?B?R291d2xrL2xXZ2VJVmx2dVdvemc3Rlh0cUw5SGRsL3FDY2VnWXRCY1VnVmJK?= =?utf-8?B?YjNtVFVXcnR5UWQ4ZDFxOGNySWQ2S1VxTlJ1L3MrdWx2VzlEYzM5a1ovZk10?= =?utf-8?B?RVh0WGxvakpQU1hZTzJHSTRGUmVoQ3V5OXAyOG9FaXl0d2k5VFB4YmorejZP?= =?utf-8?B?c2ltTU9VZUduSFJXcTgyd0hpOTdEUVJsTmFwQXFleS9HeklKVWIzTWo5NVVw?= =?utf-8?B?WnRIL2FFNzlVK29KbnFLb0g0dmFCZ1Jxejlkb3EvTFRUM2FVUmNYQmVTekxQ?= =?utf-8?B?UEtJbU5nelZoWUF0YStwVGJlUmd6bVRxVS82UEg5RG5EcXlkWWVDdVVNNlU1?= =?utf-8?B?aS83elR4eEhzTzFGNTBRTEU1VVRvUEt3eVdhYStvc29tdk9Ib1hpOHc4cjJL?= =?utf-8?B?WUlTWkNxSW5QaXllL3FhMlQ4Z0xERmFDdnJOaW56YUNuOUx4MVNkaWd4VVRu?= =?utf-8?B?anh4OWs2a2kvNjlqV091TldDY1VJay80VXdOMk9NUjhpYWo2ZGNJK2JjdmdC?= =?utf-8?B?UWpCOEcyNG1nYlpLcUNWQUpyNGdDNldqMmhMTlo0aG52RWYrR2YzdlFYM1hI?= =?utf-8?B?Q3VjRnRTMlRxWjlWdHBudWJGdEN1MkQxdzAzcnFtNzd5c2FldW9mcUNWbnUy?= =?utf-8?B?ei8yaTZuM1VGSU1sMEJFa0ovSVB4U2NJcHF5MDRDcy82U2YwU2lkMVIxWWxa?= =?utf-8?Q?6UuxO8dHhgDUf?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM9PR04MB8487.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(52116014)(7416014)(366016)(376014)(921020)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?U2pNbkxlN1lLRTNja1huRFNoc0JjdDVrSmNZbjB6QmZwZ1B2eUg3QTZiaVp3?= =?utf-8?B?M2ZiUGJHdVVwM1QvQkp1L2dIai9uckN0aCtmUzliUkNodjkveFJYNnFKWkZ2?= =?utf-8?B?TGRTYm1XOVlGVmIzWU41V2VBUGhXVGo2THo1U0tubUF0eEJDYXl6VjJLbk5y?= =?utf-8?B?RjhIUGdEK3J1cVJPOXNUZDNGNGkwNEFkelNiblNjT0FuSzVlaGJKdFdoQndh?= =?utf-8?B?eXJKT2NmaGQ2b0RadStieXQyU3hlWXFZTUhkZG42emQrejFtbVRGNzFlTmZU?= =?utf-8?B?c3JSLytmRmQ5cjkxRXdGTEp4Q0NLSzBTeGlhK0d4WEJSekFOdmR4dVRCQ2x2?= =?utf-8?B?WkJqYWRiZC9RR1R0eWZVcDdWclFWQ2tUQ1dpN3VSUnR0YTJUbjlvRmYzb2Np?= =?utf-8?B?M05nUjVvbnZzcTAremo4SWRmN3gzbk52NnhNNHZNM2h0Q2V5QnZSU29VSitE?= =?utf-8?B?akRmam1WOEtZaytOOXZlemdveVhxTmk0dkhHUk92Slo3d2luUWltSmdlc1I2?= =?utf-8?B?TkhyVFptNDNSQ1RhdHFYY20yRWdGdEhJNzZsTFR4MUZNSGV6dldHbmxnUXJk?= =?utf-8?B?SHM2NHBHMEgzeDNONTkyS1RsZlhBNkJJMlUvWjRsbXBFUG1lc1BaQVFvMllx?= =?utf-8?B?Q3JndlN4c2VrbFpsK0NoTUNBRmF1YThqVEJ0MWVDWXYva3hsWUt2ZkFhWm52?= =?utf-8?B?WFJwK1VzeGxYZVJ3REtOakZHbE9KdVcvbmxMNVJwODM5V3JPMEhlYm5ueXkw?= =?utf-8?B?TFFwOU5mNW5vKzZWQkRzS0JQcTI3U0h1b0dJcmpBQkR2NXYzcURFQVlWU29P?= =?utf-8?B?Z2VXeWYxam9zakxhOG0xa09iZVU1WE5RR1hHNWVEL2JNQW13Q2I3eHRSd2cx?= =?utf-8?B?ckJYNmNudmozcVRSQ3h5WEVXNnFZU3BGRmFmdkg1aGkyMXl1MmRkU29CRlpY?= =?utf-8?B?WHIzKzdQWVFvWkVsMU5ERzFqVlp5b2p5TWJhTHdaTWRndmFwTEhWZWgxb1Jo?= =?utf-8?B?YVdtY2c1cFl2UlpBdEN3a2hiQW1pRWJ0S1pFT1plZU1JWDNFOVJkaVE2bWc4?= =?utf-8?B?UTNmYWkzUHFxNmUvVWdacE1TTDBkRGJTN3haeUhmVzZTYXJZNmt0WTRMb0w2?= =?utf-8?B?bkNtWDlsc1hFMGIzK2dJQUFEdXhwSWFpYkUvQXYzbzExYmQzSlV0LzhIdllM?= =?utf-8?B?RGVES3pkLytiTWluNnRyQW50QVNHNWZsK3RxTzFkM2dKeExxNkw3Q2d5KzdK?= =?utf-8?B?cDRNVTNBK2ROSURWNm5XeWtqUEFoeFZXQnNraHlOSW0rSXBXQUdvUW9aNWlI?= =?utf-8?B?cWZjNlJyUno1WlAyYm50bFljdzlKcURGQ1g3REdGTnFYV01FKzZ4MnY4bnVW?= =?utf-8?B?NDVIanJGNHphRXBEZnROb0VJNzhKM2JwUWxXWllsTkh1Ui95ZEpFRWsyd1RF?= =?utf-8?B?VG5sdVA1RjIrRkpVclc2K3pBWXBVR2tmTHBFU2xVVDI0MDhhNCtEOVFqSi9Z?= =?utf-8?B?K2ZKQTI1Q0I5aUlxclFpWVQyNkN5bkd6ZTY1STlMNG5TRUc4VXJSemZBY3Rt?= =?utf-8?B?ZStZbWU1QVhhVGZDVXNZNG5vQUVESUVGRHJRcy9ncS94RG5SQ3h1WVNJZEhx?= =?utf-8?B?cDZnMlNVSEpYRFNydXRmVnl5RlcrTTVHVzlDc1dXVDZxV2RxYnY2NWl0UTNX?= =?utf-8?B?STBFcWxzci9neVp5SlBlT0ZhZTB4Ym5ZT0FRWDlyQmVGc0Fhb3JvRkR0RXps?= =?utf-8?B?NlA3UVBDeFFiVU81ZzloTXpmWGJVNmFUYVUva0R0aWM5TE96UGR3VUdvekdY?= =?utf-8?B?L3BGdjRHeUd3ZDJLZmRHY2d2TmZ1NEZmbnc2Ukw1R09iK3Fzb3BZTGJYMlhU?= =?utf-8?B?VE1nVmdNaEdOV1pLaHVJSEVnMXdneW5PcG1oVVVJSnpBc0ZORFlzUFVuem1r?= =?utf-8?B?a2l1QUtJdlNrNC9MbFIrQVhLRTlZVk1ldTZ5a2FqWkpqNG5udS9yZk5TNWFn?= =?utf-8?B?ZUNZdkl3Y2o0eEpYRDhxNlNoUU1OKzMwQXZ6VEp4SXV6eCsxUW40TmpEd0dZ?= =?utf-8?B?eDg5aFd1d1BBazAwZ0tWTE5DanVpN0dGYXNuMExDRm5FUWdYTFJ2YS9vZjM4?= =?utf-8?B?RDJtREFFWTlOUVlGY0FKWmFoMmpxS0pFMm00RHBBVER5WDJPaStmQTJYOElI?= =?utf-8?B?TWc9PQ==?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6ce377ff-71c4-4cf3-6a18-08dcfa4c203d X-MS-Exchange-CrossTenant-AuthSource: AM9PR04MB8487.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Nov 2024 08:06:44.6891 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 22NlKMb5bXWAEX5cyq6J4NnOXgGnxkCBsfGy4hIpTmsAKM3qX3/TrjgrhzzJWcdXhs6D6dLtcm6+kmjFKNYCXic+1gIXGxrU2XFAdTymhhk= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PR3PR04MB7225 Content-Type: text/plain; charset="utf-8" SIUL2 (System Integration Unit Lite) is a hardware module which implements various functionalities: - reading SoC information - pinctrl - GPIO (including interrupts) There are multiple register types in the SIUL2 module: - MIDR (MCU ID Register) * contains information about the SoC. - Interrupt related registers * There are 32 interrupts named EIRQ. An EIRQ may be routed to one or more GPIOs. Not all GPIOs have EIRQs associated with them - MSCR (Multiplexed Signal Configuration Register) * handle pinmuxing and pinconf - IMCR (Input Multiplexed Signal Configuration Register) * are part of pinmuxing - PGPDO/PGPDI (Parallel GPIO Pad Data Out/In Register) * Write/Read the GPIO value There are two SIUL2 modules in the S32G SoC. This driver handles both because functionality is shared between them. For example: some GPIOs in SIUL2_0 have interrupt capability but the registers configuring this are in SIUL2_1. Signed-off-by: Andrei Stefanescu --- drivers/mfd/Kconfig | 12 + drivers/mfd/Makefile | 1 + drivers/mfd/nxp-siul2.c | 411 ++++++++++++++++++++++++++++++++++ include/linux/mfd/nxp-siul2.h | 55 +++++ 4 files changed, 479 insertions(+) create mode 100644 drivers/mfd/nxp-siul2.c create mode 100644 include/linux/mfd/nxp-siul2.h diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index f9325bcce1b9..fc590789e8b3 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -1098,6 +1098,18 @@ config MFD_NTXEC certain e-book readers designed by the original design manufacturer Netronix. =20 +config MFD_NXP_SIUL2 + tristate "NXP SIUL2 MFD driver" + select MFD_CORE + select REGMAP_MMIO + depends on ARCH_S32 || COMPILE_TEST + help + Select this to get support for the NXP SIUL2 (System Integration + Unit Lite) module. This hardware block contains registers for + SoC information, pinctrl and GPIO functionality. This will + probe a MFD driver which will contain cells for a combined + pinctrl&GPIO driver and nvmem drivers for the SoC information. + config MFD_RETU tristate "Nokia Retu and Tahvo multi-function device" select MFD_CORE diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile index 2a9f91e81af8..7b19ea014221 100644 --- a/drivers/mfd/Makefile +++ b/drivers/mfd/Makefile @@ -226,6 +226,7 @@ obj-$(CONFIG_MFD_INTEL_PMC_BXT) +=3D intel_pmc_bxt.o obj-$(CONFIG_MFD_PALMAS) +=3D palmas.o obj-$(CONFIG_MFD_VIPERBOARD) +=3D viperboard.o obj-$(CONFIG_MFD_NTXEC) +=3D ntxec.o +obj-$(CONFIG_MFD_NXP_SIUL2) +=3D nxp-siul2.o obj-$(CONFIG_MFD_RC5T583) +=3D rc5t583.o rc5t583-irq.o obj-$(CONFIG_MFD_RK8XX) +=3D rk8xx-core.o obj-$(CONFIG_MFD_RK8XX_I2C) +=3D rk8xx-i2c.o diff --git a/drivers/mfd/nxp-siul2.c b/drivers/mfd/nxp-siul2.c new file mode 100644 index 000000000000..ba13d1beb244 --- /dev/null +++ b/drivers/mfd/nxp-siul2.c @@ -0,0 +1,411 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * SIUL2(System Integration Unit Lite) MFD driver + * + * Copyright 2024 NXP + */ +#include +#include +#include +#include +#include + +#define S32G_NUM_SIUL2 2 + +#define S32_REG_RANGE(start, end, name, access) \ + { \ + .reg_name =3D (name), \ + .reg_start_offset =3D (start), \ + .reg_end_offset =3D (end), \ + .reg_access =3D (access), \ + .valid =3D true, \ + } + +#define S32_INVALID_REG_RANGE \ + { \ + .reg_name =3D NULL, \ + .reg_access =3D NULL, \ + .valid =3D false, \ + } + +static const struct mfd_cell nxp_siul2_devs[] =3D { + { + .name =3D "s32g-siul2-pinctrl", + } +}; + +/** + * struct nxp_siul2_reg_range_info: a register range in SIUL2 + * @reg_start_offset: the first valid register offset + * @reg_end_offset: the last valid register offset + * @reg_access: the read/write access tables if not NULL + * @valid: whether the register range is valid or not + */ +struct nxp_siul2_reg_range_info { + const char *reg_name; + unsigned int reg_start_offset; + unsigned int reg_end_offset; + const struct regmap_access_table *reg_access; + bool valid; +}; + +static const struct regmap_range s32g2_siul2_0_imcr_reg_ranges[] =3D { + /* IMCR0 - IMCR1 */ + regmap_reg_range(0, 4), + /* IMCR3 - IMCR61 */ + regmap_reg_range(0xC, 0xF4), + /* IMCR68 - IMCR83 */ + regmap_reg_range(0x110, 0x14C) +}; + +static const struct regmap_access_table s32g2_siul2_0_imcr =3D { + .yes_ranges =3D s32g2_siul2_0_imcr_reg_ranges, + .n_yes_ranges =3D ARRAY_SIZE(s32g2_siul2_0_imcr_reg_ranges) +}; + +static const struct regmap_range s32g2_siul2_0_pgpd_reg_ranges[] =3D { + /* PGPD*0 - PGPD*5 */ + regmap_reg_range(0, 0xA), + /* PGPD*6 - PGPD*6 */ + regmap_reg_range(0xE, 0xE), +}; + +static const struct regmap_access_table s32g2_siul2_0_pgpd =3D { + .yes_ranges =3D s32g2_siul2_0_pgpd_reg_ranges, + .n_yes_ranges =3D ARRAY_SIZE(s32g2_siul2_0_pgpd_reg_ranges) +}; + +static const struct regmap_range s32g2_siul2_1_irq_reg_ranges[] =3D { + /* DISR0 */ + regmap_reg_range(0x10, 0x10), + /* DIRER0 */ + regmap_reg_range(0x18, 0x18), + /* DIRSR0 */ + regmap_reg_range(0x20, 0x20), + /* IREER0 */ + regmap_reg_range(0x28, 0x28), + /* IFEER0 */ + regmap_reg_range(0x30, 0x30), +}; + +static const struct regmap_access_table s32g2_siul2_1_irq =3D { + .yes_ranges =3D s32g2_siul2_1_irq_reg_ranges, + .n_yes_ranges =3D ARRAY_SIZE(s32g2_siul2_1_irq_reg_ranges), +}; + +static const struct regmap_range s32g2_siul2_1_irq_volatile_reg_range[] = =3D { + /* DISR0 */ + regmap_reg_range(0x10, 0x10) +}; + +static const struct regmap_access_table s32g2_siul2_1_irq_volatile =3D { + .yes_ranges =3D s32g2_siul2_1_irq_volatile_reg_range, + .n_yes_ranges =3D ARRAY_SIZE(s32g2_siul2_1_irq_volatile_reg_range), +}; + +static const struct regmap_range s32g2_siul2_1_mscr_reg_ranges[] =3D { + /* MSCR112 - MSCR122 */ + regmap_reg_range(0, 0x28), + /* MSCR144 - MSCR190 */ + regmap_reg_range(0x80, 0x138) +}; + +static const struct regmap_access_table s32g2_siul2_1_mscr =3D { + .yes_ranges =3D s32g2_siul2_1_mscr_reg_ranges, + .n_yes_ranges =3D ARRAY_SIZE(s32g2_siul2_1_mscr_reg_ranges), +}; + +static const struct regmap_range s32g2_siul2_1_imcr_reg_ranges[] =3D { + /* IMCR119 - IMCR121 */ + regmap_reg_range(0, 8), + /* IMCR128 - IMCR129 */ + regmap_reg_range(0x24, 0x28), + /* IMCR143 - IMCR151 */ + regmap_reg_range(0x60, 0x80), + /* IMCR153 - IMCR161 */ + regmap_reg_range(0x88, 0xA8), + /* IMCR205 - IMCR212 */ + regmap_reg_range(0x158, 0x174), + /* IMCR224 - IMCR225 */ + regmap_reg_range(0x1A4, 0x1A8), + /* IMCR233 - IMCR248 */ + regmap_reg_range(0x1C8, 0x204), + /* IMCR273 - IMCR274 */ + regmap_reg_range(0x268, 0x26C), + /* IMCR278 - IMCR281 */ + regmap_reg_range(0x27C, 0x288), + /* IMCR283 - IMCR286 */ + regmap_reg_range(0x290, 0x29C), + /* IMCR288 - IMCR294 */ + regmap_reg_range(0x2A4, 0x2BC), + /* IMCR296 - IMCR302 */ + regmap_reg_range(0x2C4, 0x2DC), + /* IMCR304 - IMCR310 */ + regmap_reg_range(0x2E4, 0x2FC), + /* IMCR312 - IMCR314 */ + regmap_reg_range(0x304, 0x30C), + /* IMCR316 */ + regmap_reg_range(0x314, 0x314), + /* IMCR 318 */ + regmap_reg_range(0x31C, 0x31C), + /* IMCR322 - IMCR340 */ + regmap_reg_range(0x32C, 0x374), + /* IMCR343 - IMCR360 */ + regmap_reg_range(0x380, 0x3C4), + /* IMCR363 - IMCR380 */ + regmap_reg_range(0x3D0, 0x414), + /* IMCR383 - IMCR393 */ + regmap_reg_range(0x420, 0x448), + /* IMCR398 - IMCR433 */ + regmap_reg_range(0x45C, 0x4E8), + /* IMCR467 - IMCR470 */ + regmap_reg_range(0x570, 0x57C), + /* IMCR473 - IMCR475 */ + regmap_reg_range(0x588, 0x590), + /* IMCR478 - IMCR480*/ + regmap_reg_range(0x59C, 0x5A4), + /* IMCR483 - IMCR485 */ + regmap_reg_range(0x5B0, 0x5B8), + /* IMCR488 - IMCR490 */ + regmap_reg_range(0x5C4, 0x5CC), + /* IMCR493 - IMCR495 */ + regmap_reg_range(0x5D8, 0x5E0), +}; + +static const struct regmap_access_table s32g2_siul2_1_imcr =3D { + .yes_ranges =3D s32g2_siul2_1_imcr_reg_ranges, + .n_yes_ranges =3D ARRAY_SIZE(s32g2_siul2_1_imcr_reg_ranges) +}; + +static const struct regmap_range s32g2_siul2_1_pgpd_reg_ranges[] =3D { + /* PGPD*7 */ + regmap_reg_range(0xC, 0xC), + /* PGPD*9 */ + regmap_reg_range(0x10, 0x10), + /* PDPG*10 - PGPD*11 */ + regmap_reg_range(0x14, 0x16), +}; + +static const struct regmap_access_table s32g2_siul2_1_pgpd =3D { + .yes_ranges =3D s32g2_siul2_1_pgpd_reg_ranges, + .n_yes_ranges =3D ARRAY_SIZE(s32g2_siul2_1_pgpd_reg_ranges) +}; + +static const struct nxp_siul2_reg_range_info +s32g2_reg_ranges[S32G_NUM_SIUL2][SIUL2_NUM_REG_TYPES] =3D { + /* SIUL2_0 */ + { + [SIUL2_MPIDR] =3D S32_REG_RANGE(4, 8, "SIUL2_0_MPIDR", NULL), + /* Interrupts are to be controlled from SIUL2_1 */ + [SIUL2_IRQ] =3D S32_INVALID_REG_RANGE, + [SIUL2_MSCR] =3D S32_REG_RANGE(0x240, 0x3D4, "SIUL2_0_MSCR", + NULL), + [SIUL2_IMCR] =3D S32_REG_RANGE(0xA40, 0xB8C, "SIUL2_0_IMCR", + &s32g2_siul2_0_imcr), + [SIUL2_PGPDO] =3D S32_REG_RANGE(0x1700, 0x170E, + "SIUL2_0_PGPDO", + &s32g2_siul2_0_pgpd), + [SIUL2_PGPDI] =3D S32_REG_RANGE(0x1740, 0x174E, + "SIUL2_0_PGPDI", + &s32g2_siul2_0_pgpd), + }, + /* SIUL2_1 */ + { + [SIUL2_MPIDR] =3D S32_REG_RANGE(4, 8, "SIUL2_1_MPIDR", NULL), + [SIUL2_IRQ] =3D S32_REG_RANGE(0x10, 0xC0, "SIUL2_1_IRQ", + &s32g2_siul2_1_irq), + [SIUL2_MSCR] =3D S32_REG_RANGE(0x400, 0x538, "SIUL2_1_MSCR", + &s32g2_siul2_1_mscr), + [SIUL2_IMCR] =3D S32_REG_RANGE(0xC1C, 0x11FC, "SIUL2_1_IMCR", + &s32g2_siul2_1_imcr), + [SIUL2_PGPDO] =3D S32_REG_RANGE(0x1700, 0x1716, + "SIUL2_1_PGPDO", + &s32g2_siul2_1_pgpd), + [SIUL2_PGPDI] =3D S32_REG_RANGE(0x1740, 0x1756, + "SIUL2_1_PGPDI", + &s32g2_siul2_1_pgpd), + }, +}; + +static const struct regmap_config nxp_siul2_regmap_irq_conf =3D { + .val_bits =3D 32, + .val_format_endian =3D REGMAP_ENDIAN_LITTLE, + .reg_bits =3D 32, + .reg_stride =3D 4, + .cache_type =3D REGCACHE_FLAT, + .use_raw_spinlock =3D true, + .volatile_table =3D &s32g2_siul2_1_irq_volatile, +}; + +static const struct regmap_config nxp_siul2_regmap_generic_conf =3D { + .val_bits =3D 32, + .val_format_endian =3D REGMAP_ENDIAN_LITTLE, + .reg_bits =3D 32, + .reg_stride =3D 4, + .cache_type =3D REGCACHE_FLAT, + .use_raw_spinlock =3D true, +}; + +static const struct regmap_config nxp_siul2_regmap_pgpdo_conf =3D { + .val_bits =3D 16, + .val_format_endian =3D REGMAP_ENDIAN_LITTLE, + .reg_bits =3D 32, + .reg_stride =3D 2, + .cache_type =3D REGCACHE_FLAT, + .use_raw_spinlock =3D true, +}; + +static const struct regmap_config nxp_siul2_regmap_pgpdi_conf =3D { + .val_bits =3D 16, + .val_format_endian =3D REGMAP_ENDIAN_LITTLE, + .reg_bits =3D 32, + .reg_stride =3D 2, + .cache_type =3D REGCACHE_NONE, + .use_raw_spinlock =3D true, +}; + +static int nxp_siul2_init_regmap(struct platform_device *pdev, + void __iomem *base, int siul) +{ + struct regmap_config regmap_configs[SIUL2_NUM_REG_TYPES] =3D { + [SIUL2_MPIDR] =3D nxp_siul2_regmap_generic_conf, + [SIUL2_IRQ] =3D nxp_siul2_regmap_irq_conf, + [SIUL2_MSCR] =3D nxp_siul2_regmap_generic_conf, + [SIUL2_IMCR] =3D nxp_siul2_regmap_generic_conf, + [SIUL2_PGPDO] =3D nxp_siul2_regmap_pgpdo_conf, + [SIUL2_PGPDI] =3D nxp_siul2_regmap_pgpdi_conf, + }; + const struct nxp_siul2_reg_range_info *tmp_range; + struct regmap_config *tmp_conf; + struct nxp_siul2_info *info; + struct nxp_siul2_mfd *priv; + void __iomem *reg_start; + int i, ret; + + priv =3D platform_get_drvdata(pdev); + info =3D &priv->siul2[siul]; + + for (i =3D 0; i < SIUL2_NUM_REG_TYPES; i++) { + if (!s32g2_reg_ranges[siul][i].valid) + continue; + + tmp_range =3D &s32g2_reg_ranges[siul][i]; + tmp_conf =3D ®map_configs[i]; + tmp_conf->name =3D tmp_range->reg_name; + tmp_conf->max_register =3D + tmp_range->reg_end_offset - tmp_range->reg_start_offset; + + if (tmp_conf->cache_type !=3D REGCACHE_NONE) + tmp_conf->num_reg_defaults_raw =3D + tmp_conf->max_register / tmp_conf->reg_stride; + + if (tmp_range->reg_access) { + tmp_conf->wr_table =3D tmp_range->reg_access; + tmp_conf->rd_table =3D tmp_range->reg_access; + } + + reg_start =3D base + tmp_range->reg_start_offset; + info->regmaps[i] =3D devm_regmap_init_mmio(&pdev->dev, reg_start, + tmp_conf); + if (IS_ERR(info->regmaps[i])) { + dev_err(&pdev->dev, "regmap %d init failed: %d\n", i, + ret); + return PTR_ERR(info->regmaps[i]); + } + } + + return 0; +} + +static int nxp_siul2_parse_dtb(struct platform_device *pdev) +{ + struct device_node *np =3D pdev->dev.of_node; + struct of_phandle_args pinspec; + struct nxp_siul2_mfd *priv; + void __iomem *base; + char reg_name[16]; + int i, ret; + + priv =3D platform_get_drvdata(pdev); + + for (i =3D 0; i < priv->num_siul2; i++) { + ret =3D snprintf(reg_name, ARRAY_SIZE(reg_name), "siul2%d", i); + if (ret < 0 || ret >=3D ARRAY_SIZE(reg_name)) + return ret; + + base =3D devm_platform_ioremap_resource_byname(pdev, reg_name); + if (IS_ERR(base)) { + dev_err(&pdev->dev, "Failed to get MEM resource: %s\n", + reg_name); + return PTR_ERR(base); + } + + ret =3D nxp_siul2_init_regmap(pdev, base, i); + if (ret) + return ret; + + ret =3D of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, + i, &pinspec); + if (ret) + return ret; + + of_node_put(pinspec.np); + + if (pinspec.args_count !=3D 3) { + dev_err(&pdev->dev, "Invalid pinspec count: %d\n", + pinspec.args_count); + return -EINVAL; + } + + priv->siul2[i].gpio_base =3D pinspec.args[1]; + priv->siul2[i].gpio_num =3D pinspec.args[2]; + } + + return 0; +} + +static int nxp_siul2_probe(struct platform_device *pdev) +{ + struct nxp_siul2_mfd *priv; + int ret; + + priv =3D devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->num_siul2 =3D S32G_NUM_SIUL2; + priv->siul2 =3D devm_kcalloc(&pdev->dev, priv->num_siul2, + sizeof(*priv->siul2), GFP_KERNEL); + if (!priv->siul2) + return -ENOMEM; + + platform_set_drvdata(pdev, priv); + ret =3D nxp_siul2_parse_dtb(pdev); + if (ret) + return ret; + + return devm_mfd_add_devices(&pdev->dev, PLATFORM_DEVID_AUTO, + nxp_siul2_devs, ARRAY_SIZE(nxp_siul2_devs), + NULL, 0, NULL); +} + +static const struct of_device_id nxp_siul2_dt_ids[] =3D { + { .compatible =3D "nxp,s32g2-siul2" }, + { .compatible =3D "nxp,s32g3-siul2" }, + { }, +}; +MODULE_DEVICE_TABLE(of, nxp_siul2_dt_ids); + +static struct platform_driver nxp_siul2_mfd_driver =3D { + .driver =3D { + .name =3D "nxp-siul2-mfd", + .of_match_table =3D nxp_siul2_dt_ids, + }, + .probe =3D nxp_siul2_probe, +}; + +module_platform_driver(nxp_siul2_mfd_driver); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("NXP SIUL2 MFD driver"); +MODULE_AUTHOR("Andrei Stefanescu "); diff --git a/include/linux/mfd/nxp-siul2.h b/include/linux/mfd/nxp-siul2.h new file mode 100644 index 000000000000..238c812dba29 --- /dev/null +++ b/include/linux/mfd/nxp-siul2.h @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later + * + * S32 SIUL2 core definitions + * + * Copyright 2024 NXP + */ + +#ifndef __DRIVERS_MFD_NXP_SIUL2_H +#define __DRIVERS_MFD_NXP_SIUL2_H + +#include + +/** + * enum nxp_siul2_reg_type - an enum for SIUL2 reg types + * @SIUL2_MPIDR - SoC info + * @SIUL2_IRQ - IRQ related registers, only valid in SIUL2_1 + * @SIUL2_MSCR - used for pinmuxing and pinconf + * @SIUL2_IMCR - used for pinmuxing + * @SIUL2_PGPDO - writing the GPIO value + * @SIUL2_PGPDI - reading the GPIO value + */ +enum nxp_siul2_reg_type { + SIUL2_MPIDR, + SIUL2_IRQ, + SIUL2_MSCR, + SIUL2_IMCR, + SIUL2_PGPDO, + SIUL2_PGPDI, + + SIUL2_NUM_REG_TYPES +}; + +/** + * struct nxp_siul2_info - details about one SIUL2 hardware instance + * @regmaps: the regmaps for each register type for a SIUL2 hardware insta= nce + * @gpio_base: the first GPIO in this SIUL2 module + * @gpio_num: the number of GPIOs in this SIUL2 module + */ +struct nxp_siul2_info { + struct regmap *regmaps[SIUL2_NUM_REG_TYPES]; + u32 gpio_base; + u32 gpio_num; +}; + +/** + * struct nxp_siul2_mfd - driver data + * @siul2: info about the SIUL2 modules present + * @num_siul2: number of siul2 modules + */ +struct nxp_siul2_mfd { + struct nxp_siul2_info *siul2; + u8 num_siul2; +}; + +#endif /* __DRIVERS_MFD_NXP_SIUL2_H */ --=20 2.45.2 From nobody Sun Nov 24 21:45:37 2024 Received: from EUR03-VI1-obe.outbound.protection.outlook.com (mail-vi1eur03on2085.outbound.protection.outlook.com [40.107.103.85]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9B5EF157E6B; Fri, 1 Nov 2024 08:06:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.103.85 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730448415; cv=fail; b=HtNi5+jnYH21b05UqTD472YFYQ1NJ3ROJb/yn/kuF9tBH0DuAhEAnihsk0p13VBe/WzjytyJ61H/xCaS/tZ/8kjrVUugKlM7f9alp23LIfG0H7+qV/PqtOYCT4+wNt2ePvv+JWk+jIg1+2/9211AN47h71rH4EQusLqXE6W+K6M= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730448415; c=relaxed/simple; bh=JGk4JoPMNB3lNrzPC4j5q4MFl6lPFrbGdewh6IfAzNE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=AH/aCgrcY48douYd7DGifiZB4bFtHY1aiDngLFxe2+wFB+11P4JMT7jDQSHMejGmpXwR07n9Tmv8S80DwQqu6k6+JUThJiqZ14O3Yq+rJM0NU8kUeAfHO3kutR0binXpMrHHJBzS9PqVI8hmD7bD1IHLZP1kFpFEPudjKtF1yTM= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com; spf=pass smtp.mailfrom=oss.nxp.com; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b=HS1ipa1T; arc=fail smtp.client-ip=40.107.103.85 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b="HS1ipa1T" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=rXVWYevZHiOp/jnrP8UIh1VIM4tgB4DohAeib1MQi/7Dit9b0F7TNb9mMzJonw0McT1KMc5ta1Gdkf7Fc/INxa387HFBs7eRRdO+URBRW7Pu5wZGaCq9ESLJsDAcCpQQKxsMEg2ob/zCjEVi+62vHE4A2VPY5CrMhBbtrpEqva7BOXvzQYO0uodDM64cI5QIiAYHzQrDTk2oBYiKAQ2pla9WlFyBgeb5W32o17jM6aogNltnEOJWUkJFy4/OWfNmYRBHvVSeD1SzkfIxqAgFTbOpimE5RO9MNCgeLea3185R/LlCdrdK45MR9h/hXfPqZos7gGUcVUnxun3emozwog== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=dNZvUuGOtpc048I2G5b6vIW80F+kyfPM/s/b6wr6lE8=; b=CMZnnTSyCtIzyBiKcFhM9IupDbDpzy8TdMiR+xiGRI6fk+KtYMscydjSrzgqYe320oEsJHrmyLpsJfq8Xh/BKiXGyVb0y/lUL/vWHZHmo0XppTo1YMZRDSE2ZsXKN4DHDgTVzV3oQrIyoavW8YsELL/I+OY00Sh4M49K8OAgGbJR8b56uTTAtdnc/vzTyu2AB6YxBedyDSYWqgk2PXFV9PALCIiDSdxjxENWCc9VC7I/H4mAqDstDG0MUZ9Iet48Ahvz4PBfeTBAuo+pqzUj6x9T+8FO+HEa1tvdFRq0dSnLUp6OJJvG6h2KbUScsl6ndYFINUSY9zLn50L8Ukq7yg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector1-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=dNZvUuGOtpc048I2G5b6vIW80F+kyfPM/s/b6wr6lE8=; b=HS1ipa1TXO7nGIVS85Ja8wyi6cHLJsXXnpUiZh6lhHCHwyx5cZ0trbQOiBHTgi7kYoWYpI3q2vM+rQiqRRpIfjesTfHhKLP08CC62dhR6pSlrBsCyfv7Syz+n0C1stvgzT7zkMhqgpoMMS0uXgb8Su7aG9T60ts6/TWd0Ppg+vFSgNzca9JqvVXrMSArXvLDrpyHhXTnDLIdXAy11qcP1z+fWjSGEj0+9XAIQ2uR8Slnhxa9AkSTj0NPaBDiKKO4C9Khvo2pJK/EwDplNMviLgptAmOY8GuCHPOKjmlHzhSwr7CrDoap6L4yMythZvPKF3xgU2ApeNZ07VcVCj8Grg== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) by PR3PR04MB7225.eurprd04.prod.outlook.com (2603:10a6:102:83::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.32; Fri, 1 Nov 2024 08:06:47 +0000 Received: from AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455]) by AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455%5]) with mapi id 15.20.8114.015; Fri, 1 Nov 2024 08:06:47 +0000 From: Andrei Stefanescu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , Larisa Grigore , Andrei Stefanescu , Greg Kroah-Hartman , "Rafael J. Wysocki" , Lee Jones , Shawn Guo , Sascha Hauer , Fabio Estevam , Dong Aisheng , Jacky Bai Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP S32 Linux Team , Christophe Lizzi , Alberto Ruiz , Enric Balletbo , Pengutronix Kernel Team , imx@lists.linux.dev Subject: [PATCH v5 3/7] arm64: dts: s32g: make pinctrl part of mfd node Date: Fri, 1 Nov 2024 10:06:09 +0200 Message-ID: <20241101080614.1070819-4-andrei.stefanescu@oss.nxp.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> References: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: AM0PR10CA0115.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:e6::32) To AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM9PR04MB8487:EE_|PR3PR04MB7225:EE_ X-MS-Office365-Filtering-Correlation-Id: e964c3be-bdf6-4a4a-6764-08dcfa4c21f6 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|52116014|7416014|366016|376014|921020|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?ak05aUx5TVlESHZpRzZ1Z1JDaXZHNHhDcm0yeDdzSm55emU1Y1hhMDlaVlRX?= =?utf-8?B?YU85OG00V2lRcEN0UW9od1IwWW13SE5BK0V4bkt2SHhvUCtOQ1FEUnBjckwy?= =?utf-8?B?d1EweXhJVWxldFVmM0xaOVdMTEx0QWNCWTIrZ1BoWThlL2JMNUFQYnFTSUlL?= =?utf-8?B?cWpGU1NkdTJKYWlLelBqa2FsQ2x2My93Z0xDWk81TUsyWEVaTG9HMXlyRVV2?= =?utf-8?B?Yzd1MDZmNHFEajllVmJuRjF6a3ZrU3UrTEtDV1VacXhzb215R1o0bnZ4aEVl?= =?utf-8?B?dlFxeDhSbmVtQkRpZXh0WHFMM3R3Vi9PTlpqN000cXJ5d2kvb294ODh5eHU2?= =?utf-8?B?OWoyeGVDZFp3dDkzOGgzeXdTUHJLazVVOFo4VkJzQVRJVEVheElkMmUwdVRv?= =?utf-8?B?ZmpVaC9aaU83cU1mUVY1NFF3WmNTNFUwbE9ER2o0WGh6TEx5SjFMM25zd0xW?= =?utf-8?B?dldiVWR3OGxZUHVTWExXb3FIcjIvV0JVa013ZEc0d0ZnU04zSVFCS2tpY2Vs?= =?utf-8?B?OHRhNVVoWXhTcjFFZ1JFWnorQVhDcXBqa3kyZExsOG1uK1BhWi9rM21pUXF5?= =?utf-8?B?YXFOMDJKbHNJTDNhN1JpdnZ2OVg3QmZjZlZ6d3hPcEhKQUFLaVhHc1EwYzVi?= =?utf-8?B?WlZ2U1lIK3pNR1NCdlRBNkVwdkxWWEE4cDFqMWltQlh0Z1BqSDBFMDVlY2N2?= =?utf-8?B?L1Z3UzlxVHBCck9GaW9UMkcxNVUxWlgxdWNCMVBXZHB6TmJVVnB6QVNQUE5W?= =?utf-8?B?Wk9rZWdObnlySlJPNlRIWWVoQitqeUN1bEgvYmVPWXJ6WEEyUUdKY1U0cHFO?= =?utf-8?B?R0xTZllqdlNZS25WV01vL0FUanNKUWVOeUZPSlFLSzdUdHBldGk1RCsrZUpZ?= =?utf-8?B?RnVyTlk0WmRINy83R1BiWGU3Q3ZKZ3R6VlFtTms2ZXQ0Y0krVXZGbnJSWG00?= =?utf-8?B?dm1scS9pVzFKVjNXVHZJNTBMQkl1Vm5VMmFCUXdkcFZnaUZVVU9yZkdXUUNL?= =?utf-8?B?QjFWL3B1cjNzdW1oNHJXd0NpbXU5NmNKcVNDR2NIWGk1V2ttWVNGREZHYkRB?= =?utf-8?B?dXZNT09VcitNNUd3VDFMYnlFTTVienpNOFdOcWVaRkttOVdlNk1IaUUwbVEv?= =?utf-8?B?eTBZUXF3N1QrN1JuUmdtNFkyNlJ3WkZqcmJsRDM3YW4rWE80TDRGQ05aQnQy?= =?utf-8?B?SUVoYVphMFFnWC9CNnNWZEhhc1VCb2hyQ1BmMWJBQktFNVdVRnliK0hFRmdM?= =?utf-8?B?blJIaFlsSit6eTRkbSs3VW5rV0FIQ3pBUXFEd0J4TERoTlVXWHkzTEc1bHdk?= =?utf-8?B?RGJVenlZU2FFNUtLSWQ4SHZ3THcvTzNUVXg1NEIzSHJHU2hkc1lleG9uTHRt?= =?utf-8?B?THVyRm1QTGdFOE1reHpmbkovcDloSWU4eTZ3a3VEUVlKTkRiaEFtWUtZU0k1?= =?utf-8?B?SS9SYXBFeUczMld3SGR3U3hOV0JsVTRVUVlxSFQ4KzltMkwwN1NBYzg1eVBB?= =?utf-8?B?V2VJOTZqbmdRZ004dEg3dTJKVU12VjN6UzZXdkM3elo5cVEyTi8xTHEyM2N6?= =?utf-8?B?Y1JKS1E5M1JKVFVZdmtTYUd0WUg3WENQYlV0QlVIc2cxQXBMRkNBa1gvdWZY?= =?utf-8?B?enVCNGJMY3ArTW5UL3E0Vzh2eStWZW5jd25kMU9ONE93WVRqN2R3cTBGcFlh?= =?utf-8?B?L1o3RmtpMHAwSkM5emFZT3pYZDd2NnRQRHlvV3VYTGFPVXRKaVh1VVhOaFJu?= =?utf-8?B?dC9ML0lkMnUzTHljV3UyNXZmS3k3TkZDM2ZWT0ZtR21XWmhXUjhyQWlUNHZ4?= =?utf-8?B?K3hqL3lpTFJZZGl5dWdCQWg1eDhTL0pWYUtBeHNXeUZtSThEa3d6dHhpZXN2?= =?utf-8?Q?NsrQIXD9NuAti?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM9PR04MB8487.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(52116014)(7416014)(366016)(376014)(921020)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?VzRVdmJBR0VIQk9YNUx5cGNzM3hWalJMbGNqMXFOQ1FYMHB3SjZCNVU0RTRP?= =?utf-8?B?SmJheWZId3l2VFNpQlBPbXg1cEVUd2hIakxheHNINGYxbGNIMkM3WWt1dGFk?= =?utf-8?B?cVVZZ3pqTFVLMTJmSE9lcHYyQmFiWUhYZk1IemkyTkVmT3NVanpaWlJONzNa?= =?utf-8?B?MjFmV2ptL1VhMkRlREVJSC8xSXhoQTQ4SDF6TGozRUFadFYvUWhWaThpa1Fs?= =?utf-8?B?V2MyTWtrRGMwV0V2aUtRQmJzY20xNS9vMkc2a3NIVjdRdDlzbmZBVEN6Si9K?= =?utf-8?B?U0ErYWxIbytkNVhIY210MlFROWtMTmNxL1MxQTdQaGQrd1dvSk9QZE1sWC9W?= =?utf-8?B?dnpmVFdDWjQ1L01ldERjRkVpUGZpb3d2a3Bjd2RybTZnS1BndDFDRitMTmRL?= =?utf-8?B?N20wNGFiWUVyNzBoLzBYbzh1T0p3clhFbHdYajFKMEw3eTZucHBQQnQ1aFNr?= =?utf-8?B?TFNlN3dPSkUvVGxxOHhTUEFmZEZyd2dOWjY5ZWRneE5YemdtMGQrSnJiaWs1?= =?utf-8?B?bUdHalloRXo4clJ2c3ZaOXArZldOd2p0T1k0MUNJdkdxdGJHbkxFMTlyU0VU?= =?utf-8?B?REJOL3VyZ2ZINW1CNll0MDVncVAzcjNWUmtuY3MxNFZNVGFFblFpay9SOE9T?= =?utf-8?B?MkMrc0taY3prOHVUTjVYeG94UjVUK1FUSE5pMjB2aE1GbE5TQVFZTVJCcWFZ?= =?utf-8?B?Rlc1aUFKTUlFU0pxQTQ3UWtPVFd1djRlZUFnS3NtaWh3MDdwQ1NCVnNqUkhs?= =?utf-8?B?V0RDY3J6amRIZ01lOG1YanVaWm5WTndCNWY1YkJpTFp1OTdQeitKSU9RWUJo?= =?utf-8?B?cUE5ODRRdTVQS2xqRDVqQTBHTlAzSmhHSnRQbmJUNWdSb2krdFFqZzZONXFQ?= =?utf-8?B?dGNCK0wramV6bnNNTEdwdmlmU0lkUXRzRnJqNURlYzM5dUF5aTBJdCtnR0Zz?= =?utf-8?B?aHRXTXpvZmZ4L3Erd0NEYXNjeUpESkxGbnRHMEJuQ2JrelZLdDU3Mm4xLzN5?= =?utf-8?B?UTQzUGU1dVZzS2ZsWkxuYzcvRklBUzAxMmp5VEZ0SndQTm1IaUVBNHg1RDly?= =?utf-8?B?ZkNxeit6NURiRFlCcllSdmhzVkZFUkpOM2ZXZy9ERUV1M0NmQUxuSFF5NkdT?= =?utf-8?B?OVoyRGQyczZhZlhzbFFpVkNHN1U2d1lNRUFXOWJaV1BHM0dPcEpDdU85aTVy?= =?utf-8?B?OXpjWWhzeENGQVpYM2lGNU9TV1hXY2JOYURGUCtwRnZPMTlCN1VpU3Q4dHJt?= =?utf-8?B?ZFlzSEQzNEE3TS9uOWtVcXFBakJvajB6WkoxWTU0aDQ3Wi96eE9oaEY2RHQw?= =?utf-8?B?VHU0ekVrckx3VEtIOEJWMng4NWcrSHRCOXkzdGMza2pIZ3kycFU4dHRhdWh4?= =?utf-8?B?OXVtRVpsbklVcW0zdXkrMXVuOU9XUTk0OG8rMFZwMVRKY3BUTFpXNHcwa2xp?= =?utf-8?B?RDRDWG5TbzdDdW5OWi9GOTdFQmhWUTNGM1VTNFVWeDNFQzJkcjVUN0pUMHh3?= =?utf-8?B?M016eUg0S3N2ZVZkRnRkSlhKTEZjR1oxNVY1WjRqU2RYbkc3bnJZVFM2b3hQ?= =?utf-8?B?bkFZSXVrTFY0dkNkbFNDZS9tUVRBN2NJZ3VvWk55VFNPODl5U29haTQxN2ZE?= =?utf-8?B?ZDAxd2tEMTJlby9GblpVcDR0OFMxTHdjVlEwbXhhZE9tcW9mTDZyR3hJeUZH?= =?utf-8?B?aUlLYWVnYVg4QlYxaXVjcEFaMzRMYTVDdEU3aytBQWREVlB3Q2RiV0FpZ1N2?= =?utf-8?B?Y3dZOGptSFJNQ3pMZlY2aklwektlWnY0cG1idW9yNkpJaGJUaHVMaXZoTExT?= =?utf-8?B?NXJPbnJGVkxJbHd3cXEwQThaMVc0NDlpb3NOMU9OVEhTeXJ2b05Nc2svblYv?= =?utf-8?B?TWtVeHkzV285RHJiekJVMHc0aTNXM3JLMTgwU3VmYkZ5eVh5L2lVRVlkWXhE?= =?utf-8?B?R2N0eFA1Q2tDbnJROEhMMTJXbVozOFZVWU1TYjI2by9Oclk0SEVTdzU1dThH?= =?utf-8?B?Y3I3eVo4NUl5TFc3aHdOcUp6cnVacEpRdWRteUdIZ3B2dmZUWVovdFZpREp0?= =?utf-8?B?NTVEcEJVczBIZXBrZERRSW5Jb0tFdVJiT2RBZzdGLzdpL0xuSTQwOE1KQ2w1?= =?utf-8?B?dUN3N1FCblNmUmhPR1R3ZUdJcWhBdDJOVXRaMVU3K3l5T05PQUFleVJzYzR0?= =?utf-8?B?MVE9PQ==?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: e964c3be-bdf6-4a4a-6764-08dcfa4c21f6 X-MS-Exchange-CrossTenant-AuthSource: AM9PR04MB8487.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Nov 2024 08:06:47.5972 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: zcP7JoNGLp3hSAV96vV8EomuAxObvJrLh8z3O2uYnU3q06AnhoFH7hRoWbzWz06k0TveCVZa08lFYMnRVtpPSISmlopRGWVp46QtzpIAk14= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PR3PR04MB7225 Content-Type: text/plain; charset="utf-8" SIUL2 is now represented as an mfd device. Therefore, the old pinctrl node is deprecated. Move the pinctrl related properties inside the new "nxp-siul2" node. The latter one is now used to represent the mfd device. Signed-off-by: Andrei Stefanescu --- arch/arm64/boot/dts/freescale/s32g2.dtsi | 26 +++++++++++------------- arch/arm64/boot/dts/freescale/s32g3.dtsi | 26 +++++++++++------------- 2 files changed, 24 insertions(+), 28 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/s32g2.dtsi b/arch/arm64/boot/dts= /freescale/s32g2.dtsi index fa054bfe7d5c..e14ce5503e1f 100644 --- a/arch/arm64/boot/dts/freescale/s32g2.dtsi +++ b/arch/arm64/boot/dts/freescale/s32g2.dtsi @@ -114,20 +114,18 @@ soc@0 { #size-cells =3D <1>; ranges =3D <0 0 0 0x80000000>; =20 - pinctrl: pinctrl@4009c240 { - compatible =3D "nxp,s32g2-siul2-pinctrl"; - /* MSCR0-MSCR101 registers on siul2_0 */ - reg =3D <0x4009c240 0x198>, - /* MSCR112-MSCR122 registers on siul2_1 */ - <0x44010400 0x2c>, - /* MSCR144-MSCR190 registers on siul2_1 */ - <0x44010480 0xbc>, - /* IMCR0-IMCR83 registers on siul2_0 */ - <0x4009ca40 0x150>, - /* IMCR119-IMCR397 registers on siul2_1 */ - <0x44010c1c 0x45c>, - /* IMCR430-IMCR495 registers on siul2_1 */ - <0x440110f8 0x108>; + siul2: siul2@4009c000 { + compatible =3D "nxp,s32g2-siul2"; + reg =3D <0x4009c000 0x179c>, + <0x44010000 0x17b0>; + reg-names =3D "siul20", "siul21"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&siul2 0 0 102>, <&siul2 112 112 79>; + gpio-reserved-ranges =3D <102 10>, <123 21>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; =20 jtag_pins: jtag-pins { jtag-grp0 { diff --git a/arch/arm64/boot/dts/freescale/s32g3.dtsi b/arch/arm64/boot/dts= /freescale/s32g3.dtsi index b4226a9143c8..fa43d036686f 100644 --- a/arch/arm64/boot/dts/freescale/s32g3.dtsi +++ b/arch/arm64/boot/dts/freescale/s32g3.dtsi @@ -171,20 +171,18 @@ soc@0 { #size-cells =3D <1>; ranges =3D <0 0 0 0x80000000>; =20 - pinctrl: pinctrl@4009c240 { - compatible =3D "nxp,s32g2-siul2-pinctrl"; - /* MSCR0-MSCR101 registers on siul2_0 */ - reg =3D <0x4009c240 0x198>, - /* MSCR112-MSCR122 registers on siul2_1 */ - <0x44010400 0x2c>, - /* MSCR144-MSCR190 registers on siul2_1 */ - <0x44010480 0xbc>, - /* IMCR0-IMCR83 registers on siul2_0 */ - <0x4009ca40 0x150>, - /* IMCR119-IMCR397 registers on siul2_1 */ - <0x44010c1c 0x45c>, - /* IMCR430-IMCR495 registers on siul2_1 */ - <0x440110f8 0x108>; + siul2: siul2@4009c000 { + compatible =3D "nxp,s32g3-siul2"; + reg =3D <0x4009c000 0x179c>, + <0x44010000 0x17b0>; + reg-names =3D "siul20", "siul21"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&siul2 0 0 102>, <&siul2 112 112 79>; + gpio-reserved-ranges =3D <102 10>, <123 21>; + interrupt-controller; + #interrupt-cells =3D <2>; + interrupts =3D ; =20 jtag_pins: jtag-pins { jtag-grp0 { --=20 2.45.2 From nobody Sun Nov 24 21:45:37 2024 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2058.outbound.protection.outlook.com [40.107.21.58]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 26F08158848; Fri, 1 Nov 2024 08:06:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.21.58 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730448420; cv=fail; b=L8IKTM4RQaq6eQr6W+qHa3+YgjaHYDXs3miU+KQbD1nR91pXuFhnqyDbQWQbWnffbLpa9KJymH8QwZZW78oirUB8Mr0cF5No6LgtdziiUDc9pp17x7EBwQscCB5lFCvclgN1HErzWrQE71If3diMjpIAgxh5r6qgb61mnQL9tlM= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730448420; c=relaxed/simple; bh=9IVsVzC/hiXmM615Gn7SZHkRdWi+8H2YhTJta+7ufo8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=PRD4ORbSr/z0GJNzXkb3xgsN15AUpB2oeWj0AVmTFSDZYwlvA8SknvK7fjX+D0suhlNKtd/ovaM/MH3tA+w6OUSJhLH+oBz/YqMVHm4K+zXNCwWtTOSU8xRARlny5dCSGTsxxYWVL1BGmeour0qnjIkqzUToPsnGvGeFVEZdMk0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com; spf=pass smtp.mailfrom=oss.nxp.com; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b=w5JhotbS; arc=fail smtp.client-ip=40.107.21.58 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b="w5JhotbS" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=In6RTl1vArjiv9C/64KfK6ch4pibctXupAjaNoWp+fayAqm5uahuN/rSFA8HnVAdU63g2rTh2N+8jRgPTfoOG+EMlkPv3Z8KoCLFzOcAQl9Sv0Mv/pFAvUPuNQFbumZoE3O4hN1tAcdYI9BpeUGHy0DFnK0pZ7M9IFrv1gxlH0Ut45Z1kl56IHVOH3du3uPGt3oWolgAvxW085edbJZh8JN8jbvheRdHJ9CQMZ1YaDU/MUNlOwmvCKx2JhO9SBO/ZcEM/22v3QrxSfM+BtIDj4cIznUDrXSueM/N9zszAIDIdjd71ibYLeRYg5F+fYpkxYBzYDJKopk8fxJ9hXTYMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=lLib9GtyC9gGrvBWHSgYaXVKTzBImFV2N1cKQg3r+mU=; b=HWEGA01g5ocztC2JGscD47Fq0Bh9M1pvGdzBNqOB62ayj0G0o9f9eOU3z9HwERBMJBQMagwn2zCW7bqXBwhqto827XFYyIMDD9hTr/CfiGjbqqfZ/iyx0TFftdTSUHH8rOHNohQtQI3Q+duYB1k/Qg5WpvVtC3oXtJVhgHkqZbhXDyu8WJUuPTLkA1BkGENqrILUTGFXj07lsKZ6dqT5f8dkTTbVM03QTiSOP1LKSEkztIwAsTOxOmNuAbtzdrQUwgzrtb3lVqWJh5QP5teHDKxSxmFwknaazX2xi7b8m2QTHa0Q4NpY9BePxCdPLGzI8lhbIBi0oAgHUrNvrU+61A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector1-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=lLib9GtyC9gGrvBWHSgYaXVKTzBImFV2N1cKQg3r+mU=; b=w5JhotbSEBqCWbarNzBO7DwpVhl9abVUBF8fgFmgPYXQsiQ6Yi4k2W/9luIa1cnjaOXHf3cpndEC3fXhru+D6zTcyIfd2HO/VNWdIpO/DuzRpdCw60HwNnT2qD6l6uytxLw/V8ap0qy+TpWHc7/KlegpHM8mCUZy/LMlNiG0mzPBaZi9a4dNcBAlv36ZmBuLF60aGZQxQjxSCq8+/5PYFcKKvozJD1A9yN2fNogoOwDNN1OjGOFmDh1OTBmNqwMXw0iH4d4BB/lSNdRkbktstzTaaKJO1RfmE5+/9SzM+xHls02b66S8mwl33156ZwkTYkn/4p/gvrg8YAEKIQuEjA== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) by AM8PR04MB8034.eurprd04.prod.outlook.com (2603:10a6:20b:249::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8114.20; Fri, 1 Nov 2024 08:06:50 +0000 Received: from AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455]) by AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455%5]) with mapi id 15.20.8114.015; Fri, 1 Nov 2024 08:06:50 +0000 From: Andrei Stefanescu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , Larisa Grigore , Andrei Stefanescu , Greg Kroah-Hartman , "Rafael J. Wysocki" , Lee Jones , Shawn Guo , Sascha Hauer , Fabio Estevam , Dong Aisheng , Jacky Bai Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP S32 Linux Team , Christophe Lizzi , Alberto Ruiz , Enric Balletbo , Pengutronix Kernel Team , imx@lists.linux.dev Subject: [PATCH v5 4/7] pinctrl: s32: convert the driver into an mfd cell Date: Fri, 1 Nov 2024 10:06:10 +0200 Message-ID: <20241101080614.1070819-5-andrei.stefanescu@oss.nxp.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> References: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: AM0PR10CA0115.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:e6::32) To AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM9PR04MB8487:EE_|AM8PR04MB8034:EE_ X-MS-Office365-Filtering-Correlation-Id: f3275821-d580-481c-15df-08dcfa4c23a9 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|52116014|366016|7416014|376014|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?TXBPc0VpYk02OFlRQWtLdnRVTHFweFFuWldDb0ZQZGw0RHRpVFJXVkR1eHNL?= =?utf-8?B?S2Jqa2ZrOW9SYy9qcWhVZERUTm40dTlydENqb2p4SjBpOUVaZGJRUW1lVnRD?= =?utf-8?B?NGV0cGJ0K3JRaVh1ZzB3T0VUQU1yOUpzOXFNVEFUUWNKcVJwQnFTYmU1a1dL?= =?utf-8?B?Q3VXc1dMdW14akc5eTAwVWt4QXpUSUJYTkxsZU9PY3EyNnh1SjEwNXpsNDEr?= =?utf-8?B?eDNqTFRaWEl5dFRGdjVyam1zYTJlR1oxT2ZwS2ZBU3IvYmNEaHBheWdObEhQ?= =?utf-8?B?eE5BU1lVSllRRXFQUlBwWG1KRnVnSG11UUUyWVArelltRXE2ZmtYbm43bzFi?= =?utf-8?B?bFdEcWs3RHVzQnRiZVQwdms1R3VQcFlYeVB2Yjluckkrb3dPVlcwZjB0RWNh?= =?utf-8?B?QmM1STNqVHFmbFNlYUdIWjFwMzBDL0VxL0hFNGRvR0lXcUJoTThLb2RxYzI5?= =?utf-8?B?NzltZzRleXVQZXJpT01XaXY4alhxb3hQOWtWZm92OHpXSGRNdnNXUEtYcHhZ?= =?utf-8?B?NEE4ZHNkMmwzU0ZtcVlNdnR6TENiZUZRdWIwYjZIVmJRKzFEWGlsS2owQjdJ?= =?utf-8?B?by9rdkI3L2Q4Rkl0eTlJMjFyczcwR2ZyUUN0aWh6ZUI3dUx6OWhzcjVJd3hG?= =?utf-8?B?WUxHV0Z6TTNtR1AvUEFwbEk4djkrSTVFNTd2dlpDMUtYV0VMNU9rOWV6WEdT?= =?utf-8?B?VTYrVHlHQUYwWU5IL2pHNnJNTkFlUmU5MGtDNU91endmclpqVTlDdWwwcFZH?= =?utf-8?B?bGViREwyUmVHSGduOUtNK2hTTVpnWmlpYngwYUZPaXpJdmcwRXZQdzVvMjBj?= =?utf-8?B?MmRNT2hOWHFORm0xMytZNWxpSXZHbE1JNmhHM21UMktNMW8zVmRBc2I4eUNj?= =?utf-8?B?dThTVkFmM1UyaXo3bE5takNzc3UvL0dSdGV1ZkxOV2x2dU9lR2JqNXA3VkRI?= =?utf-8?B?TlFlY0tnTng2RCtia0ZHWStOeENWR3F3RWIzRFFENkg0SGh6amhWZE1pQXpZ?= =?utf-8?B?MVJWbkJJeVErbG50V3JDNHJOSmEvKzhsbFU3NkQrSWJvU09FWkFtbEYxUnNV?= =?utf-8?B?MlBnTGhkL1NWNlR6U1cwdnpJTjBPNzMvMVFFTm5ReVAwZlRPUUJLZWtDb0tj?= =?utf-8?B?N2YrWG1GTFM5Y2grdWxHK1FPdWdqZjd6bzVNNlBFZnFBOFpEdVZSaFdDUHRs?= =?utf-8?B?VUFaeEhPTUY2QWRBbjBtWDFYT0FBTnZ3RnplZHNXMEZjVUpFdVZZbUt2RDUy?= =?utf-8?B?NzI2WkFpWXd0YmNheHZaa0VrTmFLMkdhRUNnVnU2UmV2bmh0YXI1OUUrLzJW?= =?utf-8?B?U2htc05kUHhZV3R6RTNJY0IrcUttN3lvaHZWMGtKYlhsU2pBUTlSYXlHRXl0?= =?utf-8?B?VWtacStqMkE4dTlUV2NIWjduWEs3Qk04ZUlXaFFaTVU5YnRVZ0VGL01rQUZW?= =?utf-8?B?Z2F4TUM4ZTRTTHdGT2ZIM0JKdFd2alZnWTYyRkFDZnlBZDlWS0NaMWtyWUZX?= =?utf-8?B?SVQvSGtqanQwc1lwbGNsVzR3VUphNklMWkh6ZE43M3U3S3p1RHl2RUs3YW1P?= =?utf-8?B?UjJTQ0l3Y0RQSDAzeitIWUdESDNpNnBtVGlSUFhHdzJMaGQzZnhJNC9WSWph?= =?utf-8?B?UGxIWmszMDlhYnVkeVJpdjB0SVZwOHY1d0ZQR3VBaTBUeFhIci91TDJ1TFZP?= =?utf-8?B?QVZBbHNScDZRek1yWmw3QkYrbXpRQlhSN01ZSXdZWTZxdWY5VnNaa3dSQ0JI?= =?utf-8?B?ajN1MGE1WENVaDlWRTAyK01sRHVCeHdKT1phZ1gxVlRIbzg3Zld3RUdtcFpt?= =?utf-8?B?M2xLb2xuVDJuejN6RGpvQ1J2WG5hZTE2UDFteVFGbWJVSnN3aTRyWUR5TG56?= =?utf-8?Q?DTAdu3JXEVhSe?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM9PR04MB8487.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(52116014)(366016)(7416014)(376014)(1800799024)(921020)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?ZmhXM2h6MFoxbSsvMU5FbWM5QkRRd0l1Sm53YUN4aXdoRW9IcW9mRjErMDNi?= =?utf-8?B?RkdCY2RVemhpN1BXT1R4cW1IU1RLcjZnYlBFWmxxL2RiVG5vb0RqNU9QUlVP?= =?utf-8?B?d0Z3NHZqckpDdjNMSUM0K2xITjdmY2NyT2ZNcWxrYllVZ1REcTNhVjhkd0JT?= =?utf-8?B?YWptWDZlZitSaVNiK0pHQ3EwYnR5NW82TVFTWC9mR0Z0VDlKVXJSUlQyN0sv?= =?utf-8?B?VE9hYXVPbUN5bDJkZHV3WGxpOGlXVEFXbnB4eW82UXI1UTJQT0ZWZEFlNm9V?= =?utf-8?B?eGF2MHdUR0d5Z2paM3JoR3ZWNGJKbEwyanRiZnJ3MjVncUliRDlWQ1JPMWdl?= =?utf-8?B?VVlxWHMveHUrWXNuL2dpVHFvc2haSW50QlRYbHhtL2M1b3loYkhtd05LZldY?= =?utf-8?B?Q0hwSW12M3BLYTc3eHN0dVJvY1dlbnNzV09oSEZDb09IZ1BjWGovSkxpdWtR?= =?utf-8?B?SDdTVkl0aFB6cGpFUjhsRVY4d0NnbjN6TWxFbjR1SnN4SzVjRlpJTW5UOW01?= =?utf-8?B?VXFSUmhFV1FjZ0xmZG9PWXpEMUNlYWMxNUxBZGUrOVV3VU9MK3l3V2pUaTh1?= =?utf-8?B?QW0vamlvbTlHL0hyeC9hVkM4K1N3czlETHhRMStsZU1yYjlFV2ZBTHN0N0hT?= =?utf-8?B?SWdsYi9DSnpMdmlnOUppKzVUOVpveDVFTVJkUzMxUWM1MUtGOFdPYzVCa1A2?= =?utf-8?B?RnNMWDdoam5ralYvR0IvK2U4V1hZellRTTljVm4xWE5zeDVIMTJXUXREOXJs?= =?utf-8?B?S1BaM29NVEdlZ1hzeEFXZElDT1cvN0xFdUdyVUJLaGxYdUxGR3JDV3dmVDU1?= =?utf-8?B?NFM2eUFKZTRqMWwxWUNCcW9aUHVrMmZRalhSMXZURG1IWnR2bUllb3hQVVdO?= =?utf-8?B?VCt5S05DS0tYa2tMM2RIdzFmc1FibStyQXFqdXJ6MU54QUxjVUo5OTRDVFpx?= =?utf-8?B?eHBGa3QvcUFFRVRMa3BqL1R1RFJmaGowRUZYV2t1R1gzU0s1Tm5jdFVhZnRh?= =?utf-8?B?QTlBcnNVNFB3Z0NJTTNrSjc5UkZvUUtlRU80dGVQYlltbTdVM2gxUXhzMHdN?= =?utf-8?B?SWo0KzlFVDg3MU1NRzFrVVJndDRFemFpNFY4Z2R6eFZRUkZieEpXVFhkLytN?= =?utf-8?B?ekZzRGxQYldyQ2tiS3RhUmhjTTg5S3ViWFVKa01MdUg4UWIzd0JSK2cxOFly?= =?utf-8?B?a2pUWTVhTVIvb2ZYaDl3TzlWRW9IZ2hHaDVKT0hrQmlFbVRiUGpSSG5reG5N?= =?utf-8?B?QVdpeFdvMlZVTnZudUIyY1o2MVdEbUVlZEFJV29TTng5VXBBSjd0T09Vc0Rw?= =?utf-8?B?VUNtblFXNjdaMUxLT1hkVFVUNjNPeHRsbjQvcEpMeWcvcXR0eEl4ckJaV0N0?= =?utf-8?B?TzBXTlFrSTFpbjFyU2dlOXZTdU1OWWhTNEIwdnVubU05MnU4N3FNMU9FZG54?= =?utf-8?B?T3cxY0h3Um5kSmllbkVKbE9zSWZ4UXlDYnVQenUvMXRUNjE4OU9STE5NRFo1?= =?utf-8?B?cGFuVjJGVnB0dm5wcGV4MCtCSkRDdEozL1JPakFkd1JmMERzRTc5MHowZkVE?= =?utf-8?B?UmJqblZZcFM4aVRkWGZLK202U1pZRllFOHh4djBCQUhSN1VRVUhUOXg5eXBu?= =?utf-8?B?RVVKSVcvajJVTklrZDVUZUZKeFFiYjhnYmJZSVZiaEk4aUszL1NwYkVGNU5n?= =?utf-8?B?RlBwM2hDclFzaTdkOTFxT2ltTmxJKzdqaTgzeEtjVGlaQ214cDlLM1JkdVlG?= =?utf-8?B?SlRsYlhZQ1ZVZHdqR01xYXE5QjhzOWdZTDg2SFFLZVZ4VUU5M2xZVS9RK3h2?= =?utf-8?B?TjVVSWVhUCtNZW9NYXNYaWFZNGxXais0QVljNitUaklhMjA5bjhQdHRjRFQx?= =?utf-8?B?Tm8vR1dCRmRJTHRDOUI3amU3M1BxNUt0ek9ZL0p0dGJiRXg5djJGK1Vic2lj?= =?utf-8?B?UFZ0SXY1VnF0OWRVT3hyRWpWdTBSWC8rdHdkWDlWZUZuSUx0UDZ5NkU5Nlcz?= =?utf-8?B?TWJ0cEdWTWNkbTNRUER4UUtFZ2NnOURCNEM2b3RCd1RaWDFhN1plQVFmVVBL?= =?utf-8?B?VlJrRXFsM2V2bzlJS0tkRFhyN3dPLzNod29PbGp4Z2dsU0hpRmNGQUM4WjRQ?= =?utf-8?B?UGtQeXBjUk5Ra1IzUXg4cTZScXdWQWlyUGhPbHk1d2V1MlNHWDd5NmRUaUt3?= =?utf-8?B?R2c9PQ==?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f3275821-d580-481c-15df-08dcfa4c23a9 X-MS-Exchange-CrossTenant-AuthSource: AM9PR04MB8487.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Nov 2024 08:06:50.4006 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: w3QqhiZapPZNU6imVXEKN0cx2KhOZ8fXfznUaDRKU40DIcenRsXLze3XT4QunbAtW5Nmr2gvUkHVDIFEGr8uhzg+OUJwOiVBsIvNnpl5g9s= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR04MB8034 Content-Type: text/plain; charset="utf-8" The SIUL2 module is now represented as an mfd device. The pinctrl driver is now an mfd_cell. Therefore, remove its compatible and adjust its probing in order to get the necessary information from its mfd parent. Signed-off-by: Andrei Stefanescu Acked-by: Linus Walleij --- drivers/pinctrl/nxp/pinctrl-s32.h | 1 + drivers/pinctrl/nxp/pinctrl-s32cc.c | 75 +++++++++++------------------ drivers/pinctrl/nxp/pinctrl-s32g2.c | 23 ++------- 3 files changed, 33 insertions(+), 66 deletions(-) diff --git a/drivers/pinctrl/nxp/pinctrl-s32.h b/drivers/pinctrl/nxp/pinctr= l-s32.h index add3c77ddfed..829211741050 100644 --- a/drivers/pinctrl/nxp/pinctrl-s32.h +++ b/drivers/pinctrl/nxp/pinctrl-s32.h @@ -38,6 +38,7 @@ struct s32_pinctrl_soc_data { const struct pinctrl_pin_desc *pins; unsigned int npins; const struct s32_pin_range *mem_pin_ranges; + const struct regmap **regmaps; unsigned int mem_regions; }; =20 diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinc= trl-s32cc.c index 501eb296c760..709e823b9c7c 100644 --- a/drivers/pinctrl/nxp/pinctrl-s32cc.c +++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -44,12 +45,6 @@ enum s32_write_type { S32_PINCONF_OVERWRITE, }; =20 -static struct regmap_config s32_regmap_config =3D { - .reg_bits =3D 32, - .val_bits =3D 32, - .reg_stride =3D 4, -}; - static u32 get_pin_no(u32 pinmux) { return (pinmux & S32_PIN_ID_MASK) >> S32_PIN_ID_SHIFT; @@ -85,14 +80,15 @@ struct s32_pinctrl_context { unsigned int *pads; }; =20 -/* +/** + * struct s32_pinctrl - private driver data * @dev: a pointer back to containing device * @pctl: a pointer to the pinctrl device structure * @regions: reserved memory regions with start/end pin * @info: structure containing information about the pin * @gpio_configs: Saved configurations for GPIO pins * @gpiop_configs_lock: lock for the `gpio_configs` list - * @s32_pinctrl_context: Configuration saved over system sleep + * @saved_context: Configuration saved over system sleep */ struct s32_pinctrl { struct device *dev; @@ -123,14 +119,13 @@ s32_get_region(struct pinctrl_dev *pctldev, unsigned = int pin) return NULL; } =20 -static inline int s32_check_pin(struct pinctrl_dev *pctldev, - unsigned int pin) +static int s32_check_pin(struct pinctrl_dev *pctldev, unsigned int pin) { return s32_get_region(pctldev, pin) ? 0 : -EINVAL; } =20 -static inline int s32_regmap_read(struct pinctrl_dev *pctldev, - unsigned int pin, unsigned int *val) +static int s32_regmap_read(struct pinctrl_dev *pctldev, unsigned int pin, + unsigned int *val) { struct s32_pinctrl_mem_region *region; unsigned int offset; @@ -145,7 +140,7 @@ static inline int s32_regmap_read(struct pinctrl_dev *p= ctldev, return regmap_read(region->map, offset, val); } =20 -static inline int s32_regmap_write(struct pinctrl_dev *pctldev, +static int s32_regmap_write(struct pinctrl_dev *pctldev, unsigned int pin, unsigned int val) { @@ -163,7 +158,7 @@ static inline int s32_regmap_write(struct pinctrl_dev *= pctldev, =20 } =20 -static inline int s32_regmap_update(struct pinctrl_dev *pctldev, unsigned = int pin, +static int s32_regmap_update(struct pinctrl_dev *pctldev, unsigned int pin, unsigned int mask, unsigned int val) { struct s32_pinctrl_mem_region *region; @@ -475,8 +470,8 @@ static int s32_get_slew_regval(int arg) return -EINVAL; } =20 -static inline void s32_pin_set_pull(enum pin_config_param param, - unsigned int *mask, unsigned int *config) +static void s32_pin_set_pull(enum pin_config_param param, + unsigned int *mask, unsigned int *config) { switch (param) { case PIN_CONFIG_BIAS_DISABLE: @@ -838,20 +833,21 @@ static int s32_pinctrl_parse_functions(struct device_= node *np, static int s32_pinctrl_probe_dt(struct platform_device *pdev, struct s32_pinctrl *ipctl) { + struct nxp_siul2_mfd *mfd =3D dev_get_drvdata(pdev->dev.parent); struct s32_pinctrl_soc_info *info =3D ipctl->info; - struct device_node *np =3D pdev->dev.of_node; - struct resource *res; - struct regmap *map; - void __iomem *base; - unsigned int mem_regions =3D info->soc_data->mem_regions; + unsigned int mem_regions; + struct device_node *np; + u32 nfuncs =3D 0, i =3D 0, j; + u8 regmap_type; int ret; - u32 nfuncs =3D 0; - u32 i =3D 0; =20 + np =3D pdev->dev.parent->of_node; if (!np) return -ENODEV; =20 - if (mem_regions =3D=3D 0 || mem_regions >=3D 10000) { + /* one MSCR and one IMCR region per SIUL2 module */ + mem_regions =3D info->soc_data->mem_regions; + if (mem_regions !=3D mfd->num_siul2 * 2) { dev_err(&pdev->dev, "mem_regions is invalid: %u\n", mem_regions); return -EINVAL; } @@ -861,26 +857,11 @@ static int s32_pinctrl_probe_dt(struct platform_devic= e *pdev, if (!ipctl->regions) return -ENOMEM; =20 + /* Order is MSCR regions first, then IMCR ones */ for (i =3D 0; i < mem_regions; i++) { - base =3D devm_platform_get_and_ioremap_resource(pdev, i, &res); - if (IS_ERR(base)) - return PTR_ERR(base); - - snprintf(ipctl->regions[i].name, - sizeof(ipctl->regions[i].name), "map%u", i); - - s32_regmap_config.name =3D ipctl->regions[i].name; - s32_regmap_config.max_register =3D resource_size(res) - - s32_regmap_config.reg_stride; - - map =3D devm_regmap_init_mmio(&pdev->dev, base, - &s32_regmap_config); - if (IS_ERR(map)) { - dev_err(&pdev->dev, "Failed to init regmap[%u]\n", i); - return PTR_ERR(map); - } - - ipctl->regions[i].map =3D map; + regmap_type =3D i < mem_regions / 2 ? SIUL2_MSCR : SIUL2_IMCR; + j =3D i % mfd->num_siul2; + ipctl->regions[i].map =3D mfd->siul2[j].regmaps[regmap_type]; ipctl->regions[i].pin_range =3D &info->soc_data->mem_pin_ranges[i]; } =20 @@ -918,13 +899,13 @@ static int s32_pinctrl_probe_dt(struct platform_devic= e *pdev, int s32_pinctrl_probe(struct platform_device *pdev, const struct s32_pinctrl_soc_data *soc_data) { - struct s32_pinctrl *ipctl; - int ret; - struct pinctrl_desc *s32_pinctrl_desc; - struct s32_pinctrl_soc_info *info; #ifdef CONFIG_PM_SLEEP struct s32_pinctrl_context *saved_context; #endif + struct pinctrl_desc *s32_pinctrl_desc; + struct s32_pinctrl_soc_info *info; + struct s32_pinctrl *ipctl; + int ret; =20 if (!soc_data || !soc_data->pins || !soc_data->npins) { dev_err(&pdev->dev, "wrong pinctrl info\n"); diff --git a/drivers/pinctrl/nxp/pinctrl-s32g2.c b/drivers/pinctrl/nxp/pinc= trl-s32g2.c index 440ff1879424..9c7fe545cc85 100644 --- a/drivers/pinctrl/nxp/pinctrl-s32g2.c +++ b/drivers/pinctrl/nxp/pinctrl-s32g2.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -713,12 +714,10 @@ static const struct pinctrl_pin_desc s32_pinctrl_pads= _siul2[] =3D { static const struct s32_pin_range s32_pin_ranges_siul2[] =3D { /* MSCR pin ID ranges */ S32_PIN_RANGE(0, 101), - S32_PIN_RANGE(112, 122), - S32_PIN_RANGE(144, 190), + S32_PIN_RANGE(112, 190), /* IMCR pin ID ranges */ S32_PIN_RANGE(512, 595), - S32_PIN_RANGE(631, 909), - S32_PIN_RANGE(942, 1007), + S32_PIN_RANGE(631, 1007), }; =20 static const struct s32_pinctrl_soc_data s32_pinctrl_data =3D { @@ -728,22 +727,9 @@ static const struct s32_pinctrl_soc_data s32_pinctrl_d= ata =3D { .mem_regions =3D ARRAY_SIZE(s32_pin_ranges_siul2), }; =20 -static const struct of_device_id s32_pinctrl_of_match[] =3D { - { - .compatible =3D "nxp,s32g2-siul2-pinctrl", - .data =3D &s32_pinctrl_data, - }, - { /* sentinel */ } -}; -MODULE_DEVICE_TABLE(of, s32_pinctrl_of_match); - static int s32g_pinctrl_probe(struct platform_device *pdev) { - const struct s32_pinctrl_soc_data *soc_data; - - soc_data =3D of_device_get_match_data(&pdev->dev); - - return s32_pinctrl_probe(pdev, soc_data); + return s32_pinctrl_probe(pdev, &s32_pinctrl_data); } =20 static const struct dev_pm_ops s32g_pinctrl_pm_ops =3D { @@ -753,7 +739,6 @@ static const struct dev_pm_ops s32g_pinctrl_pm_ops =3D { static struct platform_driver s32g_pinctrl_driver =3D { .driver =3D { .name =3D "s32g-siul2-pinctrl", - .of_match_table =3D s32_pinctrl_of_match, .pm =3D pm_sleep_ptr(&s32g_pinctrl_pm_ops), .suppress_bind_attrs =3D true, }, --=20 2.45.2 From nobody Sun Nov 24 21:45:37 2024 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2058.outbound.protection.outlook.com [40.107.21.58]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0F363158875; Fri, 1 Nov 2024 08:07:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.21.58 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730448423; cv=fail; b=qduu1m/xMnEA1SqaJRZq8zOhhNvsRNrswmkPeTv4rKrW2SPViGVwM3VHiVAkWF0uAmFxjuBD6i8MmixUUQy5SR9qOKramio7+4dssYTXkTtDYL4fRPdL2qZnPWD/BYNKzNkLuS+hyO+zG9XWYduS+t5I3sEhhb9kDV9eJyYR260= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730448423; c=relaxed/simple; bh=Y8v2qSxLRcVjWKOqko4N7snR8jF1lvjDb8qpfKwM2rw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=GRy4nOrWs3s6rX9kn1+YbIP2fhxb4VjvWz/HLn55ZqSxtBzU+EHdcSCHPqHK9+fJIBlVVrigIWs/KWtOXMqOFqHurYZyqfbD8MpoCo+RwUpZSXSZtO6YIhu9FsrIsxEUobisGN3PoMlma+1Ft3R6PNLhkFQ5c9f0Eo1SgVZ9T4U= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com; spf=pass smtp.mailfrom=oss.nxp.com; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b=lD0yztAG; arc=fail smtp.client-ip=40.107.21.58 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b="lD0yztAG" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=m2zoXNn80vAT800piHASUrQw74Gs9RTU8k+wjMq+cRSU7xIiNgZbj2pEVH9B+7oROCwEvZsTShu9BExjh4mns4TXIXlmNMytdeSDGLj61CZ9tAhjGfNe4s5QPK7Tx+XqWiTRZV6pcbavmFZSUjUUwDmskbno8orP7CmlrxkP9StJtxvE6tpYJxORViEqgNyQo6ZvgRDv2HYygC9aVSOIAn+kpoukUUhfIQsK7teF6+glS/rhHGjVYQ/6qPOxCaz7vSrCwl4GaDkWpOP8vCGmN42brEd0BhEKtym5WQsPB9qwBlGMUdOBNh8Y40Mmg3tbNaVuZXheE3Sk/OA5XbUSqQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Y2x4oreJCHyyFSO0uw/LvkqDdzdsc3tU2z0JM65GZP8=; b=GO6Z/fpiInoDs8oUw8X7RojeaoE5STnfNv/4UWgoZ0CVwk64fSDjUujeYej1CUnW5+JBpZFsMeYFJkwtl6hiYACUI/XlTzjvWhaT/U5KFvh8P6nGG/b3nIjpJPrBHk87zPA1Tt/DNWn6UHoP/Ew04oG05NB13/vMHN3YWgLOxmM9LunDiv8X6mrwzxzCHTrjQGRGslw5kIlPwT2X3pZmUZo1wL6ln7717Ik8vFflII6JIn6NdlLMfaNz9qEjTzmqm6uxD924NjNHSzNM6+yAu0/4dGh8u8FLct0FVIzF0z8T654Ts3iITNNFiQRNyZnbuJ0cA3LWJ5Q4RoRH9s4ncg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector1-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Y2x4oreJCHyyFSO0uw/LvkqDdzdsc3tU2z0JM65GZP8=; b=lD0yztAGZR9oiUnoatQ1xeByXu1PRTTl3fZi2xuyICk76ceUuf2cDz/rl176/bv8PIwPQzfTjmX74we+QGsiuoICVXmDv8b1rsG6fKRjDEwmJMZOk9fIGkP+lSihyBEXYkmL7ZJkZUgFU6qIPxDRqdX5r4FGZm7MsJh2zi5wOyAcoiV/y4bn1B2NX0+IFMttxTyUpltGE6XmntLqU5rTPH9csOwTMpn/rcQLao205Y/G6wPwU6ZZaOlYajlAFcHLvrqmXalpsWC4lE4O4UjLr18QT6HiJsY5k7+B6DDdkRN+4PJ7lVhlE0PDCzf2brJ6b0/PNYgJTCPuLQrzCbaBSw== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) by AM8PR04MB8034.eurprd04.prod.outlook.com (2603:10a6:20b:249::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8114.20; Fri, 1 Nov 2024 08:06:53 +0000 Received: from AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455]) by AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455%5]) with mapi id 15.20.8114.015; Fri, 1 Nov 2024 08:06:53 +0000 From: Andrei Stefanescu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , Larisa Grigore , Andrei Stefanescu , Greg Kroah-Hartman , "Rafael J. Wysocki" , Lee Jones , Shawn Guo , Sascha Hauer , Fabio Estevam , Dong Aisheng , Jacky Bai Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP S32 Linux Team , Christophe Lizzi , Alberto Ruiz , Enric Balletbo , Pengutronix Kernel Team , imx@lists.linux.dev Subject: [PATCH v5 5/7] pinctrl: s32cc: change to "devm_pinctrl_register_and_init" Date: Fri, 1 Nov 2024 10:06:11 +0200 Message-ID: <20241101080614.1070819-6-andrei.stefanescu@oss.nxp.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> References: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: AM0PR10CA0115.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:e6::32) To AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM9PR04MB8487:EE_|AM8PR04MB8034:EE_ X-MS-Office365-Filtering-Correlation-Id: 273a5bb3-24db-4b24-323b-08dcfa4c2568 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|52116014|366016|7416014|376014|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?TTkrdEhucU9vaXRXcGZhdlVmbDdhYWZ1VVFQL1laY3cyV0YxTHJJNDNKbTAw?= =?utf-8?B?WTRtWndGYTFlUnZyVzhjVklsMDhkS2xwOUdOek5VMFkxdGFmN0pmcE1jbG9h?= =?utf-8?B?Rm1HcGhMQ1JqSXNjNVc2RjVxQktmSEdqS3U3cXh6bFJBNTdOd1ZockloalRw?= =?utf-8?B?dGlGSStMb2NkRWJWTkFucC9pbnUvNjloUGlUVkFJV2tsNWpIQjNueUJyZXJk?= =?utf-8?B?Qk1GWjczTE1GeG9PL2NpSUdQdDF0aVRRMzZ0MGQraE1VSElneXpBNHd0eXpm?= =?utf-8?B?aHFaOWE1WlVxR1NCaHg3UWZ0SVI1TFQ4L1BIanBMS1FaeEdJNG9jTk1iUW03?= =?utf-8?B?Z3pXK1c5T0I2bUxkMktIZFpmdzN5djI5YSs3NVNRMWF1Q1Qyb1VsMnMzODhR?= =?utf-8?B?dTlxR1JjRTcySW1McHBzYVpHNlBTMzd0bTk5QU91ZG9Na3Z1aS9NYXVwSnJa?= =?utf-8?B?N2xla3JTNG5EMFVweW90b1IyMEw3bmNyaHZwdjJScjFQRUtHN3NGUTlmRkxD?= =?utf-8?B?ZnZ6RzhINHpnbWthdXQ4Y2VCVGN5bjdPVzlIek1obm1BTlFpZzFFVlByNklm?= =?utf-8?B?UzM5SDUvUlZ0Rk5KOU5KTGtuT1BJUlVOa2tWR1VxczdnQnpBemZ5Tlk1c2FS?= =?utf-8?B?d1hFckk3ckpwZ2xQZUxPZXBidzB5cFYzN3JYRlJCVTZKNTdCV0Z4eWpTaUNE?= =?utf-8?B?QVF3Y0Nidy9yTmpjQ3RJZ1A3bkdJQXNaR0Y2OUE1SndUcHp0RWgvSm40SWk4?= =?utf-8?B?WWx3TDZPN2VCcnE2dFQzN0N0aWo3WFBXOUxwdWM5R0VWRVJRS0NjR0VsQ2xV?= =?utf-8?B?L09DdEM5ZWxoazZqRHVKUVhkV3hxajdmRlhINERSYUMyZHhsQkZqM25aWGZR?= =?utf-8?B?VWdJZk5xbXYzV0hnRXd2Zy9wWGFMdW01LzVaOTBLWWZiNGJpR1ZMdE1CZ3Er?= =?utf-8?B?dG1EbXdHRVVkcXE5TjNDRUM4V3BDdjR5bGFGZVFPODRNTnZyc0lXTCt1SFJM?= =?utf-8?B?L3RCQVlZRERPZHlOQjJDUGk0eE15NGwwNFRnM0Zsb3RMQi9BbUQyZkdmTGVz?= =?utf-8?B?eVQrRVFtM2NZbTBiUjd0SVV6YkEwM0NxaGV3T3JwbmVWcXBldW9WTFIxdElL?= =?utf-8?B?MWhYVVpKQUZzV2MxQmlhYWN6VlJ5dURHM0dyL1ZIYmxnOGljVHVFQjdLUU5Z?= =?utf-8?B?KzVERDNpdDgrUWcrSU54TTIveUkrV0tWQ1JyWENHK2xlN3l4aWdjWmxMRGVX?= =?utf-8?B?eGFPbkZKa1M5N1RxdE82L1FLMkdPU2NlbmV1aG5NaTlFYVMyWDhwRGZPcS8z?= =?utf-8?B?dXJmNm1QSGRKUU5DOXhzemZ5TW5oeUh2QlV1ck1EOVJrMWxyTTRFZFc4b2Q4?= =?utf-8?B?NHpxK2gwRnFIVGpiQnBTYlZVWEp2UksydzF0bzRlb1M2V054K2QxTnFpQ1hj?= =?utf-8?B?MnJta3lia2gzMmxubWNMU1luSWNmZnBnN3dGc2w3TWRYcXcyOUdYUFJjeVBJ?= =?utf-8?B?SzJlY1lvN0FKb09BcTZoSlFuVlZhYUx3NlJ3c3RvS2dzTWpEQmdvWnREME9l?= =?utf-8?B?NjJ5R01EWDhHWGY2RkhaYUJRMTdYN3AwWFRKZjk4M3VYdkl4YW5PRldkdFVl?= =?utf-8?B?WU15R29LcU43ckhFUjN6TjM4dWczTVI3TGN4YkVTQUljTUJLeWZvekhDWkxV?= =?utf-8?B?RHg1MExuQnlMRXdVS0k5N0FIWmJRTStPTTBmN0FuUjNRa0lzcTdZWmJBYkdX?= =?utf-8?B?WlpVT0NZNWRDNXNqSzBlblJnNkhPcXpyTEJ2SE45VFZMamJ0YTNEOWVkY0NC?= =?utf-8?B?WTBUcDlDcThadDNiajU3cmhBd0lRVytyZTFUN01nNUlEY2puWE9ucGtETTd6?= =?utf-8?Q?N0ov50BpFj4iQ?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM9PR04MB8487.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(52116014)(366016)(7416014)(376014)(1800799024)(921020)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?UnRvVWpnOHlIbkNmOGhiL1hqdDZPUWVYc29pWkd2UndJek8yVmxUMldqY2Nm?= =?utf-8?B?WnR2T1JQVExPMXI0SzROalYwTXc5T1p4WlpwZ1k5TjYrb3hCNllVZjgzNlR0?= =?utf-8?B?bHAvNjhnZC9Ka2hINkYxVkxPYjZaTXJaMDdMczlEeTZRQWdtNkVMaEtxUDEx?= =?utf-8?B?S3NzVzJid1czRG1QMTg0QnRqOHMvTlFwOHVxS01IVGVQWTNFV3J4VVRGRGh1?= =?utf-8?B?K2NRQ0Rrb1Jldi9RMjNUWm9ZRWtvdDE3TXZYRXRtbWhSZUVEajkrNFpudTBT?= =?utf-8?B?UFdrY25zQ0o2UzFDM3ZmdzBpSGJwc1BLLzJOQzh3ajA5bGM2Yk15WjNFa0VB?= =?utf-8?B?S0VUaHBQSTBTcnZWVFZSV21wV1RGTkRMbEFsRWw2c2lqWk1YRHpoUnBMS2gz?= =?utf-8?B?YndaeWUrM0liZzIvUGZoVnRUQ0tFbVFwT09yUTgvV3hsK29wVm1qYTlmQWpQ?= =?utf-8?B?RFpWS3FBVnlOYlNCME1pTE1zdGFTbkNZMmQwdFdmRXhEQkZaRFV3K1JuTDlH?= =?utf-8?B?THNSOTJpYXVvOEJCTFlYUy9jS3RpYTRIdnVCL00vRnlUYm5oOTlZbmNWL2Zx?= =?utf-8?B?bDNPRUdaa2lja2M5cUZrb3IramxOMlEzdlgvYnNxcWtjdGk5am1MVTRJc1lv?= =?utf-8?B?aEhOaEpXZU5yYUlSaHlJano5TnRGRm5IcEFoWmJ1NVlOa2g5TitpQXBlSEFp?= =?utf-8?B?ZXQ1bVpoQVJOb2lsNWs3S1Y1T29YUE93ZmV4clNCZVBSQUtoMHhrTHJwMmRs?= =?utf-8?B?MnBmUDZaUzlhNzJNRlJUZ1UvNVJjYjkrSnBGT0djV0l4enFLa2U4TnFVcnFZ?= =?utf-8?B?Y2NGSUNvSnNrK3JKY1BERlBUQU1RQ2JreW5WOGhxZjl6T213Q3RuVitoUmwv?= =?utf-8?B?dDJQc0JwTWZFUG8xVllyQ0VlZHhGK1ZndC9Vd1MyTTFGS201NUNXb2NrWUFt?= =?utf-8?B?UjlDVWxzb1dMbXQ1RktDYnNwbzBVL01SNmNLcWx0SHdtWEttV1ljeFRxR003?= =?utf-8?B?L0Uxc25UNWI4U25KS21uZEQvYUdKQXVtZzB3RjAzc09IdUltd1Jvekk4eEdB?= =?utf-8?B?b3VzMjRRbEJHRkpmTU1POGpYWVo2VW5HTk5uQkJ6Q01YbzRHbDBsRi9ENDMv?= =?utf-8?B?UkVqYTl4SWczeSswcHZNMUpuM1NVZHYwRGRBQ3FtVTZpN2EzMFpUQmY4Z3NV?= =?utf-8?B?R2N5ekVsQTlKYmV6L2V3bEMzbDFTOTRMdVVwVkk3NEZpcUErTUNUSXNqMXZk?= =?utf-8?B?Z2hqVEJNZ0RtRFhmelBkSmhBSnlFYllUWm9ZL2xMcmRHSVdHTWsxWFV3eGxm?= =?utf-8?B?WDVubGJnZ0dWNjFQb2lJR01VWmRwV2dINTFzOG1TZHY1KzdTRDhWYU00dWg2?= =?utf-8?B?M1hiVkxTc2tiRjU3M2t3aEVqWG1yMVZyWFRyL1dLaXhka214N0huR3lmanlv?= =?utf-8?B?cVpFUTJwM1c4ZHBRS1dmK2NtQmVrOHpJaERpQUpqdGZ2VFh5R2VkRHM2SGRK?= =?utf-8?B?L2FNazdVaGxSUHN1ejFWb2pUd3JQbVpWaXZIdndhWW5kNUpuUGtoandrYjd4?= =?utf-8?B?dngzV21rZW41bWo3YjJQMnJwNHNDdXBaVmRpVGQ1aW1MT256NTNrdFpaV2t4?= =?utf-8?B?Z1FMdWN1czFTT2d3amY3Z0JvYVlnWTAyNy9kWEZmUzcwVFNlMXlHeDkzY3dU?= =?utf-8?B?SE9Tc2hlRTN3Uy85Z0FZQXIzbk5iS2ZUNmY0aEJDay9JN0E3cldXbXF6ZVBq?= =?utf-8?B?S1FzZnFMZklpL3ZBM3RtWWJHWERnNEErR2ZOTnFWNEx1d3ZTRjIvbVBncFJ3?= =?utf-8?B?TDYrSmUrSzh6Ymt2WUwzdkg0ZTdCVzBFdkFKQTREWER2MGRrR3lIUEUwb1Q3?= =?utf-8?B?MUxPSUV1RC9kNW5VeDNxYmdFUU1pdGt0eS9XN3BpS0RUY0NTVlFXQzhYY3lp?= =?utf-8?B?eE80ZnpwL3RrbGhrK20xUlU5OXNmZE9VK2srelpSeVNvaXFLTHZSSFhMSGlZ?= =?utf-8?B?cy9QSFNEYWZzOFhML2VZWCt6QTdXNEFZdXlwUWdKdVVPNlFzZ1hSWjBEUWN4?= =?utf-8?B?QjV6L3EwYWNmYVI4UzlESkdmSTZ4b2h3UjFTelRkMFVlbFQ5SGRha2JUWmRa?= =?utf-8?B?SUtPajV4TmtiNkI2U1Zrb1daWEpieG1PRWgrd3NoanRBb2J3cWZDOEViazV6?= =?utf-8?B?SFE9PQ==?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 273a5bb3-24db-4b24-323b-08dcfa4c2568 X-MS-Exchange-CrossTenant-AuthSource: AM9PR04MB8487.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Nov 2024 08:06:53.3636 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: yRbXOh2CDaBY2JvHmc/BlOkrYdv2DLifEorg5G088liaaXX2iuR1Bblz6TReUGFLaT4s22uZtInHcI6X8r2kFYTTzwUVftg0DdM7ncu1+F0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR04MB8034 Content-Type: text/plain; charset="utf-8" Switch from "devm_pinctrl_register" to "devm_pinctrl_register_and_init" and "pinctrl_enable" since this is the recommended way. Signed-off-by: Andrei Stefanescu Reviewed-by: Linus Walleij --- drivers/pinctrl/nxp/pinctrl-s32cc.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinc= trl-s32cc.c index 709e823b9c7c..10bff48852b9 100644 --- a/drivers/pinctrl/nxp/pinctrl-s32cc.c +++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c @@ -950,10 +950,10 @@ int s32_pinctrl_probe(struct platform_device *pdev, return ret; } =20 - ipctl->pctl =3D devm_pinctrl_register(&pdev->dev, s32_pinctrl_desc, - ipctl); - if (IS_ERR(ipctl->pctl)) - return dev_err_probe(&pdev->dev, PTR_ERR(ipctl->pctl), + ret =3D devm_pinctrl_register_and_init(&pdev->dev, s32_pinctrl_desc, + ipctl, &ipctl->pctl); + if (ret) + return dev_err_probe(&pdev->dev, ret, "could not register s32 pinctrl driver\n"); =20 #ifdef CONFIG_PM_SLEEP @@ -966,6 +966,11 @@ int s32_pinctrl_probe(struct platform_device *pdev, return -ENOMEM; #endif =20 + ret =3D pinctrl_enable(ipctl->pctl); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "failed to enable pinctrl\n"); + dev_info(&pdev->dev, "initialized s32 pinctrl driver\n"); =20 return 0; --=20 2.45.2 From nobody Sun Nov 24 21:45:37 2024 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2058.outbound.protection.outlook.com [40.107.21.58]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C64B915C158; Fri, 1 Nov 2024 08:07:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.21.58 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730448427; cv=fail; b=Ng/wG7Df1IoQqZM3B8QmTJs9ZNnpagRqlexg75kfVAGYU7qdOLpVtIe9JwRp9XOnQ2IEBL7XAL6gIxt3ON4nYfWVVG3ef15xoX26dgey2k7V3i5aMROSmkNx9kl9bf6pq5rQi6p+ywBG9YmTLzmIBMozsi17Qmp6iD4qfHxmGyA= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730448427; c=relaxed/simple; bh=F6TeoK/n3j1f8Xq4Ou000LXWWquswGMkenxq25zk/6U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=qoMB5eNAE9zGH+KcbNpfjPv18NxAtpL9o4u3iXl/SFDYFC5Kw+hOmqak/PZNg5I7qSpgVnoDrZTY93MyQIkazbNYpZZ3ta9upsAVs+eR4zW4TVXw6IDq4OtFdA0Oj1eR9KLkb6zAbnXQ/zOwAleP/s/rQolCQBTRSy6YllJlvyk= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com; spf=pass smtp.mailfrom=oss.nxp.com; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b=cd53YXTT; arc=fail smtp.client-ip=40.107.21.58 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b="cd53YXTT" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=kdDLE/+cXyQGjkrDzoojDo6vMLX2fBt6CORaOrilt/I4RCOhk1UMxjUqExIkVD0c0qQ+VajkuOvA94xnCHZbxv3LPZXrtB0LEsynNSud24cwfMAYestujBM0kRHOGUebtOZ+aDJrw7/UjSyJAn8bp4KlGPvgUFWSvvpZssvDL3OeGSd1qEHGRiprFlhU6sU4bSY/bf16YCuOy/5FJhA+H7Bt4I3942DvSwRR4HgoUwcKa+UdnG8a/QqfKJb010Vzm6TxlxOEiduxqvPAm+k6nlVyZ/3CA8PeZBeSS/TsgifajhyF+74dVp0qDk3uoKh7RdAlycdHC71deNx9E4RZCg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=sCcmG5pRxC50Y8aeU++G0l1pJXEW1b4hdE2uwzGqkYA=; b=xc63VFAc7tUws03vQJy8H0fZkuiH/DaWhvTkNkDSWAmzihigiDwvgMJZMWFLHAsil8tnsKHR5X0Okw4ZOMtGSc9JfQDps/R2LCib62E8rK06FaLQ3aRSdSy9A5qt5JssCbftuzulM3bR53BJr2EcwP/03etmJG7jvNjPeP9xxVDc1CuCMjwQ59Q4dLJ1E7UI0QJ+6sRL5vXic0zcz5h5B7xUERnUOA6wmZ1B7RgrhiwPoeY3xADmZLqMp856TLSwq8G2J6i6Bd2K0zmCYfF42FP8vIhwhb9c+qf0mj1ralWwcXFGIgOuR8QJLY4B8WADRSD7XgkSOX4rtXBD0GiCfA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector1-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=sCcmG5pRxC50Y8aeU++G0l1pJXEW1b4hdE2uwzGqkYA=; b=cd53YXTT3tQgrSstbMz0okAuNRUClk1PeqWmMgCnsWN5LzWtQwdYnKu6DNh0B4WoSgHLZv6BoAbevUe56l2AzGv8vBeWL+CzEhxNaRZ92sxdZyNPtrdtMUSx378fYF0PfiPErNRRW5qHX6GSkl0l92NYBH3HeA5l3BtGIWjv8ffq4kSdVgCrSST1VBn+1fPZw6TZj1vHb6yK+k1cAVe8EzZcjooN2OOpQwA59WzNSVqnqssMQdqb+/ryb/5Wu33yev12ZgVan8R9gG0Obt+fT9ivXk1jUFL5ITlC8sd29VuRmNYZEFfWikvnKE5PU1qVOZ13XTKXX/hXvE9Qryl/Fw== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) by AM8PR04MB8034.eurprd04.prod.outlook.com (2603:10a6:20b:249::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8114.20; Fri, 1 Nov 2024 08:06:56 +0000 Received: from AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455]) by AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455%5]) with mapi id 15.20.8114.015; Fri, 1 Nov 2024 08:06:56 +0000 From: Andrei Stefanescu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , Larisa Grigore , Andrei Stefanescu , Greg Kroah-Hartman , "Rafael J. Wysocki" , Lee Jones , Shawn Guo , Sascha Hauer , Fabio Estevam , Dong Aisheng , Jacky Bai Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP S32 Linux Team , Christophe Lizzi , Alberto Ruiz , Enric Balletbo , Pengutronix Kernel Team , imx@lists.linux.dev Subject: [PATCH v5 6/7] pinctrl: s32cc: add driver for GPIO functionality Date: Fri, 1 Nov 2024 10:06:12 +0200 Message-ID: <20241101080614.1070819-7-andrei.stefanescu@oss.nxp.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> References: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: AM0PR10CA0115.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:e6::32) To AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM9PR04MB8487:EE_|AM8PR04MB8034:EE_ X-MS-Office365-Filtering-Correlation-Id: 133a80b3-5cc9-4707-c4a5-08dcfa4c2716 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|52116014|366016|7416014|376014|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?UlA1ejJBVlROVWp3ZGVHYk0wUUw3bWY0LzZ6K000U3c0RStyb3pnMHhOOUJL?= =?utf-8?B?RkVndHJhekVZNC8zQm9hNy85KzdYdzJoaHlqN2VMSWFueDBqNGMwVEJTQXlZ?= =?utf-8?B?MUtyYys5Umo4TG00b2JFUUN4eFhtMXgxak1PcHdreFVKZ0JQNlJTam5FbVE4?= =?utf-8?B?Vi84RFFWaFg1QWlkOVc3blR4dVAwcUZzWWR4elMvb25iQ0dNTDhURDdDTkFz?= =?utf-8?B?QVhJZDZncGE5SWc1RkhDamw1cjU3QmwrMWQzanFkM2ZDclpHSEpsV29mckZ0?= =?utf-8?B?Q1VtR0I5MW1pYU1lYkYzTUFtUTFibjh4aHNKbm1LU3JLNkY5eUVLOUsvRWJD?= =?utf-8?B?UDFBT2RDUEdGV0tnSnp5S1FFdHZqZmJuelJsTUxXTS9RdzJLeUJqbk8wSU5Y?= =?utf-8?B?aUFxZTZjazZHcCtPWU9LMHhyUlB4ZFlTeUJnZDU0a2xITWVWL3dzcU84QVZw?= =?utf-8?B?cS9pdk5VcnZyM0RlakNaVDBpbTFrek51bThuMFNLY2IxQXVMRjQ2WnJxalVM?= =?utf-8?B?a1hqVFJHVUxLRGpwcWhvcWFjRHg5M2NES0svOUpUOXZmL0EzVEwwWkFXN28r?= =?utf-8?B?Ulc5L05LYTNRUDVIWFozdEhWYTRjQWkzcld4bGdSazhhODBqZ0FkRDlqQnpC?= =?utf-8?B?NnE2d0tmTEE2MHF1bFhuODV5aEtlZ2Z5NGVyVllCZHRxK21NZit5eWdGc0Mx?= =?utf-8?B?TDRDRDJMek85a0lZNDhiYjdjLzNUSFhlUnFxejlldGF3TGdFNUgwVmlYOXdo?= =?utf-8?B?aU9ibHp2ZFV5eDFXb2NQSUxGQ3RONVpuZ3R1TExnMVkyK1J5NFJSRzloay9y?= =?utf-8?B?L2pka0thVHh4bXdYeGRGMVlmTWZRU0dsd0krUCs5MThja3kxdFV6S0JOcTY0?= =?utf-8?B?ZVF4L0FRU2pkK1kzVU1qajYycDVhOTl4UERTL1N4SlJKZGxCcEJzQW1jTFRS?= =?utf-8?B?aW1wQVJaWldjMUhMN0ZscXI0RkIrSmZZOVZFUU1SRDkxMXJIQzhHUysrV1hT?= =?utf-8?B?SFFhZVZNanlLelJjUlRVY1phQnh2TWZuZ3hWMG9OZGhXTmpZYlZEeXgxc2Jz?= =?utf-8?B?SlBvMjM5Uys0dkQ3Nk9RaGR6Tm5TVjR2Nzk3Z3R6dWxybHIrS1F0QVM2WWdL?= =?utf-8?B?OVZCSkwvc1pCakl6bHdZU3hDMitOYnFvdG1lSU1GbFRPT3JQN1NlRjJmKzNa?= =?utf-8?B?a2VEeXdBekwydVVTdDhnTjIwNmU5eGZUZks3akd2b3pVUHR4MVVBM3ZjRHBj?= =?utf-8?B?ZTA4TjJmWWRvOS81VlFrRHVUcEpUQmNsOEdramNHeGkyNTZEQ1pXSGowcjNW?= =?utf-8?B?UGdKZDd1WkllVGZLQytneWJTdWJOdTRLOWQySGZIVjhyNnd3ZTBhVm9TWDY0?= =?utf-8?B?Ty8wM3lNdkxid0ZQTnpYdHl1cFJKaHVpNzl3WnhrNlNyeWhzV28vc2ZuS0Uy?= =?utf-8?B?MXpuQU1OM3hLR3JFSHZNeVdGclNNMzgxSWtEbFJkRHBmNWthSUNkck5lZVJY?= =?utf-8?B?KzMwUi9PWXdoVmJnQmRjcHhCbHBMRjFOWkYvR2dFdlR5bTdWSElpKzQ4TG1E?= =?utf-8?B?ZWZxWFl2UzV4OUxJZVZPMFR1am56RTdSalNBYlF5empSSGRSVnVoUWdvbEJk?= =?utf-8?B?a3hxdnpOTTZVb2RyUG9kdWxoQmNXTTVNRTJaVk1ydWhLRGN4M3FSaXhrMW93?= =?utf-8?B?THdjb0dsNXJFMmczb2NmWE5sRUtmSGRCb3pqUXRqaTEyUVJvbVVzUGtSaVNM?= =?utf-8?B?cUJjRDhhOWNhODBkRzIvNER5Uzh4Ykxhc1duVE1HcVdmRzAxSDZRMHd0OWVt?= =?utf-8?B?L2pvQ1lGYUplOWxrTjdPRHVSclVmeUE5c2pHYm9MeE8vV3hxMUlpR3RKeVgw?= =?utf-8?Q?IVnwXib505U06?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM9PR04MB8487.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(52116014)(366016)(7416014)(376014)(1800799024)(921020)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?NGhpUHdHZ0xaNjBldm11SFZMSjdnMHFkRnE0ejkvZ0pTMXFUVlFZYzAwbTI0?= =?utf-8?B?OGxLNHNrWVBZY3dKa0tWbTErL1NGanM5NW9OaGFSTEYvcWZTampBOUZWTmR4?= =?utf-8?B?VkJQUjU3eDB5NjlCbG90SVdXTWEwamdJVlpuRk9BcnpPMkI4a0Y3UUJSUnh6?= =?utf-8?B?TE94V2hxOHRUY1U5N1Vwb0JhK1NNcnRrTTJ2ZGdYNFFtZW1EVnZrQmtkWlkv?= =?utf-8?B?akZPYXpFTG00R0xxY2ZCVGRDN2VyK0tPeWEwYXFhZmJBalpDNXJZb21hOXA1?= =?utf-8?B?YWc1M3MwVkRpTEl2M21YamgvOS9VcDRlcmpqK2VtWk9wU1ZSbHFHaVhDZkJz?= =?utf-8?B?VWtVVFM1dU1LSVhWQVh3TTFIVVc3RUxLOFNIVkZsR2FLWW93RVRPS0dERTZL?= =?utf-8?B?b2lZbU0rMlY2OEI1K213aWpBaWRyazI1ZHI3LytuQllQNnpEZUd1cTVKcTNl?= =?utf-8?B?NVJ6RzlNWGlCOFhQSldtM2VyWCtqcGlMcndTL3J5S0pqMFRsV3M2YXBtWTVK?= =?utf-8?B?M1l0RzA0OFNDMXI0aHVVd0IrdS80cEZlcWNaeVB4dElwYTdXY2xiZkx6OHNZ?= =?utf-8?B?aGFCbGt5NEF5cjJGMXE4cGgrc0lLZ0hvdjdLeEVzNlhTRG9RaW9aZkUvMU5l?= =?utf-8?B?Z2gyRTVxbXJXTjRKL2c2dTcrMXBtelgyMWwwU1JtZk9EMVl1c3l0UGV4cVRY?= =?utf-8?B?TjVaZHZnRFpjdGpXRytqME1YRFMrNWNLVytoWWp5WHo5Qm12czNueHYzY3M3?= =?utf-8?B?QkxkL20xdGppMWcxRGpmdnJTTG1pdlFBdER3Rm1DR0E5YnllcWlZWXFuZFdz?= =?utf-8?B?V2FiakY0c1FuMWF4c0M4Y29qVVpBVnZabTZCYWYrU0cxNGppOEtuNlgrOUZY?= =?utf-8?B?RU1rSE9Xd1VFM2x5ZHV2Tis5d3hmKzByQTFLcnQ0WjRWcXlEOUpLaUpENWJB?= =?utf-8?B?Zy9mQzZ2MnBUeXJUNFlPVTY5MHo4UXlxMkhRaXRBZUdGTnhNQkhWNXo3VmZX?= =?utf-8?B?cm5SNGJ6VmQrVTg4aU56WVlTdTMxZS9aYkkyNnNNUFFuQ1llcUt5M2Q2UkIv?= =?utf-8?B?UVdqMERZOVZrK3FwSlAyNGJpRTk4eTkvZCt3bm5FUGdIUlZERFJVbzR0RS9m?= =?utf-8?B?cE5CZTZCakRac2ttWUV3bmZXMk50QUVXOHd1VWZNcTVwZjJjRFduYU1ONnhV?= =?utf-8?B?R2pXQzEwZWc3RkcvbGdFVjVzUG9KanBST3NZYnFvMlZzVDd1WDR2RDl6ME9r?= =?utf-8?B?RVBvWGNKRXJjTXRwanVUSUFSSmtwY1hiVXBCQllUL051MnBVTlhNcFk3aFpV?= =?utf-8?B?WGRhOWN2Ly9ORDQxdFUrd01hd2NqTHk1SUdrYTNKYm1ibGpLSjFLQ3VhUnE0?= =?utf-8?B?SWtENGF0dCtvT0I4UjcyaTB5R2Q4Wk8rWVR4YVpDcWVVVms4Z0VYOE1DQ3U0?= =?utf-8?B?VUNZNWhJQS9KMmdxWkU1ZGs5YWk3NUlIS1FNQ2RKWjRKVmdycHNGWkhlZTZQ?= =?utf-8?B?THRLNjdtOXlHeHB1bFhsUXhlMDlkQnJEV05hNGRObjVNYVUzb3FRV0xZMk9Y?= =?utf-8?B?aVpTdWFSaEJOdXE4eWFWZm9QaU1paElkY2RVS0dCaFBoVGhqQ0RLN3ZScUh1?= =?utf-8?B?dVVZMTIvazJHSXZ2d2pDNm4yV0l6MnBkRU1TVTZPbzB6RDNIRnlRR0NvTDZL?= =?utf-8?B?ZmRoU1lBSnM4QkpRU3lWenU1aDVxdE9WNnN6YlpLTzJLOXFTc3RTLzJQTHV0?= =?utf-8?B?RHRxbGJucVhEV0JqeVlCcExNNTlUbzI0THVTNGNTdzZiVGsvLzAyaElFUE5u?= =?utf-8?B?WmNKZmdkOHZLSmY5Vzd6Z3IxMzZYZnJDTHdvekVBeDUyNUJ2ZlBTWEY2Tk00?= =?utf-8?B?R0Q0QldYSmZnWVpMZmVhTnYxTlNvQUtNQVh4a1R3S3ZBWEJWUlJGMWtqaVN2?= =?utf-8?B?WDNEV2xMVjFxK2VyNHgxdWxLVjVUalkyNDR1TFk4RFhTMDQ2M3lOS2dlUlhs?= =?utf-8?B?WEdiSnFyMlpQVFZRTlpBV1FadWhnYU53VjhtdE51Mno0Y1RSVzV5alZpWWh6?= =?utf-8?B?Rmlwak1sb0tET0hFSlhrbGpEczdQYTZIa053NnVTeVQ5WFVsMnBvdnhLRUFF?= =?utf-8?B?bHpCYnloaTlkRzZTeHhqODZzRHRLdEdZY3l2RzF0SHNmQU5WNUFUWWdnRmNH?= =?utf-8?B?bGc9PQ==?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 133a80b3-5cc9-4707-c4a5-08dcfa4c2716 X-MS-Exchange-CrossTenant-AuthSource: AM9PR04MB8487.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Nov 2024 08:06:56.5394 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: aVvgT5ml0FtpQ+Lzu2LhXWOyXrH7GEmxTSa4yHT/XBfCbVBhxxyXayZMqrGSXh23rbDrIPW3xtWQCa0/LegrLrcROG3tuY8cw9npWPDo2Ao= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR04MB8034 Add basic GPIO functionality (request, free, get, set) for the existing pinctrl SIUL2 driver since the hardware for pinctrl&GPIO is tightly coupled. Also, remove pinmux_ops which are no longer needed. Signed-off-by: Andrei Stefanescu --- drivers/pinctrl/nxp/pinctrl-s32cc.c | 410 +++++++++++++++++++++++----- 1 file changed, 348 insertions(+), 62 deletions(-) diff --git a/drivers/pinctrl/nxp/pinctrl-s32cc.c b/drivers/pinctrl/nxp/pinc= trl-s32cc.c index 10bff48852b9..1d4437df29a2 100644 --- a/drivers/pinctrl/nxp/pinctrl-s32cc.c +++ b/drivers/pinctrl/nxp/pinctrl-s32cc.c @@ -40,6 +40,14 @@ #define S32_MSCR_ODE BIT(20) #define S32_MSCR_OBE BIT(21) =20 +/* PGPDOs are 16bit registers that come in big endian + * order if they are grouped in pairs of two. + * + * For example, the order is PGPDO1, PGPDO0, PGPDO3, PGPDO2... + */ +#define S32_PGPD(N) (((N) ^ 1) * 2) +#define S32_PGPD_SIZE 16 + enum s32_write_type { S32_PINCONF_UPDATE_ONLY, S32_PINCONF_OVERWRITE, @@ -84,6 +92,7 @@ struct s32_pinctrl_context { * struct s32_pinctrl - private driver data * @dev: a pointer back to containing device * @pctl: a pointer to the pinctrl device structure + * @gc: a pointer to the gpio_chip * @regions: reserved memory regions with start/end pin * @info: structure containing information about the pin * @gpio_configs: Saved configurations for GPIO pins @@ -93,6 +102,7 @@ struct s32_pinctrl_context { struct s32_pinctrl { struct device *dev; struct pinctrl_dev *pctl; + struct gpio_chip gc; struct s32_pinctrl_mem_region *regions; struct s32_pinctrl_soc_info *info; struct list_head gpio_configs; @@ -366,66 +376,6 @@ static int s32_pmx_get_groups(struct pinctrl_dev *pctl= dev, return 0; } =20 -static int s32_pmx_gpio_request_enable(struct pinctrl_dev *pctldev, - struct pinctrl_gpio_range *range, - unsigned int offset) -{ - struct s32_pinctrl *ipctl =3D pinctrl_dev_get_drvdata(pctldev); - struct gpio_pin_config *gpio_pin; - unsigned int config; - unsigned long flags; - int ret; - - ret =3D s32_regmap_read(pctldev, offset, &config); - if (ret) - return ret; - - /* Save current configuration */ - gpio_pin =3D kmalloc(sizeof(*gpio_pin), GFP_KERNEL); - if (!gpio_pin) - return -ENOMEM; - - gpio_pin->pin_id =3D offset; - gpio_pin->config =3D config; - - spin_lock_irqsave(&ipctl->gpio_configs_lock, flags); - list_add(&gpio_pin->list, &ipctl->gpio_configs); - spin_unlock_irqrestore(&ipctl->gpio_configs_lock, flags); - - /* GPIO pin means SSS =3D 0 */ - config &=3D ~S32_MSCR_SSS_MASK; - - return s32_regmap_write(pctldev, offset, config); -} - -static void s32_pmx_gpio_disable_free(struct pinctrl_dev *pctldev, - struct pinctrl_gpio_range *range, - unsigned int offset) -{ - struct s32_pinctrl *ipctl =3D pinctrl_dev_get_drvdata(pctldev); - struct gpio_pin_config *gpio_pin, *tmp; - unsigned long flags; - int ret; - - spin_lock_irqsave(&ipctl->gpio_configs_lock, flags); - - list_for_each_entry_safe(gpio_pin, tmp, &ipctl->gpio_configs, list) { - if (gpio_pin->pin_id =3D=3D offset) { - ret =3D s32_regmap_write(pctldev, gpio_pin->pin_id, - gpio_pin->config); - if (ret !=3D 0) - goto unlock; - - list_del(&gpio_pin->list); - kfree(gpio_pin); - break; - } - } - -unlock: - spin_unlock_irqrestore(&ipctl->gpio_configs_lock, flags); -} - static int s32_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset, @@ -449,8 +399,6 @@ static const struct pinmux_ops s32_pmx_ops =3D { .get_function_name =3D s32_pmx_get_func_name, .get_function_groups =3D s32_pmx_get_groups, .set_mux =3D s32_pmx_set, - .gpio_request_enable =3D s32_pmx_gpio_request_enable, - .gpio_disable_free =3D s32_pmx_gpio_disable_free, .gpio_set_direction =3D s32_pmx_gpio_set_direction, }; =20 @@ -669,6 +617,315 @@ static const struct pinconf_ops s32_pinconf_ops =3D { .pin_config_group_dbg_show =3D s32_pinconf_group_dbg_show, }; =20 +static struct s32_pinctrl *to_s32_pinctrl(struct gpio_chip *chip) +{ + return container_of(chip, struct s32_pinctrl, gc); +} + +static struct regmap *s32_gpio_get_pgpd_regmap(struct gpio_chip *chip, + unsigned int pin, + bool output) +{ + struct s32_pinctrl *ipctl =3D to_s32_pinctrl(chip); + struct nxp_siul2_mfd *mfd; + u32 base, num; + int i; + + mfd =3D dev_get_drvdata(ipctl->dev->parent); + + for (i =3D 0; i < mfd->num_siul2; i++) { + base =3D mfd->siul2[i].gpio_base; + num =3D mfd->siul2[i].gpio_num; + + if (pin >=3D base && pin < base + num) + return output ? mfd->siul2[i].regmaps[SIUL2_PGPDO] : + mfd->siul2[i].regmaps[SIUL2_PGPDI]; + } + + return NULL; +} + +static int s32_gpio_request(struct gpio_chip *gc, unsigned int gpio) +{ + struct s32_pinctrl *ipctl =3D to_s32_pinctrl(gc); + struct pinctrl_dev *pctldev =3D ipctl->pctl; + struct gpio_pin_config *gpio_pin; + unsigned int config; + unsigned long flags; + int ret; + + ret =3D s32_regmap_read(pctldev, gpio, &config); + if (ret) + return ret; + + /* Save current configuration */ + gpio_pin =3D kmalloc(sizeof(*gpio_pin), GFP_KERNEL); + if (!gpio_pin) + return -ENOMEM; + + gpio_pin->pin_id =3D gpio; + gpio_pin->config =3D config; + + spin_lock_irqsave(&ipctl->gpio_configs_lock, flags); + list_add(&gpio_pin->list, &ipctl->gpio_configs); + spin_unlock_irqrestore(&ipctl->gpio_configs_lock, flags); + + /* GPIO pin means SSS =3D 0 */ + config &=3D ~S32_MSCR_SSS_MASK; + + return s32_regmap_write(pctldev, gpio, config); +} + +static void s32_gpio_free(struct gpio_chip *gc, unsigned int gpio) +{ + struct s32_pinctrl *ipctl =3D to_s32_pinctrl(gc); + struct pinctrl_dev *pctldev =3D ipctl->pctl; + struct gpio_pin_config *gpio_pin, *tmp; + unsigned long flags; + int ret; + + spin_lock_irqsave(&ipctl->gpio_configs_lock, flags); + + list_for_each_entry_safe(gpio_pin, tmp, &ipctl->gpio_configs, list) { + if (gpio_pin->pin_id =3D=3D gpio) { + ret =3D s32_regmap_write(pctldev, gpio_pin->pin_id, + gpio_pin->config); + if (ret !=3D 0) + goto unlock; + + list_del(&gpio_pin->list); + kfree(gpio_pin); + break; + } + } + +unlock: + spin_unlock_irqrestore(&ipctl->gpio_configs_lock, flags); +} + +static int s32_gpio_get_dir(struct gpio_chip *chip, unsigned int gpio) +{ + struct s32_pinctrl *ipctl =3D to_s32_pinctrl(chip); + unsigned int reg_value; + int ret; + + ret =3D s32_regmap_read(ipctl->pctl, gpio, ®_value); + if (ret) + return ret; + + if (!(reg_value & S32_MSCR_IBE)) + return -EINVAL; + + return reg_value & S32_MSCR_OBE ? GPIO_LINE_DIRECTION_OUT : + GPIO_LINE_DIRECTION_IN; +} + +static unsigned int s32_pin2pad(unsigned int pin) +{ + return pin / S32_PGPD_SIZE; +} + +static u16 s32_pin2mask(unsigned int pin) +{ + /** + * From Reference manual : + * PGPDOx[PPDOy] =3D GPDO(x =C3=97 16) + (15 - y)[PDO_(x =C3=97 16) + (15= - y)] + */ + return BIT(S32_PGPD_SIZE - 1 - pin % S32_PGPD_SIZE); +} + +static struct regmap *s32_gpio_get_regmap_offset_mask(struct gpio_chip *ch= ip, + unsigned int gpio, + unsigned int *reg_offset, + u16 *mask, + bool output) +{ + struct regmap *regmap; + unsigned int pad; + + regmap =3D s32_gpio_get_pgpd_regmap(chip, gpio, output); + if (!regmap) + return NULL; + + *mask =3D s32_pin2mask(gpio); + pad =3D s32_pin2pad(gpio); + + *reg_offset =3D S32_PGPD(pad); + + return regmap; +} + +static void s32_gpio_set_val(struct gpio_chip *chip, unsigned int gpio, + int value) +{ + unsigned int reg_offset; + struct regmap *regmap; + u16 mask; + + regmap =3D s32_gpio_get_regmap_offset_mask(chip, gpio, ®_offset, + &mask, true); + if (!regmap) + return; + + value =3D value ? mask : 0; + + regmap_update_bits(regmap, reg_offset, mask, value); +} + +static void s32_gpio_set(struct gpio_chip *chip, unsigned int gpio, + int value) +{ + if (s32_gpio_get_dir(chip, gpio) !=3D GPIO_LINE_DIRECTION_OUT) + return; + + s32_gpio_set_val(chip, gpio, value); +} + +static int s32_gpio_get(struct gpio_chip *chip, unsigned int gpio) +{ + unsigned int reg_offset, value; + struct regmap *regmap; + u16 mask; + int ret; + + if (s32_gpio_get_dir(chip, gpio) !=3D GPIO_LINE_DIRECTION_IN) + return -EINVAL; + + regmap =3D s32_gpio_get_regmap_offset_mask(chip, gpio, ®_offset, + &mask, false); + if (!regmap) + return -EINVAL; + + ret =3D regmap_read(regmap, reg_offset, &value); + if (ret) + return ret; + + return !!(value & mask); +} + +static int s32_gpio_dir_out(struct gpio_chip *chip, unsigned int gpio, + int val) +{ + struct s32_pinctrl *ipctl =3D to_s32_pinctrl(chip); + + s32_gpio_set_val(chip, gpio, val); + + return s32_pmx_gpio_set_direction(ipctl->pctl, NULL, gpio, false); +} + +static int s32_gpio_dir_in(struct gpio_chip *chip, unsigned int gpio) +{ + struct s32_pinctrl *ipctl =3D to_s32_pinctrl(chip); + + return s32_pmx_gpio_set_direction(ipctl->pctl, NULL, gpio, true); +} + +static int s32_gpio_gen_names(struct device *dev, unsigned int cnt, char *= *names, + char *ch_index, unsigned int *num_index) +{ + unsigned int i; + + for (i =3D 0; i < cnt; i++) { + if (i !=3D 0 && !(*num_index % 16)) + (*ch_index)++; + + names[i] =3D devm_kasprintf(dev, GFP_KERNEL, "P%c_%02d", + *ch_index, 0xFU & (*num_index)++); + if (!names[i]) + return -ENOMEM; + } + + return 0; +} + +static int s32_gpio_remove_reserved_names(struct device *dev, + struct s32_pinctrl *ipctl, + char **names) +{ + struct device_node *np =3D dev->of_node; + int num_ranges, i, j, ret; + u32 base_gpio, num_gpio; + + /* Parse the gpio-reserved-ranges to know which GPIOs to exclude. */ + + num_ranges =3D of_property_count_u32_elems(dev->of_node, + "gpio-reserved-ranges"); + + /* The "gpio-reserved-ranges" is optional. */ + if (num_ranges < 0) + return 0; + num_ranges /=3D 2; + + for (i =3D 0; i < num_ranges; i++) { + ret =3D of_property_read_u32_index(np, "gpio-reserved-ranges", + i * 2, &base_gpio); + if (ret) { + dev_err(dev, "Could not parse the start GPIO: %d\n", + ret); + return ret; + } + + ret =3D of_property_read_u32_index(np, "gpio-reserved-ranges", + i * 2 + 1, &num_gpio); + if (ret) { + dev_err(dev, "Could not parse num. GPIOs: %d\n", ret); + return ret; + } + + if (base_gpio + num_gpio > ipctl->gc.ngpio) { + dev_err(dev, "Reserved GPIOs outside of GPIO range\n"); + return -EINVAL; + } + + /* Remove names set for reserved GPIOs. */ + for (j =3D base_gpio; j < base_gpio + num_gpio; j++) { + devm_kfree(dev, names[j]); + names[j] =3D NULL; + } + } + + return 0; +} + +static int s32_gpio_populate_names(struct device *dev, + struct s32_pinctrl *ipctl) +{ + struct nxp_siul2_mfd *mfd =3D dev_get_drvdata(ipctl->dev->parent); + unsigned int num_index =3D 0; + char ch_index =3D 'A'; + char **names; + int i, ret; + + names =3D devm_kcalloc(dev, ipctl->gc.ngpio, sizeof(*names), + GFP_KERNEL); + if (!names) + return -ENOMEM; + + for (i =3D 0; i < mfd->num_siul2; i++) { + if (mfd->siul2[i].gpio_base % 16 =3D=3D 0) + num_index =3D 0; + + ret =3D s32_gpio_gen_names(dev, mfd->siul2[i].gpio_num, + names + mfd->siul2[i].gpio_base, + &ch_index, &num_index); + if (ret) { + dev_err(dev, "Could not set names for SIUL2_%d GPIOs\n", + i); + return ret; + } + + ch_index++; + } + + ret =3D s32_gpio_remove_reserved_names(dev, ipctl, names); + if (ret) + return ret; + + ipctl->gc.names =3D (const char *const *)names; + + return 0; +} + #ifdef CONFIG_PM_SLEEP static bool s32_pinctrl_should_save(struct s32_pinctrl *ipctl, unsigned int pin) @@ -899,12 +1156,14 @@ static int s32_pinctrl_probe_dt(struct platform_devi= ce *pdev, int s32_pinctrl_probe(struct platform_device *pdev, const struct s32_pinctrl_soc_data *soc_data) { + struct nxp_siul2_mfd *mfd =3D dev_get_drvdata(pdev->dev.parent); #ifdef CONFIG_PM_SLEEP struct s32_pinctrl_context *saved_context; #endif struct pinctrl_desc *s32_pinctrl_desc; struct s32_pinctrl_soc_info *info; struct s32_pinctrl *ipctl; + struct gpio_chip *gc; int ret; =20 if (!soc_data || !soc_data->pins || !soc_data->npins) { @@ -973,5 +1232,32 @@ int s32_pinctrl_probe(struct platform_device *pdev, =20 dev_info(&pdev->dev, "initialized s32 pinctrl driver\n"); =20 + gc =3D &ipctl->gc; + gc->parent =3D &pdev->dev; + gc->label =3D dev_name(&pdev->dev); + gc->base =3D -1; + /* In some cases, there is a gap between the SIUL GPIOs. */ + gc->ngpio =3D mfd->siul2[mfd->num_siul2 - 1].gpio_base + + mfd->siul2[mfd->num_siul2 - 1].gpio_num; + ret =3D s32_gpio_populate_names(&pdev->dev, ipctl); + if (ret) + return ret; + + gc->set =3D s32_gpio_set; + gc->get =3D s32_gpio_get; + gc->set_config =3D gpiochip_generic_config; + gc->request =3D s32_gpio_request; + gc->free =3D s32_gpio_free; + gc->direction_output =3D s32_gpio_dir_out; + gc->direction_input =3D s32_gpio_dir_in; + gc->get_direction =3D s32_gpio_get_dir; + + ret =3D devm_gpiochip_add_data(&pdev->dev, gc, ipctl); + if (ret) + return dev_err_probe(&pdev->dev, ret, + "unable to add gpiochip\n"); + + dev_info(&pdev->dev, "initialized s32 GPIO driver\n"); + return 0; } --=20 2.45.2 From nobody Sun Nov 24 21:45:37 2024 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2058.outbound.protection.outlook.com [40.107.21.58]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 66878166F16; Fri, 1 Nov 2024 08:07:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.21.58 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730448429; cv=fail; b=FSjUuOdA68yziU4oxJEgHq4WOtX21daY0+8mAA3Xio8jg3yS63CdNA4Yk8FWyJBqLGxDvB4F6sTkAg457DwKcRD+KQoPC6KnhSWD0J7TLCibhIONf+kdKS27CM6cOq+D7+K6u4BweeJf1lNTg2XhbanTLP2s0FZ/Z1HyNHc6tKo= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730448429; c=relaxed/simple; bh=r5YWVgcrGo4IHtoyYpIX7lBwDijffJDNESIA5eZS2zo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=Sn4mGjGyWQf4KjLpLZtooerVlBE1mpz2E2ywxK+MY5mBXp7vylffZUQ0F2YrGy3PtXgbzk741rITkiDgE01BgqDOZvZUFMP9zxnnVuEiFzuM9xud8yT3kq8mE5Mc9V+31/5+vmJBN1xwAgEdu/U0awRtUBXtacUzyk/pdoBpi3Q= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com; spf=pass smtp.mailfrom=oss.nxp.com; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b=oo1GnmoU; arc=fail smtp.client-ip=40.107.21.58 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=NXP1.onmicrosoft.com header.i=@NXP1.onmicrosoft.com header.b="oo1GnmoU" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=Lq2yzEXD0XoryczAE5v1yIzN2qWGSW7zxD6/rFCvTOC2dWI8DgZSPeBfbYIOsceYnSkj0+MBK/XKDsTAeQqYPEwZtxcTEHTcqzhLo0Skt161iK3WsAG5g0EpuQY7mVRLp3oz8YE/M1jDFgLxQgVNkbu/p0zVdhu/i5TBTo+95R1tWu0/tFoZKUpiTwBHvsm5uo2KUfYoNuF202aDU5eEl7NN6OD/tMphs6nEO07x7T211uRW6lPCvOD2gvx01/WOXWk5N8ycqV2ghi2SeJa5BiOwC6KvXXSALeUx3iJYi/nIQO8BZV3e/36FjJTqwjq0Zu1EDB6/A348ezPxo2GodA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=IIu+SWNPcmikzl5SdaSnLRex8alay4FoI2wVLeEmXTw=; b=VQAqS+x8tGhbwys8BmlP6nBsnnPnN251Fx0asCBFZu16Lq3z7o3YHLqWkdgvTqD4LXsGy4hLY+8wfWdG6QcG0Oih/8HupbZXpepVswMWiM9fQ4zZuxQGv5fCbrtmY2wHc17oGXym64sKn0e+zCZFrt/uQ9GXID4beQM0vCyA2D6fKlPOcD6DsSgVaSDFLa3nw31tZWAGoCmd8Lq7fwZ5WLIjpLWzEizAFh91ukZoVCqmHh//UoEi1hlkNY8Yn5YUi8OWMAiObidcme7j2p88+bXPwhPyqXnnSNqSaF/4NW350Bm/toN4WhpuWzMMPcVKf1CvXKl8ermp5uS07pD2xA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=oss.nxp.com; dmarc=pass action=none header.from=oss.nxp.com; dkim=pass header.d=oss.nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=NXP1.onmicrosoft.com; s=selector1-NXP1-onmicrosoft-com; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=IIu+SWNPcmikzl5SdaSnLRex8alay4FoI2wVLeEmXTw=; b=oo1GnmoUEHKZped32rSlvl4Cfrio4coHSErJINo5LKZ/SctteCp5bSZOYfqE+uF/zYNwtd7z4FxIgLRe06LEhKi372vXR8UXHWSkf6Jn+AcE0RWPtQLMx7EV1sHpCcJzRNUhQmbnhqe4TbmTWyvnWJ1Y5Sm/eUHTQiHOmhFeIuzn6PCjNEsMjwimiIes2NwPerds8iQ9k/RWK41SDB46rd6yzT7cG2wZm7wZq2rzGZAuU1xau4BXvVXAkTKwHR+hg8IdPj0d7Xq/teS7ROuNd/mrGFw9nU2oz7kKFuApe6mecOG8p5+t67GOJi1GtEVXTwA5l2qlPVUSeBWaJy1wgg== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=oss.nxp.com; Received: from AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) by AM8PR04MB8034.eurprd04.prod.outlook.com (2603:10a6:20b:249::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8114.20; Fri, 1 Nov 2024 08:07:00 +0000 Received: from AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455]) by AM9PR04MB8487.eurprd04.prod.outlook.com ([fe80::6d7a:8d2:f020:455%5]) with mapi id 15.20.8114.015; Fri, 1 Nov 2024 08:07:00 +0000 From: Andrei Stefanescu To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , Larisa Grigore , Andrei Stefanescu , Greg Kroah-Hartman , "Rafael J. Wysocki" , Lee Jones , Shawn Guo , Sascha Hauer , Fabio Estevam , Dong Aisheng , Jacky Bai Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, NXP S32 Linux Team , Christophe Lizzi , Alberto Ruiz , Enric Balletbo , Pengutronix Kernel Team , imx@lists.linux.dev Subject: [PATCH v5 7/7] MAINTAINERS: add MAINTAINER for NXP SIUL2 MFD driver Date: Fri, 1 Nov 2024 10:06:13 +0200 Message-ID: <20241101080614.1070819-8-andrei.stefanescu@oss.nxp.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> References: <20241101080614.1070819-1-andrei.stefanescu@oss.nxp.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: AM0PR10CA0115.EURPRD10.PROD.OUTLOOK.COM (2603:10a6:208:e6::32) To AM9PR04MB8487.eurprd04.prod.outlook.com (2603:10a6:20b:41a::6) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM9PR04MB8487:EE_|AM8PR04MB8034:EE_ X-MS-Office365-Filtering-Correlation-Id: bd73c5c2-1966-4299-88fd-08dcfa4c294f X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|52116014|366016|7416014|376014|1800799024|921020|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?NHl1WWtNYkNyWE1GV1lHYVVXbERrNUZlNEIvcW5IK1djVVBiWWFHQSswbEZZ?= =?utf-8?B?ekFHcXhEbTVFZk50VUJpMU0xczB5Sk1rWGpIaDc5NXVnM3N5anlndTBrZnZn?= =?utf-8?B?RndGVmVTMjlaWS9ISDFZckVLcW95d0VaaW9Ia3FlY09Kd013S1pOTG00ck1u?= =?utf-8?B?aytTMlVTSGdDZlBUdUR4dWlpOW12cnpDbk5jYm5iU04xMXpzVnY0YlJ3Y05K?= =?utf-8?B?bTM0WHdRdDFuRzZrRVNhdDM4dmo1SVd6T0xrakRsZ25XWGQ5VVhicG5PNWM1?= =?utf-8?B?bTYvMXdEd0NYT1ZHdjdVVjg3dlJTS1hWbEJlN0M1d1JMNG8vMEtDdjdsZlk2?= =?utf-8?B?blgzMmJmRkJHRzZ4VzZZU09OTVRHNjRPc3JCamY3bHM4YzJVZ1o3SEp1VGVs?= =?utf-8?B?ajNqU3JidnovNFlUTnVOb1E3WjhCL2xHOGJDVVMzYjNjR3RFbEpsTENEaHlz?= =?utf-8?B?NTR0ZElJLytjaWcvellLSWNkTTdQcDhOQkk5NUM3N1NZM3Z3TGdvRFlUeU1x?= =?utf-8?B?WVBvR2dWQVhXazQyOGNDYmpLemRxV2w5VG56Y2hwaXFFMzZ3YXMwZWo4bFVk?= =?utf-8?B?RnJzZzZNckgwRUZxQ3pneXI4dEpCNEwzbFFOeE1kYklFaW8vMDE1VkJrMm1N?= =?utf-8?B?TGJSUEdTR01BRmQzN01CZndlTkJMZkpFZTU2TUZKbWFHckJwQVFkR0lxNUhF?= =?utf-8?B?N294YXZvSEVLVDU3SjB5NERoL21XbkhVaUxOM3hlNWs4RWhJNmhtWnhBZi8z?= =?utf-8?B?RCtmVW9pamxpQ1dTTXZkSWo5bmpsMUtSSFl5aStwdFExbmxIcC9RZ2VrOWpL?= =?utf-8?B?Q3h0R2VHUTdjWktHWm02TWkrTEJVOXNFN0ZPOGE2SmhZdnduRXg0RDZvL3FC?= =?utf-8?B?NXdMdnpXS0tYTnhNcW5iMllsUGhNblluaTI2dU1HTndVTXovb1FaSUh5ajEy?= =?utf-8?B?RmRtQ21Kb3d5S1ZvQitQMmhyVmE3MDNseEZaOGFqQS9wSzlTZU41VVJsRUtm?= =?utf-8?B?QVJ3Y1dYMVY4Mmw4TTlYMjZKQTFoUXlGUlhXeVdyTjRYdU5DL1l1dnpEc2Jq?= =?utf-8?B?T0Jia1NEc3IwSmRtQW1QT2lST3ZyN1RObjAxb0tubHdwandmNFVJU0FJa3g1?= =?utf-8?B?TlluMjJiclVxOHB3N0JMZHhGdEVpcTh2ZFBJdk1lYXpQQXh1UU5kMmg3L3NV?= =?utf-8?B?UmdFS012OHZRUUY3THpRNjJ5czM3ekxNaXhIbUJlQSs1Ym1lODNMbjVtVlpm?= =?utf-8?B?S0dheFd3MEUzeFpNdFJ5RkNTS1UrYkx6WWt3RjZKYklxYmZuS01LMnJ0L3hh?= =?utf-8?B?bGdCWHRUd2FuM0piaElZd3JOY1NkcG5GV0JsNXRpSTQ2ZmdobWovL0M2OEpp?= =?utf-8?B?UENNTFJMYU1hSVdwakFzSGRhajNsTTltYUwremkxN0FOVUpHZExYanFjMGxQ?= =?utf-8?B?N3pvc0hzSGRibDlpd21CNG5WcW1wT0c3d0VPTmlCdjNYeW5XN1hjcmEycnhY?= =?utf-8?B?OVh0Vjc2dW9FK1lsTU9lVzJwNjJXbDZZQTg0OE9KbW43SGE2anpPaFpGekMx?= =?utf-8?B?MmZ5cXV6NVlGUWZONTdkd3pPSUN1Y2tiVkxJZW1ON1dGbk95TnRNcXJaakZi?= =?utf-8?B?TXR0b1MzMHZrNUpzMW5tRzJBMEFSWHZ0d1RacG9jakVrZXkzNnpFMmg0N05V?= =?utf-8?B?cVVuRm1lbW1ZeVpKbkwvQ3h6UWFxcGtuMHk5Unpzbm90c0ptQmkxTEUvcWlB?= =?utf-8?B?amIzbG5jQVc3aFFYOUlxUkdVZHlwai84Y0I0L0xDclJHcnFjRkJzZWx3aU9R?= =?utf-8?B?S3dQc2wvdXRIeFNxWE5SeGFNZE5VTkxWUVB6eGhqT1RRV21RSFpVVzN6ZEZ0?= =?utf-8?Q?sNnql3VJiz2lm?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AM9PR04MB8487.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(52116014)(366016)(7416014)(376014)(1800799024)(921020)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?RFdDTXF3UlhsSmw4ZlMxaFZZK3hRSTFqNmpuYTJhQmVUME94TEVzcVNSeWNQ?= =?utf-8?B?MTNFdVI1Q2hzdTFWSnFjaUNOcGVZOXI3RElPb1Y3NkZLQk90QW5ad1JXY21L?= =?utf-8?B?bW5BeDNCVjFTNUU5ZlZNcmxrWXNocU9rRTh6SWhHaUU0R2hDMUhUZ1MrcTlD?= =?utf-8?B?MXB2cXJTTGdzNTdsMFdkQ2tXM20yQ0JwclUwYm1BNlJqSi9oeW96bWl3dko2?= =?utf-8?B?ejZ3NDdjL1FBUXBqNFNVNmFOVTkzdjdpM3ZnK1B5Q0Z4TUt6aTBYd3A3bWdp?= =?utf-8?B?OG5wdndlcUY5aVRoa1ZxbmFieWRlM0Nrc0szZTRaNkpGZDVKSzE5SXNXUFkw?= =?utf-8?B?WDZuYzFueHlGdk55OVJNOC8vdWRwM2VLc2NvVUhveXpWQ1NSaGNjdEZ6Z0Fi?= =?utf-8?B?V2NVeXFEUWxJY0orUVZkRVVTaytJUDlhL0ppdU81THdXZTBtWURtS3JhbWZJ?= =?utf-8?B?V3pBeG1nSDZYQWRZakFIL21DalNzRStkaE5wVjBxSWlPejJ1czBGTjZQZFZS?= =?utf-8?B?SjlVYzFZcG1UUytNQkpKaE90WWVlaWNzZGxWTHlVcGx2ZS9pN3BEeTdpb2Nw?= =?utf-8?B?OUt6N1lQK2szaHhiMXZudVFmeDZNdnVLQW1RUldqcFpVaThtNnpyM2VvQmVt?= =?utf-8?B?alNHUWNHS0pqcWxqRnBmeDhFTUpjR2hFT0dGNXNTTWZkS1dLUjY1ZWplajNZ?= =?utf-8?B?eDlveWZ1REhLTHc0aW1rVU5mZndzMWtmdGMzdEV6a2dEWWJJUE0ySkczWmZE?= =?utf-8?B?Skt5V1A1M0VXdzhoUEVUNExUVmVKL3J0U1BnSVpuUVJtUkhvRDZWYTdRVEFu?= =?utf-8?B?VHMrdHY1MTJtejQ3MUoyRG9GQjBwd3JKMzBRc3ZUbE5rNmVIRkY5VXJrd2No?= =?utf-8?B?VER6U1NZOFA2OVRLSHRHVC9oQkYxTmtkZllZL00zbzNCUFpnQVVJN0xiSDBa?= =?utf-8?B?MWw3YTZ1N1BFcmcxcitxNTNWRFdjOXhiZWx4N010U3JXa056dDdaczZPeENX?= =?utf-8?B?UGRBai8ya2h6dkszR1JhQUdrUS9TWUp3dlErblVjU3ZuWXovWldQdVNxQXh2?= =?utf-8?B?Q1NLZGRaRkFobXdsZjU1Z3dZdmlDVXdGcEkvSlBkaDd1bmlBU05YS3I1Ujll?= =?utf-8?B?MkVRQklHNjRnYXR2LzRnbHNSUDlQUDd5NVB6d2xndFluYmMycTVML2VwMEhD?= =?utf-8?B?RWpMeThTSjNqc2FzSTY3aG5manlCb3NoUmRWdys5YW14SUpUM0JITXlTcVBR?= =?utf-8?B?NUNxMk1UeUJ3R3NZYW9BTS9YclE2WklIU3lPRDhyYmFiSytqalV2K3BUTElF?= =?utf-8?B?dXg5bk55a3J5OXduNndUdnlwMHBHeW5FcGxGZ1BETUpmczJXa0lUaVl4bHV1?= =?utf-8?B?dnlIMU9INWd4UDd2Rnpka0xROHJzY3VVVlRhVURIaXE5SytTSVMwKzgvZFZ4?= =?utf-8?B?SmpqTTAxMHhHSHFzWVVBaG56YU83ZnNKemhTVzJBOFg5b0s1SW5hOVllVmdl?= =?utf-8?B?bFdyNlRudGozRXIrQU90RUcxek85SFc5N3lRaFdQajJMNk1odnpVREdmaXA2?= =?utf-8?B?TVJTcEcxRG1qa3F4Ly9uWUpYZHNVUlFBdW5iSmxzV1pnRCs5MHdqTXZIRnUx?= =?utf-8?B?bVdtekVORnZVUXRYMDdFcnQ4eXBJRS9nZU1XZ0N0WGZiS3M3MXNMVTRrSUdu?= =?utf-8?B?Tk1WUFI5YWVLM1pBVUdxYWZ2WU1MZGZJN1N3YXlCbjArMVB2RTFMQ2lCTHVl?= =?utf-8?B?UGcyK3Zhc25UY0FuZVdCOENPaDJBUUFNcDNSTTIxdGlPYlVMWUltdGFkTjhu?= =?utf-8?B?cjdlQ0hBajJTQzBzdjdzdTFZd1ZQenFZblhCdktuZTVaeU1WSEFXOGVyd0tP?= =?utf-8?B?Y2p4MmdySm1kRUdFMGhoc2l4WkhZT243R1BqYXI0U3hmMVVEU05XRjRNUmQw?= =?utf-8?B?ZmpJb3JXakRjK3hrZlJzZXhVSDF5VlhiaHRjd0JNR3dnNlRsYjhkU0VYRHdG?= =?utf-8?B?ZE5ibWVxTkFoZlpIUll4SmI5OCtuR0NRZ0ROdDhXbUZCNSswVVFTUmNZQitZ?= =?utf-8?B?a1lQTUIzNFJnNWprdzFHaWFlQnlYUWVHUXAvRU9JamNiVTNlU3R6K0FIYlM2?= =?utf-8?B?b3NoY1ppWjNaZHdGNi9zakhLNlhzMkN3YXBhME40Ym9Oc0dtcGdwS0VYTkVu?= =?utf-8?B?NGc9PQ==?= X-OriginatorOrg: oss.nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: bd73c5c2-1966-4299-88fd-08dcfa4c294f X-MS-Exchange-CrossTenant-AuthSource: AM9PR04MB8487.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Nov 2024 08:06:59.9401 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: qAxYn0yxoHBUWU6QuUc8g5ABMrYQwgN98aEsd4pJU+5BytDqx2rJFhkeZW7i1I91NZRZva6ir0AkEe5JTKXr7ipY5bC06zZE/N534i363vk= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR04MB8034 Content-Type: text/plain; charset="utf-8" Add the new MFD driver for the SIUL2 module under the NXP S32G existing entry. This MFD driver currently has one cell for a combined pinctrl&GPIO driver and will, in the future, contain another cell for an NVMEM driver. Signed-off-by: Andrei Stefanescu --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index a27407950242..707cc15e4406 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2787,7 +2787,9 @@ R: Ghennadi Procopciuc L: NXP S32 Linux Team L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained +F: Documentation/devicetree/bindings/mfd/nxp,siul2.yaml F: arch/arm64/boot/dts/freescale/s32g*.dts* +F: drivers/mfd/nxp-siul2.c F: drivers/pinctrl/nxp/ =20 ARM/Orion SoC/Technologic Systems TS-78xx platform support --=20 2.45.2