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Received: from AS8PR04MB8676.eurprd04.prod.outlook.com (2603:10a6:20b:42b::10) by PAXPR04MB8573.eurprd04.prod.outlook.com (2603:10a6:102:214::5) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.32; Fri, 1 Nov 2024 06:56:26 +0000 Received: from AS8PR04MB8676.eurprd04.prod.outlook.com ([fe80::28b2:de72:ad25:5d93]) by AS8PR04MB8676.eurprd04.prod.outlook.com ([fe80::28b2:de72:ad25:5d93%6]) with mapi id 15.20.8114.015; Fri, 1 Nov 2024 06:56:26 +0000 From: Richard Zhu To: l.stach@pengutronix.de, bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, shawnguo@kernel.org, frank.li@nxp.com, s.hauer@pengutronix.de, festevam@gmail.com Cc: imx@lists.linux.dev, kernel@pengutronix.de, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Richard Zhu Subject: [PATCH v6 03/10] PCI: imx6: Fetch dbi2 and iATU base addesses from DT Date: Fri, 1 Nov 2024 15:06:03 +0800 Message-Id: <20241101070610.1267391-4-hongxing.zhu@nxp.com> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20241101070610.1267391-1-hongxing.zhu@nxp.com> References: <20241101070610.1267391-1-hongxing.zhu@nxp.com> Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SI1PR02CA0017.apcprd02.prod.outlook.com (2603:1096:4:1f4::10) To AS8PR04MB8676.eurprd04.prod.outlook.com (2603:10a6:20b:42b::10) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS8PR04MB8676:EE_|PAXPR04MB8573:EE_ X-MS-Office365-Filtering-Correlation-Id: c4ad2b65-6f72-4681-ba05-08dcfa424dea X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|52116014|376014|7416014|1800799024|38350700014|921020; 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charset="utf-8" Since dbi2 and atu regs are added for i.MX8M PCIes. Fetch the dbi2 and iATU base addresses from DT directly, and remove the useless codes. Upsteam dts's have not enabled EP function. So no function broken for old upsteam's dtb. Signed-off-by: Richard Zhu Reviewed-by: Manivannan Sadhasivam --- drivers/pci/controller/dwc/pci-imx6.c | 20 -------------------- 1 file changed, 20 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller= /dwc/pci-imx6.c index bc8567677a67..462decd1d589 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -1115,7 +1115,6 @@ static int imx_add_pcie_ep(struct imx_pcie *imx_pcie, struct platform_device *pdev) { int ret; - unsigned int pcie_dbi2_offset; struct dw_pcie_ep *ep; struct dw_pcie *pci =3D imx_pcie->pci; struct dw_pcie_rp *pp =3D &pci->pp; @@ -1125,25 +1124,6 @@ static int imx_add_pcie_ep(struct imx_pcie *imx_pcie, ep =3D &pci->ep; ep->ops =3D &pcie_ep_ops; =20 - switch (imx_pcie->drvdata->variant) { - case IMX8MQ_EP: - case IMX8MM_EP: - case IMX8MP_EP: - pcie_dbi2_offset =3D SZ_1M; - break; - default: - pcie_dbi2_offset =3D SZ_4K; - break; - } - - pci->dbi_base2 =3D pci->dbi_base + pcie_dbi2_offset; - - /* - * FIXME: Ideally, dbi2 base address should come from DT. But since only = IMX95 is defining - * "dbi2" in DT, "dbi_base2" is set to NULL here for that platform alone = so that the DWC - * core code can fetch that from DT. But once all platform DTs were fixed= , this and the - * above "dbi_base2" setting should be removed. - */ if (device_property_match_string(dev, "reg-names", "dbi2") >=3D 0) pci->dbi_base2 =3D NULL; =20 --=20 2.37.1