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charset="utf-8" Adds data and clock pins description (their active state) of soundwire masters. Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- arch/arm64/boot/dts/qcom/sm4250.dtsi | 46 ++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm4250.dtsi b/arch/arm64/boot/dts/qco= m/sm4250.dtsi index 1b9983ab122e..8873015c05b9 100644 --- a/arch/arm64/boot/dts/qcom/sm4250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4250.dtsi @@ -37,6 +37,16 @@ &cpu7 { compatible =3D "qcom,kryo240"; }; =20 +&swr0 { + pinctrl-0 =3D <&lpass_tx_swr_active>; + pinctrl-names =3D "default"; +}; + +&swr1 { + pinctrl-0 =3D <&lpass_rx_swr_active>; + pinctrl-names =3D "default"; +}; + &lpass_tlmm { compatible =3D "qcom,sm4250-lpass-lpi-pinctrl"; gpio-ranges =3D <&lpass_tlmm 0 0 26>; @@ -74,4 +84,40 @@ ext-mclk1-pins { output-high; }; }; + + lpass_tx_swr_active: lpass-tx-swr-active-state { + clk-pins { + pins =3D "gpio0"; + function =3D "swr_tx_clk"; + drive-strength =3D <10>; + slew-rate =3D <3>; + bias-disable; + }; + + data-pins { + pins =3D "gpio1", "gpio2"; + function =3D "swr_tx_data"; + drive-strength =3D <10>; + slew-rate =3D <3>; + bias-bus-hold; + }; + }; + + lpass_rx_swr_active: lpass-rx-swr-active-state { + clk-pins { + pins =3D "gpio3"; + function =3D "swr_rx_clk"; + drive-strength =3D <10>; + slew-rate =3D <3>; + bias-disable; + }; + + data-pins { + pins =3D "gpio4", "gpio5"; + function =3D "swr_rx_data"; + drive-strength =3D <10>; + slew-rate =3D <3>; + bias-bus-hold; + }; + }; }; --=20 2.45.2