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charset="utf-8" Since wrapped keys are not part of the MMC specifications, it needs to be treated as a supported quirk of the MMC controller. This way, based on the quirk set during a host probe, MMC crypto can choose to register either standard or wrapped keys with block crypto profile. Signed-off-by: Seshu Madhavi Puppala --- drivers/mmc/host/cqhci-crypto.c | 23 +++++++++++++++-------- drivers/mmc/host/cqhci.h | 6 ++++++ 2 files changed, 21 insertions(+), 8 deletions(-) diff --git a/drivers/mmc/host/cqhci-crypto.c b/drivers/mmc/host/cqhci-crypt= o.c index 91da6de1d650..c4e7ae95bc7d 100644 --- a/drivers/mmc/host/cqhci-crypto.c +++ b/drivers/mmc/host/cqhci-crypto.c @@ -91,13 +91,15 @@ static int cqhci_crypto_keyslot_program(struct blk_cryp= to_profile *profile, cfg.crypto_cap_idx =3D cap_idx; cfg.config_enable =3D CQHCI_CRYPTO_CONFIGURATION_ENABLE; =20 - if (ccap_array[cap_idx].algorithm_id =3D=3D CQHCI_CRYPTO_ALG_AES_XTS) { - /* In XTS mode, the blk_crypto_key's size is already doubled */ - memcpy(cfg.crypto_key, key->raw, key->size/2); - memcpy(cfg.crypto_key + CQHCI_CRYPTO_KEY_MAX_SIZE/2, - key->raw + key->size/2, key->size/2); - } else { - memcpy(cfg.crypto_key, key->raw, key->size); + if (key->crypto_cfg.key_type !=3D BLK_CRYPTO_KEY_TYPE_HW_WRAPPED) { + if (ccap_array[cap_idx].algorithm_id =3D=3D CQHCI_CRYPTO_ALG_AES_XTS) { + /* In XTS mode, the blk_crypto_key's size is already doubled */ + memcpy(cfg.crypto_key, key->raw, key->size/2); + memcpy(cfg.crypto_key + CQHCI_CRYPTO_KEY_MAX_SIZE/2, + key->raw + key->size/2, key->size/2); + } else { + memcpy(cfg.crypto_key, key->raw, key->size); + } } =20 err =3D cqhci_crypto_program_key(cq_host, key, &cfg, slot); @@ -211,7 +213,12 @@ int cqhci_crypto_init(struct cqhci_host *cq_host) /* Unfortunately, CQHCI crypto only supports 32 DUN bits. */ profile->max_dun_bytes_supported =3D 4; =20 - profile->key_types_supported =3D BLK_CRYPTO_KEY_TYPE_STANDARD; + if (cq_host->quirks & CQHCI_QUIRK_USES_WRAPPED_CRYPTO_KEYS) + profile->key_types_supported =3D + BLK_CRYPTO_KEY_TYPE_HW_WRAPPED; + else + profile->key_types_supported =3D + BLK_CRYPTO_KEY_TYPE_STANDARD; =20 /* * Cache all the crypto capabilities and advertise the supported crypto diff --git a/drivers/mmc/host/cqhci.h b/drivers/mmc/host/cqhci.h index 06099fd32f23..f6bc66bc6418 100644 --- a/drivers/mmc/host/cqhci.h +++ b/drivers/mmc/host/cqhci.h @@ -241,6 +241,12 @@ struct cqhci_host { u32 quirks; #define CQHCI_QUIRK_SHORT_TXFR_DESC_SZ 0x1 =20 + /* + * This quirk indicates that EMMC will be using HW wrapped keys + * when using inline encryption. + */ +#define CQHCI_QUIRK_USES_WRAPPED_CRYPTO_KEYS 0x2 + bool enabled; bool halted; bool init_done; --=20 2.17.1