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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241101-sm8750-audio-v1-1-730aec176459@linaro.org> References: <20241101-sm8750-audio-v1-0-730aec176459@linaro.org> In-Reply-To: <20241101-sm8750-audio-v1-0-730aec176459@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Melody Olvera , Satya Durga Srinivasu Prabhala , Srinivas Kandagatla , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=5559; i=krzysztof.kozlowski@linaro.org; h=from:subject:message-id; bh=zP8CMhOsdju++fAMfqiHRGssCrdsjamWMupWX7aOmzw=; b=owEBbQKS/ZANAwAKAcE3ZuaGi4PXAcsmYgBnJQ2WTuIcBDqfBad8+DMmKLIxf2GQpJlfwIZkB 7O5+6sVqHqJAjMEAAEKAB0WIQTd0mIoPREbIztuuKjBN2bmhouD1wUCZyUNlgAKCRDBN2bmhouD 19L1D/90ipcXp4q55M9MpT1ajY+bimTNgEPjFE4Zzf60YhJX7NEqMWQpFisp0mBsTQss2Xs8+4z Ya9ekzgKPIgtsYCvS3knKuuPNM2UTrZgiPS6YEDMKaohB9CQ94+jwkfvfvZJ/zX2gXRwOtU0AqD 3lAMdMklBJbJJM0gcXTuK7d2g4+QjFswgtFZ7GDcsB5P/6qMx2Y57Ao2Ehy+LiMA3xvJ6rqurQ0 EroICyYIHBQYRDSfwpZOxAoAeSxIBYpN/1QN8NzcQpib37x4sbYIeUFqJa8EkqT0eRrQXK6LdJF fUX3lARMaZY9VFFIIC3rPhg+uMu0wfIfbzCPNaYwkOVL3UHH43UDAJZdlXGTay7WosKVexgvwxr bI/IgRm8ooC9FYc8I+WhPhiN8wXsuAiZUrtVcIpfPIZzc67GR9I0pu+2ljMczWFS6UKtAtbimzR kgSphIq1JNKos9WuW+ck9NUYbYR3Bbgg6GOxJNxq2z2ABzXX93pbCPRQ+8SiFBgcjfyabGwvxyF uyh9Zr6HZFaBy0US2V3FoKBQ1fe5P+DyHAjdlrcl0jogM+CX72dSAXwMZ3VhOFhg0NhwHWi43NL 1sNrt8i9WzK1UFsk7ywbhg4/kA+H4sCWywwy1ZhDk8LnTOz+t5UvoCqIOKeYtCKUX8531pduged oZr0PRAloqVWykA== X-Developer-Key: i=krzysztof.kozlowski@linaro.org; a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B Add nodes for IPCC mailbox, SMP2P for ADSP, AOSS and the ADSP remoteproc PAS loader (compatible with SM8550). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Melody Olvera --- arch/arm64/boot/dts/qcom/sm8750.dtsi | 140 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 140 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qco= m/sm8750.dtsi index 98ab82caa007ee63c395a3ce0f517e2bbeb0aecb..eb826b154dcb2d8165426ba2225= 548efd7547da8 100644 --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi @@ -10,8 +10,10 @@ #include #include #include +#include #include #include +#include #include =20 / { @@ -510,6 +512,32 @@ llcc_lpi_mem: llcc-lpi@ff800000 { }; }; =20 + smp2p-adsp { + compatible =3D "qcom,smp2p"; + + interrupts-extended =3D <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_SMP2P + IRQ_TYPE_EDGE_RISING>; + + mboxes =3D <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_SMP2P>; + + qcom,smem =3D <443>, <429>; + qcom,local-pid =3D <0>; + qcom,remote-pid =3D <2>; + + smp2p_adsp_out: master-kernel { + qcom,entry-name =3D "master-kernel"; + #qcom,smem-state-cells =3D <1>; + }; + + smp2p_adsp_in: slave-kernel { + qcom,entry-name =3D "slave-kernel"; + interrupt-controller; + #interrupt-cells =3D <2>; + }; + }; + soc: soc@0 { compatible =3D "simple-bus"; =20 @@ -538,6 +566,17 @@ gcc: clock-controller@100000 { #power-domain-cells =3D <1>; }; =20 + ipcc: mailbox@406000 { + compatible =3D "qcom,sm8750-ipcc", "qcom,ipcc"; + reg =3D <0 0x00406000 0 0x1000>; + + interrupts =3D ; + interrupt-controller; + #interrupt-cells =3D <3>; + + #mbox-cells =3D <2>; + }; + gpi_dma2: dma-controller@800000 { compatible =3D "qcom,sm8750-gpi-dma", "qcom,sm6350-gpi-dma"; reg =3D <0x0 0x00800000 0x0 0x60000>; @@ -1975,6 +2014,19 @@ pdc: interrupt-controller@b220000 { interrupt-controller; }; =20 + aoss_qmp: power-management@c300000 { + compatible =3D "qcom,sm8750-aoss-qmp", "qcom,aoss-qmp"; + reg =3D <0 0x0c300000 0 0x400>; + + interrupt-parent =3D <&ipcc>; + interrupts-extended =3D <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_= QMP + IRQ_TYPE_EDGE_RISING>; + + mboxes =3D <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; + + #clock-cells =3D <0>; + }; + spmi_bus: spmi@c400000 { compatible =3D "qcom,spmi-pmic-arb"; reg =3D <0x0 0xc400000 0x0 0x3000>, @@ -2884,6 +2936,94 @@ gem_noc: interconnect@24100000 { #interconnect-cells =3D <2>; }; =20 + remoteproc_adsp: remoteproc@30000000 { + compatible =3D "qcom,sm8750-adsp-pas", "qcom,sm8550-adsp-pas"; + reg =3D <0 0x30000000 0 0x100>; + + interrupts-extended =3D <&pdc 6 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 7 IRQ_TYPE_EDGE_RISING>; + interrupt-names =3D "wdog", + "fatal", + "ready", + "handover", + "stop-ack", + "shutdown-ack"; + + clocks =3D <&rpmhcc RPMH_CXO_CLK>; + clock-names =3D "xo"; + + interconnects =3D <&lpass_lpicx_noc MASTER_LPASS_PROC QCOM_ICC_TAG_ALWA= YS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; + + power-domains =3D <&rpmhpd RPMHPD_LCX>, + <&rpmhpd RPMHPD_LMX>; + power-domain-names =3D "lcx", + "lmx"; + + memory-region =3D <&adspslpi_mem>, <&q6_adsp_dtb_mem>; + + qcom,qmp =3D <&aoss_qmp>; + + qcom,smem-states =3D <&smp2p_adsp_out 0>; + qcom,smem-state-names =3D "stop"; + + status =3D "disabled"; + + remoteproc_adsp_glink: glink-edge { + interrupts-extended =3D <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes =3D <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP>; + qcom,remote-pid =3D <2>; + label =3D "lpass"; + + gpr { + compatible =3D "qcom,gpr"; + qcom,glink-channels =3D "adsp_apps"; + qcom,domain =3D ; + qcom,intents =3D <512 20>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + q6apm: service@1 { + compatible =3D "qcom,q6apm"; + reg =3D ; + #sound-dai-cells =3D <0>; + qcom,protection-domain =3D "avs/audio", + "msm/adsp/audio_pd"; + + q6apmbedai: bedais { + compatible =3D "qcom,q6apm-lpass-dais"; + #sound-dai-cells =3D <1>; + }; + + q6apmdai: dais { + compatible =3D "qcom,q6apm-dais"; + iommus =3D <&apps_smmu 0x1001 0x80>, + <&apps_smmu 0x1041 0x20>; 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Fri, 01 Nov 2024 10:19:27 -0700 (PDT) From: Krzysztof Kozlowski Date: Fri, 01 Nov 2024 18:19:12 +0100 Subject: [PATCH 2/4] arm64: dts: qcom: sm8750: Add LPASS macro codecs and pinctrl Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241101-sm8750-audio-v1-2-730aec176459@linaro.org> References: <20241101-sm8750-audio-v1-0-730aec176459@linaro.org> In-Reply-To: <20241101-sm8750-audio-v1-0-730aec176459@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Melody Olvera , Satya Durga Srinivasu Prabhala , Srinivas Kandagatla , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6665; i=krzysztof.kozlowski@linaro.org; h=from:subject:message-id; bh=v8N/E1MOA6ZgOQNnGcaGJb2KY2m9e/2WC35Ddu9CIss=; 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These are fully compatible with earlier SM8550. Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm8750.dtsi | 202 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 202 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qco= m/sm8750.dtsi index eb826b154dcb2d8165426ba2225548efd7547da8..bd50a78534a3182d102385f2cc4= 3a2688dd782cd 100644 --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi @@ -15,6 +15,7 @@ #include #include #include +#include =20 / { interrupt-parent =3D <&intc>; @@ -2002,6 +2003,207 @@ lpass_lpicx_noc: interconnect@7420000 { #interconnect-cells =3D <2>; }; =20 + lpass_wsa2macro: codec@6aa0000 { + compatible =3D "qcom,sm8750-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-ma= cro"; + reg =3D <0 0x06aa0000 0 0x1000>; + clocks =3D <&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE= _COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_vamacro>; + clock-names =3D "mclk", + "macro", + "dcodec", + "fsgen"; + + #clock-cells =3D <0>; + clock-output-names =3D "wsa2-mclk"; + #sound-dai-cells =3D <1>; + }; + + lpass_rxmacro: codec@6ac0000 { + compatible =3D "qcom,sm8750-lpass-rx-macro", "qcom,sm8550-lpass-rx-macr= o"; + reg =3D <0 0x06ac0000 0 0x1000>; + clocks =3D <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_C= OUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_vamacro>; + clock-names =3D "mclk", + "macro", + "dcodec", + "fsgen"; + + #clock-cells =3D <0>; + clock-output-names =3D "mclk"; + #sound-dai-cells =3D <1>; + }; + + lpass_txmacro: codec@6ae0000 { + compatible =3D "qcom,sm8750-lpass-tx-macro", "qcom,sm8550-lpass-tx-macr= o"; + reg =3D <0 0x06ae0000 0 0x1000>; + clocks =3D <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUP= LE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_vamacro>; + clock-names =3D "mclk", + "macro", + "dcodec", + "fsgen"; + + #clock-cells =3D <0>; + clock-output-names =3D "mclk"; + #sound-dai-cells =3D <1>; + }; + + lpass_wsamacro: codec@6b00000 { + compatible =3D "qcom,sm8750-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-ma= cro"; + reg =3D <0 0x06b00000 0 0x1000>; + clocks =3D <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_= COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_vamacro>; + clock-names =3D "mclk", + "macro", + "dcodec", + "fsgen"; + + #clock-cells =3D <0>; + clock-output-names =3D "mclk"; + #sound-dai-cells =3D <1>; + }; + + lpass_vamacro: codec@7660000 { + compatible =3D "qcom,sm8750-lpass-va-macro", "qcom,sm8550-lpass-va-macr= o"; + reg =3D <0 0x07660000 0 0x1000>; + clocks =3D <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUP= LE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names =3D "mclk", + "macro", + "dcodec"; + + #clock-cells =3D <0>; + clock-output-names =3D "fsgen"; + #sound-dai-cells =3D <1>; + }; + + lpass_tlmm: pinctrl@7760000 { + compatible =3D "qcom,sm8750-lpass-lpi-pinctrl", + "qcom,sm8650-lpass-lpi-pinctrl"; + reg =3D <0 0x07760000 0 0x20000>; + + clocks =3D <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names =3D "core", "audio"; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&lpass_tlmm 0 0 23>; + + tx_swr_active: tx-swr-active-state { + clk-pins { + pins =3D "gpio0"; + function =3D "swr_tx_clk"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; + }; + + data-pins { + pins =3D "gpio1", "gpio2", "gpio14"; + function =3D "swr_tx_data"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-bus-hold; + }; + }; + + rx_swr_active: rx-swr-active-state { + clk-pins { + pins =3D "gpio3"; + function =3D "swr_rx_clk"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; + }; + + data-pins { + pins =3D "gpio4", "gpio5"; + function =3D "swr_rx_data"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-bus-hold; + }; + }; + + dmic01_default: dmic01-default-state { + clk-pins { + pins =3D "gpio6"; + function =3D "dmic1_clk"; + drive-strength =3D <8>; + output-high; + }; + + data-pins { + pins =3D "gpio7"; + function =3D "dmic1_data"; + drive-strength =3D <8>; + input-enable; + }; + }; + + dmic23_default: dmic23-default-state { + clk-pins { + pins =3D "gpio8"; + function =3D "dmic2_clk"; + drive-strength =3D <8>; + output-high; + }; + + data-pins { + pins =3D "gpio9"; + function =3D "dmic2_data"; + drive-strength =3D <8>; + input-enable; + }; + }; + + wsa_swr_active: wsa-swr-active-state { + clk-pins { + pins =3D "gpio10"; + function =3D "wsa_swr_clk"; + drive-strength =3D <2>; + slew-rate =3D <1>; + bias-disable; + }; + + data-pins { + pins =3D "gpio11"; + function =3D "wsa_swr_data"; + drive-strength =3D <2>; + slew-rate =3D <1>; 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a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B Enable ADSP on MTP8750 board. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Melody Olvera --- Firmware release will follow up later. --- arch/arm64/boot/dts/qcom/sm8750-mtp.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8750-mtp.dts b/arch/arm64/boot/dts/= qcom/sm8750-mtp.dts index e1a94dc76e2f15463015ac971a93e702835baaec..eb3f5bf51f6fed73f3ba9f9dd20= ce6da2f9a8fe4 100644 --- a/arch/arm64/boot/dts/qcom/sm8750-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8750-mtp.dts @@ -865,6 +865,13 @@ &qupv3_1 { status =3D "okay"; }; =20 +&remoteproc_adsp { + firmware-name =3D "qcom/sm8750/adsp.mbn", + "qcom/sm8750/adsp_dtb.mbn"; + + status =3D "okay"; +}; + &spmi_bus { pm8550ve_d: pmic@3 { compatible =3D "qcom,pm8550ve", "qcom,spmi-pmic"; --=20 2.43.0 From nobody Sun Nov 24 21:03:27 2024 Received: from mail-wm1-f49.google.com (mail-wm1-f49.google.com [209.85.128.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A7A21CDFA9 for ; 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a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B Enable ADSP on QRD8750 board. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Melody Olvera --- Firmware release will follow up later. --- arch/arm64/boot/dts/qcom/sm8750-qrd.dts | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8750-qrd.dts b/arch/arm64/boot/dts/= qcom/sm8750-qrd.dts index af0174d95e3af641f7ca44fa4ef8643593859e9f..4a4c1ce09714bb99b8450f718e1= 6c882bdfc149b 100644 --- a/arch/arm64/boot/dts/qcom/sm8750-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8750-qrd.dts @@ -862,6 +862,13 @@ &qupv3_1 { status =3D "okay"; }; =20 +&remoteproc_adsp { + firmware-name =3D "qcom/sm8750/adsp.mbn", + "qcom/sm8750/adsp_dtb.mbn"; + + status =3D "okay"; +}; + &spmi_bus { pm8550ve_d: pmic@3 { compatible =3D "qcom,pm8550ve", "qcom,spmi-pmic"; --=20 2.43.0