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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241101-imx-emmc-reset-v3-2-184965eed476@solid-run.com> References: <20241101-imx-emmc-reset-v3-0-184965eed476@solid-run.com> In-Reply-To: <20241101-imx-emmc-reset-v3-0-184965eed476@solid-run.com> To: Adrian Hunter , Haibo Chen , Ulf Hansson , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam Cc: Mikhail Anikin , Jon Nettleton , Yazan Shhady , Rabeeh Khoury , imx@lists.linux.dev, linux-mmc@vger.kernel.org, s32@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Josua Mayer X-Mailer: b4 0.14.2 X-ClientProxiedBy: FR0P281CA0198.DEUP281.PROD.OUTLOOK.COM (2603:10a6:d10:ad::8) To AM9PR04MB7586.eurprd04.prod.outlook.com (2603:10a6:20b:2d5::17) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM9PR04MB7586:EE_|GVXPR04MB10519:EE_ X-MS-Office365-Filtering-Correlation-Id: c715eac6-49d5-42cb-6696-08dcfa6a4419 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|366016|52116014|1800799024|38350700014; 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Currently the driver accesses those bits by 32-bit write using SDHCI_TIMEOUT_CONTROL (0x2E) defined in drivers/mmc/host/sdhci.h. This is offset by two bytes relative to uSDHCx_SYS_CTRL (0x2C). The driver also defines ESDHC_SYS_CTRL_DTOCV_MASK as first 4 bits, which is correct relative to SDHCI_TIMEOUT_CONTROL but not relative to uSDHCx_SYS_CTRL. The definition carrying control register in its name is therefore inconsistent. Update the bitmask definition for bits 16-19 to be correct relative to control register base. Update the esdhc_set_timeout function to set timeout value at control register base, not timeout offset. This solves a purely cosmetic problem. Signed-off-by: Josua Mayer --- drivers/mmc/host/sdhci-esdhc-imx.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c b/drivers/mmc/host/sdhci-es= dhc-imx.c index f106e291c276d0c8063e9ac59a126acf5e9e239e..cda3cc4cc22cfa214369f40f097= ca50937898604 100644 --- a/drivers/mmc/host/sdhci-esdhc-imx.c +++ b/drivers/mmc/host/sdhci-esdhc-imx.c @@ -30,7 +30,7 @@ #include "sdhci-esdhc.h" #include "cqhci.h" =20 -#define ESDHC_SYS_CTRL_DTOCV_MASK 0x0f +#define ESDHC_SYS_CTRL_DTOCV_MASK GENMASK(19, 16) #define ESDHC_SYS_CTRL_IPP_RST_N BIT(23) #define ESDHC_CTRL_D3CD 0x08 #define ESDHC_BURST_LEN_EN_INCR (1 << 27) @@ -1386,8 +1386,8 @@ static void esdhc_set_timeout(struct sdhci_host *host= , struct mmc_command *cmd) =20 /* use maximum timeout counter */ esdhc_clrset_le(host, ESDHC_SYS_CTRL_DTOCV_MASK, - esdhc_is_usdhc(imx_data) ? 0xF : 0xE, - SDHCI_TIMEOUT_CONTROL); + esdhc_is_usdhc(imx_data) ? 0xF0000 : 0xE0000, + ESDHC_SYSTEM_CONTROL); } =20 static u32 esdhc_cqhci_irq(struct sdhci_host *host, u32 intmask) --=20 2.43.0