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AJvYcCVr+HU4mc+WPLwb5N2MyJY6DAkW1io1Bn9HrR/l++Ejcmb6oxdCDUBk6muWJYAx/ccmojO0bpIoCT+okoI=@vger.kernel.org X-Gm-Message-State: AOJu0YxeKxIfxfttqXpaZ1Ag/zbWQHU3cLt0B6YJMSG30+7LF267HFnW vmHmAK9XbIA3+OfgZT6Dt8oZZbzlGKe9MnO/e0U4V4kQRNXyddwI2nhb98P4Fys= X-Google-Smtp-Source: AGHT+IGXtCtOp+k+YpkFkrrnLo8FdCOGm8rJP9u1NXSvYnnTVw6wLqsMEn/qZwk48etVCRMN23bvZg== X-Received: by 2002:a05:6000:1a85:b0:37d:4125:5cba with SMTP id ffacd0b85a97d-381be7d8c46mr2818779f8f.32.1730386840477; Thu, 31 Oct 2024 08:00:40 -0700 (PDT) Received: from gpeter-l.lan ([145.224.65.232]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-431bd8e8524sm59163225e9.5.2024.10.31.08.00.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 31 Oct 2024 08:00:40 -0700 (PDT) From: Peter Griffin To: alim.akhtar@samsung.com, James.Bottomley@HansenPartnership.com, martin.petersen@oracle.com, avri.altman@wdc.com, bvanassche@acm.org, krzk@kernel.org Cc: tudor.ambarus@linaro.org, ebiggers@kernel.org, andre.draszik@linaro.org, kernel-team@android.com, willmcvicker@google.com, linux-scsi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Peter Griffin Subject: [PATCH v3 03/14] scsi: ufs: exynos: Allow UFS Gear 4 Date: Thu, 31 Oct 2024 15:00:22 +0000 Message-ID: <20241031150033.3440894-4-peter.griffin@linaro.org> X-Mailer: git-send-email 2.47.0.163.g1226f6d8fa-goog In-Reply-To: <20241031150033.3440894-1-peter.griffin@linaro.org> References: <20241031150033.3440894-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" UFS Gear 4 offers faster speeds, and better power usage so lets enable it. Currently ufshcd_init_host_params() sets UFS_HS_G3 as a default, so even if the device supports G4 we end up negotiating down to G3. For SoCs like gs101 which have a UFS major controller version of 3 or above advertise Gear 4. This then allows a Gear 4 link on Pixel 6. For earlier controller versions keep the current default behaviour of reporting G3. Signed-off-by: Peter Griffin Reviewed-by: Tudor Ambarus --- v3: Added blank line and split hs_tx_gear/hs_rx_gear into separate lines (T= udor) --- drivers/ufs/host/ufs-exynos.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c index 7e381ab1011d..33de7ff747a2 100644 --- a/drivers/ufs/host/ufs-exynos.c +++ b/drivers/ufs/host/ufs-exynos.c @@ -766,6 +766,21 @@ static void exynos_ufs_config_sync_pattern_mask(struct= exynos_ufs *ufs, exynos_ufs_disable_ov_tm(hba); } =20 +#define UFS_HW_VER_MAJOR_MASK GENMASK(15, 8) + +static u32 exynos_ufs_get_hs_gear(struct ufs_hba *hba) +{ + u8 major; + + major =3D FIELD_GET(UFS_HW_VER_MAJOR_MASK, hba->ufs_version); + + if (major >=3D 3) + return UFS_HS_G4; + + /* Default is HS-G3 */ + return UFS_HS_G3; +} + static int exynos_ufs_pre_pwr_mode(struct ufs_hba *hba, struct ufs_pa_layer_attr *dev_max_params, struct ufs_pa_layer_attr *dev_req_params) @@ -783,6 +798,10 @@ static int exynos_ufs_pre_pwr_mode(struct ufs_hba *hba, =20 ufshcd_init_host_params(&host_params); =20 + /* This driver only support symmetric gear setting e.g. hs_tx_gear =3D=3D= hs_rx_gear */ + host_params.hs_tx_gear =3D exynos_ufs_get_hs_gear(hba); + host_params.hs_rx_gear =3D exynos_ufs_get_hs_gear(hba); + ret =3D ufshcd_negotiate_pwr_params(&host_params, dev_max_params, dev_req= _params); if (ret) { pr_err("%s: failed to determine capabilities\n", __func__); --=20 2.47.0.163.g1226f6d8fa-goog