From nobody Mon Nov 25 02:38:41 2024 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 014A71494C2; Thu, 31 Oct 2024 07:03:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358216; cv=none; b=G2DY7b+G2+KUkcFyPvY0/hcpQFfU+QHUW2vSceOVTTEr0Aqsau752vQKuZ4H5GtlQycX7xbpcjcP+cUPINjbSBL1ipkpKHEDqDiwuqAIuNd/432syGN0FlYO85UD+wI0IlyCENOFcOL9AZDK7okCtTCWI1rSVEs/norFUcc7uQk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358216; c=relaxed/simple; bh=1OQWx5uYO8EJHKfcyGOPfGCXqtiWXYbt1piaX/STHZw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=r0D4fUIB3WctDU7D4YWy8MQHyqA/85rkVmFMLj4c7H41HeWIayFz3sEBEewAkb16BAVK5EfwZHzDzX4vXES9voKSVeZ4o3eFsnoopuGz3aDaMepMHOwztnAlORFbwPHwPmK4E6a8BvKahbjv1VOiEC//zVR7sgS28BC/0FMo4Xw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=OYTaetbe; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="OYTaetbe" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1730358204; bh=1OQWx5uYO8EJHKfcyGOPfGCXqtiWXYbt1piaX/STHZw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OYTaetbeEig5TT5of1zJgv0vdGR0n+awumN4CLETaQCCBaYqFQkGmlT/pxB4ipGUB 6OKPB2UeNMBFDhgJObCm32PTvWEyFLnrW4Er80hMJAm3jlLKE92pqJw0zREDeSULM+ NaOn1yq44X/utENedbFSmXpVAJY7Ciu4nL8sNBbK/MYebn1dV287JyLo28eUvlZBDk kVqAuiy4nL08HOe8W/VBNB7wxY2LFtivDhuYgkP+bh/pQb+xjZIaFsWmOD8/KNijf/ k7eEtO2hlaVIPqn80XYC7jhB+NusdkPPbjJU92l6vS3ZF5XOZZ6tnWqbBDU+4QMSUA 5TWEmBEZPGq6g== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Greg Kroah-Hartman , Kishon Vijay Abraham I , Maxime Ripard , Michael Turquette , Nishanth Menon , "Rafael J. Wysocki" , Stephen Boyd , Vinod Koul , Viresh Kumar , Viresh Kumar , Yangtao Li , Parthiban , Andre Przywara , Cody Eksal , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 06/13] arm64: dts: allwinner: a100: add usb related nodes Date: Thu, 31 Oct 2024 04:02:19 -0300 Message-ID: <20241031070232.1793078-7-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> References: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Yangtao Li The Allwinner A100 has two HCI USB controllers, a OTG controller and a USB PHY. The PHY is compatible with that used by the D1, while the OTG controller is compatible with the A33. Add nodes for these to the base DTSI. Signed-off-by: Yangtao Li [masterr3c0rd@epochal.quest: fallback to a33-musb and d1-usb-phy, edited me= ssage] Signed-off-by: Cody Eksal Reviewed-by: Andre Przywara Tested-by: Parthiban Nallathambi --- Changes in V2: - Fix sizes of reg definitions in usbphy - Move #phy-cells to the end of usbphy - Order nodes by MMIO address - Remove dr_mode .../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 91 +++++++++++++++++++ 1 file changed, 91 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun50i-a100.dtsi index adb11b26045f..f6162a107641 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -302,6 +302,97 @@ ths: thermal-sensor@5070400 { #thermal-sensor-cells =3D <1>; }; =20 + usb_otg: usb@5100000 { + compatible =3D "allwinner,sun50i-a100-musb", + "allwinner,sun8i-a33-musb"; + reg =3D <0x05100000 0x0400>; + clocks =3D <&ccu CLK_BUS_OTG>; + resets =3D <&ccu RST_BUS_OTG>; + interrupts =3D ; + interrupt-names =3D "mc"; + phys =3D <&usbphy 0>; + phy-names =3D "usb"; + extcon =3D <&usbphy 0>; + status =3D "disabled"; + }; + + usbphy: phy@5100400 { + compatible =3D "allwinner,sun50i-a100-usb-phy", + "allwinner,sun20i-d1-usb-phy"; + reg =3D <0x05100400 0x100>, + <0x05101800 0x100>, + <0x05200800 0x100>; + reg-names =3D "phy_ctrl", + "pmu0", + "pmu1"; + clocks =3D <&ccu CLK_USB_PHY0>, + <&ccu CLK_USB_PHY1>; + clock-names =3D "usb0_phy", + "usb1_phy"; + resets =3D <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>; + reset-names =3D "usb0_reset", + "usb1_reset"; + status =3D "disabled"; + #phy-cells =3D <1>; + }; + + ehci0: usb@5101000 { + compatible =3D "allwinner,sun50i-a100-ehci", + "generic-ehci"; + reg =3D <0x05101000 0x100>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_BUS_EHCI0>, + <&ccu CLK_USB_OHCI0>; + resets =3D <&ccu RST_BUS_OHCI0>, + <&ccu RST_BUS_EHCI0>; + phys =3D <&usbphy 0>; + phy-names =3D "usb"; + status =3D "disabled"; + }; + + ohci0: usb@5101400 { + compatible =3D "allwinner,sun50i-a100-ohci", + "generic-ohci"; + reg =3D <0x05101400 0x100>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets =3D <&ccu RST_BUS_OHCI0>; + phys =3D <&usbphy 0>; + phy-names =3D "usb"; + status =3D "disabled"; + }; + + ehci1: usb@5200000 { + compatible =3D "allwinner,sun50i-a100-ehci", + "generic-ehci"; + reg =3D <0x05200000 0x100>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_BUS_EHCI1>, + <&ccu CLK_USB_OHCI1>; + resets =3D <&ccu RST_BUS_OHCI1>, + <&ccu RST_BUS_EHCI1>; + phys =3D <&usbphy 1>; + phy-names =3D "usb"; + status =3D "disabled"; + }; + + ohci1: usb@5200400 { + compatible =3D "allwinner,sun50i-a100-ohci", + "generic-ohci"; + reg =3D <0x05200400 0x100>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_USB_OHCI1>; + resets =3D <&ccu RST_BUS_OHCI1>; + phys =3D <&usbphy 1>; + phy-names =3D "usb"; + status =3D "disabled"; + }; + r_ccu: clock@7010000 { compatible =3D "allwinner,sun50i-a100-r-ccu"; reg =3D <0x07010000 0x300>; --=20 2.47.0