From nobody Mon Nov 25 00:45:25 2024 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD56E1487E1; Thu, 31 Oct 2024 07:03:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358212; cv=none; b=ZnysZzvMSxot4YbgeQM71sKYsWiDETkzvKgXuSf9PvU7zUR1YGyWzgBVeCZsZvg0b3meeyM8ew/NBYVOoEc+rt0Z0sn+YJ8x8I5i0+Y77q2qhsOnsld/Ax5zwnNC75YHhBd2ooc78L0ByL1JKOqVPgGptAaxA6Wog8SqAGb+hv4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358212; c=relaxed/simple; bh=8tBNvio1ObQTdhVztprL74DuHbZpuJ/042vXRGsdyBc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ABLu7OF1AjDa31rYEiqHQBZ5Cv7YQ13GbuJaoqCDUK+2eLlWIQpOPM+GA2/wzhaN4/efyTFmopllb2Uh9tiHNdF/2YFMLVmjHneTwKKy6+nQ/opkR8XDrzioEyEo/ovOP7rGFIy3dvVMi3Qtv0bqLlysqSN9lpNQLS0S1WptR2E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=TjTf16nc; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="TjTf16nc" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1730358202; bh=8tBNvio1ObQTdhVztprL74DuHbZpuJ/042vXRGsdyBc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TjTf16nc8iYEMJyvbicHtqGQ97fTYI9rGJAh82SXsh/2rRoxAGl/64f37MmbCx46i L01LMA40RpHP8RO92/LweHSLTvvVvoO19GWwvh+qjjtXGbpmwSbhlsvx9eecKq1QBD EcXLUnmzOfNc1IoGx5LfPdscA31PMh5U7yfZL1/OZMvMOZnLbMMkHTOL1owa2IiHPF byDAEWSUEkU7OeB7s4b4dS6JZPHjDbj2ivtEc9seMedSh9iDYdFfn9NQM3iIm33Qvq 8OL8ODYQsYMyVgAecCgU9+FQjkYzFR4TckVeeAnxHW8I8i2JyUzL/euI38l/UtvwTA ehCEzzGY1SlAg== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Greg Kroah-Hartman , Kishon Vijay Abraham I , Maxime Ripard , Michael Turquette , Nishanth Menon , "Rafael J. Wysocki" , Stephen Boyd , Vinod Koul , Viresh Kumar , Viresh Kumar , Yangtao Li , Parthiban , Andre Przywara , Cody Eksal , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 01/13] arm64: dts: allwinner: A100: Add PMU mode Date: Thu, 31 Oct 2024 04:02:14 -0300 Message-ID: <20241031070232.1793078-2-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> References: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Yangtao Li Add the Performance Monitoring Unit (PMU) device tree node to the A100 .dtsi, which tells DT users which interrupts are triggered by PMU overflow events on each core. Signed-off-by: Yangtao Li Reviewed-by: Andre Przywara Signed-off-by: Cody Eksal --- arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun50i-a100.dtsi index a3dccf193765..1eca7c220ede 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -25,21 +25,21 @@ cpu0: cpu@0 { enable-method =3D "psci"; }; =20 - cpu@1 { + cpu1: cpu@1 { compatible =3D "arm,cortex-a53"; device_type =3D "cpu"; reg =3D <0x1>; enable-method =3D "psci"; }; =20 - cpu@2 { + cpu2: cpu@2 { compatible =3D "arm,cortex-a53"; device_type =3D "cpu"; reg =3D <0x2>; enable-method =3D "psci"; }; =20 - cpu@3 { + cpu3: cpu@3 { compatible =3D "arm,cortex-a53"; device_type =3D "cpu"; reg =3D <0x3>; @@ -47,6 +47,15 @@ cpu@3 { }; }; =20 + pmu { + compatible =3D "arm,cortex-a53-pmu"; + interrupts =3D , + , + , + ; + interrupt-affinity =3D <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + psci { compatible =3D "arm,psci-1.0"; method =3D "smc"; --=20 2.47.0 From nobody Mon Nov 25 00:45:25 2024 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD4C91487DC; Thu, 31 Oct 2024 07:03:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358212; cv=none; b=JfTFPUKd8P7+xhDCSucuKd9rNIwushmnH0xWamaKrKDcxBHbYEtzwjR+pv25jNvDQKg1tzWw2RV6dLFOZ1Zgv3Q+iS1GG8ZmeZEOqfh8NWOUjHxTw1j85Ia85M9MuX50NXczgYgt9D33du900vSrZRANhCwCv4KmW1djy17w8A8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358212; c=relaxed/simple; bh=c6mAFMfMnzUCM/bRTvKysE72zxNJKIHReq/xcIwXjco=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=q9FxqbanQbpIhLbmISuqCsftbqIm1c8y55qbUn71D3obTiDGOtSDB6bChm+TQUbBoDWEDF9oIaXeBhck/VMVJupEU8aKm3ZAtyKBDCrMIdbaKlzx96d+UX6Py2GiCKzZIsPtIcxS5s2JIy5k8ZYAC0IgX8eTB2+mMMKazrCigng= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=KoXk0zKg; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="KoXk0zKg" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1730358202; bh=c6mAFMfMnzUCM/bRTvKysE72zxNJKIHReq/xcIwXjco=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KoXk0zKgSRD6rk7O1qpLi4KfKia0zDyEIgURK//B54b1dkGB4gPm864D9daazG6TL H1YvKFix+yllhhFpcsmA19NadDcIvWb3WNei0P8mj3LkEZL+L6ugI9YJAeFy26SCaH 5EjJ2Gu2NHYpQVvlzI/QPXNhFCTEdxM41HoNyP9ViLCsuPTAT/gf6EKRnn4iRyVyw+ rJjB9hwO0h3X094JLD1xlsuCv333sp3LOeGNGAT74lFbEPK3EZbbTai2VvrlpE6ijK 7DUOsqI+MEFb73MPTW/MOvMW1vpLNHMNSnU3OL2kXvZyZNtWVEctEWCcy1jx9Z16SO pEf02r4JButVA== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Greg Kroah-Hartman , Kishon Vijay Abraham I , Maxime Ripard , Michael Turquette , Nishanth Menon , "Rafael J. Wysocki" , Stephen Boyd , Vinod Koul , Viresh Kumar , Viresh Kumar , Yangtao Li , Parthiban , Andre Przywara , Cody Eksal , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 02/13] arm64: dts: allwinner: a100: add watchdog node Date: Thu, 31 Oct 2024 04:02:15 -0300 Message-ID: <20241031070232.1793078-3-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> References: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Yangtao Li Declare A100's watchdog in the device-tree. Signed-off-by: Yangtao Li Reviewed-by: Andre Przywara Signed-off-by: Cody Eksal Tested-by: Parthiban Nallathambi --- arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun50i-a100.dtsi index 1eca7c220ede..adb11b26045f 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -144,6 +144,14 @@ ths_calibration: calib@14 { }; }; =20 + watchdog@30090a0 { + compatible =3D "allwinner,sun50i-a100-wdt", + "allwinner,sun6i-a31-wdt"; + reg =3D <0x030090a0 0x20>; + interrupts =3D ; + clocks =3D <&dcxo24M>; + }; + pio: pinctrl@300b000 { compatible =3D "allwinner,sun50i-a100-pinctrl"; reg =3D <0x0300b000 0x400>; --=20 2.47.0 From nobody Mon Nov 25 00:45:25 2024 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD44D148318; Thu, 31 Oct 2024 07:03:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358212; cv=none; b=NUiOUqaDJLeTvCrhyjfIKNJ/7/ZURDsRDU8yTTnZYh7UfyKNA8z0h5NY81Cu8df0c9dI/6teRc/PaF5EhPhOT8FqnTMecG0roWDnOwojRdmnP1OCxdcArh5BTSJ4PWtysMeDe47z1PmDBJz02Aul7NKZtclBYHeLtfPLjQLuZ7E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358212; c=relaxed/simple; bh=Os/2HAMdT7ukejERWbP8Yp9xeT6KhRyx6c3PHQ0aWEI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kbH+8Z4BWugGQGkmK6vnrtvO7gica/sEK8wa2p2LIJ2xTGboGDdgFPNIp8ciZWp757sQrx9P285+SpOFFgr+igKv9SIaCPCg1CbK2NJtxWgkDci3+j+HFPhfi5Dx+V8vARzzRl5JSM6U/NA33ylhHuqA99grwnTAok1HOnw3ros= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=gFcok4re; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="gFcok4re" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1730358202; bh=Os/2HAMdT7ukejERWbP8Yp9xeT6KhRyx6c3PHQ0aWEI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gFcok4reqrQOlsc4g8NJc8TQjsUCpiSjgreTa+ZqAuh+0YrcGbuXQKhT3igIykUz0 Eyaa7RaLFbO0d3M+cyLw0koMvJB65WLf7zAAvvn9na/OckpChpJ+yOT5jPyZtL81V3 6QCSsmeaxE3NGWGBTWEFz58w0JZ4oA8D/I6FVgL8fUuCDC7WuCwq2NNj1lQVcQWTa1 B7GD6TnS7r9rR1d0QZpjI+WHNZ9zqPDWo/lXTdQqqNUpsRZZnu5R3vRhAEPt8PceTi zwPr9MSiYwBDoKZcXhm2geD6AYvXk67+k6b48fNrlTmFnRMgziER6z8+Q6qFzwpae8 UtXapdSmZABlA== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard Cc: Greg Kroah-Hartman , Michael Turquette , Nishanth Menon , "Rafael J. Wysocki" , Stephen Boyd , Viresh Kumar , Viresh Kumar , Yangtao Li , Parthiban , Andre Przywara , Cody Eksal , linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 03/13] dt-bindings: phy: sun50i-a64: add a100 compatible Date: Thu, 31 Oct 2024 04:02:16 -0300 Message-ID: <20241031070232.1793078-4-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> References: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The USB PHY found in the A100 is similar to that found in the D1. Add a compatible for the A100. Signed-off-by: Cody Eksal Acked-by: Rob Herring (Arm) Reviewed-by: Andre Przywara --- Changes in V2: - Update binding to allow using the D1 as a compatible. .../bindings/phy/allwinner,sun50i-a64-usb-phy.yaml | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb= -phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-= phy.yaml index f557feca9763..21209126ed00 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.ya= ml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.ya= ml @@ -15,9 +15,13 @@ properties: const: 1 =20 compatible: - enum: - - allwinner,sun20i-d1-usb-phy - - allwinner,sun50i-a64-usb-phy + oneOf: + - enum: + - allwinner,sun20i-d1-usb-phy + - allwinner,sun50i-a64-usb-phy + - items: + - const: allwinner,sun50i-a100-usb-phy + - const: allwinner,sun20i-d1-usb-phy =20 reg: items: --=20 2.47.0 From nobody Mon Nov 25 00:45:25 2024 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 174991474BF; Thu, 31 Oct 2024 07:03:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358213; cv=none; b=AYYQ+2HgGRng8fClB58osF9N72Y1pHCVhQj434zi1BN8GvONI2scPaZ6qAsdYo2sh7fEIsjObNKN/6V+829aZ/lbvXm09/o6ELBlZLTB90+C/dZJFF0IN6MfubiN9jyLknoi5X/R0xre9YhF16zpgLgaELRMYJ8FEL3IfunAitw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358213; c=relaxed/simple; bh=gCXgoaBUYXSYReLJKteTd41Q6MEmZ2zAzNHvT0JUlFc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=g/gPfTHeK5cs/Vq5V//Yq0mHeFa7DFqrG/g5YpBafUInp/G3SWX6nMmuT92nlCg89WJ9NERI1e1c+pr7yFsYItE6JB5cDVHyTFPkqN06nAKAmNouaYlvjs6f4QgeLU8uW5rJCDCLunymSrupnW+apjiGWeAVS4J1Ypx2VHJv8sw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=GFS4Qz3u; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="GFS4Qz3u" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1730358203; bh=gCXgoaBUYXSYReLJKteTd41Q6MEmZ2zAzNHvT0JUlFc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GFS4Qz3uSMolkFeoX0DkhKFzigFLUToTR8Nw0N7Sk1gGC/twb9fAKdkvXJJUmC7mM piBHbbOs44+xzCPYk1lAPrArwuL6se5v9eooujbWQP0Q0wlEVeo6+Txc9j48dUpG8T q1fWdAnRonwczDTkjF9JMD8mjljnormo2VMNt1cSyMavk6IbGAYxsIJTXBWJik2IoF rsfJnrRzRTcC6oQH4OfuwRZTo2ozKQ6kGVDE+GdYPSpeGs5PIDZdX1ZBljyGihnrq3 oLLVD+Opy60v2BJ46FqiJgMIEtRZ1uGfLdITm6oJjAylh2vtywqVjArrfv0Dau9iTs OshsieeaZ0T6A== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Chen-Yu Tsai , Jernej Skrabec , Kishon Vijay Abraham I , Maxime Ripard , Michael Turquette , Nishanth Menon , "Rafael J. Wysocki" , Samuel Holland , Stephen Boyd , Vinod Koul , Viresh Kumar , Viresh Kumar , Yangtao Li , Parthiban , Andre Przywara , Cody Eksal , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 04/13] dt-bindings: usb: Add A100 compatible string Date: Thu, 31 Oct 2024 04:02:17 -0300 Message-ID: <20241031070232.1793078-5-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> References: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The Allwinner A100 contains two fully OHCI/EHCI compatible USB host controllers. Add their compatible strings to the list of generic OHCI/EHCI controllers. Signed-off-by: Cody Eksal Reviewed-by: Andre Przywara Acked-by: Rob Herring (Arm) --- Changes in V2: - Fix ordering of compatibles Documentation/devicetree/bindings/usb/generic-ehci.yaml | 1 + Documentation/devicetree/bindings/usb/generic-ohci.yaml | 1 + 2 files changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Docu= mentation/devicetree/bindings/usb/generic-ehci.yaml index 2ed178f16a78..0d797e01fc0b 100644 --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml @@ -28,6 +28,7 @@ properties: - items: - enum: - allwinner,sun4i-a10-ehci + - allwinner,sun50i-a100-ehci - allwinner,sun50i-a64-ehci - allwinner,sun50i-h6-ehci - allwinner,sun50i-h616-ehci diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Docu= mentation/devicetree/bindings/usb/generic-ohci.yaml index b9576015736b..cf33764553fa 100644 --- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml @@ -15,6 +15,7 @@ properties: - items: - enum: - allwinner,sun4i-a10-ohci + - allwinner,sun50i-a100-ohci - allwinner,sun50i-a64-ohci - allwinner,sun50i-h6-ohci - allwinner,sun50i-h616-ohci --=20 2.47.0 From nobody Mon Nov 25 00:45:26 2024 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C8FCE149005; Thu, 31 Oct 2024 07:03:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358213; cv=none; b=I9GCQqSdAolnVWL+QwQd2vgCaR9NdR1Z9FFPcpALh5uNfuRtr+r1VrcLi+M8nE4/KrCB7KgQyEaFw+66aBxFw+YrDL19heW3jrPhUqw2gjqxzO2T3U9ZrMr+rKooiJbLTdQhtF5IJTKUpb3b1LDMgXN9lXoiDcgEv619YY0XzCc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358213; c=relaxed/simple; bh=0LhzF1eZO0izMe91R4cLDD2hqekd2yJ78S0js9TCEkc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kTkACAwvKirejqkX+xolQEYMT5D8Oab1WCIPFEqc2Nia4TdUXA0/VAWEK0m1GOtDK09wMpsv9kjFSCkvJWJa/CzW/pk1itfg0YS7+AOISeo4fB9G5eiAWX0yxk3iPkOwWo7rfRxXE+kFNQi6B8g7i6LbkFqm3l2WVxeRub/52s4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=GSHrLcIQ; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="GSHrLcIQ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1730358203; bh=0LhzF1eZO0izMe91R4cLDD2hqekd2yJ78S0js9TCEkc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GSHrLcIQavfOu5jndVUyp3moeN2WNYQqwpv6lKrnz0BCVLQCf1F7FCCatCJEZ3RRW qSeAFYcOuccXSwLFJYWeB7B6RzKPf0L1bbAULmlx1rTHpemWzpmF1dtz86hmpKua0h ZOacpnND60l/ExC0WrTkeoTrrBuuBn1q8db0/4qqGI9C5/0I0tBu0vnXvGvbEUHWe3 RXpbCgrbniolgdQD09krx3sSfMLEsbohaswtDK4mqOjDSjDFCeqgvGCJ8aXrEPTuf3 yI28ILLij8e4jrBbjfQuy5nD92jwtpJ+Hn0Q+vat2z1cbtGgJ8YRCjXB70vjyKpeRl Doh8eG5HYQBzg== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard Cc: Kishon Vijay Abraham I , Michael Turquette , Nishanth Menon , "Rafael J. Wysocki" , Stephen Boyd , Vinod Koul , Viresh Kumar , Viresh Kumar , Yangtao Li , Parthiban , Andre Przywara , Cody Eksal , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 05/13] dt-bindings: usb: sunxi-musb: Add A100 compatible string Date: Thu, 31 Oct 2024 04:02:18 -0300 Message-ID: <20241031070232.1793078-6-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> References: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The A100 MUSB peripheral has 10 endpoints, and thus is compatible with the A33 version. Signed-off-by: Cody Eksal Acked-by: Krzysztof Kozlowski --- Changes in V2: - Fix ordering of compatibles .../devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb= .yaml b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml index f972ce976e86..bb5010dcefe1 100644 --- a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml +++ b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml @@ -23,6 +23,7 @@ properties: - enum: - allwinner,sun8i-a83t-musb - allwinner,sun20i-d1-musb + - allwinner,sun50i-a100-musb - allwinner,sun50i-h6-musb - const: allwinner,sun8i-a33-musb - items: --=20 2.47.0 From nobody Mon Nov 25 00:45:26 2024 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 014A71494C2; Thu, 31 Oct 2024 07:03:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358216; cv=none; b=G2DY7b+G2+KUkcFyPvY0/hcpQFfU+QHUW2vSceOVTTEr0Aqsau752vQKuZ4H5GtlQycX7xbpcjcP+cUPINjbSBL1ipkpKHEDqDiwuqAIuNd/432syGN0FlYO85UD+wI0IlyCENOFcOL9AZDK7okCtTCWI1rSVEs/norFUcc7uQk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358216; c=relaxed/simple; bh=1OQWx5uYO8EJHKfcyGOPfGCXqtiWXYbt1piaX/STHZw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=r0D4fUIB3WctDU7D4YWy8MQHyqA/85rkVmFMLj4c7H41HeWIayFz3sEBEewAkb16BAVK5EfwZHzDzX4vXES9voKSVeZ4o3eFsnoopuGz3aDaMepMHOwztnAlORFbwPHwPmK4E6a8BvKahbjv1VOiEC//zVR7sgS28BC/0FMo4Xw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=OYTaetbe; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="OYTaetbe" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1730358204; bh=1OQWx5uYO8EJHKfcyGOPfGCXqtiWXYbt1piaX/STHZw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OYTaetbeEig5TT5of1zJgv0vdGR0n+awumN4CLETaQCCBaYqFQkGmlT/pxB4ipGUB 6OKPB2UeNMBFDhgJObCm32PTvWEyFLnrW4Er80hMJAm3jlLKE92pqJw0zREDeSULM+ NaOn1yq44X/utENedbFSmXpVAJY7Ciu4nL8sNBbK/MYebn1dV287JyLo28eUvlZBDk kVqAuiy4nL08HOe8W/VBNB7wxY2LFtivDhuYgkP+bh/pQb+xjZIaFsWmOD8/KNijf/ k7eEtO2hlaVIPqn80XYC7jhB+NusdkPPbjJU92l6vS3ZF5XOZZ6tnWqbBDU+4QMSUA 5TWEmBEZPGq6g== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Greg Kroah-Hartman , Kishon Vijay Abraham I , Maxime Ripard , Michael Turquette , Nishanth Menon , "Rafael J. Wysocki" , Stephen Boyd , Vinod Koul , Viresh Kumar , Viresh Kumar , Yangtao Li , Parthiban , Andre Przywara , Cody Eksal , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 06/13] arm64: dts: allwinner: a100: add usb related nodes Date: Thu, 31 Oct 2024 04:02:19 -0300 Message-ID: <20241031070232.1793078-7-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> References: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Yangtao Li The Allwinner A100 has two HCI USB controllers, a OTG controller and a USB PHY. The PHY is compatible with that used by the D1, while the OTG controller is compatible with the A33. Add nodes for these to the base DTSI. Signed-off-by: Yangtao Li [masterr3c0rd@epochal.quest: fallback to a33-musb and d1-usb-phy, edited me= ssage] Signed-off-by: Cody Eksal Reviewed-by: Andre Przywara Tested-by: Parthiban Nallathambi --- Changes in V2: - Fix sizes of reg definitions in usbphy - Move #phy-cells to the end of usbphy - Order nodes by MMIO address - Remove dr_mode .../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 91 +++++++++++++++++++ 1 file changed, 91 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun50i-a100.dtsi index adb11b26045f..f6162a107641 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -302,6 +302,97 @@ ths: thermal-sensor@5070400 { #thermal-sensor-cells =3D <1>; }; =20 + usb_otg: usb@5100000 { + compatible =3D "allwinner,sun50i-a100-musb", + "allwinner,sun8i-a33-musb"; + reg =3D <0x05100000 0x0400>; + clocks =3D <&ccu CLK_BUS_OTG>; + resets =3D <&ccu RST_BUS_OTG>; + interrupts =3D ; + interrupt-names =3D "mc"; + phys =3D <&usbphy 0>; + phy-names =3D "usb"; + extcon =3D <&usbphy 0>; + status =3D "disabled"; + }; + + usbphy: phy@5100400 { + compatible =3D "allwinner,sun50i-a100-usb-phy", + "allwinner,sun20i-d1-usb-phy"; + reg =3D <0x05100400 0x100>, + <0x05101800 0x100>, + <0x05200800 0x100>; + reg-names =3D "phy_ctrl", + "pmu0", + "pmu1"; + clocks =3D <&ccu CLK_USB_PHY0>, + <&ccu CLK_USB_PHY1>; + clock-names =3D "usb0_phy", + "usb1_phy"; + resets =3D <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>; + reset-names =3D "usb0_reset", + "usb1_reset"; + status =3D "disabled"; + #phy-cells =3D <1>; + }; + + ehci0: usb@5101000 { + compatible =3D "allwinner,sun50i-a100-ehci", + "generic-ehci"; + reg =3D <0x05101000 0x100>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_BUS_EHCI0>, + <&ccu CLK_USB_OHCI0>; + resets =3D <&ccu RST_BUS_OHCI0>, + <&ccu RST_BUS_EHCI0>; + phys =3D <&usbphy 0>; + phy-names =3D "usb"; + status =3D "disabled"; + }; + + ohci0: usb@5101400 { + compatible =3D "allwinner,sun50i-a100-ohci", + "generic-ohci"; + reg =3D <0x05101400 0x100>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets =3D <&ccu RST_BUS_OHCI0>; + phys =3D <&usbphy 0>; + phy-names =3D "usb"; + status =3D "disabled"; + }; + + ehci1: usb@5200000 { + compatible =3D "allwinner,sun50i-a100-ehci", + "generic-ehci"; + reg =3D <0x05200000 0x100>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_BUS_EHCI1>, + <&ccu CLK_USB_OHCI1>; + resets =3D <&ccu RST_BUS_OHCI1>, + <&ccu RST_BUS_EHCI1>; + phys =3D <&usbphy 1>; + phy-names =3D "usb"; + status =3D "disabled"; + }; + + ohci1: usb@5200400 { + compatible =3D "allwinner,sun50i-a100-ohci", + "generic-ohci"; + reg =3D <0x05200400 0x100>; + interrupts =3D ; + clocks =3D <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_USB_OHCI1>; + resets =3D <&ccu RST_BUS_OHCI1>; + phys =3D <&usbphy 1>; + phy-names =3D "usb"; + status =3D "disabled"; + }; + r_ccu: clock@7010000 { compatible =3D "allwinner,sun50i-a100-r-ccu"; reg =3D <0x07010000 0x300>; --=20 2.47.0 From nobody Mon Nov 25 00:45:26 2024 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0FAED14A619; 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Wysocki" , Stephen Boyd , Vinod Koul , Viresh Kumar , Viresh Kumar , Yangtao Li , Parthiban , Andre Przywara , Cody Eksal , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 07/13] arm64: allwinner: A100: enable EHCI, OHCI and USB PHY nodes in Perf1 Date: Thu, 31 Oct 2024 04:02:20 -0300 Message-ID: <20241031070232.1793078-8-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> References: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Yangtao Li Add USB support on A100 perf1 board, which include two USB2.0 port. Signed-off-by: Yangtao Li Signed-off-by: Cody Eksal --- Changes in V2: - Add dr_mode here, instead of in the .dtsi .../allwinner/sun50i-a100-allwinner-perf1.dts | 39 +++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts = b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts index f5c5c1464482..2f8c7ee60283 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts @@ -7,6 +7,8 @@ =20 #include "sun50i-a100.dtsi" =20 +#include + /{ model =3D "Allwinner A100 Perf1"; compatible =3D "allwinner,a100-perf1", "allwinner,sun50i-a100"; @@ -18,6 +20,36 @@ aliases { chosen { stdout-path =3D "serial0:115200n8"; }; + + reg_usb1_vbus: usb1-vbus { + compatible =3D "regulator-fixed"; + regulator-name =3D "usb1-vbus"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + gpio =3D <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ + enable-active-high; + }; +}; + +&ehci0 { + status =3D "okay"; +}; + +&ehci1 { + status =3D "okay"; +}; + +&ohci0 { + status =3D "okay"; +}; + +&ohci1 { + status =3D "okay"; +}; + +&usb_otg { + dr_mode =3D "otg"; + status =3D "okay"; }; =20 &pio { @@ -178,3 +210,10 @@ &uart0 { pinctrl-0 =3D <&uart0_pb_pins>; status =3D "okay"; }; + +&usbphy { + usb0_id_det-gpios =3D <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ + usb0_vbus-supply =3D <®_drivevbus>; + usb1_vbus-supply =3D <®_usb1_vbus>; + status =3D "okay"; +}; --=20 2.47.0 From nobody Mon Nov 25 00:45:26 2024 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3177F14AD02; Thu, 31 Oct 2024 07:03:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358215; cv=none; b=Ys5K08I0+m+Mo5ZGM+iE394SHhHNqiU4mNG7yaF0PsNNUUrq9dowDMqSWB2x/6bjAjCQikYAwFR8Qdo/k2t3JUr2Yz83MWBnoyQPBv6kfTt6A++pvYhypT6GCYKtYy4AjJPx4NdwGxEQ7TyC5vAIHyNsvwOwAff20sM4ej98ujw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358215; c=relaxed/simple; bh=gPKWhriD3pnIH1Uk3cfPOThE675psdPThf952AsBt2A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=K+hFD0wUcqVwZQSYPqHh0HRDLeH4iwOun91sMoZYkIvtMgXPk8i15MqbdG1HNLbbBZVlafPq9qKb3bObEuLYOie0RZDJqDPJkkXdYpw3CimtvuxTGEjjW/sBmUJkTUOGj80pVa/EGURlv1axrZXSjvu8RvlmHdPx9OOvY9QNAh0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=LEtUiATi; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="LEtUiATi" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1730358205; bh=gPKWhriD3pnIH1Uk3cfPOThE675psdPThf952AsBt2A=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LEtUiATid8r890K9Gp/niU0S+v6+BsFNh4OPspSgwA+SLTtetM/CQDrRxQCvuAn/E afPq/dWezuNge28FyOaepgHgGMmw4mZ/tjSwVhDokwiZvdZIl1ordBTKaAPyKnzlrg pXm1ftRf6ecQsMWbsQsdeCKLGFjZrSG6wEKvg7DXBrccX/Rh4cVaDDjXut0Zq8VwaL /ErJoJAqjkWRN2h37PsRIBGc128Ogk7lM5sgxc+nhZNVDMm9P1qPyJqpfTdyDJz7dB VAaNtG+MZN8N+ZU2UR/OF/FONIqPf2GU8d988wM0D1OAxzsd3/0TnLaynIzsAGtb9f 8HhYnOcq1IsWQ== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: Michael Turquette , Stephen Boyd , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Conor Dooley , Greg Kroah-Hartman , Kishon Vijay Abraham I , Krzysztof Kozlowski , Maxime Ripard , Nishanth Menon , "Rafael J. Wysocki" , Rob Herring , Vinod Koul , Viresh Kumar , Viresh Kumar , Yangtao Li , Parthiban , Andre Przywara , Cody Eksal , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 08/13] clk: sunxi-ng: a100: enable MMC clock reparenting Date: Thu, 31 Oct 2024 04:02:21 -0300 Message-ID: <20241031070232.1793078-9-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> References: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" During testing, it was noted that MMC would fail to initialize, with "mmc: fatal err update clk timeout" being printed in the log. It was found that CLK_SET_RATE_NO_REPARENT was set on the MMC controllers, and that removing this allows MMC to initialize. Therefore, remove CLK_SET_RATE_NO_REPARENT from mmc0/1/2. Signed-off-by: Cody Eksal Reviewed-by: Andre Przywara --- drivers/clk/sunxi-ng/ccu-sun50i-a100.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a100.c b/drivers/clk/sunxi-ng/= ccu-sun50i-a100.c index bbaa82978716..a59e420b195d 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-a100.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a100.c @@ -436,7 +436,7 @@ static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc0_clk, "mm= c0", mmc_parents, 0x830, 24, 2, /* mux */ BIT(31), /* gate */ 2, /* post-div */ - CLK_SET_RATE_NO_REPARENT); + 0); =20 static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc1_clk, "mmc1", mmc_parents, 0= x834, 0, 4, /* M */ @@ -444,7 +444,7 @@ static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc1_clk, "mm= c1", mmc_parents, 0x834, 24, 2, /* mux */ BIT(31), /* gate */ 2, /* post-div */ - CLK_SET_RATE_NO_REPARENT); + 0); =20 static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc2_clk, "mmc2", mmc_parents, 0= x838, 0, 4, /* M */ @@ -452,7 +452,7 @@ static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc2_clk, "mm= c2", mmc_parents, 0x838, 24, 2, /* mux */ BIT(31), /* gate */ 2, /* post-div */ - CLK_SET_RATE_NO_REPARENT); + 0); =20 static SUNXI_CCU_GATE(bus_mmc0_clk, "bus-mmc0", "ahb3", 0x84c, BIT(0), 0); static SUNXI_CCU_GATE(bus_mmc1_clk, "bus-mmc1", "ahb3", 0x84c, BIT(1), 0); --=20 2.47.0 From nobody Mon Nov 25 00:45:26 2024 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1783D150981; Thu, 31 Oct 2024 07:03:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358217; cv=none; b=IRFXagBrweSulfcFTylsgh4wXCUsalCzXedkhVi5y3kaP6cK/ikcf0qD9HXqsPSHEg7Nf09KbZ85MymduRqjsij/9nffxhql2TyB3HwhhY80tzVV2ddFyc2Jy1u6iYI8y7wTVbKGOwSf+xGOP2SiYIpnCheRKrZdxjtlKNwVopA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358217; c=relaxed/simple; bh=uG2apc/l46v55IsDCKvsKsBsQ3G+4vM+sV5vj2eVN7Q=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=a+jo5oO6VD7FWUX3sj994VWkmiK/mdM2VZHS1D7LM/8fqrQN49eLthXhRisepnbbdgdEd/5nZocXuzm7QSzFrw1/09u/n7YWAtc+JwqDUqDPDITdq8YK4mhF4ThHHZbsd2uOkFLzWFZOmZs76FiXoEUtVty5v6NVnioD3/7OY0A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=fm+gozSy; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="fm+gozSy" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1730358205; bh=uG2apc/l46v55IsDCKvsKsBsQ3G+4vM+sV5vj2eVN7Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fm+gozSyaRIJon1mAHV2EYtzITXTjiBBwxHmNkcZGiuhJiQiyWT4zD90JbMpUDE0d S04ooXRzJo52QdbCtL62mgyXMJJXkSE9VzTG4ZGtaOreeZWv8vV0B/ArJcOJjl9/76 RTHrGnMksj+1bEtALdhPNhUEMYcRiAqdQoQi5LQXC3BTMXCAfPjajHgsABMMfVtcMP 85d7BJ3e+Fx9MJpeIecwdabc6G/ejJz0UJN0xMhGgAn1xHqkMFJTQb1XyUNsg9xumy kRonWaNviblBc7rHjJzmlGidcT21mG2Tz0GdkBEqqy6WxXwbEd6S/KUzYBPj9vjGu5 GOJVi+JvbMg6w== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Greg Kroah-Hartman , Kishon Vijay Abraham I , Maxime Ripard , Michael Turquette , Nishanth Menon , "Rafael J. Wysocki" , Stephen Boyd , Vinod Koul , Viresh Kumar , Viresh Kumar , Yangtao Li , Parthiban , Andre Przywara , Cody Eksal , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 09/13] arm64: allwinner: a100: Add MMC related nodes Date: Thu, 31 Oct 2024 04:02:22 -0300 Message-ID: <20241031070232.1793078-10-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> References: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Yangtao Li The A100 has 3 MMC controllers, one of them being especially targeted to eMMC. Let's add nodes on dts. Signed-off-by: Yangtao Li Reviewed-by: Andre Przywara Signed-off-by: Cody Eksal --- .../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun50i-a100.dtsi index f6162a107641..29ac7716c7a5 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -169,12 +169,83 @@ pio: pinctrl@300b000 { interrupt-controller; #interrupt-cells =3D <3>; =20 + mmc0_pins: mmc0-pins { + pins =3D "PF0", "PF1", "PF2", "PF3", + "PF4", "PF5"; + function =3D "mmc0"; + drive-strength =3D <30>; + bias-pull-up; + }; + + /omit-if-no-ref/ + mmc1_pins: mmc1-pins { + pins =3D "PG0", "PG1", "PG2", "PG3", + "PG4", "PG5"; + function =3D "mmc1"; + drive-strength =3D <30>; + bias-pull-up; + }; + + mmc2_pins: mmc2-pins { + pins =3D "PC0", "PC1", "PC5", "PC6", + "PC8", "PC9", "PC10", "PC11", + "PC13", "PC14", "PC15", "PC16"; + function =3D "mmc2"; + drive-strength =3D <30>; + bias-pull-up; + }; + uart0_pb_pins: uart0-pb-pins { pins =3D "PB9", "PB10"; function =3D "uart0"; }; }; =20 + mmc0: mmc@4020000 { + compatible =3D "allwinner,sun50i-a100-mmc"; + reg =3D <0x04020000 0x1000>; + clocks =3D <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; + clock-names =3D "ahb", "mmc"; + resets =3D <&ccu RST_BUS_MMC0>; + reset-names =3D "ahb"; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mmc0_pins>; + status =3D "disabled"; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + mmc1: mmc@4021000 { + compatible =3D "allwinner,sun50i-a100-mmc"; + reg =3D <0x04021000 0x1000>; + clocks =3D <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; + clock-names =3D "ahb", "mmc"; + resets =3D <&ccu RST_BUS_MMC1>; + reset-names =3D "ahb"; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mmc1_pins>; + status =3D "disabled"; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + mmc2: mmc@4022000 { + compatible =3D "allwinner,sun50i-a100-emmc"; + reg =3D <0x04022000 0x1000>; + clocks =3D <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; + clock-names =3D "ahb", "mmc"; + resets =3D <&ccu RST_BUS_MMC2>; + reset-names =3D "ahb"; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&mmc2_pins>; + status =3D "disabled"; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + uart0: serial@5000000 { compatible =3D "snps,dw-apb-uart"; reg =3D <0x05000000 0x400>; --=20 2.47.0 From nobody Mon Nov 25 00:45:26 2024 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A289C14D433; Thu, 31 Oct 2024 07:03:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358215; cv=none; b=idcSO+KtQLMXwvI534MoqmmM4VvrgxtvqizHQ7/4gWDBxohqpTB2Dtbr2TKDH+pFjQI5UHdvDytzzkknBzNUvZuLClvv2+4mzKCfm7Zr8HN6HzCHuWDX9FvjSNJkTyhC0HPXlYcAJPfv6C5D87A2JV9XirFN8RIK493MaTyCsDA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358215; c=relaxed/simple; bh=gWgh78qYIAfAOa8H5RFKaOcp8FXFvpf47/zA/jM4dGU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qzpZK930duolc28QcJZIVBwl9m2QJGxV0Cb/XFXUXgUNZceI1NK/xgvOJ1IdjzjiJ2eTze7JBVO0nGkirbfbw3ORxxzptXHmDiju563a8skHQogZMWCgjMXH/7hrtTk8rVMl7x+HY2XPgp1ACQ5sDGdlD88kjzPTLGcRAI13s5c= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=QM+yJxZT; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="QM+yJxZT" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1730358205; bh=gWgh78qYIAfAOa8H5RFKaOcp8FXFvpf47/zA/jM4dGU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QM+yJxZTgU8QBuzMFjJT2Q5MgjOwsMRUAAEx9Y0ZPVmxoBEWSw1WC2z07YDGB7Zup X+fy/B07X4jSRpwUAJz31K6/lIdrYc/j6Wf5o/2r3vG88JiNI7LwzYstgnudHG1oTg yyWLso51ZQwrfa6tsZumZj3eKMAW7e/nszZ5eTlsPfjXhufW+iWHEt2r+o+Y9ljhJO dvoNpGXKL857H1sJ0w2q0ogRxjq+6Sw5TohkwJwwaFPrWVjUO4lukVzev/Vdb2QcBd Jgg7k3Qm8uU5QeYxkL53OMqPvFTy2DqD7Qdm7MMeoXTTd+eTh/QJUmbplq3Yi+/xwJ +igzx/0NjEarw== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Greg Kroah-Hartman , Kishon Vijay Abraham I , Maxime Ripard , Michael Turquette , Nishanth Menon , "Rafael J. Wysocki" , Stephen Boyd , Vinod Koul , Viresh Kumar , Viresh Kumar , Yangtao Li , Parthiban , Andre Przywara , Cody Eksal , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 10/13] arm64: dts: allwinner: a100: perf1: Add eMMC and MMC node Date: Thu, 31 Oct 2024 04:02:23 -0300 Message-ID: <20241031070232.1793078-11-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> References: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Yangtao Li A100 perf1 hava MicroSD slot and on-board eMMC module, add support for them. Signed-off-by: Yangtao Li Signed-off-by: Cody Eksal --- .../allwinner/sun50i-a100-allwinner-perf1.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts = b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts index 2f8c7ee60283..d418fc272b3c 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts @@ -39,6 +39,22 @@ &ehci1 { status =3D "okay"; }; =20 +&mmc0 { + vmmc-supply =3D <®_dcdc1>; + cd-gpios =3D <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + bus-width =3D <4>; + status =3D "okay"; +}; + +&mmc2 { + vmmc-supply =3D <®_dcdc1>; + vqmmc-supply =3D <®_aldo1>; + cap-mmc-hw-reset; + non-removable; + bus-width =3D <8>; + status =3D "okay"; +}; + &ohci0 { status =3D "okay"; }; --=20 2.47.0 From nobody Mon Nov 25 00:45:26 2024 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 165E714F9F8; Thu, 31 Oct 2024 07:03:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358216; cv=none; b=kCa6YNw7VOlHtpQLBPBZDo1ZTBLxG2wt3zD6XVO1Ha/iFxK0ZiVrWfusm29rvjdZMM0gomPMWgdg/SITLeCT32JefLKPjvfCl9v4+oodCQdSVr7aKh7+LsqGG9gmBuj5BdesaFpWtMhn5xzz7GxPmHzp7sea4bPAswcB1B9VqI8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358216; c=relaxed/simple; bh=wUIk/mmpLDWeouMgYhaf2tgEePqBaUSdmwuO0VnKGzM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ABraNEJ7ieuJQtt37/OKhN0q0ITZBnmyFNFx+iRY1fOaOr2W43KIeehvp8wAnd55z71TCAuqiFYnYdrK4gjL55vWaZDHtPliaQwSMqenSERByQq8HuGVz39m6oEx+zV/vF9RZvof/QYggU/Q7ylsxXY0D2MASbL5n0zQXaijtko= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=jskWGbQg; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="jskWGbQg" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1730358206; bh=wUIk/mmpLDWeouMgYhaf2tgEePqBaUSdmwuO0VnKGzM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jskWGbQg985yW0BZQQi3CQ6hHJO7+HaROsZ9qZhwlh0HMYwlM2bxzF4bNP3vOOeAj nPp/7UkifmYOJwkcAWsDz8hbJ/yFPkodWVwzlipNZymcQFY+V8p5J8HQN1ZPvpd9Kt fzgk1sBLInXwNycHN2ctK5f11Z6Uq0qrWGaEM5DB9khCN6b9pW1PMaUEt0Vpmfd2cb VKFbEu/ezqvXUNON81kfrJ30xwXHzGq/crovPoVgLSUQ/+xkzC46tvCmjeLY9SFsww TdO8cRGL4ZJGYxB19YcSHlpj4xj7iaTpwJo/8CM4n/DWCzuDzceuHmoqMm1mhs1wTN LyEwBimJgmc9Q== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: Yangtao Li , Viresh Kumar , Nishanth Menon , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard Cc: Greg Kroah-Hartman , Kishon Vijay Abraham I , Michael Turquette , "Rafael J. Wysocki" , Vinod Koul , Viresh Kumar , Parthiban , Andre Przywara , Cody Eksal , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 11/13] dt-bindings: opp: h6: Add A100 operating points Date: Thu, 31 Oct 2024 04:02:24 -0300 Message-ID: <20241031070232.1793078-12-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> References: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The A100, similar to the H6 and H616, use an NVMEM value to determine speed binnings. The method used is similar to that of the H6. However, the information is stored at a slightly different bit offset. Add a new compatible for the A100. Signed-off-by: Cody Eksal Acked-by: Chen-Yu Tsai Acked-by: Krzysztof Kozlowski Reviewed-by: Andre Przywara --- Changes in V2: - Fix ordering of compatibles .../bindings/opp/allwinner,sun50i-h6-operating-points.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-oper= ating-points.yaml b/Documentation/devicetree/bindings/opp/allwinner,sun50i-= h6-operating-points.yaml index ec5e424bb3c8..75ab552f6ecd 100644 --- a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-p= oints.yaml +++ b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-p= oints.yaml @@ -22,6 +22,7 @@ allOf: properties: compatible: enum: + - allwinner,sun50i-a100-operating-points - allwinner,sun50i-h6-operating-points - allwinner,sun50i-h616-operating-points =20 --=20 2.47.0 From nobody Mon Nov 25 00:45:26 2024 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D38E314EC5B; Thu, 31 Oct 2024 07:03:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358217; cv=none; b=eFPFq74pDhJl7qjLUQzxIrGTe5Zk2APc4YUxOybpS+gPUCuxuAEdkxDZavhYvHqGRI/+dTY2DichtPjwMyiF8n0xphTrP6kpdxlopE+c2J0cEg+GgF0dCo/TE+13yhylor+PNhsWyNJf+PDXy0s872aLZ0JagXuywtrrwjAf8j8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730358217; c=relaxed/simple; bh=nnLK7vdS2Jw3tJYIfQcazeyvsSONfvWoJ57ZBLGoLRs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=oKteF0TY8ZvVopgX58Hu08olmNJZjxlu/YgXWYibsmYQEnpyMSxFoodRe6deTOHH7t8JBGQgC0jMPXi53JvRxMZpACoz67OBePZkTnYIdY3Qcz5BH0vdYYG6nT5Yc7Xo0usNkqtkuj0upj2hfyeP9mNXMEQIKvzmpOOxs3/qets= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=f5aonTIP; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="f5aonTIP" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1730358206; bh=nnLK7vdS2Jw3tJYIfQcazeyvsSONfvWoJ57ZBLGoLRs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=f5aonTIPZ3ov2mqf1MwtR3Qr76H/P4hBfDCBhiFGIGCsImTtOkadF8sG5nshiBAgy B6UVyG9+LxOyfUTB4HB0hcoKh/DzxpMoLt6feRx0Q4hAB+34m2oAQVrbxVJprDK+VO 4wRk0PDmR8S5GozMQblFlj72xT3f/642Q00Uqja+mraD8wtr5eXEzmy4qkACkRe8a4 T3I30aeN5eQ2C7fagPFslHgg+kANBhOaOQ2F3AgWChoYOz8IMHV5jqWMxeYzL11+Pa tNdJ+imtc2baPScXVlYR5AJp00NHn5rKQhNz9J/RLnajsFwUqy9PPo8s6ZiPL5dKrX vuALB5l9Hw/qQ== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: "Rafael J. Wysocki" , Viresh Kumar , Yangtao Li , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Conor Dooley , Greg Kroah-Hartman , Kishon Vijay Abraham I , Krzysztof Kozlowski , Maxime Ripard , Michael Turquette , Nishanth Menon , Rob Herring , Stephen Boyd , Vinod Koul , Viresh Kumar , Parthiban , Andre Przywara , Cody Eksal , linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev Subject: [PATCH v2 12/13] cpufreq: sun50i: add a100 cpufreq support Date: Thu, 31 Oct 2024 04:02:25 -0300 Message-ID: <20241031070232.1793078-13-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> References: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shuosheng Huang Let's add cpufreq nvmem based for allwinner a100 soc. It's similar to h6, let us use efuse_xlate to extract the differentiated part. Signed-off-by: Shuosheng Huang [masterr3c0rd@epochal.quest: add A100 to opp_match_list] Signed-off-by: Cody Eksal Acked-by: Chen-Yu Tsai Reviewed-by: Andre Przywara Tested-by: Andre Przywara Tested-by: Parthiban Nallathambi --- Changes in V2: - Add the A100 to the cpufreq-dt-platdev blacklist. drivers/cpufreq/cpufreq-dt-platdev.c | 1 + drivers/cpufreq/sun50i-cpufreq-nvmem.c | 28 ++++++++++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq= -dt-platdev.c index 18942bfe9c95..2a3e8bd317c9 100644 --- a/drivers/cpufreq/cpufreq-dt-platdev.c +++ b/drivers/cpufreq/cpufreq-dt-platdev.c @@ -103,6 +103,7 @@ static const struct of_device_id allowlist[] __initcons= t =3D { * platforms using "operating-points-v2" property. */ static const struct of_device_id blocklist[] __initconst =3D { + { .compatible =3D "allwinner,sun50i-a100" }, { .compatible =3D "allwinner,sun50i-h6", }, { .compatible =3D "allwinner,sun50i-h616", }, { .compatible =3D "allwinner,sun50i-h618", }, diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50= i-cpufreq-nvmem.c index 293921acec93..3a29c026d364 100644 --- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c +++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c @@ -22,6 +22,9 @@ #define NVMEM_MASK 0x7 #define NVMEM_SHIFT 5 =20 +#define SUN50I_A100_NVMEM_MASK 0xf +#define SUN50I_A100_NVMEM_SHIFT 12 + static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev; =20 struct sunxi_cpufreq_data { @@ -45,6 +48,23 @@ static u32 sun50i_h6_efuse_xlate(u32 speedbin) return 0; } =20 +static u32 sun50i_a100_efuse_xlate(u32 speedbin) +{ + u32 efuse_value; + + efuse_value =3D (speedbin >> SUN50I_A100_NVMEM_SHIFT) & + SUN50I_A100_NVMEM_MASK; + + switch (efuse_value) { + case 0b100: + return 2; + case 0b010: + return 1; + default: + return 0; + } +} + static int get_soc_id_revision(void) { #ifdef CONFIG_HAVE_ARM_SMCCC_DISCOVERY @@ -108,6 +128,10 @@ static struct sunxi_cpufreq_data sun50i_h6_cpufreq_dat= a =3D { .efuse_xlate =3D sun50i_h6_efuse_xlate, }; =20 +static struct sunxi_cpufreq_data sun50i_a100_cpufreq_data =3D { + .efuse_xlate =3D sun50i_a100_efuse_xlate, +}; + static struct sunxi_cpufreq_data sun50i_h616_cpufreq_data =3D { .efuse_xlate =3D sun50i_h616_efuse_xlate, }; @@ -116,6 +140,9 @@ static const struct of_device_id cpu_opp_match_list[] = =3D { { .compatible =3D "allwinner,sun50i-h6-operating-points", .data =3D &sun50i_h6_cpufreq_data, }, + { .compatible =3D "allwinner,sun50i-a100-operating-points", + .data =3D &sun50i_a100_cpufreq_data, + }, { .compatible =3D "allwinner,sun50i-h616-operating-points", .data =3D &sun50i_h616_cpufreq_data, }, @@ -291,6 +318,7 @@ static struct platform_driver sun50i_cpufreq_driver =3D= { =20 static const struct of_device_id sun50i_cpufreq_match_list[] =3D { { .compatible =3D "allwinner,sun50i-h6" }, + { .compatible =3D "allwinner,sun50i-a100" }, { .compatible =3D "allwinner,sun50i-h616" }, { .compatible =3D "allwinner,sun50i-h618" }, { .compatible =3D "allwinner,sun50i-h700" }, --=20 2.47.0 From nobody Mon Nov 25 00:45:26 2024 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5F62A1531F2; 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Wysocki" , Stephen Boyd , Vinod Koul , Viresh Kumar , Viresh Kumar , Yangtao Li , Parthiban , Andre Przywara , Cody Eksal , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH v2 13/13] arm64: dts: allwinner: a100: Add CPU Operating Performance Points table Date: Thu, 31 Oct 2024 04:02:26 -0300 Message-ID: <20241031070232.1793078-14-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> References: <20241031070232.1793078-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Shuosheng Huang Add an Operating Performance Points table for the CPU cores to enable Dynamic Voltage & Frequency Scaling on the A100. Signed-off-by: Shuosheng Huang [masterr3c0rd@epochal.quest: fix typos in -cpu-opp, use compatible] Signed-off-by: Cody Eksal --- Changes in V2: - Rename cpu-opp-table to opp-table-cpu - Use single cell version of opp-microvolt-speedX .../allwinner/sun50i-a100-allwinner-perf1.dts | 5 ++ .../dts/allwinner/sun50i-a100-cpu-opp.dtsi | 90 +++++++++++++++++++ .../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 8 ++ 3 files changed, 103 insertions(+) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts = b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts index d418fc272b3c..1fb629df9f1d 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts @@ -6,6 +6,7 @@ /dts-v1/; =20 #include "sun50i-a100.dtsi" +#include "sun50i-a100-cpu-opp.dtsi" =20 #include =20 @@ -68,6 +69,10 @@ &usb_otg { status =3D "okay"; }; =20 +&cpu0 { + cpu-supply =3D <®_dcdc2>; +}; + &pio { vcc-pb-supply =3D <®_dcdc1>; vcc-pc-supply =3D <®_eldo1>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi b/arch/= arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi new file mode 100644 index 000000000000..c6a2efa037dc --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2020 Yangtao Li +// Copyright (c) 2020 ShuoSheng Huang + +/ { + cpu_opp_table: opp-table-cpu { + compatible =3D "allwinner,sun50i-a100-operating-points"; + nvmem-cells =3D <&cpu_speed_grade>; + opp-shared; + + opp-408000000 { + clock-latency-ns =3D <244144>; /* 8 32k periods */ + opp-hz =3D /bits/ 64 <408000000>; + + opp-microvolt-speed0 =3D <900000>; + opp-microvolt-speed1 =3D <900000>; + opp-microvolt-speed2 =3D <900000>; + }; + + opp-600000000 { + clock-latency-ns =3D <244144>; /* 8 32k periods */ + opp-hz =3D /bits/ 64 <600000000>; + + opp-microvolt-speed0 =3D <900000>; + opp-microvolt-speed1 =3D <900000>; + opp-microvolt-speed2 =3D <900000>; + }; + + opp-816000000 { + clock-latency-ns =3D <244144>; /* 8 32k periods */ + opp-hz =3D /bits/ 64 <816000000>; + + opp-microvolt-speed0 =3D <940000>; + opp-microvolt-speed1 =3D <900000>; + opp-microvolt-speed2 =3D <900000>; + }; + + opp-1080000000 { + clock-latency-ns =3D <244144>; /* 8 32k periods */ + opp-hz =3D /bits/ 64 <1080000000>; + + opp-microvolt-speed0 =3D <1020000>; + opp-microvolt-speed1 =3D <980000>; + opp-microvolt-speed2 =3D <950000>; + }; + + opp-1200000000 { + clock-latency-ns =3D <244144>; /* 8 32k periods */ + opp-hz =3D /bits/ 64 <1200000000>; + + opp-microvolt-speed0 =3D <1100000>; + opp-microvolt-speed1 =3D <1020000>; + opp-microvolt-speed2 =3D <1000000>; + }; + + opp-1320000000 { + clock-latency-ns =3D <244144>; /* 8 32k periods */ + opp-hz =3D /bits/ 64 <1320000000>; + + opp-microvolt-speed0 =3D <1160000>; + opp-microvolt-speed1 =3D <1060000>; + opp-microvolt-speed2 =3D <1030000>; + }; + + opp-1464000000 { + clock-latency-ns =3D <244144>; /* 8 32k periods */ + opp-hz =3D /bits/ 64 <1464000000>; + + opp-microvolt-speed0 =3D <1180000>; + opp-microvolt-speed1 =3D <1180000>; + opp-microvolt-speed2 =3D <1130000>; + }; + }; +}; + +&cpu0 { + operating-points-v2 =3D <&cpu_opp_table>; +}; + +&cpu1 { + operating-points-v2 =3D <&cpu_opp_table>; +}; + +&cpu2 { + operating-points-v2 =3D <&cpu_opp_table>; +}; + +&cpu3 { + operating-points-v2 =3D <&cpu_opp_table>; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/bo= ot/dts/allwinner/sun50i-a100.dtsi index 29ac7716c7a5..6a76858b654a 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -23,6 +23,7 @@ cpu0: cpu@0 { device_type =3D "cpu"; reg =3D <0x0>; enable-method =3D "psci"; + clocks =3D <&ccu CLK_CPUX>; }; =20 cpu1: cpu@1 { @@ -30,6 +31,7 @@ cpu1: cpu@1 { device_type =3D "cpu"; reg =3D <0x1>; enable-method =3D "psci"; + clocks =3D <&ccu CLK_CPUX>; }; =20 cpu2: cpu@2 { @@ -37,6 +39,7 @@ cpu2: cpu@2 { device_type =3D "cpu"; reg =3D <0x2>; enable-method =3D "psci"; + clocks =3D <&ccu CLK_CPUX>; }; =20 cpu3: cpu@3 { @@ -44,6 +47,7 @@ cpu3: cpu@3 { device_type =3D "cpu"; reg =3D <0x3>; enable-method =3D "psci"; + clocks =3D <&ccu CLK_CPUX>; }; }; =20 @@ -142,6 +146,10 @@ efuse@3006000 { ths_calibration: calib@14 { reg =3D <0x14 8>; }; + + cpu_speed_grade: cpu-speed-grade@1c { + reg =3D <0x1c 0x2>; + }; }; =20 watchdog@30090a0 { --=20 2.47.0