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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Oct 2024 22:54:47.8594 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 98c8ff71-56b3-4c4e-65fc-08dcf935dacf X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DU2PEPF00028CFC.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DBBPR08MB6284 Content-Type: text/plain; charset="utf-8" All CPU mappings are forced as uncached for Panthor buffer objects when system(IO) coherency is disabled. Physical backing for Panthor BOs is allocated by shmem, which clears the pages also after allocation. But there is no explicit cache flush done after the clearing of pages. So it could happen that there are dirty cachelines in the CPU cache for the BOs, when they are accessed from the CPU side through uncached CPU mapping, and the eviction of cachelines overwrites the data of BOs. This commit tries to avoid the potential overwrite scenario. v2: - no change Signed-off-by: Akash Goel --- drivers/gpu/drm/panthor/panthor_gem.h | 10 ++++++++++ drivers/gpu/drm/panthor/panthor_mmu.c | 5 +++++ 2 files changed, 15 insertions(+) diff --git a/drivers/gpu/drm/panthor/panthor_gem.h b/drivers/gpu/drm/pantho= r/panthor_gem.h index e43021cf6d45..4b0f43f1edf1 100644 --- a/drivers/gpu/drm/panthor/panthor_gem.h +++ b/drivers/gpu/drm/panthor/panthor_gem.h @@ -46,6 +46,16 @@ struct panthor_gem_object { =20 /** @flags: Combination of drm_panthor_bo_flags flags. */ u32 flags; + + /** + * @cleaned: The buffer object pages have been cleaned. + * + * There could be dirty CPU cachelines for the pages of buffer object + * after allocation, as shmem will zero out the pages. The cachelines + * need to be cleaned if the pages are going to be accessed with an + * uncached CPU mapping. + */ + bool cleaned; }; =20 /** diff --git a/drivers/gpu/drm/panthor/panthor_mmu.c b/drivers/gpu/drm/pantho= r/panthor_mmu.c index f522a116c1b1..d8cc9e7d064e 100644 --- a/drivers/gpu/drm/panthor/panthor_mmu.c +++ b/drivers/gpu/drm/panthor/panthor_mmu.c @@ -1249,6 +1249,11 @@ static int panthor_vm_prepare_map_op_ctx(struct pant= hor_vm_op_ctx *op_ctx, =20 op_ctx->map.sgt =3D sgt; =20 + if (bo->base.map_wc && !bo->cleaned) { + dma_sync_sgtable_for_device(vm->ptdev->base.dev, sgt, DMA_TO_DEVICE); + bo->cleaned =3D true; + } + preallocated_vm_bo =3D drm_gpuvm_bo_create(&vm->base, &bo->base.base); if (!preallocated_vm_bo) { if (!bo->base.base.import_attach) --=20 2.25.1