From nobody Mon Nov 25 03:58:54 2024 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE6D52194B9 for ; Wed, 30 Oct 2024 21:33:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.15 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730324006; cv=none; b=hd59SgP0317M5FasE8oydbNKKdkTHwk9xBNjpxXRKMU+u0vun9kK5EKjUsogFfoyIcXKJqYiopECm/5ut1Vbop5yrkYCNW/+NITY8JKHZjmo+rE2YgGQF4B1kNXdnEu8phThW+iwIWZGD1UdhvAI5WT8kSMWz/1w69LKzosQCbg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730324006; c=relaxed/simple; bh=6qodWXABKoKLSgLw339vyiDw3eix/wPdhhHAMnrFV5s=; h=Subject:To:Cc:From:Date:References:In-Reply-To:Message-Id; b=LpqvfN2PcA5j8sxAjVhsfHu2gfv3DKWOuOu78ioc7dWQOgu2mtxFc8Pfv9HV6Jxk17lg8zRYC48hMfKyJTZ7b/Gjwls9WGMrY2+SPw4DUwa7vD21ujYm20lVIDSk1cbcBykVXCVkH7IsCHoujrRequzlfRBWMhD76kiG2KgdEmc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=heTQP3VI; arc=none smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="heTQP3VI" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730324005; x=1761860005; h=subject:to:cc:from:date:references:in-reply-to: message-id; bh=6qodWXABKoKLSgLw339vyiDw3eix/wPdhhHAMnrFV5s=; b=heTQP3VI8u9UMeL1nLhu7fMeO0qbLiXdRxqbseIv8tFtkokBTNDM//ca Lw7x1IJcadeBfAlo3Jfl7Pv7QOtGKRQttBrHgpHxDEgfLXwpzatB5kgqr 5XOIu6nMQNkIPCyIQGYpf55hB4AO9oL2zk7ipvi7g6/j0AUi3P9lvoTd4 SE4wZQHrwhlt0pb7QvJXHirpzpMOjk07XEUFMW3cg8Uaag5d1Hv0ORqql 6vIodgYBqm+wv4Jg4OGUG8+nY/raolgapf8bYzVgaJ/oAK5u3uf7MLq1G EzZ0seMJFfSNKeHyLPUrvIiDx6IGxYZGYAkaUI8hBOWohUe19BHAR8HPb w==; X-CSE-ConnectionGUID: C1D30Z6VTnmjjJteZfqpbw== X-CSE-MsgGUID: iFiuKMYBT8q+0VtxD60PzA== X-IronPort-AV: E=McAfee;i="6700,10204,11222"; a="33741622" X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="33741622" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Oct 2024 14:33:25 -0700 X-CSE-ConnectionGUID: D/X7jZPrTkGajF5OmUGNxw== X-CSE-MsgGUID: V9uFEfLXS7+ChQCiRUABWQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,245,1725346800"; d="scan'208";a="83257701" Received: from davehans-spike.ostc.intel.com (HELO localhost.localdomain) ([10.165.164.11]) by orviesa008.jf.intel.com with ESMTP; 30 Oct 2024 14:33:25 -0700 Subject: [PATCH 08/11] x86/tsc: Remove CPUID "frequency" leaf magic numbers. To: linux-kernel@vger.kernel.org Cc: x86@kernel.org,tglx@linutronix.de,bp@alien8.de,rafael@kernel.org,lenb@kernel.org,Dave Hansen From: Dave Hansen Date: Wed, 30 Oct 2024 14:33:24 -0700 References: <20241030213310.C4861EC0@davehans-spike.ostc.intel.com> In-Reply-To: <20241030213310.C4861EC0@davehans-spike.ostc.intel.com> Message-Id: <20241030213324.3750CF43@davehans-spike.ostc.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Dave Hansen All the code that reads the CPUID frequency information leaf hard-codes a magic number. Give it a symbolic name and use it. Signed-off-by: Dave Hansen --- b/arch/x86/include/asm/cpuid.h | 1 + b/arch/x86/kernel/tsc.c | 12 ++++++------ 2 files changed, 7 insertions(+), 6 deletions(-) diff -puN arch/x86/include/asm/cpuid.h~tsc-leaf-checks-3 arch/x86/include/a= sm/cpuid.h --- a/arch/x86/include/asm/cpuid.h~tsc-leaf-checks-3 2024-10-30 12:26:58.00= 6213934 -0700 +++ b/arch/x86/include/asm/cpuid.h 2024-10-30 12:26:58.010213943 -0700 @@ -22,6 +22,7 @@ enum cpuid_regs_idx { #define CPUID_MWAIT_LEAF 0x5 #define CPUID_DCA_LEAF 0x9 #define CPUID_TSC_LEAF 0x15 +#define CPUID_FREQ_LEAF 0x16 =20 #ifdef CONFIG_X86_32 extern int have_cpuid_p(void); diff -puN arch/x86/kernel/tsc.c~tsc-leaf-checks-3 arch/x86/kernel/tsc.c --- a/arch/x86/kernel/tsc.c~tsc-leaf-checks-3 2024-10-30 12:26:58.010213943= -0700 +++ b/arch/x86/kernel/tsc.c 2024-10-30 12:26:58.010213943 -0700 @@ -680,8 +680,8 @@ unsigned long native_calibrate_tsc(void) =20 /* * Denverton SoCs don't report crystal clock, and also don't support - * CPUID.0x16 for the calculation below, so hardcode the 25MHz crystal - * clock. + * CPUID_FREQ_LEAF for the calculation below, so hardcode the 25MHz + * crystal clock. */ if (crystal_khz =3D=3D 0 && boot_cpu_data.x86_vfm =3D=3D INTEL_ATOM_GOLDMONT_D) @@ -700,10 +700,10 @@ unsigned long native_calibrate_tsc(void) * clock, but we can easily calculate it to a high degree of accuracy * by considering the crystal ratio and the CPU speed. */ - if (crystal_khz =3D=3D 0 && boot_cpu_data.cpuid_level >=3D 0x16) { + if (crystal_khz =3D=3D 0 && boot_cpu_data.cpuid_level >=3D CPUID_FREQ_LEA= F) { unsigned int eax_base_mhz, ebx, ecx, edx; =20 - cpuid(0x16, &eax_base_mhz, &ebx, &ecx, &edx); + cpuid(CPUID_FREQ_LEAF, &eax_base_mhz, &ebx, &ecx, &edx); crystal_khz =3D eax_base_mhz * 1000 * eax_denominator / ebx_numerator; } @@ -738,12 +738,12 @@ static unsigned long cpu_khz_from_cpuid( if (boot_cpu_data.x86_vendor !=3D X86_VENDOR_INTEL) return 0; =20 - if (boot_cpu_data.cpuid_level < 0x16) + if (boot_cpu_data.cpuid_level < CPUID_FREQ_LEAF) return 0; =20 eax_base_mhz =3D ebx_max_mhz =3D ecx_bus_mhz =3D edx =3D 0; =20 - cpuid(0x16, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx); + cpuid(CPUID_FREQ_LEAF, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx); =20 return eax_base_mhz * 1000; } _