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[35.247.103.198]) by smtp.gmail.com with UTF8SMTPSA id 41be03b00d2f7-7ee45a0dfe2sm29950a12.83.2024.10.30.14.29.05 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Oct 2024 14:29:05 -0700 (PDT) From: Abhishek Pandit-Subedi To: heikki.krogerus@linux.intel.com, tzungbi@kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: dmitry.baryshkov@linaro.org, jthies@google.com, akuchynski@google.com, pmalani@chromium.org, Abhishek Pandit-Subedi , Benson Leung , Greg Kroah-Hartman , Guenter Roeck , linux-kernel@vger.kernel.org Subject: [PATCH v2 1/7] usb: typec: Add driver for Thunderbolt 3 Alternate Mode Date: Wed, 30 Oct 2024 14:28:32 -0700 Message-ID: <20241030142833.v2.1.I3080b036e8de0b9957c57c1c3059db7149c5e549@changeid> X-Mailer: git-send-email 2.47.0.163.g1226f6d8fa-goog In-Reply-To: <20241030212854.998318-1-abhishekpandit@chromium.org> References: <20241030212854.998318-1-abhishekpandit@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heikki Krogerus Thunderbolt 3 Alternate Mode entry flow is described in USB Type-C Specification Release 2.0. Signed-off-by: Heikki Krogerus Co-developed-by: Abhishek Pandit-Subedi Signed-off-by: Abhishek Pandit-Subedi --- Changes: * Delay cable + plug checks so that the module doesn't fail to probe if cable + plug information isn't available by the time the partner altmode is registered. * Remove unncessary brace after if (IS_ERR(plug)) The rest of this patch should be the same as Heikki's original RFC. Changes in v2: - Use and add missing TBT_CABLE_ROUNDED - Pass struct typec_thunderbolt_data to typec_altmode_notify - Rename TYPEC_TBT_MODE to USB_TYPEC_TBT_MODE - Use USB_TYPEC_TBT_SID and USB_TYPEC_TBT_MODE for device id - Change module license to GPL due to checkpatch warning drivers/platform/chrome/cros_ec_typec.c | 2 +- drivers/usb/typec/altmodes/Kconfig | 9 + drivers/usb/typec/altmodes/Makefile | 2 + drivers/usb/typec/altmodes/thunderbolt.c | 308 +++++++++++++++++++++++ include/linux/usb/typec_tbt.h | 3 +- 5 files changed, 322 insertions(+), 2 deletions(-) create mode 100644 drivers/usb/typec/altmodes/thunderbolt.c diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chr= ome/cros_ec_typec.c index c7781aea0b88..53d93baa36a8 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -499,7 +499,7 @@ static int cros_typec_enable_tbt(struct cros_typec_data= *typec, } =20 port->state.data =3D &data; - port->state.mode =3D TYPEC_TBT_MODE; + port->state.mode =3D USB_TYPEC_TBT_MODE; =20 return typec_mux_set(port->mux, &port->state); } diff --git a/drivers/usb/typec/altmodes/Kconfig b/drivers/usb/typec/altmode= s/Kconfig index 1a6b5e872b0d..7867fa7c405d 100644 --- a/drivers/usb/typec/altmodes/Kconfig +++ b/drivers/usb/typec/altmodes/Kconfig @@ -23,4 +23,13 @@ config TYPEC_NVIDIA_ALTMODE To compile this driver as a module, choose M here: the module will be called typec_nvidia. =20 +config TYPEC_TBT_ALTMODE + tristate "Thunderbolt3 Alternate Mode driver" + help + Select this option if you have Thunderbolt3 hardware on your + system. + + To compile this driver as a module, choose M here: the + module will be called typec_thunderbolt. + endmenu diff --git a/drivers/usb/typec/altmodes/Makefile b/drivers/usb/typec/altmod= es/Makefile index 45717548b396..508a68351bd2 100644 --- a/drivers/usb/typec/altmodes/Makefile +++ b/drivers/usb/typec/altmodes/Makefile @@ -4,3 +4,5 @@ obj-$(CONFIG_TYPEC_DP_ALTMODE) +=3D typec_displayport.o typec_displayport-y :=3D displayport.o obj-$(CONFIG_TYPEC_NVIDIA_ALTMODE) +=3D typec_nvidia.o typec_nvidia-y :=3D nvidia.o +obj-$(CONFIG_TYPEC_TBT_ALTMODE) +=3D typec_thunderbolt.o +typec_thunderbolt-y :=3D thunderbolt.o diff --git a/drivers/usb/typec/altmodes/thunderbolt.c b/drivers/usb/typec/a= ltmodes/thunderbolt.c new file mode 100644 index 000000000000..8380b22d26a7 --- /dev/null +++ b/drivers/usb/typec/altmodes/thunderbolt.c @@ -0,0 +1,308 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * USB Typec-C Thuderbolt3 Alternate Mode driver + * + * Copyright (C) 2019 Intel Corporation + * Author: Heikki Krogerus + */ + +#include +#include +#include +#include +#include +#include + +enum tbt_state { + TBT_STATE_IDLE, + TBT_STATE_SOP_P_ENTER, + TBT_STATE_SOP_PP_ENTER, + TBT_STATE_ENTER, + TBT_STATE_EXIT, + TBT_STATE_SOP_PP_EXIT, + TBT_STATE_SOP_P_EXIT +}; + +struct tbt_altmode { + enum tbt_state state; + struct typec_cable *cable; + struct typec_altmode *alt; + struct typec_altmode *plug[2]; + u32 enter_vdo; + + struct work_struct work; + struct mutex lock; /* device lock */ +}; + +static bool tbt_ready(struct typec_altmode *alt); + +static int tbt_enter_mode(struct tbt_altmode *tbt) +{ + struct typec_altmode *plug =3D tbt->plug[TYPEC_PLUG_SOP_P]; + u32 vdo; + + vdo =3D tbt->alt->vdo & (TBT_VENDOR_SPECIFIC_B0 | TBT_VENDOR_SPECIFIC_B1); + vdo |=3D tbt->alt->vdo & TBT_INTEL_SPECIFIC_B0; + vdo |=3D TBT_MODE; + + if (plug) { + if (typec_cable_is_active(tbt->cable)) + vdo |=3D TBT_ENTER_MODE_ACTIVE_CABLE; + + vdo |=3D TBT_ENTER_MODE_CABLE_SPEED(TBT_CABLE_SPEED(plug->vdo)); + vdo |=3D plug->vdo & TBT_CABLE_ROUNDED; + vdo |=3D plug->vdo & TBT_CABLE_OPTICAL; + vdo |=3D plug->vdo & TBT_CABLE_RETIMER; + vdo |=3D plug->vdo & TBT_CABLE_LINK_TRAINING; + } else { + vdo |=3D TBT_ENTER_MODE_CABLE_SPEED(TBT_CABLE_USB3_PASSIVE); + } + + tbt->enter_vdo =3D vdo; + return typec_altmode_enter(tbt->alt, &vdo); +} + +static void tbt_altmode_work(struct work_struct *work) +{ + struct tbt_altmode *tbt =3D container_of(work, struct tbt_altmode, work); + int ret; + + mutex_lock(&tbt->lock); + + switch (tbt->state) { + case TBT_STATE_SOP_P_ENTER: + ret =3D typec_altmode_enter(tbt->plug[TYPEC_PLUG_SOP_P], NULL); + if (ret) + dev_dbg(&tbt->plug[TYPEC_PLUG_SOP_P]->dev, + "failed to enter mode (%d)\n", ret); + break; + case TBT_STATE_SOP_PP_ENTER: + ret =3D typec_altmode_enter(tbt->plug[TYPEC_PLUG_SOP_PP], NULL); + if (ret) + dev_dbg(&tbt->plug[TYPEC_PLUG_SOP_PP]->dev, + "failed to enter mode (%d)\n", ret); + break; + case TBT_STATE_ENTER: + ret =3D tbt_enter_mode(tbt); + if (ret) + dev_dbg(&tbt->alt->dev, "failed to enter mode (%d)\n", + ret); + break; + case TBT_STATE_EXIT: + typec_altmode_exit(tbt->alt); + break; + case TBT_STATE_SOP_PP_EXIT: + typec_altmode_exit(tbt->plug[TYPEC_PLUG_SOP_PP]); + break; + case TBT_STATE_SOP_P_EXIT: + typec_altmode_exit(tbt->plug[TYPEC_PLUG_SOP_P]); + break; + default: + break; + } + + tbt->state =3D TBT_STATE_IDLE; + + mutex_unlock(&tbt->lock); +} + +static int tbt_altmode_vdm(struct typec_altmode *alt, + const u32 hdr, const u32 *vdo, int count) +{ + struct tbt_altmode *tbt =3D typec_altmode_get_drvdata(alt); + int cmd_type =3D PD_VDO_CMDT(hdr); + int cmd =3D PD_VDO_CMD(hdr); + + mutex_lock(&tbt->lock); + + if (tbt->state !=3D TBT_STATE_IDLE) { + mutex_unlock(&tbt->lock); + return -EBUSY; + } + + switch (cmd_type) { + case CMDT_RSP_ACK: + switch (cmd) { + case CMD_ENTER_MODE: + /* + * Following the order describeded in USB Type-C Spec + * R2.0 Section 6.7.3. + */ + if (alt =3D=3D tbt->plug[TYPEC_PLUG_SOP_P]) { + if (tbt->plug[TYPEC_PLUG_SOP_PP]) + tbt->state =3D TBT_STATE_SOP_PP_ENTER; + else + tbt->state =3D TBT_STATE_ENTER; + } else if (alt =3D=3D tbt->plug[TYPEC_PLUG_SOP_PP]) { + tbt->state =3D TBT_STATE_ENTER; + } else { + struct typec_thunderbolt_data data; + + data.device_mode =3D tbt->alt->vdo; + data.cable_mode =3D + tbt->plug[TYPEC_PLUG_SOP_P] ? + tbt->plug[TYPEC_PLUG_SOP_P] + ->vdo : + 0; + data.enter_vdo =3D tbt->enter_vdo; + + typec_altmode_notify(alt, TYPEC_STATE_MODAL, &data); + } + break; + case CMD_EXIT_MODE: + if (alt =3D=3D tbt->alt) { + if (tbt->plug[TYPEC_PLUG_SOP_PP]) + tbt->state =3D TBT_STATE_SOP_PP_EXIT; + else if (tbt->plug[TYPEC_PLUG_SOP_P]) + tbt->state =3D TBT_STATE_SOP_P_EXIT; + } else if (alt =3D=3D tbt->plug[TYPEC_PLUG_SOP_PP]) { + tbt->state =3D TBT_STATE_SOP_P_EXIT; + } + break; + } + break; + case CMDT_RSP_NAK: + switch (cmd) { + case CMD_ENTER_MODE: + dev_warn(&alt->dev, "Enter Mode refused\n"); + break; + default: + break; + } + break; + default: + break; + } + + if (tbt->state !=3D TBT_STATE_IDLE) + schedule_work(&tbt->work); + + mutex_unlock(&tbt->lock); + + return 0; +} + +static int tbt_altmode_activate(struct typec_altmode *alt, int activate) +{ + struct tbt_altmode *tbt =3D typec_altmode_get_drvdata(alt); + int ret; + + mutex_lock(&tbt->lock); + + if (!tbt_ready(alt)) + return -ENODEV; + + /* Preventing the user space from entering/exiting the cable alt mode */ + if (alt !=3D tbt->alt) + ret =3D -EPERM; + else if (activate) + ret =3D tbt_enter_mode(tbt); + else + ret =3D typec_altmode_exit(alt); + + mutex_unlock(&tbt->lock); + + return ret; +} + +static const struct typec_altmode_ops tbt_altmode_ops =3D { + .vdm =3D tbt_altmode_vdm, + .activate =3D tbt_altmode_activate +}; + +static int tbt_altmode_probe(struct typec_altmode *alt) +{ + struct tbt_altmode *tbt; + + tbt =3D devm_kzalloc(&alt->dev, sizeof(*tbt), GFP_KERNEL); + if (!tbt) + return -ENOMEM; + + INIT_WORK(&tbt->work, tbt_altmode_work); + mutex_init(&tbt->lock); + tbt->alt =3D alt; + + alt->desc =3D "Thunderbolt3"; + typec_altmode_set_drvdata(alt, tbt); + typec_altmode_set_ops(alt, &tbt_altmode_ops); + + if (tbt_ready(alt)) { + if (tbt->plug[TYPEC_PLUG_SOP_PP]) + tbt->state =3D TBT_STATE_SOP_PP_ENTER; + else if (tbt->plug[TYPEC_PLUG_SOP_P]) + tbt->state =3D TBT_STATE_SOP_P_ENTER; + else + tbt->state =3D TBT_STATE_ENTER; + schedule_work(&tbt->work); + } + + return 0; +} + +static void tbt_altmode_remove(struct typec_altmode *alt) +{ + struct tbt_altmode *tbt =3D typec_altmode_get_drvdata(alt); + + for (int i =3D TYPEC_PLUG_SOP_PP; i > 0; --i) { + if (tbt->plug[i]) + typec_altmode_put_plug(tbt->plug[i]); + } + + if (tbt->cable) + typec_cable_put(tbt->cable); +} + +static bool tbt_ready(struct typec_altmode *alt) +{ + struct tbt_altmode *tbt =3D typec_altmode_get_drvdata(alt); + struct typec_altmode *plug; + + if (tbt->cable) + return true; + + /* Thundebolt 3 requires a cable with eMarker */ + tbt->cable =3D typec_cable_get(typec_altmode2port(tbt->alt)); + if (!tbt->cable) + return false; + + /* We accept systems without SOP' or SOP''. This means the port altmode + * driver will be responsible for properly ordering entry/exit. + */ + for (int i =3D 0; i < TYPEC_PLUG_SOP_PP + 1; i++) { + plug =3D typec_altmode_get_plug(tbt->alt, i); + if (IS_ERR(plug)) + continue; + + if (!plug || plug->svid !=3D USB_TYPEC_VENDOR_INTEL) + break; + + plug->desc =3D "Thunderbolt3"; + plug->ops =3D &tbt_altmode_ops; + typec_altmode_set_drvdata(plug, tbt); + + tbt->plug[i] =3D plug; + } + + return true; +} + +static const struct typec_device_id tbt_typec_id[] =3D { + { USB_TYPEC_TBT_SID, USB_TYPEC_TBT_MODE }, + { } +}; +MODULE_DEVICE_TABLE(typec, tbt_typec_id); + +static struct typec_altmode_driver tbt_altmode_driver =3D { + .id_table =3D tbt_typec_id, + .probe =3D tbt_altmode_probe, + .remove =3D tbt_altmode_remove, + .driver =3D { + .name =3D "typec-thunderbolt", + .owner =3D THIS_MODULE, + } +}; +module_typec_altmode_driver(tbt_altmode_driver); + +MODULE_AUTHOR("Heikki Krogerus "); +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Thunderbolt3 USB Type-C Alternate Mode"); diff --git a/include/linux/usb/typec_tbt.h b/include/linux/usb/typec_tbt.h index fa97d7e00f5c..3ff82641f6a0 100644 --- a/include/linux/usb/typec_tbt.h +++ b/include/linux/usb/typec_tbt.h @@ -10,7 +10,7 @@ #define USB_TYPEC_TBT_SID USB_TYPEC_VENDOR_INTEL =20 /* Connector state for Thunderbolt3 */ -#define TYPEC_TBT_MODE TYPEC_STATE_MODAL +#define USB_TYPEC_TBT_MODE TYPEC_STATE_MODAL =20 /** * struct typec_thunderbolt_data - Thundebolt3 Alt Mode specific data @@ -44,6 +44,7 @@ struct typec_thunderbolt_data { =20 #define TBT_GEN3_NON_ROUNDED 0 #define TBT_GEN3_GEN4_ROUNDED_NON_ROUNDED 1 +#define TBT_CABLE_ROUNDED BIT(19) #define TBT_CABLE_OPTICAL BIT(21) #define TBT_CABLE_RETIMER BIT(22) #define TBT_CABLE_LINK_TRAINING BIT(23) --=20 2.47.0.163.g1226f6d8fa-goog From nobody Mon Nov 25 00:42:18 2024 Received: from mail-pf1-f170.google.com (mail-pf1-f170.google.com [209.85.210.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 13F60217479 for ; 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[35.247.103.198]) by smtp.gmail.com with UTF8SMTPSA id 41be03b00d2f7-7ee452979e4sm36885a12.9.2024.10.30.14.29.07 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Oct 2024 14:29:08 -0700 (PDT) From: Abhishek Pandit-Subedi To: heikki.krogerus@linux.intel.com, tzungbi@kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: dmitry.baryshkov@linaro.org, jthies@google.com, akuchynski@google.com, pmalani@chromium.org, Abhishek Pandit-Subedi , Greg Kroah-Hartman , linux-kernel@vger.kernel.org Subject: [PATCH v2 2/7] usb: typec: Only use SVID for matching altmodes Date: Wed, 30 Oct 2024 14:28:33 -0700 Message-ID: <20241030142833.v2.2.Ie0d37646f18461234777d88b4c3e21faed92ed4f@changeid> X-Mailer: git-send-email 2.47.0.163.g1226f6d8fa-goog In-Reply-To: <20241030212854.998318-1-abhishekpandit@chromium.org> References: <20241030212854.998318-1-abhishekpandit@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Mode in struct typec_altmode is used to indicate the index of the altmode on a port, partner or plug. When searching for altmodes, it doesn't make sense to use the mode as a criteria since it could be any value depending on the enumeration order of the driver. Signed-off-by: Abhishek Pandit-Subedi Reviewed-by: Heikki Krogerus --- Changes in v2: - Update altmode_match to ignore mode entirely - Also apply the same behavior to typec_match drivers/usb/typec/bus.c | 3 +-- drivers/usb/typec/class.c | 2 +- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/usb/typec/bus.c b/drivers/usb/typec/bus.c index aa879253d3b8..a5cb4bbb877d 100644 --- a/drivers/usb/typec/bus.c +++ b/drivers/usb/typec/bus.c @@ -454,8 +454,7 @@ static int typec_match(struct device *dev, const struct= device_driver *driver) const struct typec_device_id *id; =20 for (id =3D drv->id_table; id->svid; id++) - if (id->svid =3D=3D altmode->svid && - (id->mode =3D=3D TYPEC_ANY_MODE || id->mode =3D=3D altmode->mode)) + if (id->svid =3D=3D altmode->svid) return 1; return 0; } diff --git a/drivers/usb/typec/class.c b/drivers/usb/typec/class.c index bd41abceb050..85494b9f7502 100644 --- a/drivers/usb/typec/class.c +++ b/drivers/usb/typec/class.c @@ -237,7 +237,7 @@ static int altmode_match(struct device *dev, void *data) if (!is_typec_altmode(dev)) return 0; =20 - return ((adev->svid =3D=3D id->svid) && (adev->mode =3D=3D id->mode)); + return (adev->svid =3D=3D id->svid); } =20 static void typec_altmode_set_partner(struct altmode *altmode) --=20 2.47.0.163.g1226f6d8fa-goog From nobody Mon Nov 25 00:42:18 2024 Received: from mail-pg1-f178.google.com (mail-pg1-f178.google.com [209.85.215.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9EF1D215C72 for ; Wed, 30 Oct 2024 21:29:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730323753; cv=none; b=jqtxyvL9Y90szCTN5bvUsCxbnQw9P6Lh5HxcJv2hbNNIgXCxIG1lIUsPQCyq0q3ibPmsmZ+OSbZIxLnlSfUpgaahmq612rYnysZxt+o5zvD1lHHwi55C6uciOatf3b2iioRggjckLG3NEJs/yK10Wvyf4zqWwTqvOLoDWooRZuc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730323753; c=relaxed/simple; bh=wmoTH6RDMvSrIitc+RyQ8z5eGj/rSYnzG0QzoUpsshA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=GrpJWtiT0S+WfboorblLXqG4AOED7GgkCxQfgcyg9o/dvysudub30JNl1LH+ONawH/CUYGXEIaGrfl6uBdaGq6bAbtdJfvDVZXAXkrumapFvLY3qDpMteFkAGfXzuGVlRi1wbS5+INhuryC7deBU7de+Qvx+B3DKHxlEqtxC9O0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org; spf=pass smtp.mailfrom=chromium.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b=ctwky1Bl; arc=none smtp.client-ip=209.85.215.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="ctwky1Bl" Received: by mail-pg1-f178.google.com with SMTP id 41be03b00d2f7-7ea68af2f62so288574a12.3 for ; Wed, 30 Oct 2024 14:29:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1730323750; x=1730928550; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XcJ6rYdsw1OyRONz4zGVh02ld/8YsK6wUyzfWA/Y9e4=; b=ctwky1BlJ4LdpQj2KLWdI0KGmNxRPbAHE8a/a3hWCYzBGrdwimrLRrXaCdX5F6ikBz udRoPKJdO5MvENQcqF4UfT7GFuzLIDvWFCElxzrc5ZJ/o7rSkKcPBIRTbjYpH9z9HDyp A6TVM2uCy3+yg7GlLmwLvqOKvrVlAkPZ28MZI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730323750; x=1730928550; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XcJ6rYdsw1OyRONz4zGVh02ld/8YsK6wUyzfWA/Y9e4=; b=sV8Ph8bwmq9aI+cxLmfQckF6dC+e1GIl81ANbUrR0Gf+3vm8umzDiABJNijlncar2m a0xknAEkaohiCafzYpdKgpDtt4RSqg/YMOqmw9LtMqVliXEYjfP7BzNF1MdZBR++YsiT oULDGTGfVdxYxymILkkw6T9zSbEpwNxggI1X4++nTQG2TQzweEvKGFdxeCBbHfwWyK26 ri2EgbkkznI85ybA5HQgRyXNJnpcztmre7f61QUgCGTWsOvdmJSb51GAv/UjdZfXQGpS YCVjHBEosp/f/YB6ILle2sY3Jjz/weMZyrImjNJY74NnO56lqnjIGUOm+LpHr+wxGKfJ D8ng== X-Forwarded-Encrypted: i=1; AJvYcCXVLc+7djNrqU982ng+jOKDq8bfyWfGGlgTfIcEvWrBvB3K70s+IgqslRsDHqobfKGSAEMlqG2t+SkmsJ8=@vger.kernel.org X-Gm-Message-State: AOJu0YwCjyFufIyDlnHOdCIuFoOgost/hUcDozR/N/aNotuUkJMGZxf9 xIEndoLvwbT3mhe1V98yqxz7I3i3lMrvijjqy0Cyp2Vt6sVWgWMInm2om+ld2g== X-Google-Smtp-Source: AGHT+IHxkwiPUzOjIQu7smhe9Fr6RzmKM9yzxhOhZb+U58++hpr/bZMA54sfwCVhxTtriq/TmBMRSA== X-Received: by 2002:a05:6a21:3984:b0:1d8:a759:524d with SMTP id adf61e73a8af0-1d9a83d60cfmr20785025637.18.1730323750045; Wed, 30 Oct 2024 14:29:10 -0700 (PDT) Received: from localhost (198.103.247.35.bc.googleusercontent.com. [35.247.103.198]) by smtp.gmail.com with UTF8SMTPSA id d2e1a72fcca58-720bc2eb76esm76989b3a.154.2024.10.30.14.29.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Oct 2024 14:29:09 -0700 (PDT) From: Abhishek Pandit-Subedi To: heikki.krogerus@linux.intel.com, tzungbi@kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: dmitry.baryshkov@linaro.org, jthies@google.com, akuchynski@google.com, pmalani@chromium.org, Abhishek Pandit-Subedi , Greg Kroah-Hartman , linux-kernel@vger.kernel.org Subject: [PATCH v2 3/7] usb: typec: Auto enter control for alternate modes Date: Wed, 30 Oct 2024 14:28:34 -0700 Message-ID: <20241030142833.v2.3.I439cffc7bf76d94f5850eb85980f1197c4f9154c@changeid> X-Mailer: git-send-email 2.47.0.163.g1226f6d8fa-goog In-Reply-To: <20241030212854.998318-1-abhishekpandit@chromium.org> References: <20241030212854.998318-1-abhishekpandit@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add controls for whether an alternate mode is automatically entered when a partner connects. The auto_enter control is only available on ports and applies immediately after a partner connects. The default behavior is to enable auto enter and drivers must explicitly disable it. Signed-off-by: Abhishek Pandit-Subedi --- (no changes since v1) Documentation/ABI/testing/sysfs-bus-typec | 9 +++++++ drivers/usb/typec/altmodes/displayport.c | 6 +++-- drivers/usb/typec/altmodes/thunderbolt.c | 3 ++- drivers/usb/typec/class.c | 31 +++++++++++++++++++++++ include/linux/usb/typec.h | 2 ++ include/linux/usb/typec_altmode.h | 2 ++ 6 files changed, 50 insertions(+), 3 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-bus-typec b/Documentation/ABI/= testing/sysfs-bus-typec index 205d9c91e2e1..f09d05727b82 100644 --- a/Documentation/ABI/testing/sysfs-bus-typec +++ b/Documentation/ABI/testing/sysfs-bus-typec @@ -12,6 +12,15 @@ Description: =20 Valid values are boolean. =20 +What: /sys/bus/typec/devices/.../auto_enter +Date: September 2024 +Contact: Heikki Krogerus +Description: + Controls whether a mode will be automatically entered when a partner is + connected. + + This field is only valid and displayed on a port. Valid values are boole= an. + What: /sys/bus/typec/devices/.../description Date: July 2018 Contact: Heikki Krogerus diff --git a/drivers/usb/typec/altmodes/displayport.c b/drivers/usb/typec/a= ltmodes/displayport.c index 2f03190a9873..62263f1d3a72 100644 --- a/drivers/usb/typec/altmodes/displayport.c +++ b/drivers/usb/typec/altmodes/displayport.c @@ -767,8 +767,10 @@ int dp_altmode_probe(struct typec_altmode *alt) if (plug) typec_altmode_set_drvdata(plug, dp); =20 - dp->state =3D plug ? DP_STATE_ENTER_PRIME : DP_STATE_ENTER; - schedule_work(&dp->work); + if (port->auto_enter) { + dp->state =3D plug ? DP_STATE_ENTER_PRIME : DP_STATE_ENTER; + schedule_work(&dp->work); + } =20 return 0; } diff --git a/drivers/usb/typec/altmodes/thunderbolt.c b/drivers/usb/typec/a= ltmodes/thunderbolt.c index 8380b22d26a7..181892bf1225 100644 --- a/drivers/usb/typec/altmodes/thunderbolt.c +++ b/drivers/usb/typec/altmodes/thunderbolt.c @@ -212,6 +212,7 @@ static const struct typec_altmode_ops tbt_altmode_ops = =3D { =20 static int tbt_altmode_probe(struct typec_altmode *alt) { + const struct typec_altmode *port =3D typec_altmode_get_partner(alt); struct tbt_altmode *tbt; =20 tbt =3D devm_kzalloc(&alt->dev, sizeof(*tbt), GFP_KERNEL); @@ -226,7 +227,7 @@ static int tbt_altmode_probe(struct typec_altmode *alt) typec_altmode_set_drvdata(alt, tbt); typec_altmode_set_ops(alt, &tbt_altmode_ops); =20 - if (tbt_ready(alt)) { + if (port->auto_enter && tbt_ready(alt)) { if (tbt->plug[TYPEC_PLUG_SOP_PP]) tbt->state =3D TBT_STATE_SOP_PP_ENTER; else if (tbt->plug[TYPEC_PLUG_SOP_P]) diff --git a/drivers/usb/typec/class.c b/drivers/usb/typec/class.c index 85494b9f7502..e74f835c6859 100644 --- a/drivers/usb/typec/class.c +++ b/drivers/usb/typec/class.c @@ -403,6 +403,31 @@ static ssize_t active_store(struct device *dev, struct= device_attribute *attr, } static DEVICE_ATTR_RW(active); =20 +static ssize_t +auto_enter_show(struct device *dev, struct device_attribute *attr, char *b= uf) +{ + struct typec_altmode *alt =3D to_typec_altmode(dev); + + return sprintf(buf, "%s\n", alt->auto_enter ? "yes" : "no"); +} + +static ssize_t auto_enter_store(struct device *dev, struct device_attribut= e *attr, + const char *buf, size_t size) +{ + struct typec_altmode *adev =3D to_typec_altmode(dev); + bool auto_enter; + int ret; + + ret =3D kstrtobool(buf, &auto_enter); + if (ret) + return ret; + + adev->auto_enter =3D auto_enter; + + return size; +} +static DEVICE_ATTR_RW(auto_enter); + static ssize_t supported_roles_show(struct device *dev, struct device_attribute *attr, char *buf) @@ -446,6 +471,7 @@ static DEVICE_ATTR_RO(svid); =20 static struct attribute *typec_altmode_attrs[] =3D { &dev_attr_active.attr, + &dev_attr_auto_enter.attr, &dev_attr_mode.attr, &dev_attr_svid.attr, &dev_attr_vdo.attr, @@ -461,6 +487,10 @@ static umode_t typec_altmode_attr_is_visible(struct ko= bject *kobj, if (!adev->ops || !adev->ops->activate) return 0444; =20 + if (attr =3D=3D &dev_attr_auto_enter.attr) + if (!is_typec_port(adev->dev.parent)) + return 0; + return attr->mode; } =20 @@ -564,6 +594,7 @@ typec_register_altmode(struct device *parent, if (is_port) { alt->attrs[3] =3D &dev_attr_supported_roles.attr; alt->adev.active =3D true; /* Enabled by default */ + alt->adev.auto_enter =3D !desc->no_auto_enter; } =20 sprintf(alt->group_name, "mode%d", desc->mode); diff --git a/include/linux/usb/typec.h b/include/linux/usb/typec.h index d616b8807000..5336b7c92ca4 100644 --- a/include/linux/usb/typec.h +++ b/include/linux/usb/typec.h @@ -139,6 +139,7 @@ int typec_cable_set_identity(struct typec_cable *cable); * @svid: Standard or Vendor ID * @mode: Index of the Mode * @vdo: VDO returned by Discover Modes USB PD command + * @no_auto_enter: Only for ports. Disables auto enter which is default be= havior. * @roles: Only for ports. DRP if the mode is available in both roles * * Description of an Alternate Mode which a connector, cable plug or partn= er @@ -148,6 +149,7 @@ struct typec_altmode_desc { u16 svid; u8 mode; u32 vdo; + bool no_auto_enter; /* Only used with ports */ enum typec_port_data roles; }; diff --git a/include/linux/usb/typec_altmode.h b/include/linux/usb/typec_al= tmode.h index b3c0866ea70f..ab7c3ebe4926 100644 --- a/include/linux/usb/typec_altmode.h +++ b/include/linux/usb/typec_altmode.h @@ -18,6 +18,7 @@ struct typec_altmode_ops; * @mode: Index of the Mode * @vdo: VDO returned by Discover Modes USB PD command * @active: Tells has the mode been entered or not + * @auto_enter: Tells whether to auto-enter mode (only valid for port mode= ). * @desc: Optional human readable description of the mode * @ops: Operations vector from the driver * @cable_ops: Cable operations vector from the driver. @@ -28,6 +29,7 @@ struct typec_altmode { int mode; u32 vdo; unsigned int active:1; + unsigned int auto_enter:1; =20 char *desc; const struct typec_altmode_ops *ops; --=20 2.47.0.163.g1226f6d8fa-goog From nobody Mon Nov 25 00:42:18 2024 Received: from mail-pj1-f43.google.com (mail-pj1-f43.google.com [209.85.216.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 41FE12178FD for ; Wed, 30 Oct 2024 21:29:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730323754; cv=none; b=VOxqRCWlljC0pX6YG3UaT+6vBxieh3/jZe8mCb5ZiRMaytmKeQTypvmRzJFiaS7ojG9eg5PPWkne3IA/kwtVtuwv0kiX1v6mtw+X9/5AwAVTCmEeMt1T3Wkk6z/u932a0TkCFo+Xr7g2q9odXDIjpwJ10/CJZEgDWM7B1UVGoxM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730323754; c=relaxed/simple; bh=0F0599rOKHxfQvf7XtskB5Mt/xYLB1cPEJKxRmRO258=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=TB/mzZkiAvPuKPMXBJ8cUPC9xRAeJKqLSjKjWDyJ5nMUrPzDPvjG558YKqPYhlXykrDKUaw7w8wRTyc7UcjprKlRu7ppHG6DbVNEhCg5huN4QkansIGTmwLhwJjY0WMNVAkx7sTwlBzkspEl0IretKkFtJIFPZCTqMzU+KuCtng= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org; spf=pass smtp.mailfrom=chromium.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b=XAlGnXJa; arc=none smtp.client-ip=209.85.216.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="XAlGnXJa" Received: by mail-pj1-f43.google.com with SMTP id 98e67ed59e1d1-2e2e2d09decso1092678a91.1 for ; Wed, 30 Oct 2024 14:29:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1730323751; x=1730928551; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dCXmBmJO0w4Chs93Xm3BeF6wgI3Tb8Gd24Xh4PooSyo=; b=XAlGnXJaz2B2u2uBBL2Q66lBVA+GuGGlDQ/1nTaCdzAlGXPjluXtYbWs542W2smDXq MjxyKgWrCxihXAwRi3bExtyknkClOcfEJwrukXnBh/nuKjIc5jV+LJFRtmtnIhvHJS0O TmQrKbjTXFyom9abMo1zoPiBHn4+FQT95yCeM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730323751; x=1730928551; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dCXmBmJO0w4Chs93Xm3BeF6wgI3Tb8Gd24Xh4PooSyo=; b=bKHs+humsTP2snW5ogXtlQeOXsu7MV5j6TMLOA6eY8AjuXfkLhPsPclKKoOCTAW364 htxROqVQPZ7+ZsH5u9Ee2j38Sf2cVvJuyD4Y52R8fc3uQjPteXJYVjAKRwL0wka/Agim y42LGPk5dzF6NVb7d+jd+zKD9PZX4VbPdMmlOSE8ETl9gWTccL59D+sQH4w1ozAtyKoF S8RuMYj6KAlgnekCzqydj1/4MKZhBGL5bQLUCPV2oTc+BMqcsvQ6XI3FGNisdiFWBov1 iEoJyF6wct9EJalFesX7qWKtye8EnWLIz//G/chVL/UKyO4CSlUl1d7PWdrItievpf1R F7UA== X-Forwarded-Encrypted: i=1; AJvYcCUCnGze6Yzm8gyVaM4JjHcFawSyJgDFpPjtY02zXJvJlN03UKyfHG8HhdzMvtEnBnwFdG7HPKGMDoiRXAo=@vger.kernel.org X-Gm-Message-State: AOJu0YyYZFgYv1jBEeF5pjwb/tGjB8eo2RNNvppo+w/VH8K0sTlXwS89 shgjVorLRkIx+oio+Jf7Qsvs/vE1mnt4lUpjaVZKBB/anH6Ks3cM0n/ZVID4UQ== X-Google-Smtp-Source: AGHT+IHBRIrLXFaaBv6UUOjhdIM7tK6tsQj3oOcxvxYkMmGaYVMHAjdBu/AmhHynbAxlaCZw2kdHoQ== X-Received: by 2002:a17:90b:1b4a:b0:2e9:20d8:414c with SMTP id 98e67ed59e1d1-2e93e0139a2mr257317a91.5.1730323751676; Wed, 30 Oct 2024 14:29:11 -0700 (PDT) Received: from localhost (198.103.247.35.bc.googleusercontent.com. [35.247.103.198]) by smtp.gmail.com with UTF8SMTPSA id 98e67ed59e1d1-2e93daac455sm141073a91.19.2024.10.30.14.29.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Oct 2024 14:29:11 -0700 (PDT) From: Abhishek Pandit-Subedi To: heikki.krogerus@linux.intel.com, tzungbi@kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: dmitry.baryshkov@linaro.org, jthies@google.com, akuchynski@google.com, pmalani@chromium.org, Abhishek Pandit-Subedi , Benson Leung , Guenter Roeck , linux-kernel@vger.kernel.org Subject: [PATCH v2 4/7] platform/chrome: cros_ec_typec: Update partner altmode active Date: Wed, 30 Oct 2024 14:28:35 -0700 Message-ID: <20241030142833.v2.4.I083bf9188947be8cb7460211cfdf3233370a28f6@changeid> X-Mailer: git-send-email 2.47.0.163.g1226f6d8fa-goog In-Reply-To: <20241030212854.998318-1-abhishekpandit@chromium.org> References: <20241030212854.998318-1-abhishekpandit@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Mux configuration is often the final piece of mode entry and can be used to determine whether a partner altmode is active. When mux configuration is done, use the active port altmode's SVID to set the partner active field for all partner alt modes. Signed-off-by: Abhishek Pandit-Subedi --- (no changes since v1) drivers/platform/chrome/cros_ec_typec.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chr= ome/cros_ec_typec.c index 53d93baa36a8..0c8db11bd8a4 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -618,6 +618,7 @@ static int cros_typec_configure_mux(struct cros_typec_d= ata *typec, int port_num, }; struct ec_params_usb_pd_mux_ack mux_ack; enum typec_orientation orientation; + struct cros_typec_altmode_node *node, *n; int ret; =20 ret =3D cros_ec_cmd(typec->ec, 0, EC_CMD_USB_PD_MUX_INFO, @@ -676,6 +677,16 @@ static int cros_typec_configure_mux(struct cros_typec_= data *typec, int port_num, port->mux_flags); } =20 + /* Iterate all partner alt-modes and set the active alternate mode. */ + list_for_each_entry_safe(node, n, &port->partner_mode_list, list) { + if (port->state.alt !=3D NULL && + node->amode->svid =3D=3D port->state.alt->svid) { + typec_altmode_update_active(node->amode, true); + } else { + typec_altmode_update_active(node->amode, false); + } + } + mux_ack: if (!typec->needs_mux_ack) return ret; --=20 2.47.0.163.g1226f6d8fa-goog From nobody Mon Nov 25 00:42:18 2024 Received: from mail-pf1-f173.google.com (mail-pf1-f173.google.com [209.85.210.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2ABE521765A for ; Wed, 30 Oct 2024 21:29:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730323756; cv=none; b=h2ZL4qdDI/oo6TiGKgeaCvh8Twbm5yekLZaeBu0WIBM6fl6MDPqCTQgtTm0qUhk9zJ51Se83lDrV9vqp877sT8oRVvkt/QcsnTfP5uCiwNXwMuhE7q3kEvHGPD3al8tvv026OgmEUkUWiNB3z4d1uX3+W9LrJ2nlKMq+uhbVJ0A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730323756; c=relaxed/simple; bh=uMeysR189IthOyETjVc8vjImbzvEmWjmALZpdXtfhNg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=M8S9cfMpH1DmLquKzYG/WLGxEdqkTg1b7efKEWG6D5OielMMLqi5JoR4X5+1GQZSDzESHdKBus/5xg+/2+djOvDHjbiKk995koU5hnCrAHKTneP0urIl555vEUkN7WbUQzFgGMRetuhevQoZHF6W5YcBk6lfzDt31aOWz3IiID8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org; spf=pass smtp.mailfrom=chromium.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b=oHK1j9A4; arc=none smtp.client-ip=209.85.210.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=chromium.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=chromium.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="oHK1j9A4" Received: by mail-pf1-f173.google.com with SMTP id d2e1a72fcca58-71e49ad46b1so212620b3a.1 for ; Wed, 30 Oct 2024 14:29:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; t=1730323753; x=1730928553; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=G5F33qV6ofAibcr8moJJ8wWx5Tp3luAqpEsJU6dkvkI=; b=oHK1j9A4dF0/7/GdsnB9Oxk2PLibwVtBJRlD46y/jLsSW2h/6vyQpt8GCQP5yFdrJY IJQfeYgB94cLCtVA60nwpJtphM3P3Oim+P6Pzgy8zaF/5FdQ9FWSDc1908YmJG+ZHoof OQLi2c39iBI7aMM4AwV1RePsi4Qu4H/qvzMtU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730323753; x=1730928553; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=G5F33qV6ofAibcr8moJJ8wWx5Tp3luAqpEsJU6dkvkI=; b=ucIgTnqklh3F+japAgCC0RwHThYMkOl+RZFtv/dh2Jx7gfSbCCkpyEUiCJxenscSiW 7qkLvBW8tUaVFHa1j368u4A9+HE7HaVoxuvpFU6tQckqU2Q/MkaxMStrpGlxaEQxomdE lFLwphX4PwxwdGo4+q6ufae2MFMo41zJ8MvkM2MJ80veutZotZrDa0nYMd6GJKFXwm0Z KqZ+klOxd+R/dRBEg6Pp5pc5wyUy0z4jB1d8UymoQIbOydjL+UEgGy9FA/r3+iht5nnI PPDCrtpx1ca+2vSv9KnQXcSoTZUe7KS40NtTWqTi7lSPeEtcbfuGrGhSsWZRaz6HmnEm T1CA== X-Forwarded-Encrypted: i=1; AJvYcCXJ8Z4OvarL+5IswR1PG4VXLjxHU8XZdTnHPzAAoMEGwgcwyxSyS5tIUn7ZCBnkLywhaWeeMrL+Nj8dsQ8=@vger.kernel.org X-Gm-Message-State: AOJu0YywhAVewWun0KuZdY3tInnoW6rJoxYlfRvYwUwUrtps5bFSHQJP 6hV1CHodeKsTDKb52qontGJe/aA6OSYTux9Ls741Q1auWT8SIr4VlbkNsjS4ZA== X-Google-Smtp-Source: AGHT+IG3h/s8BEHneIECR74Vhcotk/tJPVp1H5/oohF4H43/iSeH9VOVd5Em8mOeT0ufiALdl9qWUQ== X-Received: by 2002:a05:6a00:80c:b0:71e:5d1d:1aa0 with SMTP id d2e1a72fcca58-72062f4e529mr24388059b3a.6.1730323753267; Wed, 30 Oct 2024 14:29:13 -0700 (PDT) Received: from localhost (198.103.247.35.bc.googleusercontent.com. [35.247.103.198]) by smtp.gmail.com with UTF8SMTPSA id d2e1a72fcca58-720bc31b40csm74200b3a.209.2024.10.30.14.29.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Oct 2024 14:29:12 -0700 (PDT) From: Abhishek Pandit-Subedi To: heikki.krogerus@linux.intel.com, tzungbi@kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: dmitry.baryshkov@linaro.org, jthies@google.com, akuchynski@google.com, pmalani@chromium.org, Abhishek Pandit-Subedi , Benson Leung , Guenter Roeck , linux-kernel@vger.kernel.org Subject: [PATCH v2 5/7] platform/chrome: cros_ec_typec: Displayport support Date: Wed, 30 Oct 2024 14:28:36 -0700 Message-ID: <20241030142833.v2.5.I142fc0c09df58689b98f0cebf1c5e48b9d4fa800@changeid> X-Mailer: git-send-email 2.47.0.163.g1226f6d8fa-goog In-Reply-To: <20241030212854.998318-1-abhishekpandit@chromium.org> References: <20241030212854.998318-1-abhishekpandit@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for entering and exiting displayport alt-mode on systems using AP driven alt-mode. Signed-off-by: Abhishek Pandit-Subedi --- Changes in v2: - Refactored displayport into cros_typec_altmode.c to extract common implementation between altmodes MAINTAINERS | 3 + drivers/platform/chrome/Makefile | 3 +- drivers/platform/chrome/cros_ec_typec.c | 13 +- drivers/platform/chrome/cros_ec_typec.h | 1 + drivers/platform/chrome/cros_typec_altmode.c | 277 +++++++++++++++++++ drivers/platform/chrome/cros_typec_altmode.h | 34 +++ 6 files changed, 329 insertions(+), 2 deletions(-) create mode 100644 drivers/platform/chrome/cros_typec_altmode.c create mode 100644 drivers/platform/chrome/cros_typec_altmode.h diff --git a/MAINTAINERS b/MAINTAINERS index e9659a5a7fb3..de99bcbda7d4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5369,9 +5369,12 @@ F: include/linux/platform_data/cros_usbpd_notify.h =20 CHROMEOS EC USB TYPE-C DRIVER M: Prashant Malani +M: Benson Leung +M: Abhishek Pandit-Subedi L: chrome-platform@lists.linux.dev S: Maintained F: drivers/platform/chrome/cros_ec_typec.* +F: drivers/platform/chrome/cros_typec_altmode.* F: drivers/platform/chrome/cros_typec_switch.c F: drivers/platform/chrome/cros_typec_vdm.* =20 diff --git a/drivers/platform/chrome/Makefile b/drivers/platform/chrome/Mak= efile index 2dcc6ccc2302..8b007404c024 100644 --- a/drivers/platform/chrome/Makefile +++ b/drivers/platform/chrome/Makefile @@ -17,8 +17,9 @@ obj-$(CONFIG_CROS_EC_RPMSG) +=3D cros_ec_rpmsg.o obj-$(CONFIG_CROS_EC_SPI) +=3D cros_ec_spi.o obj-$(CONFIG_CROS_EC_UART) +=3D cros_ec_uart.o cros_ec_lpcs-objs :=3D cros_ec_lpc.o cros_ec_lpc_mec.o -cros-ec-typec-objs :=3D cros_ec_typec.o cros_typec_vdm.o +cros-ec-typec-objs :=3D cros_ec_typec.o cros_typec_vdm.o cros_typec_altm= ode.o obj-$(CONFIG_CROS_EC_TYPEC) +=3D cros-ec-typec.o + obj-$(CONFIG_CROS_EC_LPC) +=3D cros_ec_lpcs.o obj-$(CONFIG_CROS_EC_PROTO) +=3D cros_ec_proto.o cros_ec_trace.o obj-$(CONFIG_CROS_KBD_LED_BACKLIGHT) +=3D cros_kbd_led_backlight.o diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chr= ome/cros_ec_typec.c index 0c8db11bd8a4..7997e7136c4c 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -18,6 +18,7 @@ =20 #include "cros_ec_typec.h" #include "cros_typec_vdm.h" +#include "cros_typec_altmode.h" =20 #define DRV_NAME "cros-ec-typec" =20 @@ -293,12 +294,16 @@ static int cros_typec_register_port_altmodes(struct c= ros_typec_data *typec, desc.svid =3D USB_TYPEC_DP_SID; desc.mode =3D USB_TYPEC_DP_MODE; desc.vdo =3D DP_PORT_VDO; - amode =3D typec_port_register_altmode(port->port, &desc); + amode =3D cros_typec_register_displayport(port, &desc, + typec->ap_driven_altmode); if (IS_ERR(amode)) return PTR_ERR(amode); port->port_altmode[CROS_EC_ALTMODE_DP] =3D amode; + +#if !IS_ENABLED(CONFIG_TYPEC_DP_ALTMODE) typec_altmode_set_drvdata(amode, port); amode->ops =3D &port_amode_ops; +#endif =20 /* * Register TBT compatibility alt mode. The EC will not enter the mode @@ -575,6 +580,10 @@ static int cros_typec_enable_dp(struct cros_typec_data= *typec, if (!ret) ret =3D typec_mux_set(port->mux, &port->state); =20 + if (!ret) + cros_typec_displayport_status_update(port->state.alt, + port->state.data); + return ret; } =20 @@ -1254,6 +1263,8 @@ static int cros_typec_probe(struct platform_device *p= dev) =20 typec->typec_cmd_supported =3D cros_ec_check_features(ec_dev, EC_FEATURE_= TYPEC_CMD); typec->needs_mux_ack =3D cros_ec_check_features(ec_dev, EC_FEATURE_TYPEC_= MUX_REQUIRE_AP_ACK); + typec->ap_driven_altmode =3D cros_ec_check_features( + ec_dev, EC_FEATURE_TYPEC_REQUIRE_AP_MODE_ENTRY); =20 ret =3D cros_ec_cmd(typec->ec, 0, EC_CMD_USB_PD_PORTS, NULL, 0, &resp, sizeof(resp)); diff --git a/drivers/platform/chrome/cros_ec_typec.h b/drivers/platform/chr= ome/cros_ec_typec.h index deda180a646f..9fd5342bb0ad 100644 --- a/drivers/platform/chrome/cros_ec_typec.h +++ b/drivers/platform/chrome/cros_ec_typec.h @@ -39,6 +39,7 @@ struct cros_typec_data { struct work_struct port_work; bool typec_cmd_supported; bool needs_mux_ack; + bool ap_driven_altmode; }; =20 /* Per port data. */ diff --git a/drivers/platform/chrome/cros_typec_altmode.c b/drivers/platfor= m/chrome/cros_typec_altmode.c new file mode 100644 index 000000000000..af2f077674f1 --- /dev/null +++ b/drivers/platform/chrome/cros_typec_altmode.c @@ -0,0 +1,277 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Alt-mode implementation on ChromeOS EC. + * + * Copyright 2024 Google LLC + * Author: Abhishek Pandit-Subedi + */ +#include "cros_ec_typec.h" + +#include +#include + +#include "cros_typec_altmode.h" + +struct cros_typec_dp_data { + struct typec_displayport_data data; + + bool configured; + bool pending_status_update; +}; + +struct cros_typec_altmode_data { + struct work_struct work; + struct cros_typec_port *port; + struct typec_altmode *alt; + bool ap_mode_entry; + + u32 header; + u32 *vdo_data; + u8 vdo_size; + + u16 sid; + u8 mode; + + union am_specific { + struct cros_typec_dp_data dp; + } am_data; +}; + +static void cros_typec_altmode_work(struct work_struct *work) +{ + struct cros_typec_altmode_data *data =3D + container_of(work, struct cros_typec_altmode_data, work); + + if (typec_altmode_vdm(data->alt, data->header, data->vdo_data, + data->vdo_size)) + dev_err(&data->alt->dev, "VDM 0x%x failed", data->header); + + data->header =3D 0; + data->vdo_data =3D NULL; + data->vdo_size =3D 0; +} + +static int cros_typec_altmode_enter(struct typec_altmode *alt, u32 *vdo) +{ + struct cros_typec_altmode_data *data =3D typec_altmode_get_drvdata(alt); + struct ec_params_typec_control req =3D { + .port =3D data->port->port_num, + .command =3D TYPEC_CONTROL_COMMAND_ENTER_MODE, + }; + int svdm_version; + int ret; + + if (!data->ap_mode_entry) { + const struct typec_altmode *partner =3D + typec_altmode_get_partner(alt); + dev_warn(&partner->dev, + "EC does not support ap driven mode entry\n"); + return -EOPNOTSUPP; + } + + if (data->sid =3D=3D USB_TYPEC_DP_SID) + req.mode_to_enter =3D CROS_EC_ALTMODE_DP; + else + return -EOPNOTSUPP; + + ret =3D cros_ec_cmd(data->port->typec_data->ec, 0, EC_CMD_TYPEC_CONTROL, + &req, sizeof(req), NULL, 0); + if (ret < 0) + return ret; + + svdm_version =3D typec_altmode_get_svdm_version(alt); + if (svdm_version < 0) + return svdm_version; + + data->header =3D VDO(data->sid, 1, svdm_version, CMD_ENTER_MODE); + data->header |=3D VDO_OPOS(data->mode); + data->header |=3D VDO_CMDT(CMDT_RSP_ACK); + + data->vdo_data =3D NULL; + data->vdo_size =3D 1; + + schedule_work(&data->work); + + return ret; +} + +static int cros_typec_altmode_exit(struct typec_altmode *alt) +{ + struct cros_typec_altmode_data *data =3D typec_altmode_get_drvdata(alt); + struct ec_params_typec_control req =3D { + .port =3D data->port->port_num, + .command =3D TYPEC_CONTROL_COMMAND_EXIT_MODES, + }; + int svdm_version; + int ret; + + if (!data->ap_mode_entry) { + const struct typec_altmode *partner =3D + typec_altmode_get_partner(alt); + dev_warn(&partner->dev, + "EC does not support ap driven mode entry\n"); + return -EOPNOTSUPP; + } + + ret =3D cros_ec_cmd(data->port->typec_data->ec, 0, EC_CMD_TYPEC_CONTROL, + &req, sizeof(req), NULL, 0); + + if (ret < 0) + return ret; + + svdm_version =3D typec_altmode_get_svdm_version(alt); + if (svdm_version < 0) + return svdm_version; + + data->header =3D VDO(data->sid, 1, svdm_version, CMD_EXIT_MODE); + data->header |=3D VDO_OPOS(data->mode); + data->header |=3D VDO_CMDT(CMDT_RSP_ACK); + + data->vdo_data =3D NULL; + data->vdo_size =3D 1; + + schedule_work(&data->work); + + return ret; +} + +static int cros_typec_displayport_vdm(struct typec_altmode *alt, u32 heade= r, + const u32 *data, int count) +{ + struct cros_typec_altmode_data *adata =3D typec_altmode_get_drvdata(alt); + + int cmd_type =3D PD_VDO_CMDT(header); + int cmd =3D PD_VDO_CMD(header); + int svdm_version; + + if (!adata->ap_mode_entry) { + const struct typec_altmode *partner =3D + typec_altmode_get_partner(alt); + dev_warn(&partner->dev, + "EC does not support ap driven mode entry\n"); + return -EOPNOTSUPP; + } + + svdm_version =3D typec_altmode_get_svdm_version(alt); + if (svdm_version < 0) + return svdm_version; + + switch (cmd_type) { + case CMDT_INIT: + if (PD_VDO_SVDM_VER(header) < svdm_version) { + typec_partner_set_svdm_version(adata->port->partner, + PD_VDO_SVDM_VER(header)); + svdm_version =3D PD_VDO_SVDM_VER(header); + } + + adata->header =3D VDO(adata->sid, 1, svdm_version, cmd); + adata->header |=3D VDO_OPOS(adata->mode); + + /* + * DP_CMD_CONFIGURE: We can't actually do anything with the + * provided VDO yet so just send back an ACK. + * + * DP_CMD_STATUS_UPDATE: We wait for Mux changes to send + * DPStatus Acks. + */ + switch (cmd) { + case DP_CMD_CONFIGURE: + adata->am_data.dp.data.conf =3D *data; + adata->header |=3D VDO_CMDT(CMDT_RSP_ACK); + adata->am_data.dp.configured =3D true; + schedule_work(&adata->work); + break; + case DP_CMD_STATUS_UPDATE: + adata->am_data.dp.pending_status_update =3D true; + break; + default: + adata->header |=3D VDO_CMDT(CMDT_RSP_ACK); + schedule_work(&adata->work); + break; + } + + break; + default: + break; + } + + return 0; +} + +static int cros_typec_altmode_vdm(struct typec_altmode *alt, u32 header, + const u32 *data, int count) +{ + struct cros_typec_altmode_data *adata =3D typec_altmode_get_drvdata(alt); + + if (adata->sid =3D=3D USB_TYPEC_DP_SID) + return cros_typec_displayport_vdm(alt, header, data, count); + + return -EINVAL; +} + +static const struct typec_altmode_ops cros_typec_altmode_ops =3D { + .enter =3D cros_typec_altmode_enter, + .exit =3D cros_typec_altmode_exit, + .vdm =3D cros_typec_altmode_vdm, +}; + +#if IS_ENABLED(CONFIG_TYPEC_DP_ALTMODE) +int cros_typec_displayport_status_update(struct typec_altmode *altmode, + struct typec_displayport_data *data) +{ + struct cros_typec_altmode_data *adata =3D + typec_altmode_get_drvdata(altmode); + + if (!adata->am_data.dp.pending_status_update) { + dev_dbg(&altmode->dev, + "Got DPStatus without a pending request"); + return 0; + } + + if (adata->am_data.dp.configured && adata->am_data.dp.data.conf !=3D data= ->conf) + dev_dbg(&altmode->dev, + "DP Conf doesn't match. Requested 0x%04x, Actual 0x%04x", + adata->am_data.dp.data.conf, data->conf); + + adata->am_data.dp.data =3D *data; + adata->am_data.dp.pending_status_update =3D false; + adata->header |=3D VDO_CMDT(CMDT_RSP_ACK); + adata->vdo_data =3D &adata->am_data.dp.data.status; + adata->vdo_size =3D 2; + + schedule_work(&adata->work); + return 0; +} + +struct typec_altmode * +cros_typec_register_displayport(struct cros_typec_port *port, + struct typec_altmode_desc *desc, + bool ap_mode_entry) +{ + struct typec_altmode *alt; + struct cros_typec_altmode_data *data; + + alt =3D typec_port_register_altmode(port->port, desc); + if (IS_ERR(alt)) + return alt; + + data =3D devm_kzalloc(&alt->dev, sizeof(*data), GFP_KERNEL); + if (!data) { + typec_unregister_altmode(alt); + return ERR_PTR(-ENOMEM); + } + + INIT_WORK(&data->work, cros_typec_altmode_work); + data->alt =3D alt; + data->port =3D port; + data->ap_mode_entry =3D ap_mode_entry; + data->sid =3D USB_TYPEC_DP_SID; + data->mode =3D USB_TYPEC_DP_MODE; + + data->am_data.dp.configured =3D false; + typec_altmode_set_ops(alt, &cros_typec_altmode_ops); + typec_altmode_set_drvdata(alt, data); + + return alt; +} +#endif diff --git a/drivers/platform/chrome/cros_typec_altmode.h b/drivers/platfor= m/chrome/cros_typec_altmode.h new file mode 100644 index 000000000000..c6f8fb02c99c --- /dev/null +++ b/drivers/platform/chrome/cros_typec_altmode.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __CROS_TYPEC_ALTMODE_H__ +#define __CROS_TYPEC_ALTMODE_H__ + +struct cros_typec_port; +struct typec_altmode; +struct typec_altmode_desc; +struct typec_displayport_data; + +#if IS_ENABLED(CONFIG_TYPEC_DP_ALTMODE) +struct typec_altmode * +cros_typec_register_displayport(struct cros_typec_port *port, + struct typec_altmode_desc *desc, + bool ap_mode_entry); + +int cros_typec_displayport_status_update(struct typec_altmode *altmode, + struct typec_displayport_data *data); +#else +static inline struct typec_altmode * +cros_typec_register_displayport(struct cros_typec_port *port, + struct typec_altmode_desc *desc, + bool ap_mode_entry) +{ + return typec_port_register_altmode(port->port, desc); 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[35.247.103.198]) by smtp.gmail.com with UTF8SMTPSA id 98e67ed59e1d1-2e92fbfa8a4sm2365726a91.53.2024.10.30.14.29.14 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Oct 2024 14:29:14 -0700 (PDT) From: Abhishek Pandit-Subedi To: heikki.krogerus@linux.intel.com, tzungbi@kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: dmitry.baryshkov@linaro.org, jthies@google.com, akuchynski@google.com, pmalani@chromium.org, Abhishek Pandit-Subedi , Benson Leung , Guenter Roeck , linux-kernel@vger.kernel.org Subject: [PATCH v2 6/7] platform/chrome: cros_ec_typec: Thunderbolt support Date: Wed, 30 Oct 2024 14:28:37 -0700 Message-ID: <20241030142833.v2.6.Ic61ced3cdfb5d6776435356061f12307da719829@changeid> X-Mailer: git-send-email 2.47.0.163.g1226f6d8fa-goog In-Reply-To: <20241030212854.998318-1-abhishekpandit@chromium.org> References: <20241030212854.998318-1-abhishekpandit@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add support for entering and exiting Thunderbolt alt-mode using AP driven alt-mode. Signed-off-by: Abhishek Pandit-Subedi --- Changes in v2: - Refactored thunderbolt support into cros_typec_altmode.c drivers/platform/chrome/cros_ec_typec.c | 29 ++++--- drivers/platform/chrome/cros_typec_altmode.c | 85 ++++++++++++++++++++ drivers/platform/chrome/cros_typec_altmode.h | 14 ++++ 3 files changed, 116 insertions(+), 12 deletions(-) diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chr= ome/cros_ec_typec.c index 7997e7136c4c..3e043b1c1cc8 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -304,21 +304,26 @@ static int cros_typec_register_port_altmodes(struct c= ros_typec_data *typec, typec_altmode_set_drvdata(amode, port); amode->ops =3D &port_amode_ops; #endif - /* * Register TBT compatibility alt mode. The EC will not enter the mode - * if it doesn't support it, so it's safe to register it unconditionally - * here for now. + * if it doesn't support it and it will not enter automatically by + * design so we can use the |ap_driven_altmode| feature to check if we + * should register it. */ - memset(&desc, 0, sizeof(desc)); - desc.svid =3D USB_TYPEC_TBT_SID; - desc.mode =3D TYPEC_ANY_MODE; - amode =3D typec_port_register_altmode(port->port, &desc); - if (IS_ERR(amode)) - return PTR_ERR(amode); - port->port_altmode[CROS_EC_ALTMODE_TBT] =3D amode; - typec_altmode_set_drvdata(amode, port); - amode->ops =3D &port_amode_ops; + if (typec->ap_driven_altmode) { + memset(&desc, 0, sizeof(desc)); + desc.svid =3D USB_TYPEC_TBT_SID; + desc.mode =3D TYPEC_ANY_MODE; + amode =3D cros_typec_register_thunderbolt(port, &desc); + if (IS_ERR(amode)) + return PTR_ERR(amode); + port->port_altmode[CROS_EC_ALTMODE_TBT] =3D amode; + +#if !IS_ENABLED(CONFIG_TYPEC_TBT_ALTMODE) + typec_altmode_set_drvdata(amode, port); + amode->ops =3D &port_amode_ops; +#endif + } =20 port->state.alt =3D NULL; port->state.mode =3D TYPEC_STATE_USB; diff --git a/drivers/platform/chrome/cros_typec_altmode.c b/drivers/platfor= m/chrome/cros_typec_altmode.c index af2f077674f1..6cb1e1320d6c 100644 --- a/drivers/platform/chrome/cros_typec_altmode.c +++ b/drivers/platform/chrome/cros_typec_altmode.c @@ -8,6 +8,7 @@ #include "cros_ec_typec.h" =20 #include +#include #include =20 #include "cros_typec_altmode.h" @@ -71,6 +72,8 @@ static int cros_typec_altmode_enter(struct typec_altmode = *alt, u32 *vdo) =20 if (data->sid =3D=3D USB_TYPEC_DP_SID) req.mode_to_enter =3D CROS_EC_ALTMODE_DP; + else if (data->sid =3D=3D USB_TYPEC_TBT_SID) + req.mode_to_enter =3D CROS_EC_ALTMODE_TBT; else return -EOPNOTSUPP; =20 @@ -198,6 +201,53 @@ static int cros_typec_displayport_vdm(struct typec_alt= mode *alt, u32 header, return 0; } =20 +static int cros_typec_thunderbolt_vdm(struct typec_altmode *alt, u32 heade= r, + const u32 *data, int count) +{ + struct cros_typec_altmode_data *adata =3D typec_altmode_get_drvdata(alt); + + int cmd_type =3D PD_VDO_CMDT(header); + int cmd =3D PD_VDO_CMD(header); + int svdm_version; + + svdm_version =3D typec_altmode_get_svdm_version(alt); + if (svdm_version < 0) + return svdm_version; + + switch (cmd_type) { + case CMDT_INIT: + if (PD_VDO_SVDM_VER(header) < svdm_version) { + typec_partner_set_svdm_version(adata->port->partner, + PD_VDO_SVDM_VER(header)); + svdm_version =3D PD_VDO_SVDM_VER(header); + } + + adata->header =3D VDO(USB_TYPEC_TBT_SID, 1, svdm_version, cmd); + adata->header |=3D VDO_OPOS(USB_TYPEC_TBT_MODE); + + switch (cmd) { + case CMD_ENTER_MODE: + /* Don't respond to the enter mode vdm because it + * triggers mux configuration. This is handled directly + * by the cros_ec_typec driver so the Thunderbolt driver + * doesn't need to be involved. + */ + break; + default: + adata->header |=3D VDO_CMDT(CMDT_RSP_ACK); + schedule_work(&adata->work); + break; + } + + break; + default: + break; + } + + return 0; +} + + static int cros_typec_altmode_vdm(struct typec_altmode *alt, u32 header, const u32 *data, int count) { @@ -206,6 +256,9 @@ static int cros_typec_altmode_vdm(struct typec_altmode = *alt, u32 header, if (adata->sid =3D=3D USB_TYPEC_DP_SID) return cros_typec_displayport_vdm(alt, header, data, count); =20 + if (adata->sid =3D=3D USB_TYPEC_TBT_SID) + return cros_typec_thunderbolt_vdm(alt, header, data, count); + return -EINVAL; } =20 @@ -275,3 +328,35 @@ cros_typec_register_displayport(struct cros_typec_port= *port, return alt; } #endif + +#if IS_ENABLED(CONFIG_TYPEC_TBT_ALTMODE) +struct typec_altmode * +cros_typec_register_thunderbolt(struct cros_typec_port *port, + struct typec_altmode_desc *desc) +{ + struct typec_altmode *alt; + struct cros_typec_altmode_data *data; + + alt =3D typec_port_register_altmode(port->port, desc); + if (IS_ERR(alt)) + return alt; + + data =3D devm_kzalloc(&alt->dev, sizeof(*data), GFP_KERNEL); + if (!data) { + typec_unregister_altmode(alt); + return ERR_PTR(-ENOMEM); + } + + INIT_WORK(&data->work, cros_typec_altmode_work); + data->alt =3D alt; + data->port =3D port; + data->ap_mode_entry =3D true; + data->sid =3D USB_TYPEC_TBT_SID; + data->mode =3D USB_TYPEC_TBT_MODE; + + typec_altmode_set_ops(alt, &cros_typec_altmode_ops); + typec_altmode_set_drvdata(alt, data); + + return alt; +} +#endif diff --git a/drivers/platform/chrome/cros_typec_altmode.h b/drivers/platfor= m/chrome/cros_typec_altmode.h index c6f8fb02c99c..c71568314e3f 100644 --- a/drivers/platform/chrome/cros_typec_altmode.h +++ b/drivers/platform/chrome/cros_typec_altmode.h @@ -31,4 +31,18 @@ static inline int cros_typec_displayport_status_update(s= truct typec_altmode *alt return 0; } #endif + +#if IS_ENABLED(CONFIG_TYPEC_TBT_ALTMODE) +struct typec_altmode * +cros_typec_register_thunderbolt(struct cros_typec_port *port, + struct typec_altmode_desc *desc); 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[35.247.103.198]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-211057d833fsm335115ad.261.2024.10.30.14.29.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 30 Oct 2024 14:29:16 -0700 (PDT) From: Abhishek Pandit-Subedi To: heikki.krogerus@linux.intel.com, tzungbi@kernel.org, linux-usb@vger.kernel.org, chrome-platform@lists.linux.dev Cc: dmitry.baryshkov@linaro.org, jthies@google.com, akuchynski@google.com, pmalani@chromium.org, Abhishek Pandit-Subedi , Benson Leung , Guenter Roeck , linux-kernel@vger.kernel.org Subject: [PATCH v2 7/7] platform/chrome: cros_ec_typec: Disable tbt auto_enter Date: Wed, 30 Oct 2024 14:28:38 -0700 Message-ID: <20241030142833.v2.7.Ic14738918e3d026fa2d85e95fb68f8e07a0828d0@changeid> X-Mailer: git-send-email 2.47.0.163.g1226f6d8fa-goog In-Reply-To: <20241030212854.998318-1-abhishekpandit@chromium.org> References: <20241030212854.998318-1-abhishekpandit@chromium.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Altmodes with cros_ec are either automatically entered by the EC or entered by the AP if TBT or USB4 are supported on the system. Due to the security risk of PCIe tunneling, TBT modes should not be auto entered by the kernel at this time and will require user intervention. With this change, a userspace program will need to explicitly activate the thunderbolt mode on the partner in order to enter the mode and the thunderbolt driver will not automatically enter when a partner is connected. Signed-off-by: Abhishek Pandit-Subedi --- Changes in v2: - Only disable auto-enter for Thunderbolt - Update commit message to clearly indicate the need for userspace intervention to enter TBT mode drivers/platform/chrome/cros_ec_typec.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chr= ome/cros_ec_typec.c index 3e043b1c1cc8..aadd2704e445 100644 --- a/drivers/platform/chrome/cros_ec_typec.c +++ b/drivers/platform/chrome/cros_ec_typec.c @@ -313,7 +313,8 @@ static int cros_typec_register_port_altmodes(struct cro= s_typec_data *typec, if (typec->ap_driven_altmode) { memset(&desc, 0, sizeof(desc)); desc.svid =3D USB_TYPEC_TBT_SID; - desc.mode =3D TYPEC_ANY_MODE; + desc.mode =3D USB_TYPEC_TBT_MODE; + desc.no_auto_enter =3D true; amode =3D cros_typec_register_thunderbolt(port, &desc); if (IS_ERR(amode)) return PTR_ERR(amode); --=20 2.47.0.163.g1226f6d8fa-goog