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([82.78.167.190]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-431bd99edebsm17956935e9.45.2024.10.30.04.01.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Oct 2024 04:01:49 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, alexandre.belloni@bootlin.com, magnus.damm@gmail.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v5 08/10] arm64: dts: renesas: rzg3s-smarc-som: Enable VBATTB Date: Wed, 30 Oct 2024 13:01:18 +0200 Message-Id: <20241030110120.332802-9-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241030110120.332802-1-claudiu.beznea.uj@bp.renesas.com> References: <20241030110120.332802-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Enable the VBATTB controller. It provides the clock for RTC. Reviewed-by: Geert Uytterhoeven Signed-off-by: Claudiu Beznea --- Changes in v5: - dropped the status =3D "okay"; from vbattb_xtal node Changes in v4: - added assigned-clocks, assigned-clock-parents properties - set vbattb_xtal status =3D "okay" - collected tags Changes in v3: - updated patch description - dropped vbattclk - added renesas,vbattb-load-nanofarads on vbattb - moved vbattb before vbattb_xtal Changes in v2: - none arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi b/arch/arm64/= boot/dts/renesas/rzg3s-smarc-som.dtsi index 71424e69939e..30bb4f5a7dfd 100644 --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc-som.dtsi @@ -5,6 +5,7 @@ * Copyright (C) 2023 Renesas Electronics Corp. */ =20 +#include #include #include =20 @@ -344,6 +345,17 @@ mux { }; }; =20 +&vbattb { + assigned-clocks =3D <&vbattb VBATTB_MUX>; + assigned-clock-parents =3D <&vbattb VBATTB_XC>; + quartz-load-femtofarads =3D <12500>; + status =3D "okay"; +}; + +&vbattb_xtal { + clock-frequency =3D <32768>; +}; + &wdt0 { timeout-sec =3D <60>; status =3D "okay"; --=20 2.39.2