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Wed, 30 Oct 2024 03:18:33 -0700 (PDT) Date: Wed, 30 Oct 2024 11:18:07 +0100 In-Reply-To: <20241030101803.2037606-10-ardb+git@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20241030101803.2037606-10-ardb+git@google.com> X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-Developer-Signature: v=1; a=openpgp-sha256; l=2846; i=ardb@kernel.org; h=from:subject; bh=nfmkIc8BC3bWhOA+Opu1lUMycwYGYNKNBpiB1H0YnYE=; b=owGbwMvMwCFmkMcZplerG8N4Wi2JIV2J/UH+r80LJJV36/2bn/fVcbvkiewdvStu6spqL742U VLoXcOGjlIWBjEOBlkxRRaB2X/f7Tw9UarWeZYszBxWJpAhDFycAjAR3SKGv6IZp6KznvSxqaob LI4S9fjedylpPveSTdkKDSy8/9+2fmRkmHzAzrl1hl3Vm5i4GR/3zr74UM1a9uafK/x/l5StPxy 3iREA X-Mailer: git-send-email 2.47.0.163.g1226f6d8fa-goog Message-ID: <20241030101803.2037606-13-ardb+git@google.com> Subject: [RFC PATCH 3/8] arm64: Kconfig: eliminate 64k/48-bit VA combination From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org, Ard Biesheuvel , Catalin Marinas , Will Deacon , Marc Zyngier , Mark Rutland , Ryan Roberts , Anshuman Khandual , Kees Cook Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ard Biesheuvel Now that the vmemmap region is sized dynamically based on the actual size of the kernel VA space, there are no longer any material differences between supporting 48-bit and 52-bit VA space sizes for 64k pages, which use the same number of translation levels. And if needed, 52-bit virtual addressing can be disabled at boot on systems that do support it but where 48-bit virtual addressing is preferred. The only remaining difference is the size of a root level user page table, which grows from 512 bytes to 8k when 52-bit virtual addressing is enabled, but given that both are less than the size of a page, this is easily fixed in the pgd_alloc init code. (In all other possible cases where vabits_actual < VABITS holds, the effective PGD_SIZE equals the page size, and so this change has no effect.) Signed-off-by: Ard Biesheuvel --- arch/arm64/Kconfig | 5 +++-- arch/arm64/mm/pgd.c | 9 +++++---- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig index ac8e7550430b..6a73fd61b4aa 100644 --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig @@ -379,11 +379,11 @@ config PGTABLE_LEVELS int default 2 if ARM64_16K_PAGES && ARM64_VA_BITS_36 default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42 - default 3 if ARM64_64K_PAGES && (ARM64_VA_BITS_48 || ARM64_VA_BITS_52) default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39 default 3 if ARM64_16K_PAGES && ARM64_VA_BITS_47 + default 3 if ARM64_64K_PAGES default 4 if ARM64_16K_PAGES && (ARM64_VA_BITS_48 || ARM64_VA_BITS_52) - default 4 if !ARM64_64K_PAGES && ARM64_VA_BITS_48 + default 4 if ARM64_VA_BITS_48 default 5 if ARM64_4K_PAGES && ARM64_VA_BITS_52 =20 config ARCH_SUPPORTS_UPROBES @@ -1361,6 +1361,7 @@ config ARM64_VA_BITS_47 =20 config ARM64_VA_BITS_48 bool "48-bit" + depends on !PAGE_SIZE_64KB =20 config ARM64_VA_BITS_52 bool "52-bit" diff --git a/arch/arm64/mm/pgd.c b/arch/arm64/mm/pgd.c index 0c501cabc238..ecc4b1ec235c 100644 --- a/arch/arm64/mm/pgd.c +++ b/arch/arm64/mm/pgd.c @@ -48,20 +48,21 @@ void pgd_free(struct mm_struct *mm, pgd_t *pgd) =20 void __init pgtable_cache_init(void) { + unsigned int size =3D PGD_SIZE >> (VA_BITS - vabits_actual); + if (pgdir_is_page_size()) return; =20 -#ifdef CONFIG_ARM64_PA_BITS_52 /* * With 52-bit physical addresses, the architecture requires the * top-level table to be aligned to at least 64 bytes. */ - BUILD_BUG_ON(PGD_SIZE < 64); -#endif + if (IS_ENABLED(CONFIG_ARM64_PA_BITS_52)) + size =3D max(size, 64); =20 /* * Naturally aligned pgds required by the architecture. */ - pgd_cache =3D kmem_cache_create("pgd_cache", PGD_SIZE, PGD_SIZE, + pgd_cache =3D kmem_cache_create("pgd_cache", size, size, SLAB_PANIC, NULL); } --=20 2.47.0.163.g1226f6d8fa-goog