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(unknown [58.22.7.114]) by gzga-smtp-mtada-g1-1 (Coremail) with SMTP id _____wD3nxoCsSBn8+3dEA--.3291S10; Tue, 29 Oct 2024 17:55:27 +0800 (CST) From: Andy Yan To: heiko@sntech.de Cc: hjc@rock-chips.com, krzk+dt@kernel.org, s.hauer@pengutronix.de, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, derek.foreman@collabora.com, minhuadotchen@gmail.com, detlev.casanova@collabora.com, Andy Yan , Michael Riesch Subject: [PATCH v4 08/14] drm/rockchip: vop2: Support for different layer select configuration between VPs Date: Tue, 29 Oct 2024 17:55:01 +0800 Message-ID: <20241029095513.391006-9-andyshrk@163.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241029095513.391006-1-andyshrk@163.com> References: <20241029095513.391006-1-andyshrk@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: _____wD3nxoCsSBn8+3dEA--.3291S10 X-Coremail-Antispam: 1Uf129KBjvJXoWxtrW8JF4UZF47CF4UWFy8Zrb_yoWfGF43pa yUursIg3Z8Cr45tryUJay8Zr4rGwnxtay3uan3Kw1xGF1rKrWDJF4ktF93A3Z8KF93Zry8 Xw1YgryDZrZrtFJanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07jF38nUUUUU= X-CM-SenderInfo: 5dqg52xkunqiywtou0bp/xtbB0hyHXmcgp1S+TwAAsS Content-Type: text/plain; charset="utf-8" From: Andy Yan In the upcoming VOP for rk3576, every VP has it's own LAYER_SEL register, and the configuration value of each VP for the same window maybe different, so extend the layer_sel_id to array, let it can descption the layer select configuration value for different VP. Signed-off-by: Andy Yan Tested-by: Michael Riesch # on RK3568 Tested-by: Detlev Casanova --- Changes in v4: - Typo fix: selet->select drivers/gpu/drm/rockchip/rockchip_drm_vop2.h | 4 +-- drivers/gpu/drm/rockchip/rockchip_vop2_reg.c | 38 ++++++++++---------- 2 files changed, 22 insertions(+), 20 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h b/drivers/gpu/drm= /rockchip/rockchip_drm_vop2.h index b27163f561dea..9b269f6e576e8 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.h @@ -163,9 +163,9 @@ struct vop2_win_data { const unsigned int supported_rotations; =20 /** - * @layer_sel_id: defined by register OVERLAY_LAYER_SEL of VOP2 + * @layer_sel_id: defined by register OVERLAY_LAYER_SEL or PORTn_LAYER_SEL */ - unsigned int layer_sel_id; + unsigned int layer_sel_id[ROCKCHIP_MAX_CRTC]; uint64_t feature; =20 unsigned int max_upscale_factor; diff --git a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c b/drivers/gpu/drm= /rockchip/rockchip_vop2_reg.c index 0e577aabc9e49..8473dc9c232c1 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop2_reg.c @@ -342,7 +342,8 @@ static const struct vop2_win_data rk3568_vop_win_data[]= =3D { .formats =3D formats_smart, .nformats =3D ARRAY_SIZE(formats_smart), .format_modifiers =3D format_modifiers, - .layer_sel_id =3D 3, + /* 0xf means this layer can't attached to this VP */ + .layer_sel_id =3D { 3, 3, 3, 0xf }, .supported_rotations =3D DRM_MODE_REFLECT_Y, .type =3D DRM_PLANE_TYPE_PRIMARY, .max_upscale_factor =3D 8, @@ -355,7 +356,7 @@ static const struct vop2_win_data rk3568_vop_win_data[]= =3D { .nformats =3D ARRAY_SIZE(formats_smart), .format_modifiers =3D format_modifiers, .base =3D 0x1e00, - .layer_sel_id =3D 7, + .layer_sel_id =3D { 7, 7, 7, 0xf }, .supported_rotations =3D DRM_MODE_REFLECT_Y, .type =3D DRM_PLANE_TYPE_PRIMARY, .max_upscale_factor =3D 8, @@ -368,7 +369,7 @@ static const struct vop2_win_data rk3568_vop_win_data[]= =3D { .nformats =3D ARRAY_SIZE(formats_rk356x_esmart), .format_modifiers =3D format_modifiers, .base =3D 0x1a00, - .layer_sel_id =3D 6, + .layer_sel_id =3D { 6, 6, 6, 0xf }, .supported_rotations =3D DRM_MODE_REFLECT_Y, .type =3D DRM_PLANE_TYPE_PRIMARY, .max_upscale_factor =3D 8, @@ -381,7 +382,7 @@ static const struct vop2_win_data rk3568_vop_win_data[]= =3D { .nformats =3D ARRAY_SIZE(formats_rk356x_esmart), .format_modifiers =3D format_modifiers, .base =3D 0x1800, - .layer_sel_id =3D 2, + .layer_sel_id =3D { 2, 2, 2, 0xf }, .supported_rotations =3D DRM_MODE_REFLECT_Y, .type =3D DRM_PLANE_TYPE_PRIMARY, .max_upscale_factor =3D 8, @@ -394,7 +395,7 @@ static const struct vop2_win_data rk3568_vop_win_data[]= =3D { .formats =3D formats_cluster, .nformats =3D ARRAY_SIZE(formats_cluster), .format_modifiers =3D format_modifiers_afbc, - .layer_sel_id =3D 0, + .layer_sel_id =3D { 0, 0, 0, 0xf }, .supported_rotations =3D DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y, .max_upscale_factor =3D 4, @@ -409,7 +410,7 @@ static const struct vop2_win_data rk3568_vop_win_data[]= =3D { .formats =3D formats_cluster, .nformats =3D ARRAY_SIZE(formats_cluster), .format_modifiers =3D format_modifiers_afbc, - .layer_sel_id =3D 1, + .layer_sel_id =3D { 1, 1, 1, 0xf }, .supported_rotations =3D DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y, .type =3D DRM_PLANE_TYPE_OVERLAY, @@ -574,7 +575,7 @@ static const struct vop2_win_data rk3588_vop_win_data[]= =3D { .formats =3D formats_cluster, .nformats =3D ARRAY_SIZE(formats_cluster), .format_modifiers =3D format_modifiers_afbc, - .layer_sel_id =3D 0, + .layer_sel_id =3D { 0, 0, 0, 0 }, .supported_rotations =3D DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y, .max_upscale_factor =3D 4, @@ -589,7 +590,7 @@ static const struct vop2_win_data rk3588_vop_win_data[]= =3D { .formats =3D formats_cluster, .nformats =3D ARRAY_SIZE(formats_cluster), .format_modifiers =3D format_modifiers_afbc, - .layer_sel_id =3D 1, + .layer_sel_id =3D { 1, 1, 1, 1 }, .supported_rotations =3D DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y, .type =3D DRM_PLANE_TYPE_PRIMARY, @@ -604,7 +605,7 @@ static const struct vop2_win_data rk3588_vop_win_data[]= =3D { .formats =3D formats_cluster, .nformats =3D ARRAY_SIZE(formats_cluster), .format_modifiers =3D format_modifiers_afbc, - .layer_sel_id =3D 4, + .layer_sel_id =3D { 4, 4, 4, 4 }, .supported_rotations =3D DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y, .type =3D DRM_PLANE_TYPE_PRIMARY, @@ -619,7 +620,7 @@ static const struct vop2_win_data rk3588_vop_win_data[]= =3D { .formats =3D formats_cluster, .nformats =3D ARRAY_SIZE(formats_cluster), .format_modifiers =3D format_modifiers_afbc, - .layer_sel_id =3D 5, + .layer_sel_id =3D { 5, 5, 5, 5 }, .supported_rotations =3D DRM_MODE_ROTATE_90 | DRM_MODE_ROTATE_270 | DRM_MODE_REFLECT_X | DRM_MODE_REFLECT_Y, .type =3D DRM_PLANE_TYPE_PRIMARY, @@ -634,7 +635,7 @@ static const struct vop2_win_data rk3588_vop_win_data[]= =3D { .nformats =3D ARRAY_SIZE(formats_esmart), .format_modifiers =3D format_modifiers, .base =3D 0x1800, - .layer_sel_id =3D 2, + .layer_sel_id =3D { 2, 2, 2, 2 }, .supported_rotations =3D DRM_MODE_REFLECT_Y, .type =3D DRM_PLANE_TYPE_OVERLAY, .max_upscale_factor =3D 8, @@ -647,7 +648,7 @@ static const struct vop2_win_data rk3588_vop_win_data[]= =3D { .nformats =3D ARRAY_SIZE(formats_esmart), .format_modifiers =3D format_modifiers, .base =3D 0x1a00, - .layer_sel_id =3D 3, + .layer_sel_id =3D { 3, 3, 3, 3 }, .supported_rotations =3D DRM_MODE_REFLECT_Y, .type =3D DRM_PLANE_TYPE_OVERLAY, .max_upscale_factor =3D 8, @@ -660,7 +661,7 @@ static const struct vop2_win_data rk3588_vop_win_data[]= =3D { .formats =3D formats_esmart, .nformats =3D ARRAY_SIZE(formats_esmart), .format_modifiers =3D format_modifiers, - .layer_sel_id =3D 6, + .layer_sel_id =3D { 6, 6, 6, 6 }, .supported_rotations =3D DRM_MODE_REFLECT_Y, .type =3D DRM_PLANE_TYPE_OVERLAY, .max_upscale_factor =3D 8, @@ -673,7 +674,7 @@ static const struct vop2_win_data rk3588_vop_win_data[]= =3D { .nformats =3D ARRAY_SIZE(formats_esmart), .format_modifiers =3D format_modifiers, .base =3D 0x1e00, - .layer_sel_id =3D 7, + .layer_sel_id =3D { 7, 7, 7, 7 }, .supported_rotations =3D DRM_MODE_REFLECT_Y, .type =3D DRM_PLANE_TYPE_OVERLAY, .max_upscale_factor =3D 8, @@ -1420,7 +1421,7 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2= _video_port *vp) */ for (old_layer_id =3D 0; old_layer_id < vop2->data->win_size; old_layer_= id++) { layer_sel_id =3D (layer_sel >> (4 * old_layer_id)) & 0xf; - if (layer_sel_id =3D=3D win->data->layer_sel_id) + if (layer_sel_id =3D=3D win->data->layer_sel_id[vp->id]) break; } =20 @@ -1430,7 +1431,7 @@ static void rk3568_vop2_setup_layer_mixer(struct vop2= _video_port *vp) for (i =3D 0; i < vop2->data->win_size; i++) { old_win =3D &vop2->win[i]; layer_sel_id =3D (layer_sel >> (4 * (plane->state->normalized_zpos + of= s))) & 0xf; - if (layer_sel_id =3D=3D old_win->data->layer_sel_id) + if (layer_sel_id =3D=3D old_win->data->layer_sel_id[vp->id]) break; } =20 @@ -1480,13 +1481,14 @@ static void rk3568_vop2_setup_layer_mixer(struct vo= p2_video_port *vp) layer_sel &=3D ~RK3568_OVL_LAYER_SEL__LAYER(plane->state->normalized_zpo= s + ofs, 0x7); layer_sel |=3D RK3568_OVL_LAYER_SEL__LAYER(plane->state->normalized_zpos= + ofs, - win->data->layer_sel_id); + win->data->layer_sel_id[vp->id]); /* * When we bind a window from layerM to layerN, we also need to move the= old * window on layerN to layerM to avoid one window selected by two or mor= e layers. */ layer_sel &=3D ~RK3568_OVL_LAYER_SEL__LAYER(old_layer_id, 0x7); - layer_sel |=3D RK3568_OVL_LAYER_SEL__LAYER(old_layer_id, old_win->data->= layer_sel_id); + layer_sel |=3D RK3568_OVL_LAYER_SEL__LAYER(old_layer_id, + old_win->data->layer_sel_id[vp->id]); } =20 vop2_writel(vop2, RK3568_OVL_LAYER_SEL, layer_sel); --=20 2.34.1