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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241029-msm-dp-rename-v2-1-13c5c03fad44@linaro.org> References: <20241029-msm-dp-rename-v2-0-13c5c03fad44@linaro.org> In-Reply-To: <20241029-msm-dp-rename-v2-0-13c5c03fad44@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, kernel test robot X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=318116; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=ImhCyCjeFZoZLaE7A9xc2xPJW6Ll9arMMcRwZzD0yb0=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnIUVsPbhrW4YzTFzqzor2iDAjC9aVOOzpkXUPF O1/izFKReeJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZyFFbAAKCRCLPIo+Aiko 1SukCACmL5ydlbr+evcrwtDffcZbOHdtpaoxUNrREl6pKXrcYUOfPt7zpmIbOr0J34VmFR+ZqKf II8kdCA224JFGnuI8iORW1A6Z3ezVVLnXxV9Hrgy09MN9G18cXqKXdBvP+JS+AlWpPefz2q7Y+H DykQXFu5erWHGAJ12ZW+64m/UzLS1mIBhDnrWut0TJu/mrQ3x7enMIJvnKEepe7SJo8wUMP27mO TkJX7pX7MjpzKx9WnzDZvXEvXjR6t/gNci20MK3M9FQdWLdDiAVPQK35iQooy2NeY9Gy8zkJy/b jVUhrDBKaOOHAGHhtad/a2GIuAw/a9HOox7W26UOWtS6Vaes X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A For historical reasons a lot of symbols in the MSM DisplayPort driver used the generic dp_ prefix. Perform a mass-rename of those symbols to use msm_dp prefix. Basically this is a result of the following script: sed drivers/gpu/drm/msm/dp/* -i -e 's/\/\1/g' Yes, this also results in renaming of several struct fields in addition to renaming the structs and functions, but I think the simple solution is better than the more complex one. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202410250305.UHKDhtxy-lkp@int= el.com/ Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_audio.c | 294 ++++++------ drivers/gpu/drm/msm/dp/dp_audio.h | 38 +- drivers/gpu/drm/msm/dp/dp_aux.c | 148 +++--- drivers/gpu/drm/msm/dp/dp_aux.h | 18 +- drivers/gpu/drm/msm/dp/dp_catalog.c | 734 +++++++++++++++--------------- drivers/gpu/drm/msm/dp/dp_catalog.h | 118 ++--- drivers/gpu/drm/msm/dp/dp_ctrl.c | 482 ++++++++++---------- drivers/gpu/drm/msm/dp/dp_ctrl.h | 40 +- drivers/gpu/drm/msm/dp/dp_debug.c | 68 +-- drivers/gpu/drm/msm/dp/dp_debug.h | 10 +- drivers/gpu/drm/msm/dp/dp_display.c | 866 ++++++++++++++++++--------------= ---- drivers/gpu/drm/msm/dp/dp_display.h | 18 +- drivers/gpu/drm/msm/dp/dp_drm.c | 108 ++--- drivers/gpu/drm/msm/dp/dp_drm.h | 22 +- drivers/gpu/drm/msm/dp/dp_link.c | 432 +++++++++--------- drivers/gpu/drm/msm/dp/dp_link.h | 44 +- drivers/gpu/drm/msm/dp/dp_panel.c | 254 +++++------ drivers/gpu/drm/msm/dp/dp_panel.h | 42 +- drivers/gpu/drm/msm/dp/dp_utils.c | 20 +- drivers/gpu/drm/msm/dp/dp_utils.h | 8 +- 20 files changed, 1882 insertions(+), 1882 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_audio.c b/drivers/gpu/drm/msm/dp/dp_= audio.c index a599fc5d63c5..74e01a5dd419 100644 --- a/drivers/gpu/drm/msm/dp/dp_audio.c +++ b/drivers/gpu/drm/msm/dp/dp_audio.c @@ -17,281 +17,281 @@ #include "dp_display.h" #include "dp_utils.h" =20 -struct dp_audio_private { +struct msm_dp_audio_private { struct platform_device *audio_pdev; struct platform_device *pdev; struct drm_device *drm_dev; - struct dp_catalog *catalog; + struct msm_dp_catalog *catalog; =20 u32 channels; =20 - struct dp_audio dp_audio; + struct msm_dp_audio msm_dp_audio; }; =20 -static u32 dp_audio_get_header(struct dp_catalog *catalog, - enum dp_catalog_audio_sdp_type sdp, - enum dp_catalog_audio_header_type header) +static u32 msm_dp_audio_get_header(struct msm_dp_catalog *catalog, + enum msm_dp_catalog_audio_sdp_type sdp, + enum msm_dp_catalog_audio_header_type header) { - return dp_catalog_audio_get_header(catalog, sdp, header); + return msm_dp_catalog_audio_get_header(catalog, sdp, header); } =20 -static void dp_audio_set_header(struct dp_catalog *catalog, +static void msm_dp_audio_set_header(struct msm_dp_catalog *catalog, u32 data, - enum dp_catalog_audio_sdp_type sdp, - enum dp_catalog_audio_header_type header) + enum msm_dp_catalog_audio_sdp_type sdp, + enum msm_dp_catalog_audio_header_type header) { - dp_catalog_audio_set_header(catalog, sdp, header, data); + msm_dp_catalog_audio_set_header(catalog, sdp, header, data); } =20 -static void dp_audio_stream_sdp(struct dp_audio_private *audio) +static void msm_dp_audio_stream_sdp(struct msm_dp_audio_private *audio) { - struct dp_catalog *catalog =3D audio->catalog; + struct msm_dp_catalog *catalog =3D audio->catalog; u32 value, new_value; u8 parity_byte; =20 /* Config header and parity byte 1 */ - value =3D dp_audio_get_header(catalog, + value =3D msm_dp_audio_get_header(catalog, DP_AUDIO_SDP_STREAM, DP_AUDIO_SDP_HEADER_1); =20 new_value =3D 0x02; - parity_byte =3D dp_utils_calculate_parity(new_value); + parity_byte =3D msm_dp_utils_calculate_parity(new_value); value |=3D ((new_value << HEADER_BYTE_1_BIT) | (parity_byte << PARITY_BYTE_1_BIT)); drm_dbg_dp(audio->drm_dev, "Header Byte 1: value =3D 0x%x, parity_byte =3D 0x%x\n", value, parity_byte); - dp_audio_set_header(catalog, value, + msm_dp_audio_set_header(catalog, value, DP_AUDIO_SDP_STREAM, DP_AUDIO_SDP_HEADER_1); =20 /* Config header and parity byte 2 */ - value =3D dp_audio_get_header(catalog, + value =3D msm_dp_audio_get_header(catalog, DP_AUDIO_SDP_STREAM, DP_AUDIO_SDP_HEADER_2); new_value =3D value; - parity_byte =3D dp_utils_calculate_parity(new_value); + parity_byte =3D msm_dp_utils_calculate_parity(new_value); value |=3D ((new_value << HEADER_BYTE_2_BIT) | (parity_byte << PARITY_BYTE_2_BIT)); drm_dbg_dp(audio->drm_dev, "Header Byte 2: value =3D 0x%x, parity_byte =3D 0x%x\n", value, parity_byte); =20 - dp_audio_set_header(catalog, value, + msm_dp_audio_set_header(catalog, value, DP_AUDIO_SDP_STREAM, DP_AUDIO_SDP_HEADER_2); =20 /* Config header and parity byte 3 */ - value =3D dp_audio_get_header(catalog, + value =3D msm_dp_audio_get_header(catalog, DP_AUDIO_SDP_STREAM, DP_AUDIO_SDP_HEADER_3); =20 new_value =3D audio->channels - 1; - parity_byte =3D dp_utils_calculate_parity(new_value); + parity_byte =3D msm_dp_utils_calculate_parity(new_value); value |=3D ((new_value << HEADER_BYTE_3_BIT) | (parity_byte << PARITY_BYTE_3_BIT)); drm_dbg_dp(audio->drm_dev, "Header Byte 3: value =3D 0x%x, parity_byte =3D 0x%x\n", value, parity_byte); =20 - dp_audio_set_header(catalog, value, + msm_dp_audio_set_header(catalog, value, DP_AUDIO_SDP_STREAM, DP_AUDIO_SDP_HEADER_3); } =20 -static void dp_audio_timestamp_sdp(struct dp_audio_private *audio) +static void msm_dp_audio_timestamp_sdp(struct msm_dp_audio_private *audio) { - struct dp_catalog *catalog =3D audio->catalog; + struct msm_dp_catalog *catalog =3D audio->catalog; u32 value, new_value; u8 parity_byte; =20 /* Config header and parity byte 1 */ - value =3D dp_audio_get_header(catalog, + value =3D msm_dp_audio_get_header(catalog, DP_AUDIO_SDP_TIMESTAMP, DP_AUDIO_SDP_HEADER_1); =20 new_value =3D 0x1; - parity_byte =3D dp_utils_calculate_parity(new_value); + parity_byte =3D msm_dp_utils_calculate_parity(new_value); value |=3D ((new_value << HEADER_BYTE_1_BIT) | (parity_byte << PARITY_BYTE_1_BIT)); drm_dbg_dp(audio->drm_dev, "Header Byte 1: value =3D 0x%x, parity_byte =3D 0x%x\n", value, parity_byte); - dp_audio_set_header(catalog, value, + msm_dp_audio_set_header(catalog, value, DP_AUDIO_SDP_TIMESTAMP, DP_AUDIO_SDP_HEADER_1); =20 /* Config header and parity byte 2 */ - value =3D dp_audio_get_header(catalog, + value =3D msm_dp_audio_get_header(catalog, DP_AUDIO_SDP_TIMESTAMP, DP_AUDIO_SDP_HEADER_2); =20 new_value =3D 0x17; - parity_byte =3D dp_utils_calculate_parity(new_value); + parity_byte =3D msm_dp_utils_calculate_parity(new_value); value |=3D ((new_value << HEADER_BYTE_2_BIT) | (parity_byte << PARITY_BYTE_2_BIT)); drm_dbg_dp(audio->drm_dev, "Header Byte 2: value =3D 0x%x, parity_byte =3D 0x%x\n", value, parity_byte); - dp_audio_set_header(catalog, value, + msm_dp_audio_set_header(catalog, value, DP_AUDIO_SDP_TIMESTAMP, DP_AUDIO_SDP_HEADER_2); =20 /* Config header and parity byte 3 */ - value =3D dp_audio_get_header(catalog, + value =3D msm_dp_audio_get_header(catalog, DP_AUDIO_SDP_TIMESTAMP, DP_AUDIO_SDP_HEADER_3); =20 new_value =3D (0x0 | (0x11 << 2)); - parity_byte =3D dp_utils_calculate_parity(new_value); + parity_byte =3D msm_dp_utils_calculate_parity(new_value); value |=3D ((new_value << HEADER_BYTE_3_BIT) | (parity_byte << PARITY_BYTE_3_BIT)); drm_dbg_dp(audio->drm_dev, "Header Byte 3: value =3D 0x%x, parity_byte =3D 0x%x\n", value, parity_byte); - dp_audio_set_header(catalog, value, + msm_dp_audio_set_header(catalog, value, DP_AUDIO_SDP_TIMESTAMP, DP_AUDIO_SDP_HEADER_3); } =20 -static void dp_audio_infoframe_sdp(struct dp_audio_private *audio) +static void msm_dp_audio_infoframe_sdp(struct msm_dp_audio_private *audio) { - struct dp_catalog *catalog =3D audio->catalog; + struct msm_dp_catalog *catalog =3D audio->catalog; u32 value, new_value; u8 parity_byte; =20 /* Config header and parity byte 1 */ - value =3D dp_audio_get_header(catalog, + value =3D msm_dp_audio_get_header(catalog, DP_AUDIO_SDP_INFOFRAME, DP_AUDIO_SDP_HEADER_1); =20 new_value =3D 0x84; - parity_byte =3D dp_utils_calculate_parity(new_value); + parity_byte =3D msm_dp_utils_calculate_parity(new_value); value |=3D ((new_value << HEADER_BYTE_1_BIT) | (parity_byte << PARITY_BYTE_1_BIT)); drm_dbg_dp(audio->drm_dev, "Header Byte 1: value =3D 0x%x, parity_byte =3D 0x%x\n", value, parity_byte); - dp_audio_set_header(catalog, value, + msm_dp_audio_set_header(catalog, value, DP_AUDIO_SDP_INFOFRAME, DP_AUDIO_SDP_HEADER_1); =20 /* Config header and parity byte 2 */ - value =3D dp_audio_get_header(catalog, + value =3D msm_dp_audio_get_header(catalog, DP_AUDIO_SDP_INFOFRAME, DP_AUDIO_SDP_HEADER_2); =20 new_value =3D 0x1b; - parity_byte =3D dp_utils_calculate_parity(new_value); + parity_byte =3D msm_dp_utils_calculate_parity(new_value); value |=3D ((new_value << HEADER_BYTE_2_BIT) | (parity_byte << PARITY_BYTE_2_BIT)); drm_dbg_dp(audio->drm_dev, "Header Byte 2: value =3D 0x%x, parity_byte =3D 0x%x\n", value, parity_byte); - dp_audio_set_header(catalog, value, + msm_dp_audio_set_header(catalog, value, DP_AUDIO_SDP_INFOFRAME, DP_AUDIO_SDP_HEADER_2); =20 /* Config header and parity byte 3 */ - value =3D dp_audio_get_header(catalog, + value =3D msm_dp_audio_get_header(catalog, DP_AUDIO_SDP_INFOFRAME, DP_AUDIO_SDP_HEADER_3); =20 new_value =3D (0x0 | (0x11 << 2)); - parity_byte =3D dp_utils_calculate_parity(new_value); + parity_byte =3D msm_dp_utils_calculate_parity(new_value); value |=3D ((new_value << HEADER_BYTE_3_BIT) | (parity_byte << PARITY_BYTE_3_BIT)); drm_dbg_dp(audio->drm_dev, "Header Byte 3: value =3D 0x%x, parity_byte =3D 0x%x\n", new_value, parity_byte); - dp_audio_set_header(catalog, value, + msm_dp_audio_set_header(catalog, value, DP_AUDIO_SDP_INFOFRAME, DP_AUDIO_SDP_HEADER_3); } =20 -static void dp_audio_copy_management_sdp(struct dp_audio_private *audio) +static void msm_dp_audio_copy_management_sdp(struct msm_dp_audio_private *= audio) { - struct dp_catalog *catalog =3D audio->catalog; + struct msm_dp_catalog *catalog =3D audio->catalog; u32 value, new_value; u8 parity_byte; =20 /* Config header and parity byte 1 */ - value =3D dp_audio_get_header(catalog, + value =3D msm_dp_audio_get_header(catalog, DP_AUDIO_SDP_COPYMANAGEMENT, DP_AUDIO_SDP_HEADER_1); =20 new_value =3D 0x05; - parity_byte =3D dp_utils_calculate_parity(new_value); + parity_byte =3D msm_dp_utils_calculate_parity(new_value); value |=3D ((new_value << HEADER_BYTE_1_BIT) | (parity_byte << PARITY_BYTE_1_BIT)); drm_dbg_dp(audio->drm_dev, "Header Byte 1: value =3D 0x%x, parity_byte =3D 0x%x\n", value, parity_byte); - dp_audio_set_header(catalog, value, + msm_dp_audio_set_header(catalog, value, DP_AUDIO_SDP_COPYMANAGEMENT, DP_AUDIO_SDP_HEADER_1); =20 /* Config header and parity byte 2 */ - value =3D dp_audio_get_header(catalog, + value =3D msm_dp_audio_get_header(catalog, DP_AUDIO_SDP_COPYMANAGEMENT, DP_AUDIO_SDP_HEADER_2); =20 new_value =3D 0x0F; - parity_byte =3D dp_utils_calculate_parity(new_value); + parity_byte =3D msm_dp_utils_calculate_parity(new_value); value |=3D ((new_value << HEADER_BYTE_2_BIT) | (parity_byte << PARITY_BYTE_2_BIT)); drm_dbg_dp(audio->drm_dev, "Header Byte 2: value =3D 0x%x, parity_byte =3D 0x%x\n", value, parity_byte); - dp_audio_set_header(catalog, value, + msm_dp_audio_set_header(catalog, value, DP_AUDIO_SDP_COPYMANAGEMENT, DP_AUDIO_SDP_HEADER_2); =20 /* Config header and parity byte 3 */ - value =3D dp_audio_get_header(catalog, + value =3D msm_dp_audio_get_header(catalog, DP_AUDIO_SDP_COPYMANAGEMENT, DP_AUDIO_SDP_HEADER_3); =20 new_value =3D 0x0; - parity_byte =3D dp_utils_calculate_parity(new_value); + parity_byte =3D msm_dp_utils_calculate_parity(new_value); value |=3D ((new_value << HEADER_BYTE_3_BIT) | (parity_byte << PARITY_BYTE_3_BIT)); drm_dbg_dp(audio->drm_dev, "Header Byte 3: value =3D 0x%x, parity_byte =3D 0x%x\n", value, parity_byte); - dp_audio_set_header(catalog, value, + msm_dp_audio_set_header(catalog, value, DP_AUDIO_SDP_COPYMANAGEMENT, DP_AUDIO_SDP_HEADER_3); } =20 -static void dp_audio_isrc_sdp(struct dp_audio_private *audio) +static void msm_dp_audio_isrc_sdp(struct msm_dp_audio_private *audio) { - struct dp_catalog *catalog =3D audio->catalog; + struct msm_dp_catalog *catalog =3D audio->catalog; u32 value, new_value; u8 parity_byte; =20 /* Config header and parity byte 1 */ - value =3D dp_audio_get_header(catalog, + value =3D msm_dp_audio_get_header(catalog, DP_AUDIO_SDP_ISRC, DP_AUDIO_SDP_HEADER_1); =20 new_value =3D 0x06; - parity_byte =3D dp_utils_calculate_parity(new_value); + parity_byte =3D msm_dp_utils_calculate_parity(new_value); value |=3D ((new_value << HEADER_BYTE_1_BIT) | (parity_byte << PARITY_BYTE_1_BIT)); drm_dbg_dp(audio->drm_dev, "Header Byte 1: value =3D 0x%x, parity_byte =3D 0x%x\n", value, parity_byte); - dp_audio_set_header(catalog, value, + msm_dp_audio_set_header(catalog, value, DP_AUDIO_SDP_ISRC, DP_AUDIO_SDP_HEADER_1); =20 /* Config header and parity byte 2 */ - value =3D dp_audio_get_header(catalog, + value =3D msm_dp_audio_get_header(catalog, DP_AUDIO_SDP_ISRC, DP_AUDIO_SDP_HEADER_2); =20 new_value =3D 0x0F; - parity_byte =3D dp_utils_calculate_parity(new_value); + parity_byte =3D msm_dp_utils_calculate_parity(new_value); value |=3D ((new_value << HEADER_BYTE_2_BIT) | (parity_byte << PARITY_BYTE_2_BIT)); drm_dbg_dp(audio->drm_dev, "Header Byte 2: value =3D 0x%x, parity_byte =3D 0x%x\n", value, parity_byte); - dp_audio_set_header(catalog, value, + msm_dp_audio_set_header(catalog, value, DP_AUDIO_SDP_ISRC, DP_AUDIO_SDP_HEADER_2); } =20 -static void dp_audio_setup_sdp(struct dp_audio_private *audio) +static void msm_dp_audio_setup_sdp(struct msm_dp_audio_private *audio) { - dp_catalog_audio_config_sdp(audio->catalog); + msm_dp_catalog_audio_config_sdp(audio->catalog); =20 - dp_audio_stream_sdp(audio); - dp_audio_timestamp_sdp(audio); - dp_audio_infoframe_sdp(audio); - dp_audio_copy_management_sdp(audio); - dp_audio_isrc_sdp(audio); + msm_dp_audio_stream_sdp(audio); + msm_dp_audio_timestamp_sdp(audio); + msm_dp_audio_infoframe_sdp(audio); + msm_dp_audio_copy_management_sdp(audio); + msm_dp_audio_isrc_sdp(audio); } =20 -static void dp_audio_setup_acr(struct dp_audio_private *audio) +static void msm_dp_audio_setup_acr(struct msm_dp_audio_private *audio) { u32 select =3D 0; - struct dp_catalog *catalog =3D audio->catalog; + struct msm_dp_catalog *catalog =3D audio->catalog; =20 - switch (audio->dp_audio.bw_code) { + switch (audio->msm_dp_audio.bw_code) { case DP_LINK_BW_1_62: select =3D 0; break; @@ -310,15 +310,15 @@ static void dp_audio_setup_acr(struct dp_audio_privat= e *audio) break; } =20 - dp_catalog_audio_config_acr(catalog, select); + msm_dp_catalog_audio_config_acr(catalog, select); } =20 -static void dp_audio_safe_to_exit_level(struct dp_audio_private *audio) +static void msm_dp_audio_safe_to_exit_level(struct msm_dp_audio_private *a= udio) { - struct dp_catalog *catalog =3D audio->catalog; + struct msm_dp_catalog *catalog =3D audio->catalog; u32 safe_to_exit_level =3D 0; =20 - switch (audio->dp_audio.lane_count) { + switch (audio->msm_dp_audio.lane_count) { case 1: safe_to_exit_level =3D 14; break; @@ -336,49 +336,49 @@ static void dp_audio_safe_to_exit_level(struct dp_aud= io_private *audio) break; } =20 - dp_catalog_audio_sfe_level(catalog, safe_to_exit_level); + msm_dp_catalog_audio_sfe_level(catalog, safe_to_exit_level); } =20 -static void dp_audio_enable(struct dp_audio_private *audio, bool enable) +static void msm_dp_audio_enable(struct msm_dp_audio_private *audio, bool e= nable) { - struct dp_catalog *catalog =3D audio->catalog; + struct msm_dp_catalog *catalog =3D audio->catalog; =20 - dp_catalog_audio_enable(catalog, enable); + msm_dp_catalog_audio_enable(catalog, enable); } =20 -static struct dp_audio_private *dp_audio_get_data(struct platform_device *= pdev) +static struct msm_dp_audio_private *msm_dp_audio_get_data(struct platform_= device *pdev) { - struct dp_audio *dp_audio; - struct msm_dp *dp_display; + struct msm_dp_audio *msm_dp_audio; + struct msm_dp *msm_dp_display; =20 if (!pdev) { DRM_ERROR("invalid input\n"); return ERR_PTR(-ENODEV); } =20 - dp_display =3D platform_get_drvdata(pdev); - if (!dp_display) { + msm_dp_display =3D platform_get_drvdata(pdev); + if (!msm_dp_display) { DRM_ERROR("invalid input\n"); return ERR_PTR(-ENODEV); } =20 - dp_audio =3D dp_display->dp_audio; + msm_dp_audio =3D msm_dp_display->msm_dp_audio; =20 - if (!dp_audio) { - DRM_ERROR("invalid dp_audio data\n"); + if (!msm_dp_audio) { + DRM_ERROR("invalid msm_dp_audio data\n"); return ERR_PTR(-EINVAL); } =20 - return container_of(dp_audio, struct dp_audio_private, dp_audio); + return container_of(msm_dp_audio, struct msm_dp_audio_private, msm_dp_aud= io); } =20 -static int dp_audio_hook_plugged_cb(struct device *dev, void *data, +static int msm_dp_audio_hook_plugged_cb(struct device *dev, void *data, hdmi_codec_plugged_cb fn, struct device *codec_dev) { =20 struct platform_device *pdev; - struct msm_dp *dp_display; + struct msm_dp *msm_dp_display; =20 pdev =3D to_platform_device(dev); if (!pdev) { @@ -386,20 +386,20 @@ static int dp_audio_hook_plugged_cb(struct device *de= v, void *data, return -ENODEV; } =20 - dp_display =3D platform_get_drvdata(pdev); - if (!dp_display) { + msm_dp_display =3D platform_get_drvdata(pdev); + if (!msm_dp_display) { pr_err("invalid input\n"); return -ENODEV; } =20 - return dp_display_set_plugged_cb(dp_display, fn, codec_dev); + return msm_dp_display_set_plugged_cb(msm_dp_display, fn, codec_dev); } =20 -static int dp_audio_get_eld(struct device *dev, +static int msm_dp_audio_get_eld(struct device *dev, void *data, uint8_t *buf, size_t len) { struct platform_device *pdev; - struct msm_dp *dp_display; + struct msm_dp *msm_dp_display; =20 pdev =3D to_platform_device(dev); =20 @@ -408,30 +408,30 @@ static int dp_audio_get_eld(struct device *dev, return -ENODEV; } =20 - dp_display =3D platform_get_drvdata(pdev); - if (!dp_display) { + msm_dp_display =3D platform_get_drvdata(pdev); + if (!msm_dp_display) { DRM_ERROR("invalid input\n"); return -ENODEV; } =20 - memcpy(buf, dp_display->connector->eld, - min(sizeof(dp_display->connector->eld), len)); + memcpy(buf, msm_dp_display->connector->eld, + min(sizeof(msm_dp_display->connector->eld), len)); =20 return 0; } =20 -int dp_audio_hw_params(struct device *dev, +int msm_dp_audio_hw_params(struct device *dev, void *data, struct hdmi_codec_daifmt *daifmt, struct hdmi_codec_params *params) { int rc =3D 0; - struct dp_audio_private *audio; + struct msm_dp_audio_private *audio; struct platform_device *pdev; - struct msm_dp *dp_display; + struct msm_dp *msm_dp_display; =20 pdev =3D to_platform_device(dev); - dp_display =3D platform_get_drvdata(pdev); + msm_dp_display =3D platform_get_drvdata(pdev); =20 /* * there could be cases where sound card can be opened even @@ -441,12 +441,12 @@ int dp_audio_hw_params(struct device *dev, * such cases check for connection status and bail out if not * connected. */ - if (!dp_display->power_on) { + if (!msm_dp_display->power_on) { rc =3D -EINVAL; goto end; } =20 - audio =3D dp_audio_get_data(pdev); + audio =3D msm_dp_audio_get_data(pdev); if (IS_ERR(audio)) { rc =3D PTR_ERR(audio); goto end; @@ -454,26 +454,26 @@ int dp_audio_hw_params(struct device *dev, =20 audio->channels =3D params->channels; =20 - dp_audio_setup_sdp(audio); - dp_audio_setup_acr(audio); - dp_audio_safe_to_exit_level(audio); - dp_audio_enable(audio, true); - dp_display_signal_audio_start(dp_display); - dp_display->audio_enabled =3D true; + msm_dp_audio_setup_sdp(audio); + msm_dp_audio_setup_acr(audio); + msm_dp_audio_safe_to_exit_level(audio); + msm_dp_audio_enable(audio, true); + msm_dp_display_signal_audio_start(msm_dp_display); + msm_dp_display->audio_enabled =3D true; =20 end: return rc; } =20 -static void dp_audio_shutdown(struct device *dev, void *data) +static void msm_dp_audio_shutdown(struct device *dev, void *data) { - struct dp_audio_private *audio; + struct msm_dp_audio_private *audio; struct platform_device *pdev; - struct msm_dp *dp_display; + struct msm_dp *msm_dp_display; =20 pdev =3D to_platform_device(dev); - dp_display =3D platform_get_drvdata(pdev); - audio =3D dp_audio_get_data(pdev); + msm_dp_display =3D platform_get_drvdata(pdev); + audio =3D msm_dp_audio_get_data(pdev); if (IS_ERR(audio)) { DRM_ERROR("failed to get audio data\n"); return; @@ -487,32 +487,32 @@ static void dp_audio_shutdown(struct device *dev, voi= d *data) * connected. is_connected cannot be used here as its set * to false earlier than this call */ - if (!dp_display->audio_enabled) + if (!msm_dp_display->audio_enabled) return; =20 - dp_audio_enable(audio, false); + msm_dp_audio_enable(audio, false); /* signal the dp display to safely shutdown clocks */ - dp_display_signal_audio_complete(dp_display); + msm_dp_display_signal_audio_complete(msm_dp_display); } =20 -static const struct hdmi_codec_ops dp_audio_codec_ops =3D { - .hw_params =3D dp_audio_hw_params, - .audio_shutdown =3D dp_audio_shutdown, - .get_eld =3D dp_audio_get_eld, - .hook_plugged_cb =3D dp_audio_hook_plugged_cb, +static const struct hdmi_codec_ops msm_dp_audio_codec_ops =3D { + .hw_params =3D msm_dp_audio_hw_params, + .audio_shutdown =3D msm_dp_audio_shutdown, + .get_eld =3D msm_dp_audio_get_eld, + .hook_plugged_cb =3D msm_dp_audio_hook_plugged_cb, }; =20 static struct hdmi_codec_pdata codec_data =3D { - .ops =3D &dp_audio_codec_ops, + .ops =3D &msm_dp_audio_codec_ops, .max_i2s_channels =3D 8, .i2s =3D 1, }; =20 -void dp_unregister_audio_driver(struct device *dev, struct dp_audio *dp_au= dio) +void msm_dp_unregister_audio_driver(struct device *dev, struct msm_dp_audi= o *msm_dp_audio) { - struct dp_audio_private *audio_priv; + struct msm_dp_audio_private *audio_priv; =20 - audio_priv =3D container_of(dp_audio, struct dp_audio_private, dp_audio); + audio_priv =3D container_of(msm_dp_audio, struct msm_dp_audio_private, ms= m_dp_audio); =20 if (audio_priv->audio_pdev) { platform_device_unregister(audio_priv->audio_pdev); @@ -520,13 +520,13 @@ void dp_unregister_audio_driver(struct device *dev, s= truct dp_audio *dp_audio) } } =20 -int dp_register_audio_driver(struct device *dev, - struct dp_audio *dp_audio) +int msm_dp_register_audio_driver(struct device *dev, + struct msm_dp_audio *msm_dp_audio) { - struct dp_audio_private *audio_priv; + struct msm_dp_audio_private *audio_priv; =20 - audio_priv =3D container_of(dp_audio, - struct dp_audio_private, dp_audio); + audio_priv =3D container_of(msm_dp_audio, + struct msm_dp_audio_private, msm_dp_audio); =20 audio_priv->audio_pdev =3D platform_device_register_data(dev, HDMI_CODEC_DRV_NAME, @@ -536,13 +536,13 @@ int dp_register_audio_driver(struct device *dev, return PTR_ERR_OR_ZERO(audio_priv->audio_pdev); } =20 -struct dp_audio *dp_audio_get(struct platform_device *pdev, - struct dp_panel *panel, - struct dp_catalog *catalog) +struct msm_dp_audio *msm_dp_audio_get(struct platform_device *pdev, + struct msm_dp_panel *panel, + struct msm_dp_catalog *catalog) { int rc =3D 0; - struct dp_audio_private *audio; - struct dp_audio *dp_audio; + struct msm_dp_audio_private *audio; + struct msm_dp_audio *msm_dp_audio; =20 if (!pdev || !panel || !catalog) { DRM_ERROR("invalid input\n"); @@ -559,23 +559,23 @@ struct dp_audio *dp_audio_get(struct platform_device = *pdev, audio->pdev =3D pdev; audio->catalog =3D catalog; =20 - dp_audio =3D &audio->dp_audio; + msm_dp_audio =3D &audio->msm_dp_audio; =20 - dp_catalog_audio_init(catalog); + msm_dp_catalog_audio_init(catalog); =20 - return dp_audio; + return msm_dp_audio; error: return ERR_PTR(rc); } =20 -void dp_audio_put(struct dp_audio *dp_audio) +void msm_dp_audio_put(struct msm_dp_audio *msm_dp_audio) { - struct dp_audio_private *audio; + struct msm_dp_audio_private *audio; =20 - if (!dp_audio) + if (!msm_dp_audio) return; =20 - audio =3D container_of(dp_audio, struct dp_audio_private, dp_audio); + audio =3D container_of(msm_dp_audio, struct msm_dp_audio_private, msm_dp_= audio); =20 devm_kfree(&audio->pdev->dev, audio); } diff --git a/drivers/gpu/drm/msm/dp/dp_audio.h b/drivers/gpu/drm/msm/dp/dp_= audio.h index 4ab78880af82..1c9efaaa40e5 100644 --- a/drivers/gpu/drm/msm/dp/dp_audio.h +++ b/drivers/gpu/drm/msm/dp/dp_audio.h @@ -13,58 +13,58 @@ #include =20 /** - * struct dp_audio + * struct msm_dp_audio * @lane_count: number of lanes configured in current session * @bw_code: link rate's bandwidth code for current session */ -struct dp_audio { +struct msm_dp_audio { u32 lane_count; u32 bw_code; }; =20 /** - * dp_audio_get() + * msm_dp_audio_get() * * Creates and instance of dp audio. * * @pdev: caller's platform device instance. - * @panel: an instance of dp_panel module. - * @catalog: an instance of dp_catalog module. + * @panel: an instance of msm_dp_panel module. + * @catalog: an instance of msm_dp_catalog module. * * Returns the error code in case of failure, otherwize - * an instance of newly created dp_module. + * an instance of newly created msm_dp_module. */ -struct dp_audio *dp_audio_get(struct platform_device *pdev, - struct dp_panel *panel, - struct dp_catalog *catalog); +struct msm_dp_audio *msm_dp_audio_get(struct platform_device *pdev, + struct msm_dp_panel *panel, + struct msm_dp_catalog *catalog); =20 /** - * dp_register_audio_driver() + * msm_dp_register_audio_driver() * * Registers DP device with hdmi_codec interface. * * @dev: DP device instance. - * @dp_audio: an instance of dp_audio module. + * @msm_dp_audio: an instance of msm_dp_audio module. * * * Returns the error code in case of failure, otherwise * zero on success. */ -int dp_register_audio_driver(struct device *dev, - struct dp_audio *dp_audio); +int msm_dp_register_audio_driver(struct device *dev, + struct msm_dp_audio *msm_dp_audio); =20 -void dp_unregister_audio_driver(struct device *dev, struct dp_audio *dp_au= dio); +void msm_dp_unregister_audio_driver(struct device *dev, struct msm_dp_audi= o *msm_dp_audio); =20 /** - * dp_audio_put() + * msm_dp_audio_put() * - * Cleans the dp_audio instance. + * Cleans the msm_dp_audio instance. * - * @dp_audio: an instance of dp_audio. + * @msm_dp_audio: an instance of msm_dp_audio. */ -void dp_audio_put(struct dp_audio *dp_audio); +void msm_dp_audio_put(struct msm_dp_audio *msm_dp_audio); =20 -int dp_audio_hw_params(struct device *dev, +int msm_dp_audio_hw_params(struct device *dev, void *data, struct hdmi_codec_daifmt *daifmt, struct hdmi_codec_params *params); diff --git a/drivers/gpu/drm/msm/dp/dp_aux.c b/drivers/gpu/drm/msm/dp/dp_au= x.c index 00dfafbebe0e..bc8d46abfc61 100644 --- a/drivers/gpu/drm/msm/dp/dp_aux.c +++ b/drivers/gpu/drm/msm/dp/dp_aux.c @@ -20,9 +20,9 @@ enum msm_dp_aux_err { DP_AUX_ERR_PHY, }; =20 -struct dp_aux_private { +struct msm_dp_aux_private { struct device *dev; - struct dp_catalog *catalog; + struct msm_dp_catalog *catalog; =20 struct phy *phy; =20 @@ -42,12 +42,12 @@ struct dp_aux_private { u32 offset; u32 segment; =20 - struct drm_dp_aux dp_aux; + struct drm_dp_aux msm_dp_aux; }; =20 #define MAX_AUX_RETRIES 5 =20 -static ssize_t dp_aux_write(struct dp_aux_private *aux, +static ssize_t msm_dp_aux_write(struct msm_dp_aux_private *aux, struct drm_dp_aux_msg *msg) { u8 data[4]; @@ -88,11 +88,11 @@ static ssize_t dp_aux_write(struct dp_aux_private *aux, /* index =3D 0, write */ if (i =3D=3D 0) reg |=3D DP_AUX_DATA_INDEX_WRITE; - dp_catalog_aux_write_data(aux->catalog, reg); + msm_dp_catalog_aux_write_data(aux->catalog, reg); } =20 - dp_catalog_aux_clear_trans(aux->catalog, false); - dp_catalog_aux_clear_hw_interrupts(aux->catalog); + msm_dp_catalog_aux_clear_trans(aux->catalog, false); + msm_dp_catalog_aux_clear_hw_interrupts(aux->catalog); =20 reg =3D 0; /* Transaction number =3D=3D 1 */ if (!aux->native) { /* i2c */ @@ -106,12 +106,12 @@ static ssize_t dp_aux_write(struct dp_aux_private *au= x, } =20 reg |=3D DP_AUX_TRANS_CTRL_GO; - dp_catalog_aux_write_trans(aux->catalog, reg); + msm_dp_catalog_aux_write_trans(aux->catalog, reg); =20 return len; } =20 -static ssize_t dp_aux_cmd_fifo_tx(struct dp_aux_private *aux, +static ssize_t msm_dp_aux_cmd_fifo_tx(struct msm_dp_aux_private *aux, struct drm_dp_aux_msg *msg) { ssize_t ret; @@ -119,7 +119,7 @@ static ssize_t dp_aux_cmd_fifo_tx(struct dp_aux_private= *aux, =20 reinit_completion(&aux->comp); =20 - ret =3D dp_aux_write(aux, msg); + ret =3D msm_dp_aux_write(aux, msg); if (ret < 0) return ret; =20 @@ -131,7 +131,7 @@ static ssize_t dp_aux_cmd_fifo_tx(struct dp_aux_private= *aux, return ret; } =20 -static ssize_t dp_aux_cmd_fifo_rx(struct dp_aux_private *aux, +static ssize_t msm_dp_aux_cmd_fifo_rx(struct msm_dp_aux_private *aux, struct drm_dp_aux_msg *msg) { u32 data; @@ -139,20 +139,20 @@ static ssize_t dp_aux_cmd_fifo_rx(struct dp_aux_priva= te *aux, u32 i, actual_i; u32 len =3D msg->size; =20 - dp_catalog_aux_clear_trans(aux->catalog, true); + msm_dp_catalog_aux_clear_trans(aux->catalog, true); =20 data =3D DP_AUX_DATA_INDEX_WRITE; /* INDEX_WRITE */ data |=3D DP_AUX_DATA_READ; /* read */ =20 - dp_catalog_aux_write_data(aux->catalog, data); + msm_dp_catalog_aux_write_data(aux->catalog, data); =20 dp =3D msg->buffer; =20 /* discard first byte */ - data =3D dp_catalog_aux_read_data(aux->catalog); + data =3D msm_dp_catalog_aux_read_data(aux->catalog); =20 for (i =3D 0; i < len; i++) { - data =3D dp_catalog_aux_read_data(aux->catalog); + data =3D msm_dp_catalog_aux_read_data(aux->catalog); *dp++ =3D (u8)((data >> DP_AUX_DATA_OFFSET) & 0xff); =20 actual_i =3D (data >> DP_AUX_DATA_INDEX_OFFSET) & 0xFF; @@ -163,7 +163,7 @@ static ssize_t dp_aux_cmd_fifo_rx(struct dp_aux_private= *aux, return i; } =20 -static void dp_aux_update_offset_and_segment(struct dp_aux_private *aux, +static void msm_dp_aux_update_offset_and_segment(struct msm_dp_aux_private= *aux, struct drm_dp_aux_msg *input_msg) { u32 edid_address =3D 0x50; @@ -185,7 +185,7 @@ static void dp_aux_update_offset_and_segment(struct dp_= aux_private *aux, } =20 /** - * dp_aux_transfer_helper() - helper function for EDID read transactions + * msm_dp_aux_transfer_helper() - helper function for EDID read transactio= ns * * @aux: DP AUX private structure * @input_msg: input message from DRM upstream APIs @@ -196,7 +196,7 @@ static void dp_aux_update_offset_and_segment(struct dp_= aux_private *aux, * This helper function is used to fix EDID reads for non-compliant * sinks that do not handle the i2c middle-of-transaction flag correctly. */ -static void dp_aux_transfer_helper(struct dp_aux_private *aux, +static void msm_dp_aux_transfer_helper(struct msm_dp_aux_private *aux, struct drm_dp_aux_msg *input_msg, bool send_seg) { @@ -238,7 +238,7 @@ static void dp_aux_transfer_helper(struct dp_aux_privat= e *aux, helper_msg.address =3D segment_address; helper_msg.buffer =3D &aux->segment; helper_msg.size =3D 1; - dp_aux_cmd_fifo_tx(aux, &helper_msg); + msm_dp_aux_cmd_fifo_tx(aux, &helper_msg); } =20 /* @@ -252,7 +252,7 @@ static void dp_aux_transfer_helper(struct dp_aux_privat= e *aux, helper_msg.address =3D input_msg->address; helper_msg.buffer =3D &aux->offset; helper_msg.size =3D 1; - dp_aux_cmd_fifo_tx(aux, &helper_msg); + msm_dp_aux_cmd_fifo_tx(aux, &helper_msg); =20 end: aux->offset +=3D message_size; @@ -265,15 +265,15 @@ static void dp_aux_transfer_helper(struct dp_aux_priv= ate *aux, * It will call aux_reset() function to reset the AUX channel, * if the waiting is timeout. */ -static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux, +static ssize_t msm_dp_aux_transfer(struct drm_dp_aux *msm_dp_aux, struct drm_dp_aux_msg *msg) { ssize_t ret; int const aux_cmd_native_max =3D 16; int const aux_cmd_i2c_max =3D 128; - struct dp_aux_private *aux; + struct msm_dp_aux_private *aux; =20 - aux =3D container_of(dp_aux, struct dp_aux_private, dp_aux); + aux =3D container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); =20 aux->native =3D msg->request & (DP_AUX_NATIVE_WRITE & DP_AUX_NATIVE_READ); =20 @@ -292,7 +292,7 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_au= x, return -EINVAL; } =20 - ret =3D pm_runtime_resume_and_get(dp_aux->dev); + ret =3D pm_runtime_resume_and_get(msm_dp_aux->dev); if (ret) return ret; =20 @@ -313,8 +313,8 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_au= x, goto exit; } =20 - dp_aux_update_offset_and_segment(aux, msg); - dp_aux_transfer_helper(aux, msg, true); + msm_dp_aux_update_offset_and_segment(aux, msg); + msm_dp_aux_transfer_helper(aux, msg, true); =20 aux->read =3D msg->request & (DP_AUX_I2C_READ & DP_AUX_NATIVE_READ); aux->cmd_busy =3D true; @@ -327,7 +327,7 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_au= x, aux->no_send_stop =3D true; } =20 - ret =3D dp_aux_cmd_fifo_tx(aux, msg); + ret =3D msm_dp_aux_cmd_fifo_tx(aux, msg); if (ret < 0) { if (aux->native) { aux->retry_cnt++; @@ -335,14 +335,14 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_= aux, phy_calibrate(aux->phy); } /* reset aux if link is in connected state */ - if (dp_catalog_link_is_connected(aux->catalog)) - dp_catalog_aux_reset(aux->catalog); + if (msm_dp_catalog_link_is_connected(aux->catalog)) + msm_dp_catalog_aux_reset(aux->catalog); } else { aux->retry_cnt =3D 0; switch (aux->aux_error_num) { case DP_AUX_ERR_NONE: if (aux->read) - ret =3D dp_aux_cmd_fifo_rx(aux, msg); + ret =3D msm_dp_aux_cmd_fifo_rx(aux, msg); msg->reply =3D aux->native ? DP_AUX_NATIVE_REPLY_ACK : DP_AUX_I2C_REPLY= _ACK; break; case DP_AUX_ERR_DEFER: @@ -364,24 +364,24 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_= aux, =20 exit: mutex_unlock(&aux->mutex); - pm_runtime_put_sync(dp_aux->dev); + pm_runtime_put_sync(msm_dp_aux->dev); =20 return ret; } =20 -irqreturn_t dp_aux_isr(struct drm_dp_aux *dp_aux) +irqreturn_t msm_dp_aux_isr(struct drm_dp_aux *msm_dp_aux) { u32 isr; - struct dp_aux_private *aux; + struct msm_dp_aux_private *aux; =20 - if (!dp_aux) { + if (!msm_dp_aux) { DRM_ERROR("invalid input\n"); return IRQ_NONE; } =20 - aux =3D container_of(dp_aux, struct dp_aux_private, dp_aux); + aux =3D container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); =20 - isr =3D dp_catalog_aux_get_irq(aux->catalog); + isr =3D msm_dp_catalog_aux_get_irq(aux->catalog); =20 /* no interrupts pending, return immediately */ if (!isr) @@ -403,7 +403,7 @@ irqreturn_t dp_aux_isr(struct drm_dp_aux *dp_aux) =20 if (isr & DP_INTR_AUX_ERROR) { aux->aux_error_num =3D DP_AUX_ERR_PHY; - dp_catalog_aux_clear_hw_interrupts(aux->catalog); + msm_dp_catalog_aux_clear_hw_interrupts(aux->catalog); } else if (isr & DP_INTR_NACK_DEFER) { aux->aux_error_num =3D DP_AUX_ERR_NACK_DEFER; } else if (isr & DP_INTR_WRONG_ADDR) { @@ -429,68 +429,68 @@ irqreturn_t dp_aux_isr(struct drm_dp_aux *dp_aux) return IRQ_HANDLED; } =20 -void dp_aux_enable_xfers(struct drm_dp_aux *dp_aux, bool enabled) +void msm_dp_aux_enable_xfers(struct drm_dp_aux *msm_dp_aux, bool enabled) { - struct dp_aux_private *aux; + struct msm_dp_aux_private *aux; =20 - aux =3D container_of(dp_aux, struct dp_aux_private, dp_aux); + aux =3D container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); aux->enable_xfers =3D enabled; } =20 -void dp_aux_reconfig(struct drm_dp_aux *dp_aux) +void msm_dp_aux_reconfig(struct drm_dp_aux *msm_dp_aux) { - struct dp_aux_private *aux; + struct msm_dp_aux_private *aux; =20 - aux =3D container_of(dp_aux, struct dp_aux_private, dp_aux); + aux =3D container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); =20 phy_calibrate(aux->phy); - dp_catalog_aux_reset(aux->catalog); + msm_dp_catalog_aux_reset(aux->catalog); } =20 -void dp_aux_init(struct drm_dp_aux *dp_aux) +void msm_dp_aux_init(struct drm_dp_aux *msm_dp_aux) { - struct dp_aux_private *aux; + struct msm_dp_aux_private *aux; =20 - if (!dp_aux) { + if (!msm_dp_aux) { DRM_ERROR("invalid input\n"); return; } =20 - aux =3D container_of(dp_aux, struct dp_aux_private, dp_aux); + aux =3D container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); =20 mutex_lock(&aux->mutex); =20 - dp_catalog_aux_enable(aux->catalog, true); + msm_dp_catalog_aux_enable(aux->catalog, true); aux->retry_cnt =3D 0; aux->initted =3D true; =20 mutex_unlock(&aux->mutex); } =20 -void dp_aux_deinit(struct drm_dp_aux *dp_aux) +void msm_dp_aux_deinit(struct drm_dp_aux *msm_dp_aux) { - struct dp_aux_private *aux; + struct msm_dp_aux_private *aux; =20 - aux =3D container_of(dp_aux, struct dp_aux_private, dp_aux); + aux =3D container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); =20 mutex_lock(&aux->mutex); =20 aux->initted =3D false; - dp_catalog_aux_enable(aux->catalog, false); + msm_dp_catalog_aux_enable(aux->catalog, false); =20 mutex_unlock(&aux->mutex); } =20 -int dp_aux_register(struct drm_dp_aux *dp_aux) +int msm_dp_aux_register(struct drm_dp_aux *msm_dp_aux) { int ret; =20 - if (!dp_aux) { + if (!msm_dp_aux) { DRM_ERROR("invalid input\n"); return -EINVAL; } =20 - ret =3D drm_dp_aux_register(dp_aux); + ret =3D drm_dp_aux_register(msm_dp_aux); if (ret) { DRM_ERROR("%s: failed to register drm aux: %d\n", __func__, ret); @@ -500,34 +500,34 @@ int dp_aux_register(struct drm_dp_aux *dp_aux) return 0; } =20 -void dp_aux_unregister(struct drm_dp_aux *dp_aux) +void msm_dp_aux_unregister(struct drm_dp_aux *msm_dp_aux) { - drm_dp_aux_unregister(dp_aux); + drm_dp_aux_unregister(msm_dp_aux); } =20 -static int dp_wait_hpd_asserted(struct drm_dp_aux *dp_aux, +static int msm_dp_wait_hpd_asserted(struct drm_dp_aux *msm_dp_aux, unsigned long wait_us) { int ret; - struct dp_aux_private *aux; + struct msm_dp_aux_private *aux; =20 - aux =3D container_of(dp_aux, struct dp_aux_private, dp_aux); + aux =3D container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); =20 ret =3D pm_runtime_resume_and_get(aux->dev); if (ret) return ret; =20 - ret =3D dp_catalog_aux_wait_for_hpd_connect_state(aux->catalog, wait_us); + ret =3D msm_dp_catalog_aux_wait_for_hpd_connect_state(aux->catalog, wait_= us); pm_runtime_put_sync(aux->dev); =20 return ret; } =20 -struct drm_dp_aux *dp_aux_get(struct device *dev, struct dp_catalog *catal= og, +struct drm_dp_aux *msm_dp_aux_get(struct device *dev, struct msm_dp_catalo= g *catalog, struct phy *phy, bool is_edp) { - struct dp_aux_private *aux; + struct msm_dp_aux_private *aux; =20 if (!catalog) { DRM_ERROR("invalid input\n"); @@ -553,23 +553,23 @@ struct drm_dp_aux *dp_aux_get(struct device *dev, str= uct dp_catalog *catalog, * before registering AUX with the DRM device so that * msm eDP panel can be detected by generic_dep_panel_probe(). */ - aux->dp_aux.name =3D "dpu_dp_aux"; - aux->dp_aux.dev =3D dev; - aux->dp_aux.transfer =3D dp_aux_transfer; - aux->dp_aux.wait_hpd_asserted =3D dp_wait_hpd_asserted; - drm_dp_aux_init(&aux->dp_aux); + aux->msm_dp_aux.name =3D "dpu_dp_aux"; + aux->msm_dp_aux.dev =3D dev; + aux->msm_dp_aux.transfer =3D msm_dp_aux_transfer; + aux->msm_dp_aux.wait_hpd_asserted =3D msm_dp_wait_hpd_asserted; + drm_dp_aux_init(&aux->msm_dp_aux); =20 - return &aux->dp_aux; + return &aux->msm_dp_aux; } =20 -void dp_aux_put(struct drm_dp_aux *dp_aux) +void msm_dp_aux_put(struct drm_dp_aux *msm_dp_aux) { - struct dp_aux_private *aux; + struct msm_dp_aux_private *aux; =20 - if (!dp_aux) + if (!msm_dp_aux) return; =20 - aux =3D container_of(dp_aux, struct dp_aux_private, dp_aux); + aux =3D container_of(msm_dp_aux, struct msm_dp_aux_private, msm_dp_aux); =20 mutex_destroy(&aux->mutex); =20 diff --git a/drivers/gpu/drm/msm/dp/dp_aux.h b/drivers/gpu/drm/msm/dp/dp_au= x.h index 4f65e892a807..39c5b4c8596a 100644 --- a/drivers/gpu/drm/msm/dp/dp_aux.h +++ b/drivers/gpu/drm/msm/dp/dp_aux.h @@ -9,18 +9,18 @@ #include "dp_catalog.h" #include =20 -int dp_aux_register(struct drm_dp_aux *dp_aux); -void dp_aux_unregister(struct drm_dp_aux *dp_aux); -irqreturn_t dp_aux_isr(struct drm_dp_aux *dp_aux); -void dp_aux_enable_xfers(struct drm_dp_aux *dp_aux, bool enabled); -void dp_aux_init(struct drm_dp_aux *dp_aux); -void dp_aux_deinit(struct drm_dp_aux *dp_aux); -void dp_aux_reconfig(struct drm_dp_aux *dp_aux); +int msm_dp_aux_register(struct drm_dp_aux *msm_dp_aux); +void msm_dp_aux_unregister(struct drm_dp_aux *msm_dp_aux); +irqreturn_t msm_dp_aux_isr(struct drm_dp_aux *msm_dp_aux); +void msm_dp_aux_enable_xfers(struct drm_dp_aux *msm_dp_aux, bool enabled); +void msm_dp_aux_init(struct drm_dp_aux *msm_dp_aux); +void msm_dp_aux_deinit(struct drm_dp_aux *msm_dp_aux); +void msm_dp_aux_reconfig(struct drm_dp_aux *msm_dp_aux); =20 struct phy; -struct drm_dp_aux *dp_aux_get(struct device *dev, struct dp_catalog *catal= og, +struct drm_dp_aux *msm_dp_aux_get(struct device *dev, struct msm_dp_catalo= g *catalog, struct phy *phy, bool is_edp); -void dp_aux_put(struct drm_dp_aux *aux); +void msm_dp_aux_put(struct drm_dp_aux *aux); =20 #endif /*__DP_AUX_H_*/ diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/d= p_catalog.c index 6e55cbf69674..b4c8856fb25d 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.c +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c @@ -75,18 +75,18 @@ struct dss_io_data { struct dss_io_region p0; }; =20 -struct dp_catalog_private { +struct msm_dp_catalog_private { struct device *dev; struct drm_device *drm_dev; struct dss_io_data io; u32 (*audio_map)[DP_AUDIO_SDP_HEADER_MAX]; - struct dp_catalog dp_catalog; + struct msm_dp_catalog msm_dp_catalog; }; =20 -void dp_catalog_snapshot(struct dp_catalog *dp_catalog, struct msm_disp_st= ate *disp_state) +void msm_dp_catalog_snapshot(struct msm_dp_catalog *msm_dp_catalog, struct= msm_disp_state *disp_state) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); struct dss_io_data *dss =3D &catalog->io; =20 msm_disp_snapshot_add_block(disp_state, dss->ahb.len, dss->ahb.base, "dp_= ahb"); @@ -95,12 +95,12 @@ void dp_catalog_snapshot(struct dp_catalog *dp_catalog,= struct msm_disp_state *d msm_disp_snapshot_add_block(disp_state, dss->p0.len, dss->p0.base, "dp_p0= "); } =20 -static inline u32 dp_read_aux(struct dp_catalog_private *catalog, u32 offs= et) +static inline u32 msm_dp_read_aux(struct msm_dp_catalog_private *catalog, = u32 offset) { return readl_relaxed(catalog->io.aux.base + offset); } =20 -static inline void dp_write_aux(struct dp_catalog_private *catalog, +static inline void msm_dp_write_aux(struct msm_dp_catalog_private *catalog, u32 offset, u32 data) { /* @@ -110,12 +110,12 @@ static inline void dp_write_aux(struct dp_catalog_pri= vate *catalog, writel(data, catalog->io.aux.base + offset); } =20 -static inline u32 dp_read_ahb(const struct dp_catalog_private *catalog, u3= 2 offset) +static inline u32 msm_dp_read_ahb(const struct msm_dp_catalog_private *cat= alog, u32 offset) { return readl_relaxed(catalog->io.ahb.base + offset); } =20 -static inline void dp_write_ahb(struct dp_catalog_private *catalog, +static inline void msm_dp_write_ahb(struct msm_dp_catalog_private *catalog, u32 offset, u32 data) { /* @@ -125,7 +125,7 @@ static inline void dp_write_ahb(struct dp_catalog_priva= te *catalog, writel(data, catalog->io.ahb.base + offset); } =20 -static inline void dp_write_p0(struct dp_catalog_private *catalog, +static inline void msm_dp_write_p0(struct msm_dp_catalog_private *catalog, u32 offset, u32 data) { /* @@ -135,7 +135,7 @@ static inline void dp_write_p0(struct dp_catalog_privat= e *catalog, writel(data, catalog->io.p0.base + offset); } =20 -static inline u32 dp_read_p0(struct dp_catalog_private *catalog, +static inline u32 msm_dp_read_p0(struct msm_dp_catalog_private *catalog, u32 offset) { /* @@ -145,12 +145,12 @@ static inline u32 dp_read_p0(struct dp_catalog_privat= e *catalog, return readl_relaxed(catalog->io.p0.base + offset); } =20 -static inline u32 dp_read_link(struct dp_catalog_private *catalog, u32 off= set) +static inline u32 msm_dp_read_link(struct msm_dp_catalog_private *catalog,= u32 offset) { return readl_relaxed(catalog->io.link.base + offset); } =20 -static inline void dp_write_link(struct dp_catalog_private *catalog, +static inline void msm_dp_write_link(struct msm_dp_catalog_private *catalo= g, u32 offset, u32 data) { /* @@ -161,64 +161,64 @@ static inline void dp_write_link(struct dp_catalog_pr= ivate *catalog, } =20 /* aux related catalog functions */ -u32 dp_catalog_aux_read_data(struct dp_catalog *dp_catalog) +u32 msm_dp_catalog_aux_read_data(struct msm_dp_catalog *msm_dp_catalog) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - return dp_read_aux(catalog, REG_DP_AUX_DATA); + return msm_dp_read_aux(catalog, REG_DP_AUX_DATA); } =20 -int dp_catalog_aux_write_data(struct dp_catalog *dp_catalog, u32 data) +int msm_dp_catalog_aux_write_data(struct msm_dp_catalog *msm_dp_catalog, u= 32 data) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - dp_write_aux(catalog, REG_DP_AUX_DATA, data); + msm_dp_write_aux(catalog, REG_DP_AUX_DATA, data); return 0; } =20 -int dp_catalog_aux_write_trans(struct dp_catalog *dp_catalog, u32 data) +int msm_dp_catalog_aux_write_trans(struct msm_dp_catalog *msm_dp_catalog, = u32 data) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - dp_write_aux(catalog, REG_DP_AUX_TRANS_CTRL, data); + msm_dp_write_aux(catalog, REG_DP_AUX_TRANS_CTRL, data); return 0; } =20 -int dp_catalog_aux_clear_trans(struct dp_catalog *dp_catalog, bool read) +int msm_dp_catalog_aux_clear_trans(struct msm_dp_catalog *msm_dp_catalog, = bool read) { u32 data; - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 if (read) { - data =3D dp_read_aux(catalog, REG_DP_AUX_TRANS_CTRL); + data =3D msm_dp_read_aux(catalog, REG_DP_AUX_TRANS_CTRL); data &=3D ~DP_AUX_TRANS_CTRL_GO; - dp_write_aux(catalog, REG_DP_AUX_TRANS_CTRL, data); + msm_dp_write_aux(catalog, REG_DP_AUX_TRANS_CTRL, data); } else { - dp_write_aux(catalog, REG_DP_AUX_TRANS_CTRL, 0); + msm_dp_write_aux(catalog, REG_DP_AUX_TRANS_CTRL, 0); } return 0; } =20 -int dp_catalog_aux_clear_hw_interrupts(struct dp_catalog *dp_catalog) +int msm_dp_catalog_aux_clear_hw_interrupts(struct msm_dp_catalog *msm_dp_c= atalog) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - dp_read_aux(catalog, REG_DP_PHY_AUX_INTERRUPT_STATUS); - dp_write_aux(catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0x1f); - dp_write_aux(catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0x9f); - dp_write_aux(catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0); + msm_dp_read_aux(catalog, REG_DP_PHY_AUX_INTERRUPT_STATUS); + msm_dp_write_aux(catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0x1f); + msm_dp_write_aux(catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0x9f); + msm_dp_write_aux(catalog, REG_DP_PHY_AUX_INTERRUPT_CLEAR, 0); return 0; } =20 /** - * dp_catalog_aux_reset() - reset AUX controller + * msm_dp_catalog_aux_reset() - reset AUX controller * - * @dp_catalog: DP catalog structure + * @msm_dp_catalog: DP catalog structure * * return: void * @@ -227,47 +227,47 @@ int dp_catalog_aux_clear_hw_interrupts(struct dp_cata= log *dp_catalog) * NOTE: reset AUX controller will also clear any pending HPD related inte= rrupts *=20 */ -void dp_catalog_aux_reset(struct dp_catalog *dp_catalog) +void msm_dp_catalog_aux_reset(struct msm_dp_catalog *msm_dp_catalog) { u32 aux_ctrl; - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - aux_ctrl =3D dp_read_aux(catalog, REG_DP_AUX_CTRL); + aux_ctrl =3D msm_dp_read_aux(catalog, REG_DP_AUX_CTRL); =20 aux_ctrl |=3D DP_AUX_CTRL_RESET; - dp_write_aux(catalog, REG_DP_AUX_CTRL, aux_ctrl); + msm_dp_write_aux(catalog, REG_DP_AUX_CTRL, aux_ctrl); usleep_range(1000, 1100); /* h/w recommended delay */ =20 aux_ctrl &=3D ~DP_AUX_CTRL_RESET; - dp_write_aux(catalog, REG_DP_AUX_CTRL, aux_ctrl); + msm_dp_write_aux(catalog, REG_DP_AUX_CTRL, aux_ctrl); } =20 -void dp_catalog_aux_enable(struct dp_catalog *dp_catalog, bool enable) +void msm_dp_catalog_aux_enable(struct msm_dp_catalog *msm_dp_catalog, bool= enable) { u32 aux_ctrl; - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - aux_ctrl =3D dp_read_aux(catalog, REG_DP_AUX_CTRL); + aux_ctrl =3D msm_dp_read_aux(catalog, REG_DP_AUX_CTRL); =20 if (enable) { - dp_write_aux(catalog, REG_DP_TIMEOUT_COUNT, 0xffff); - dp_write_aux(catalog, REG_DP_AUX_LIMITS, 0xffff); + msm_dp_write_aux(catalog, REG_DP_TIMEOUT_COUNT, 0xffff); + msm_dp_write_aux(catalog, REG_DP_AUX_LIMITS, 0xffff); aux_ctrl |=3D DP_AUX_CTRL_ENABLE; } else { aux_ctrl &=3D ~DP_AUX_CTRL_ENABLE; } =20 - dp_write_aux(catalog, REG_DP_AUX_CTRL, aux_ctrl); + msm_dp_write_aux(catalog, REG_DP_AUX_CTRL, aux_ctrl); } =20 -int dp_catalog_aux_wait_for_hpd_connect_state(struct dp_catalog *dp_catalo= g, +int msm_dp_catalog_aux_wait_for_hpd_connect_state(struct msm_dp_catalog *m= sm_dp_catalog, unsigned long wait_us) { u32 state; - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 /* poll for hpd connected status every 2ms and timeout after wait_us */ return readl_poll_timeout(catalog->io.aux.base + @@ -294,10 +294,10 @@ static void dump_regs(void __iomem *base, int len) } } =20 -void dp_catalog_dump_regs(struct dp_catalog *dp_catalog) +void msm_dp_catalog_dump_regs(struct msm_dp_catalog *msm_dp_catalog) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); struct dss_io_data *io =3D &catalog->io; =20 pr_info("AHB regs\n"); @@ -313,17 +313,17 @@ void dp_catalog_dump_regs(struct dp_catalog *dp_catal= og) dump_regs(io->p0.base, io->p0.len); } =20 -u32 dp_catalog_aux_get_irq(struct dp_catalog *dp_catalog) +u32 msm_dp_catalog_aux_get_irq(struct msm_dp_catalog *msm_dp_catalog) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); u32 intr, intr_ack; =20 - intr =3D dp_read_ahb(catalog, REG_DP_INTR_STATUS); + intr =3D msm_dp_read_ahb(catalog, REG_DP_INTR_STATUS); intr &=3D ~DP_INTERRUPT_STATUS1_MASK; intr_ack =3D (intr & DP_INTERRUPT_STATUS1) << DP_INTERRUPT_STATUS_ACK_SHIFT; - dp_write_ahb(catalog, REG_DP_INTR_STATUS, intr_ack | + msm_dp_write_ahb(catalog, REG_DP_INTR_STATUS, intr_ack | DP_INTERRUPT_STATUS1_MASK); =20 return intr; @@ -331,40 +331,40 @@ u32 dp_catalog_aux_get_irq(struct dp_catalog *dp_cata= log) } =20 /* controller related catalog functions */ -void dp_catalog_ctrl_update_transfer_unit(struct dp_catalog *dp_catalog, - u32 dp_tu, u32 valid_boundary, +void msm_dp_catalog_ctrl_update_transfer_unit(struct msm_dp_catalog *msm_d= p_catalog, + u32 msm_dp_tu, u32 valid_boundary, u32 valid_boundary2) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - dp_write_link(catalog, REG_DP_VALID_BOUNDARY, valid_boundary); - dp_write_link(catalog, REG_DP_TU, dp_tu); - dp_write_link(catalog, REG_DP_VALID_BOUNDARY_2, valid_boundary2); + msm_dp_write_link(catalog, REG_DP_VALID_BOUNDARY, valid_boundary); + msm_dp_write_link(catalog, REG_DP_TU, msm_dp_tu); + msm_dp_write_link(catalog, REG_DP_VALID_BOUNDARY_2, valid_boundary2); } =20 -void dp_catalog_ctrl_state_ctrl(struct dp_catalog *dp_catalog, u32 state) +void msm_dp_catalog_ctrl_state_ctrl(struct msm_dp_catalog *msm_dp_catalog,= u32 state) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - dp_write_link(catalog, REG_DP_STATE_CTRL, state); + msm_dp_write_link(catalog, REG_DP_STATE_CTRL, state); } =20 -void dp_catalog_ctrl_config_ctrl(struct dp_catalog *dp_catalog, u32 cfg) +void msm_dp_catalog_ctrl_config_ctrl(struct msm_dp_catalog *msm_dp_catalog= , u32 cfg) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 drm_dbg_dp(catalog->drm_dev, "DP_CONFIGURATION_CTRL=3D0x%x\n", cfg); =20 - dp_write_link(catalog, REG_DP_CONFIGURATION_CTRL, cfg); + msm_dp_write_link(catalog, REG_DP_CONFIGURATION_CTRL, cfg); } =20 -void dp_catalog_ctrl_lane_mapping(struct dp_catalog *dp_catalog) +void msm_dp_catalog_ctrl_lane_mapping(struct msm_dp_catalog *msm_dp_catalo= g) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); u32 ln_0 =3D 0, ln_1 =3D 1, ln_2 =3D 2, ln_3 =3D 3; /* One-to-One mapping= */ u32 ln_mapping; =20 @@ -373,71 +373,71 @@ void dp_catalog_ctrl_lane_mapping(struct dp_catalog *= dp_catalog) ln_mapping |=3D ln_2 << LANE2_MAPPING_SHIFT; ln_mapping |=3D ln_3 << LANE3_MAPPING_SHIFT; =20 - dp_write_link(catalog, REG_DP_LOGICAL2PHYSICAL_LANE_MAPPING, + msm_dp_write_link(catalog, REG_DP_LOGICAL2PHYSICAL_LANE_MAPPING, ln_mapping); } =20 -void dp_catalog_ctrl_psr_mainlink_enable(struct dp_catalog *dp_catalog, +void msm_dp_catalog_ctrl_psr_mainlink_enable(struct msm_dp_catalog *msm_dp= _catalog, bool enable) { u32 val; - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - val =3D dp_read_link(catalog, REG_DP_MAINLINK_CTRL); + val =3D msm_dp_read_link(catalog, REG_DP_MAINLINK_CTRL); =20 if (enable) val |=3D DP_MAINLINK_CTRL_ENABLE; else val &=3D ~DP_MAINLINK_CTRL_ENABLE; =20 - dp_write_link(catalog, REG_DP_MAINLINK_CTRL, val); + msm_dp_write_link(catalog, REG_DP_MAINLINK_CTRL, val); } =20 -void dp_catalog_ctrl_mainlink_ctrl(struct dp_catalog *dp_catalog, +void msm_dp_catalog_ctrl_mainlink_ctrl(struct msm_dp_catalog *msm_dp_catal= og, bool enable) { u32 mainlink_ctrl; - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 drm_dbg_dp(catalog->drm_dev, "enable=3D%d\n", enable); if (enable) { /* * To make sure link reg writes happens before other operation, - * dp_write_link() function uses writel() + * msm_dp_write_link() function uses writel() */ - mainlink_ctrl =3D dp_read_link(catalog, REG_DP_MAINLINK_CTRL); + mainlink_ctrl =3D msm_dp_read_link(catalog, REG_DP_MAINLINK_CTRL); =20 mainlink_ctrl &=3D ~(DP_MAINLINK_CTRL_RESET | DP_MAINLINK_CTRL_ENABLE); - dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl); + msm_dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl); =20 mainlink_ctrl |=3D DP_MAINLINK_CTRL_RESET; - dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl); + msm_dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl); =20 mainlink_ctrl &=3D ~DP_MAINLINK_CTRL_RESET; - dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl); + msm_dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl); =20 mainlink_ctrl |=3D (DP_MAINLINK_CTRL_ENABLE | DP_MAINLINK_FB_BOUNDARY_SEL); - dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl); + msm_dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl); } else { - mainlink_ctrl =3D dp_read_link(catalog, REG_DP_MAINLINK_CTRL); + mainlink_ctrl =3D msm_dp_read_link(catalog, REG_DP_MAINLINK_CTRL); mainlink_ctrl &=3D ~DP_MAINLINK_CTRL_ENABLE; - dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl); + msm_dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl); } } =20 -void dp_catalog_ctrl_config_misc(struct dp_catalog *dp_catalog, +void msm_dp_catalog_ctrl_config_misc(struct msm_dp_catalog *msm_dp_catalog, u32 colorimetry_cfg, u32 test_bits_depth) { u32 misc_val; - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - misc_val =3D dp_read_link(catalog, REG_DP_MISC1_MISC0); + misc_val =3D msm_dp_read_link(catalog, REG_DP_MISC1_MISC0); =20 /* clear bpp bits */ misc_val &=3D ~(0x07 << DP_MISC0_TEST_BITS_DEPTH_SHIFT); @@ -447,27 +447,27 @@ void dp_catalog_ctrl_config_misc(struct dp_catalog *d= p_catalog, misc_val |=3D DP_MISC0_SYNCHRONOUS_CLK; =20 drm_dbg_dp(catalog->drm_dev, "misc settings =3D 0x%x\n", misc_val); - dp_write_link(catalog, REG_DP_MISC1_MISC0, misc_val); + msm_dp_write_link(catalog, REG_DP_MISC1_MISC0, misc_val); } =20 -void dp_catalog_setup_peripheral_flush(struct dp_catalog *dp_catalog) +void msm_dp_catalog_setup_peripheral_flush(struct msm_dp_catalog *msm_dp_c= atalog) { u32 mainlink_ctrl, hw_revision; - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - mainlink_ctrl =3D dp_read_link(catalog, REG_DP_MAINLINK_CTRL); + mainlink_ctrl =3D msm_dp_read_link(catalog, REG_DP_MAINLINK_CTRL); =20 - hw_revision =3D dp_catalog_hw_revision(dp_catalog); + hw_revision =3D msm_dp_catalog_hw_revision(msm_dp_catalog); if (hw_revision >=3D DP_HW_VERSION_1_2) mainlink_ctrl |=3D DP_MAINLINK_FLUSH_MODE_SDE_PERIPH_UPDATE; else mainlink_ctrl |=3D DP_MAINLINK_FLUSH_MODE_UPDATE_SDP; =20 - dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl); + msm_dp_write_link(catalog, REG_DP_MAINLINK_CTRL, mainlink_ctrl); } =20 -void dp_catalog_ctrl_config_msa(struct dp_catalog *dp_catalog, +void msm_dp_catalog_ctrl_config_msa(struct msm_dp_catalog *msm_dp_catalog, u32 rate, u32 stream_rate_khz, bool is_ycbcr_420) { @@ -478,8 +478,8 @@ void dp_catalog_ctrl_config_msa(struct dp_catalog *dp_c= atalog, u32 const link_rate_hbr3 =3D 810000; unsigned long den, num; =20 - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 if (rate =3D=3D link_rate_hbr3) pixel_div =3D 6; @@ -522,22 +522,22 @@ void dp_catalog_ctrl_config_msa(struct dp_catalog *dp= _catalog, nvid *=3D 3; =20 drm_dbg_dp(catalog->drm_dev, "mvid=3D0x%x, nvid=3D0x%x\n", mvid, nvid); - dp_write_link(catalog, REG_DP_SOFTWARE_MVID, mvid); - dp_write_link(catalog, REG_DP_SOFTWARE_NVID, nvid); - dp_write_p0(catalog, MMSS_DP_DSC_DTO, 0x0); + msm_dp_write_link(catalog, REG_DP_SOFTWARE_MVID, mvid); + msm_dp_write_link(catalog, REG_DP_SOFTWARE_NVID, nvid); + msm_dp_write_p0(catalog, MMSS_DP_DSC_DTO, 0x0); } =20 -int dp_catalog_ctrl_set_pattern_state_bit(struct dp_catalog *dp_catalog, +int msm_dp_catalog_ctrl_set_pattern_state_bit(struct msm_dp_catalog *msm_d= p_catalog, u32 state_bit) { int bit, ret; u32 data; - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 bit =3D BIT(state_bit - 1); drm_dbg_dp(catalog->drm_dev, "hw: bit=3D%d train=3D%d\n", bit, state_bit); - dp_catalog_ctrl_state_ctrl(dp_catalog, bit); + msm_dp_catalog_ctrl_state_ctrl(msm_dp_catalog, bit); =20 bit =3D BIT(state_bit - 1) << DP_MAINLINK_READY_LINK_TRAINING_SHIFT; =20 @@ -554,25 +554,25 @@ int dp_catalog_ctrl_set_pattern_state_bit(struct dp_c= atalog *dp_catalog, } =20 /** - * dp_catalog_hw_revision() - retrieve DP hw revision + * msm_dp_catalog_hw_revision() - retrieve DP hw revision * - * @dp_catalog: DP catalog structure + * @msm_dp_catalog: DP catalog structure * * Return: DP controller hw revision * */ -u32 dp_catalog_hw_revision(const struct dp_catalog *dp_catalog) +u32 msm_dp_catalog_hw_revision(const struct msm_dp_catalog *msm_dp_catalog) { - const struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + const struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_cata= log, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - return dp_read_ahb(catalog, REG_DP_HW_VERSION); + return msm_dp_read_ahb(catalog, REG_DP_HW_VERSION); } =20 /** - * dp_catalog_ctrl_reset() - reset DP controller + * msm_dp_catalog_ctrl_reset() - reset DP controller * - * @dp_catalog: DP catalog structure + * @msm_dp_catalog: DP catalog structure * * return: void * @@ -581,28 +581,28 @@ u32 dp_catalog_hw_revision(const struct dp_catalog *d= p_catalog) * NOTE: reset DP controller will also clear any pending HPD related inter= rupts *=20 */ -void dp_catalog_ctrl_reset(struct dp_catalog *dp_catalog) +void msm_dp_catalog_ctrl_reset(struct msm_dp_catalog *msm_dp_catalog) { u32 sw_reset; - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - sw_reset =3D dp_read_ahb(catalog, REG_DP_SW_RESET); + sw_reset =3D msm_dp_read_ahb(catalog, REG_DP_SW_RESET); =20 sw_reset |=3D DP_SW_RESET; - dp_write_ahb(catalog, REG_DP_SW_RESET, sw_reset); + msm_dp_write_ahb(catalog, REG_DP_SW_RESET, sw_reset); usleep_range(1000, 1100); /* h/w recommended delay */ =20 sw_reset &=3D ~DP_SW_RESET; - dp_write_ahb(catalog, REG_DP_SW_RESET, sw_reset); + msm_dp_write_ahb(catalog, REG_DP_SW_RESET, sw_reset); } =20 -bool dp_catalog_ctrl_mainlink_ready(struct dp_catalog *dp_catalog) +bool msm_dp_catalog_ctrl_mainlink_ready(struct msm_dp_catalog *msm_dp_cata= log) { u32 data; int ret; - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 /* Poll for mainlink ready status */ ret =3D readl_poll_timeout(catalog->io.link.base + @@ -617,96 +617,96 @@ bool dp_catalog_ctrl_mainlink_ready(struct dp_catalog= *dp_catalog) return true; } =20 -void dp_catalog_ctrl_enable_irq(struct dp_catalog *dp_catalog, +void msm_dp_catalog_ctrl_enable_irq(struct msm_dp_catalog *msm_dp_catalog, bool enable) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 if (enable) { - dp_write_ahb(catalog, REG_DP_INTR_STATUS, + msm_dp_write_ahb(catalog, REG_DP_INTR_STATUS, DP_INTERRUPT_STATUS1_MASK); - dp_write_ahb(catalog, REG_DP_INTR_STATUS2, + msm_dp_write_ahb(catalog, REG_DP_INTR_STATUS2, DP_INTERRUPT_STATUS2_MASK); } else { - dp_write_ahb(catalog, REG_DP_INTR_STATUS, 0x00); - dp_write_ahb(catalog, REG_DP_INTR_STATUS2, 0x00); + msm_dp_write_ahb(catalog, REG_DP_INTR_STATUS, 0x00); + msm_dp_write_ahb(catalog, REG_DP_INTR_STATUS2, 0x00); } } =20 -void dp_catalog_hpd_config_intr(struct dp_catalog *dp_catalog, +void msm_dp_catalog_hpd_config_intr(struct msm_dp_catalog *msm_dp_catalog, u32 intr_mask, bool en) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - u32 config =3D dp_read_aux(catalog, REG_DP_DP_HPD_INT_MASK); + u32 config =3D msm_dp_read_aux(catalog, REG_DP_DP_HPD_INT_MASK); =20 config =3D (en ? config | intr_mask : config & ~intr_mask); =20 drm_dbg_dp(catalog->drm_dev, "intr_mask=3D%#x config=3D%#x\n", intr_mask, config); - dp_write_aux(catalog, REG_DP_DP_HPD_INT_MASK, + msm_dp_write_aux(catalog, REG_DP_DP_HPD_INT_MASK, config & DP_DP_HPD_INT_MASK); } =20 -void dp_catalog_ctrl_hpd_enable(struct dp_catalog *dp_catalog) +void msm_dp_catalog_ctrl_hpd_enable(struct msm_dp_catalog *msm_dp_catalog) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - u32 reftimer =3D dp_read_aux(catalog, REG_DP_DP_HPD_REFTIMER); + u32 reftimer =3D msm_dp_read_aux(catalog, REG_DP_DP_HPD_REFTIMER); =20 /* Configure REFTIMER and enable it */ reftimer |=3D DP_DP_HPD_REFTIMER_ENABLE; - dp_write_aux(catalog, REG_DP_DP_HPD_REFTIMER, reftimer); + msm_dp_write_aux(catalog, REG_DP_DP_HPD_REFTIMER, reftimer); =20 /* Enable HPD */ - dp_write_aux(catalog, REG_DP_DP_HPD_CTRL, DP_DP_HPD_CTRL_HPD_EN); + msm_dp_write_aux(catalog, REG_DP_DP_HPD_CTRL, DP_DP_HPD_CTRL_HPD_EN); } =20 -void dp_catalog_ctrl_hpd_disable(struct dp_catalog *dp_catalog) +void msm_dp_catalog_ctrl_hpd_disable(struct msm_dp_catalog *msm_dp_catalog) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - u32 reftimer =3D dp_read_aux(catalog, REG_DP_DP_HPD_REFTIMER); + u32 reftimer =3D msm_dp_read_aux(catalog, REG_DP_DP_HPD_REFTIMER); =20 reftimer &=3D ~DP_DP_HPD_REFTIMER_ENABLE; - dp_write_aux(catalog, REG_DP_DP_HPD_REFTIMER, reftimer); + msm_dp_write_aux(catalog, REG_DP_DP_HPD_REFTIMER, reftimer); =20 - dp_write_aux(catalog, REG_DP_DP_HPD_CTRL, 0); + msm_dp_write_aux(catalog, REG_DP_DP_HPD_CTRL, 0); } =20 -static void dp_catalog_enable_sdp(struct dp_catalog_private *catalog) +static void msm_dp_catalog_enable_sdp(struct msm_dp_catalog_private *catal= og) { /* trigger sdp */ - dp_write_link(catalog, MMSS_DP_SDP_CFG3, UPDATE_SDP); - dp_write_link(catalog, MMSS_DP_SDP_CFG3, 0x0); + msm_dp_write_link(catalog, MMSS_DP_SDP_CFG3, UPDATE_SDP); + msm_dp_write_link(catalog, MMSS_DP_SDP_CFG3, 0x0); } =20 -void dp_catalog_ctrl_config_psr(struct dp_catalog *dp_catalog) +void msm_dp_catalog_ctrl_config_psr(struct msm_dp_catalog *msm_dp_catalog) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); u32 config; =20 /* enable PSR1 function */ - config =3D dp_read_link(catalog, REG_PSR_CONFIG); + config =3D msm_dp_read_link(catalog, REG_PSR_CONFIG); config |=3D PSR1_SUPPORTED; - dp_write_link(catalog, REG_PSR_CONFIG, config); + msm_dp_write_link(catalog, REG_PSR_CONFIG, config); =20 - dp_write_ahb(catalog, REG_DP_INTR_MASK4, DP_INTERRUPT_MASK4); - dp_catalog_enable_sdp(catalog); + msm_dp_write_ahb(catalog, REG_DP_INTR_MASK4, DP_INTERRUPT_MASK4); + msm_dp_catalog_enable_sdp(catalog); } =20 -void dp_catalog_ctrl_set_psr(struct dp_catalog *dp_catalog, bool enter) +void msm_dp_catalog_ctrl_set_psr(struct msm_dp_catalog *msm_dp_catalog, bo= ol enter) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); u32 cmd; =20 - cmd =3D dp_read_link(catalog, REG_PSR_CMD); + cmd =3D msm_dp_read_link(catalog, REG_PSR_CMD); =20 cmd &=3D ~(PSR_ENTER | PSR_EXIT); =20 @@ -715,17 +715,17 @@ void dp_catalog_ctrl_set_psr(struct dp_catalog *dp_ca= talog, bool enter) else cmd |=3D PSR_EXIT; =20 - dp_catalog_enable_sdp(catalog); - dp_write_link(catalog, REG_PSR_CMD, cmd); + msm_dp_catalog_enable_sdp(catalog); + msm_dp_write_link(catalog, REG_PSR_CMD, cmd); } =20 -u32 dp_catalog_link_is_connected(struct dp_catalog *dp_catalog) +u32 msm_dp_catalog_link_is_connected(struct msm_dp_catalog *msm_dp_catalog) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); u32 status; =20 - status =3D dp_read_aux(catalog, REG_DP_DP_HPD_INT_STATUS); + status =3D msm_dp_read_aux(catalog, REG_DP_DP_HPD_INT_STATUS); drm_dbg_dp(catalog->drm_dev, "aux status: %#x\n", status); status >>=3D DP_DP_HPD_STATE_STATUS_BITS_SHIFT; status &=3D DP_DP_HPD_STATE_STATUS_BITS_MASK; @@ -733,16 +733,16 @@ u32 dp_catalog_link_is_connected(struct dp_catalog *d= p_catalog) return status; } =20 -u32 dp_catalog_hpd_get_intr_status(struct dp_catalog *dp_catalog) +u32 msm_dp_catalog_hpd_get_intr_status(struct msm_dp_catalog *msm_dp_catal= og) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); int isr, mask; =20 - isr =3D dp_read_aux(catalog, REG_DP_DP_HPD_INT_STATUS); - dp_write_aux(catalog, REG_DP_DP_HPD_INT_ACK, + isr =3D msm_dp_read_aux(catalog, REG_DP_DP_HPD_INT_STATUS); + msm_dp_write_aux(catalog, REG_DP_DP_HPD_INT_ACK, (isr & DP_DP_HPD_INT_MASK)); - mask =3D dp_read_aux(catalog, REG_DP_DP_HPD_INT_MASK); + mask =3D msm_dp_read_aux(catalog, REG_DP_DP_HPD_INT_MASK); =20 /* * We only want to return interrupts that are unmasked to the caller. @@ -754,115 +754,115 @@ u32 dp_catalog_hpd_get_intr_status(struct dp_catalo= g *dp_catalog) return isr & (mask | ~DP_DP_HPD_INT_MASK); } =20 -u32 dp_catalog_ctrl_read_psr_interrupt_status(struct dp_catalog *dp_catalo= g) +u32 msm_dp_catalog_ctrl_read_psr_interrupt_status(struct msm_dp_catalog *m= sm_dp_catalog) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); u32 intr, intr_ack; =20 - intr =3D dp_read_ahb(catalog, REG_DP_INTR_STATUS4); + intr =3D msm_dp_read_ahb(catalog, REG_DP_INTR_STATUS4); intr_ack =3D (intr & DP_INTERRUPT_STATUS4) << DP_INTERRUPT_STATUS_ACK_SHIFT; - dp_write_ahb(catalog, REG_DP_INTR_STATUS4, intr_ack); + msm_dp_write_ahb(catalog, REG_DP_INTR_STATUS4, intr_ack); =20 return intr; } =20 -int dp_catalog_ctrl_get_interrupt(struct dp_catalog *dp_catalog) +int msm_dp_catalog_ctrl_get_interrupt(struct msm_dp_catalog *msm_dp_catalo= g) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); u32 intr, intr_ack; =20 - intr =3D dp_read_ahb(catalog, REG_DP_INTR_STATUS2); + intr =3D msm_dp_read_ahb(catalog, REG_DP_INTR_STATUS2); intr &=3D ~DP_INTERRUPT_STATUS2_MASK; intr_ack =3D (intr & DP_INTERRUPT_STATUS2) << DP_INTERRUPT_STATUS_ACK_SHIFT; - dp_write_ahb(catalog, REG_DP_INTR_STATUS2, + msm_dp_write_ahb(catalog, REG_DP_INTR_STATUS2, intr_ack | DP_INTERRUPT_STATUS2_MASK); =20 return intr; } =20 -void dp_catalog_ctrl_phy_reset(struct dp_catalog *dp_catalog) +void msm_dp_catalog_ctrl_phy_reset(struct msm_dp_catalog *msm_dp_catalog) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - dp_write_ahb(catalog, REG_DP_PHY_CTRL, + msm_dp_write_ahb(catalog, REG_DP_PHY_CTRL, DP_PHY_CTRL_SW_RESET | DP_PHY_CTRL_SW_RESET_PLL); usleep_range(1000, 1100); /* h/w recommended delay */ - dp_write_ahb(catalog, REG_DP_PHY_CTRL, 0x0); + msm_dp_write_ahb(catalog, REG_DP_PHY_CTRL, 0x0); } =20 -void dp_catalog_ctrl_send_phy_pattern(struct dp_catalog *dp_catalog, +void msm_dp_catalog_ctrl_send_phy_pattern(struct msm_dp_catalog *msm_dp_ca= talog, u32 pattern) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); u32 value =3D 0x0; =20 /* Make sure to clear the current pattern before starting a new one */ - dp_write_link(catalog, REG_DP_STATE_CTRL, 0x0); + msm_dp_write_link(catalog, REG_DP_STATE_CTRL, 0x0); =20 drm_dbg_dp(catalog->drm_dev, "pattern: %#x\n", pattern); switch (pattern) { case DP_PHY_TEST_PATTERN_D10_2: - dp_write_link(catalog, REG_DP_STATE_CTRL, + msm_dp_write_link(catalog, REG_DP_STATE_CTRL, DP_STATE_CTRL_LINK_TRAINING_PATTERN1); break; case DP_PHY_TEST_PATTERN_ERROR_COUNT: value &=3D ~(1 << 16); - dp_write_link(catalog, REG_DP_HBR2_COMPLIANCE_SCRAMBLER_RESET, + msm_dp_write_link(catalog, REG_DP_HBR2_COMPLIANCE_SCRAMBLER_RESET, value); value |=3D SCRAMBLER_RESET_COUNT_VALUE; - dp_write_link(catalog, REG_DP_HBR2_COMPLIANCE_SCRAMBLER_RESET, + msm_dp_write_link(catalog, REG_DP_HBR2_COMPLIANCE_SCRAMBLER_RESET, value); - dp_write_link(catalog, REG_DP_MAINLINK_LEVELS, + msm_dp_write_link(catalog, REG_DP_MAINLINK_LEVELS, DP_MAINLINK_SAFE_TO_EXIT_LEVEL_2); - dp_write_link(catalog, REG_DP_STATE_CTRL, + msm_dp_write_link(catalog, REG_DP_STATE_CTRL, DP_STATE_CTRL_LINK_SYMBOL_ERR_MEASURE); break; case DP_PHY_TEST_PATTERN_PRBS7: - dp_write_link(catalog, REG_DP_STATE_CTRL, + msm_dp_write_link(catalog, REG_DP_STATE_CTRL, DP_STATE_CTRL_LINK_PRBS7); break; case DP_PHY_TEST_PATTERN_80BIT_CUSTOM: - dp_write_link(catalog, REG_DP_STATE_CTRL, + msm_dp_write_link(catalog, REG_DP_STATE_CTRL, DP_STATE_CTRL_LINK_TEST_CUSTOM_PATTERN); /* 00111110000011111000001111100000 */ - dp_write_link(catalog, REG_DP_TEST_80BIT_CUSTOM_PATTERN_REG0, + msm_dp_write_link(catalog, REG_DP_TEST_80BIT_CUSTOM_PATTERN_REG0, 0x3E0F83E0); /* 00001111100000111110000011111000 */ - dp_write_link(catalog, REG_DP_TEST_80BIT_CUSTOM_PATTERN_REG1, + msm_dp_write_link(catalog, REG_DP_TEST_80BIT_CUSTOM_PATTERN_REG1, 0x0F83E0F8); /* 1111100000111110 */ - dp_write_link(catalog, REG_DP_TEST_80BIT_CUSTOM_PATTERN_REG2, + msm_dp_write_link(catalog, REG_DP_TEST_80BIT_CUSTOM_PATTERN_REG2, 0x0000F83E); break; case DP_PHY_TEST_PATTERN_CP2520: - value =3D dp_read_link(catalog, REG_DP_MAINLINK_CTRL); + value =3D msm_dp_read_link(catalog, REG_DP_MAINLINK_CTRL); value &=3D ~DP_MAINLINK_CTRL_SW_BYPASS_SCRAMBLER; - dp_write_link(catalog, REG_DP_MAINLINK_CTRL, value); + msm_dp_write_link(catalog, REG_DP_MAINLINK_CTRL, value); =20 value =3D DP_HBR2_ERM_PATTERN; - dp_write_link(catalog, REG_DP_HBR2_COMPLIANCE_SCRAMBLER_RESET, + msm_dp_write_link(catalog, REG_DP_HBR2_COMPLIANCE_SCRAMBLER_RESET, value); value |=3D SCRAMBLER_RESET_COUNT_VALUE; - dp_write_link(catalog, REG_DP_HBR2_COMPLIANCE_SCRAMBLER_RESET, + msm_dp_write_link(catalog, REG_DP_HBR2_COMPLIANCE_SCRAMBLER_RESET, value); - dp_write_link(catalog, REG_DP_MAINLINK_LEVELS, + msm_dp_write_link(catalog, REG_DP_MAINLINK_LEVELS, DP_MAINLINK_SAFE_TO_EXIT_LEVEL_2); - dp_write_link(catalog, REG_DP_STATE_CTRL, + msm_dp_write_link(catalog, REG_DP_STATE_CTRL, DP_STATE_CTRL_LINK_SYMBOL_ERR_MEASURE); - value =3D dp_read_link(catalog, REG_DP_MAINLINK_CTRL); + value =3D msm_dp_read_link(catalog, REG_DP_MAINLINK_CTRL); value |=3D DP_MAINLINK_CTRL_ENABLE; - dp_write_link(catalog, REG_DP_MAINLINK_CTRL, value); + msm_dp_write_link(catalog, REG_DP_MAINLINK_CTRL, value); break; case DP_PHY_TEST_PATTERN_SEL_MASK: - dp_write_link(catalog, REG_DP_MAINLINK_CTRL, + msm_dp_write_link(catalog, REG_DP_MAINLINK_CTRL, DP_MAINLINK_CTRL_ENABLE); - dp_write_link(catalog, REG_DP_STATE_CTRL, + msm_dp_write_link(catalog, REG_DP_STATE_CTRL, DP_STATE_CTRL_LINK_TRAINING_PATTERN4); break; default: @@ -872,94 +872,94 @@ void dp_catalog_ctrl_send_phy_pattern(struct dp_catal= og *dp_catalog, } } =20 -u32 dp_catalog_ctrl_read_phy_pattern(struct dp_catalog *dp_catalog) +u32 msm_dp_catalog_ctrl_read_phy_pattern(struct msm_dp_catalog *msm_dp_cat= alog) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - return dp_read_link(catalog, REG_DP_MAINLINK_READY); + return msm_dp_read_link(catalog, REG_DP_MAINLINK_READY); } =20 /* panel related catalog functions */ -int dp_catalog_panel_timing_cfg(struct dp_catalog *dp_catalog, u32 total, - u32 sync_start, u32 width_blanking, u32 dp_active) +int msm_dp_catalog_panel_timing_cfg(struct msm_dp_catalog *msm_dp_catalog,= u32 total, + u32 sync_start, u32 width_blanking, u32 msm_dp_active) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); u32 reg; =20 - dp_write_link(catalog, REG_DP_TOTAL_HOR_VER, total); - dp_write_link(catalog, REG_DP_START_HOR_VER_FROM_SYNC, sync_start); - dp_write_link(catalog, REG_DP_HSYNC_VSYNC_WIDTH_POLARITY, width_blanking); - dp_write_link(catalog, REG_DP_ACTIVE_HOR_VER, dp_active); + msm_dp_write_link(catalog, REG_DP_TOTAL_HOR_VER, total); + msm_dp_write_link(catalog, REG_DP_START_HOR_VER_FROM_SYNC, sync_start); + msm_dp_write_link(catalog, REG_DP_HSYNC_VSYNC_WIDTH_POLARITY, width_blank= ing); + msm_dp_write_link(catalog, REG_DP_ACTIVE_HOR_VER, msm_dp_active); =20 - reg =3D dp_read_p0(catalog, MMSS_DP_INTF_CONFIG); + reg =3D msm_dp_read_p0(catalog, MMSS_DP_INTF_CONFIG); =20 - if (dp_catalog->wide_bus_en) + if (msm_dp_catalog->wide_bus_en) reg |=3D DP_INTF_CONFIG_DATABUS_WIDEN; else reg &=3D ~DP_INTF_CONFIG_DATABUS_WIDEN; =20 =20 - DRM_DEBUG_DP("wide_bus_en=3D%d reg=3D%#x\n", dp_catalog->wide_bus_en, reg= ); + DRM_DEBUG_DP("wide_bus_en=3D%d reg=3D%#x\n", msm_dp_catalog->wide_bus_en,= reg); =20 - dp_write_p0(catalog, MMSS_DP_INTF_CONFIG, reg); + msm_dp_write_p0(catalog, MMSS_DP_INTF_CONFIG, reg); return 0; } =20 -static void dp_catalog_panel_send_vsc_sdp(struct dp_catalog *dp_catalog, s= truct dp_sdp *vsc_sdp) +static void msm_dp_catalog_panel_send_vsc_sdp(struct msm_dp_catalog *msm_d= p_catalog, struct dp_sdp *vsc_sdp) { - struct dp_catalog_private *catalog; + struct msm_dp_catalog_private *catalog; u32 header[2]; u32 val; int i; =20 - catalog =3D container_of(dp_catalog, struct dp_catalog_private, dp_catalo= g); + catalog =3D container_of(msm_dp_catalog, struct msm_dp_catalog_private, m= sm_dp_catalog); =20 - dp_utils_pack_sdp_header(&vsc_sdp->sdp_header, header); + msm_dp_utils_pack_sdp_header(&vsc_sdp->sdp_header, header); =20 - dp_write_link(catalog, MMSS_DP_GENERIC0_0, header[0]); - dp_write_link(catalog, MMSS_DP_GENERIC0_1, header[1]); + msm_dp_write_link(catalog, MMSS_DP_GENERIC0_0, header[0]); + msm_dp_write_link(catalog, MMSS_DP_GENERIC0_1, header[1]); =20 for (i =3D 0; i < sizeof(vsc_sdp->db); i +=3D 4) { val =3D ((vsc_sdp->db[i]) | (vsc_sdp->db[i + 1] << 8) | (vsc_sdp->db[i += 2] << 16) | (vsc_sdp->db[i + 3] << 24)); - dp_write_link(catalog, MMSS_DP_GENERIC0_2 + i, val); + msm_dp_write_link(catalog, MMSS_DP_GENERIC0_2 + i, val); } } =20 -static void dp_catalog_panel_update_sdp(struct dp_catalog *dp_catalog) +static void msm_dp_catalog_panel_update_sdp(struct msm_dp_catalog *msm_dp_= catalog) { - struct dp_catalog_private *catalog; + struct msm_dp_catalog_private *catalog; u32 hw_revision; =20 - catalog =3D container_of(dp_catalog, struct dp_catalog_private, dp_catalo= g); + catalog =3D container_of(msm_dp_catalog, struct msm_dp_catalog_private, m= sm_dp_catalog); =20 - hw_revision =3D dp_catalog_hw_revision(dp_catalog); + hw_revision =3D msm_dp_catalog_hw_revision(msm_dp_catalog); if (hw_revision < DP_HW_VERSION_1_2 && hw_revision >=3D DP_HW_VERSION_1_0= ) { - dp_write_link(catalog, MMSS_DP_SDP_CFG3, 0x01); - dp_write_link(catalog, MMSS_DP_SDP_CFG3, 0x00); + msm_dp_write_link(catalog, MMSS_DP_SDP_CFG3, 0x01); + msm_dp_write_link(catalog, MMSS_DP_SDP_CFG3, 0x00); } } =20 -void dp_catalog_panel_enable_vsc_sdp(struct dp_catalog *dp_catalog, struct= dp_sdp *vsc_sdp) +void msm_dp_catalog_panel_enable_vsc_sdp(struct msm_dp_catalog *msm_dp_cat= alog, struct dp_sdp *vsc_sdp) { - struct dp_catalog_private *catalog; + struct msm_dp_catalog_private *catalog; u32 cfg, cfg2, misc; =20 - catalog =3D container_of(dp_catalog, struct dp_catalog_private, dp_catalo= g); + catalog =3D container_of(msm_dp_catalog, struct msm_dp_catalog_private, m= sm_dp_catalog); =20 - cfg =3D dp_read_link(catalog, MMSS_DP_SDP_CFG); - cfg2 =3D dp_read_link(catalog, MMSS_DP_SDP_CFG2); - misc =3D dp_read_link(catalog, REG_DP_MISC1_MISC0); + cfg =3D msm_dp_read_link(catalog, MMSS_DP_SDP_CFG); + cfg2 =3D msm_dp_read_link(catalog, MMSS_DP_SDP_CFG2); + misc =3D msm_dp_read_link(catalog, REG_DP_MISC1_MISC0); =20 cfg |=3D GEN0_SDP_EN; - dp_write_link(catalog, MMSS_DP_SDP_CFG, cfg); + msm_dp_write_link(catalog, MMSS_DP_SDP_CFG, cfg); =20 cfg2 |=3D GENERIC0_SDPSIZE_VALID; - dp_write_link(catalog, MMSS_DP_SDP_CFG2, cfg2); + msm_dp_write_link(catalog, MMSS_DP_SDP_CFG2, cfg2); =20 - dp_catalog_panel_send_vsc_sdp(dp_catalog, vsc_sdp); + msm_dp_catalog_panel_send_vsc_sdp(msm_dp_catalog, vsc_sdp); =20 /* indicates presence of VSC (BIT(6) of MISC1) */ misc |=3D DP_MISC1_VSC_SDP; @@ -967,27 +967,27 @@ void dp_catalog_panel_enable_vsc_sdp(struct dp_catalo= g *dp_catalog, struct dp_sd drm_dbg_dp(catalog->drm_dev, "vsc sdp enable=3D1\n"); =20 pr_debug("misc settings =3D 0x%x\n", misc); - dp_write_link(catalog, REG_DP_MISC1_MISC0, misc); + msm_dp_write_link(catalog, REG_DP_MISC1_MISC0, misc); =20 - dp_catalog_panel_update_sdp(dp_catalog); + msm_dp_catalog_panel_update_sdp(msm_dp_catalog); } =20 -void dp_catalog_panel_disable_vsc_sdp(struct dp_catalog *dp_catalog) +void msm_dp_catalog_panel_disable_vsc_sdp(struct msm_dp_catalog *msm_dp_ca= talog) { - struct dp_catalog_private *catalog; + struct msm_dp_catalog_private *catalog; u32 cfg, cfg2, misc; =20 - catalog =3D container_of(dp_catalog, struct dp_catalog_private, dp_catalo= g); + catalog =3D container_of(msm_dp_catalog, struct msm_dp_catalog_private, m= sm_dp_catalog); =20 - cfg =3D dp_read_link(catalog, MMSS_DP_SDP_CFG); - cfg2 =3D dp_read_link(catalog, MMSS_DP_SDP_CFG2); - misc =3D dp_read_link(catalog, REG_DP_MISC1_MISC0); + cfg =3D msm_dp_read_link(catalog, MMSS_DP_SDP_CFG); + cfg2 =3D msm_dp_read_link(catalog, MMSS_DP_SDP_CFG2); + misc =3D msm_dp_read_link(catalog, REG_DP_MISC1_MISC0); =20 cfg &=3D ~GEN0_SDP_EN; - dp_write_link(catalog, MMSS_DP_SDP_CFG, cfg); + msm_dp_write_link(catalog, MMSS_DP_SDP_CFG, cfg); =20 cfg2 &=3D ~GENERIC0_SDPSIZE_VALID; - dp_write_link(catalog, MMSS_DP_SDP_CFG2, cfg2); + msm_dp_write_link(catalog, MMSS_DP_SDP_CFG2, cfg2); =20 /* switch back to MSA */ misc &=3D ~DP_MISC1_VSC_SDP; @@ -995,16 +995,16 @@ void dp_catalog_panel_disable_vsc_sdp(struct dp_catal= og *dp_catalog) drm_dbg_dp(catalog->drm_dev, "vsc sdp enable=3D0\n"); =20 pr_debug("misc settings =3D 0x%x\n", misc); - dp_write_link(catalog, REG_DP_MISC1_MISC0, misc); + msm_dp_write_link(catalog, REG_DP_MISC1_MISC0, misc); =20 - dp_catalog_panel_update_sdp(dp_catalog); + msm_dp_catalog_panel_update_sdp(msm_dp_catalog); } =20 -void dp_catalog_panel_tpg_enable(struct dp_catalog *dp_catalog, +void msm_dp_catalog_panel_tpg_enable(struct msm_dp_catalog *msm_dp_catalog, struct drm_display_mode *drm_mode) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); u32 hsync_period, vsync_period; u32 display_v_start, display_v_end; u32 hsync_start_x, hsync_end_x; @@ -1036,49 +1036,49 @@ void dp_catalog_panel_tpg_enable(struct dp_catalog = *dp_catalog, display_hctl =3D (hsync_end_x << 16) | hsync_start_x; =20 =20 - dp_write_p0(catalog, MMSS_DP_INTF_CONFIG, 0x0); - dp_write_p0(catalog, MMSS_DP_INTF_HSYNC_CTL, hsync_ctl); - dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PERIOD_F0, vsync_period * + msm_dp_write_p0(catalog, MMSS_DP_INTF_CONFIG, 0x0); + msm_dp_write_p0(catalog, MMSS_DP_INTF_HSYNC_CTL, hsync_ctl); + msm_dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PERIOD_F0, vsync_period * hsync_period); - dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F0, v_sync_width * + msm_dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F0, v_sync_width * hsync_period); - dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PERIOD_F1, 0); - dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F1, 0); - dp_write_p0(catalog, MMSS_DP_INTF_DISPLAY_HCTL, display_hctl); - dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_HCTL, 0); - dp_write_p0(catalog, MMSS_INTF_DISPLAY_V_START_F0, display_v_start); - dp_write_p0(catalog, MMSS_DP_INTF_DISPLAY_V_END_F0, display_v_end); - dp_write_p0(catalog, MMSS_INTF_DISPLAY_V_START_F1, 0); - dp_write_p0(catalog, MMSS_DP_INTF_DISPLAY_V_END_F1, 0); - dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_START_F0, 0); - dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_END_F0, 0); - dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_START_F1, 0); - dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_END_F1, 0); - dp_write_p0(catalog, MMSS_DP_INTF_POLARITY_CTL, 0); - - dp_write_p0(catalog, MMSS_DP_TPG_MAIN_CONTROL, + msm_dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PERIOD_F1, 0); + msm_dp_write_p0(catalog, MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F1, 0); + msm_dp_write_p0(catalog, MMSS_DP_INTF_DISPLAY_HCTL, display_hctl); + msm_dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_HCTL, 0); + msm_dp_write_p0(catalog, MMSS_INTF_DISPLAY_V_START_F0, display_v_start); + msm_dp_write_p0(catalog, MMSS_DP_INTF_DISPLAY_V_END_F0, display_v_end); + msm_dp_write_p0(catalog, MMSS_INTF_DISPLAY_V_START_F1, 0); + msm_dp_write_p0(catalog, MMSS_DP_INTF_DISPLAY_V_END_F1, 0); + msm_dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_START_F0, 0); + msm_dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_END_F0, 0); + msm_dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_START_F1, 0); + msm_dp_write_p0(catalog, MMSS_DP_INTF_ACTIVE_V_END_F1, 0); + msm_dp_write_p0(catalog, MMSS_DP_INTF_POLARITY_CTL, 0); + + msm_dp_write_p0(catalog, MMSS_DP_TPG_MAIN_CONTROL, DP_TPG_CHECKERED_RECT_PATTERN); - dp_write_p0(catalog, MMSS_DP_TPG_VIDEO_CONFIG, + msm_dp_write_p0(catalog, MMSS_DP_TPG_VIDEO_CONFIG, DP_TPG_VIDEO_CONFIG_BPP_8BIT | DP_TPG_VIDEO_CONFIG_RGB); - dp_write_p0(catalog, MMSS_DP_BIST_ENABLE, + msm_dp_write_p0(catalog, MMSS_DP_BIST_ENABLE, DP_BIST_ENABLE_DPBIST_EN); - dp_write_p0(catalog, MMSS_DP_TIMING_ENGINE_EN, + msm_dp_write_p0(catalog, MMSS_DP_TIMING_ENGINE_EN, DP_TIMING_ENGINE_EN_EN); drm_dbg_dp(catalog->drm_dev, "%s: enabled tpg\n", __func__); } =20 -void dp_catalog_panel_tpg_disable(struct dp_catalog *dp_catalog) +void msm_dp_catalog_panel_tpg_disable(struct msm_dp_catalog *msm_dp_catalo= g) { - struct dp_catalog_private *catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + struct msm_dp_catalog_private *catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - dp_write_p0(catalog, MMSS_DP_TPG_MAIN_CONTROL, 0x0); - dp_write_p0(catalog, MMSS_DP_BIST_ENABLE, 0x0); - dp_write_p0(catalog, MMSS_DP_TIMING_ENGINE_EN, 0x0); + msm_dp_write_p0(catalog, MMSS_DP_TPG_MAIN_CONTROL, 0x0); + msm_dp_write_p0(catalog, MMSS_DP_BIST_ENABLE, 0x0); + msm_dp_write_p0(catalog, MMSS_DP_TIMING_ENGINE_EN, 0x0); } =20 -static void __iomem *dp_ioremap(struct platform_device *pdev, int idx, siz= e_t *len) +static void __iomem *msm_dp_ioremap(struct platform_device *pdev, int idx,= size_t *len) { struct resource *res; void __iomem *base; @@ -1090,21 +1090,21 @@ static void __iomem *dp_ioremap(struct platform_dev= ice *pdev, int idx, size_t *l return base; } =20 -static int dp_catalog_get_io(struct dp_catalog_private *catalog) +static int msm_dp_catalog_get_io(struct msm_dp_catalog_private *catalog) { struct platform_device *pdev =3D to_platform_device(catalog->dev); struct dss_io_data *dss =3D &catalog->io; =20 - dss->ahb.base =3D dp_ioremap(pdev, 0, &dss->ahb.len); + dss->ahb.base =3D msm_dp_ioremap(pdev, 0, &dss->ahb.len); if (IS_ERR(dss->ahb.base)) return PTR_ERR(dss->ahb.base); =20 - dss->aux.base =3D dp_ioremap(pdev, 1, &dss->aux.len); + dss->aux.base =3D msm_dp_ioremap(pdev, 1, &dss->aux.len); if (IS_ERR(dss->aux.base)) { /* * The initial binding had a single reg, but in order to * support variation in the sub-region sizes this was split. - * dp_ioremap() will fail with -EINVAL here if only a single + * msm_dp_ioremap() will fail with -EINVAL here if only a single * reg is specified, so fill in the sub-region offsets and * lengths based on this single region. */ @@ -1126,13 +1126,13 @@ static int dp_catalog_get_io(struct dp_catalog_priv= ate *catalog) return PTR_ERR(dss->aux.base); } } else { - dss->link.base =3D dp_ioremap(pdev, 2, &dss->link.len); + dss->link.base =3D msm_dp_ioremap(pdev, 2, &dss->link.len); if (IS_ERR(dss->link.base)) { DRM_ERROR("unable to remap link region: %pe\n", dss->link.base); return PTR_ERR(dss->link.base); } =20 - dss->p0.base =3D dp_ioremap(pdev, 3, &dss->p0.len); + dss->p0.base =3D msm_dp_ioremap(pdev, 3, &dss->p0.len); if (IS_ERR(dss->p0.base)) { DRM_ERROR("unable to remap p0 region: %pe\n", dss->p0.base); return PTR_ERR(dss->p0.base); @@ -1142,9 +1142,9 @@ static int dp_catalog_get_io(struct dp_catalog_privat= e *catalog) return 0; } =20 -struct dp_catalog *dp_catalog_get(struct device *dev) +struct msm_dp_catalog *msm_dp_catalog_get(struct device *dev) { - struct dp_catalog_private *catalog; + struct msm_dp_catalog_private *catalog; int ret; =20 catalog =3D devm_kzalloc(dev, sizeof(*catalog), GFP_KERNEL); @@ -1153,78 +1153,78 @@ struct dp_catalog *dp_catalog_get(struct device *de= v) =20 catalog->dev =3D dev; =20 - ret =3D dp_catalog_get_io(catalog); + ret =3D msm_dp_catalog_get_io(catalog); if (ret) return ERR_PTR(ret); =20 - return &catalog->dp_catalog; + return &catalog->msm_dp_catalog; } =20 -u32 dp_catalog_audio_get_header(struct dp_catalog *dp_catalog, - enum dp_catalog_audio_sdp_type sdp, - enum dp_catalog_audio_header_type header) +u32 msm_dp_catalog_audio_get_header(struct msm_dp_catalog *msm_dp_catalog, + enum msm_dp_catalog_audio_sdp_type sdp, + enum msm_dp_catalog_audio_header_type header) { - struct dp_catalog_private *catalog; + struct msm_dp_catalog_private *catalog; u32 (*sdp_map)[DP_AUDIO_SDP_HEADER_MAX]; =20 - catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 sdp_map =3D catalog->audio_map; =20 - return dp_read_link(catalog, sdp_map[sdp][header]); + return msm_dp_read_link(catalog, sdp_map[sdp][header]); } =20 -void dp_catalog_audio_set_header(struct dp_catalog *dp_catalog, - enum dp_catalog_audio_sdp_type sdp, - enum dp_catalog_audio_header_type header, +void msm_dp_catalog_audio_set_header(struct msm_dp_catalog *msm_dp_catalog, + enum msm_dp_catalog_audio_sdp_type sdp, + enum msm_dp_catalog_audio_header_type header, u32 data) { - struct dp_catalog_private *catalog; + struct msm_dp_catalog_private *catalog; u32 (*sdp_map)[DP_AUDIO_SDP_HEADER_MAX]; =20 - if (!dp_catalog) + if (!msm_dp_catalog) return; =20 - catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 sdp_map =3D catalog->audio_map; =20 - dp_write_link(catalog, sdp_map[sdp][header], data); + msm_dp_write_link(catalog, sdp_map[sdp][header], data); } =20 -void dp_catalog_audio_config_acr(struct dp_catalog *dp_catalog, u32 select) +void msm_dp_catalog_audio_config_acr(struct msm_dp_catalog *msm_dp_catalog= , u32 select) { - struct dp_catalog_private *catalog; + struct msm_dp_catalog_private *catalog; u32 acr_ctrl; =20 - if (!dp_catalog) + if (!msm_dp_catalog) return; =20 - catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 acr_ctrl =3D select << 4 | BIT(31) | BIT(8) | BIT(14); =20 drm_dbg_dp(catalog->drm_dev, "select: %#x, acr_ctrl: %#x\n", select, acr_ctrl); =20 - dp_write_link(catalog, MMSS_DP_AUDIO_ACR_CTRL, acr_ctrl); + msm_dp_write_link(catalog, MMSS_DP_AUDIO_ACR_CTRL, acr_ctrl); } =20 -void dp_catalog_audio_enable(struct dp_catalog *dp_catalog, bool enable) +void msm_dp_catalog_audio_enable(struct msm_dp_catalog *msm_dp_catalog, bo= ol enable) { - struct dp_catalog_private *catalog; + struct msm_dp_catalog_private *catalog; u32 audio_ctrl; =20 - if (!dp_catalog) + if (!msm_dp_catalog) return; =20 - catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - audio_ctrl =3D dp_read_link(catalog, MMSS_DP_AUDIO_CFG); + audio_ctrl =3D msm_dp_read_link(catalog, MMSS_DP_AUDIO_CFG); =20 if (enable) audio_ctrl |=3D BIT(0); @@ -1233,24 +1233,24 @@ void dp_catalog_audio_enable(struct dp_catalog *dp_= catalog, bool enable) =20 drm_dbg_dp(catalog->drm_dev, "dp_audio_cfg =3D 0x%x\n", audio_ctrl); =20 - dp_write_link(catalog, MMSS_DP_AUDIO_CFG, audio_ctrl); + msm_dp_write_link(catalog, MMSS_DP_AUDIO_CFG, audio_ctrl); /* make sure audio engine is disabled */ wmb(); } =20 -void dp_catalog_audio_config_sdp(struct dp_catalog *dp_catalog) +void msm_dp_catalog_audio_config_sdp(struct msm_dp_catalog *msm_dp_catalog) { - struct dp_catalog_private *catalog; + struct msm_dp_catalog_private *catalog; u32 sdp_cfg =3D 0; u32 sdp_cfg2 =3D 0; =20 - if (!dp_catalog) + if (!msm_dp_catalog) return; =20 - catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - sdp_cfg =3D dp_read_link(catalog, MMSS_DP_SDP_CFG); + sdp_cfg =3D msm_dp_read_link(catalog, MMSS_DP_SDP_CFG); /* AUDIO_TIMESTAMP_SDP_EN */ sdp_cfg |=3D BIT(1); /* AUDIO_STREAM_SDP_EN */ @@ -1264,9 +1264,9 @@ void dp_catalog_audio_config_sdp(struct dp_catalog *d= p_catalog) =20 drm_dbg_dp(catalog->drm_dev, "sdp_cfg =3D 0x%x\n", sdp_cfg); =20 - dp_write_link(catalog, MMSS_DP_SDP_CFG, sdp_cfg); + msm_dp_write_link(catalog, MMSS_DP_SDP_CFG, sdp_cfg); =20 - sdp_cfg2 =3D dp_read_link(catalog, MMSS_DP_SDP_CFG2); + sdp_cfg2 =3D msm_dp_read_link(catalog, MMSS_DP_SDP_CFG2); /* IFRM_REGSRC -> Do not use reg values */ sdp_cfg2 &=3D ~BIT(0); /* AUDIO_STREAM_HB3_REGSRC-> Do not use reg values */ @@ -1274,12 +1274,12 @@ void dp_catalog_audio_config_sdp(struct dp_catalog = *dp_catalog) =20 drm_dbg_dp(catalog->drm_dev, "sdp_cfg2 =3D 0x%x\n", sdp_cfg2); =20 - dp_write_link(catalog, MMSS_DP_SDP_CFG2, sdp_cfg2); + msm_dp_write_link(catalog, MMSS_DP_SDP_CFG2, sdp_cfg2); } =20 -void dp_catalog_audio_init(struct dp_catalog *dp_catalog) +void msm_dp_catalog_audio_init(struct msm_dp_catalog *msm_dp_catalog) { - struct dp_catalog_private *catalog; + struct msm_dp_catalog_private *catalog; =20 static u32 sdp_map[][DP_AUDIO_SDP_HEADER_MAX] =3D { { @@ -1309,27 +1309,27 @@ void dp_catalog_audio_init(struct dp_catalog *dp_ca= talog) }, }; =20 - if (!dp_catalog) + if (!msm_dp_catalog) return; =20 - catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 catalog->audio_map =3D sdp_map; } =20 -void dp_catalog_audio_sfe_level(struct dp_catalog *dp_catalog, u32 safe_to= _exit_level) +void msm_dp_catalog_audio_sfe_level(struct msm_dp_catalog *msm_dp_catalog,= u32 safe_to_exit_level) { - struct dp_catalog_private *catalog; + struct msm_dp_catalog_private *catalog; u32 mainlink_levels; =20 - if (!dp_catalog) + if (!msm_dp_catalog) return; =20 - catalog =3D container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); + catalog =3D container_of(msm_dp_catalog, + struct msm_dp_catalog_private, msm_dp_catalog); =20 - mainlink_levels =3D dp_read_link(catalog, REG_DP_MAINLINK_LEVELS); + mainlink_levels =3D msm_dp_read_link(catalog, REG_DP_MAINLINK_LEVELS); mainlink_levels &=3D 0xFE0; mainlink_levels |=3D safe_to_exit_level; =20 @@ -1337,5 +1337,5 @@ void dp_catalog_audio_sfe_level(struct dp_catalog *dp= _catalog, u32 safe_to_exit_ "mainlink_level =3D 0x%x, safe_to_exit_level =3D 0x%x\n", mainlink_levels, safe_to_exit_level); =20 - dp_write_link(catalog, REG_DP_MAINLINK_LEVELS, mainlink_levels); + msm_dp_write_link(catalog, REG_DP_MAINLINK_LEVELS, mainlink_levels); } diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h b/drivers/gpu/drm/msm/dp/d= p_catalog.h index 4679d50b8c73..e932b17eecbf 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.h +++ b/drivers/gpu/drm/msm/dp/dp_catalog.h @@ -31,7 +31,7 @@ #define DP_HW_VERSION_1_0 0x10000000 #define DP_HW_VERSION_1_2 0x10020000 =20 -enum dp_catalog_audio_sdp_type { +enum msm_dp_catalog_audio_sdp_type { DP_AUDIO_SDP_STREAM, DP_AUDIO_SDP_TIMESTAMP, DP_AUDIO_SDP_INFOFRAME, @@ -40,89 +40,89 @@ enum dp_catalog_audio_sdp_type { DP_AUDIO_SDP_MAX, }; =20 -enum dp_catalog_audio_header_type { +enum msm_dp_catalog_audio_header_type { DP_AUDIO_SDP_HEADER_1, DP_AUDIO_SDP_HEADER_2, DP_AUDIO_SDP_HEADER_3, DP_AUDIO_SDP_HEADER_MAX, }; =20 -struct dp_catalog { +struct msm_dp_catalog { bool wide_bus_en; }; =20 /* Debug module */ -void dp_catalog_snapshot(struct dp_catalog *dp_catalog, struct msm_disp_st= ate *disp_state); +void msm_dp_catalog_snapshot(struct msm_dp_catalog *msm_dp_catalog, struct= msm_disp_state *disp_state); =20 /* AUX APIs */ -u32 dp_catalog_aux_read_data(struct dp_catalog *dp_catalog); -int dp_catalog_aux_write_data(struct dp_catalog *dp_catalog, u32 data); -int dp_catalog_aux_write_trans(struct dp_catalog *dp_catalog, u32 data); -int dp_catalog_aux_clear_trans(struct dp_catalog *dp_catalog, bool read); -int dp_catalog_aux_clear_hw_interrupts(struct dp_catalog *dp_catalog); -void dp_catalog_aux_reset(struct dp_catalog *dp_catalog); -void dp_catalog_aux_enable(struct dp_catalog *dp_catalog, bool enable); -int dp_catalog_aux_wait_for_hpd_connect_state(struct dp_catalog *dp_catalo= g, +u32 msm_dp_catalog_aux_read_data(struct msm_dp_catalog *msm_dp_catalog); +int msm_dp_catalog_aux_write_data(struct msm_dp_catalog *msm_dp_catalog, u= 32 data); +int msm_dp_catalog_aux_write_trans(struct msm_dp_catalog *msm_dp_catalog, = u32 data); +int msm_dp_catalog_aux_clear_trans(struct msm_dp_catalog *msm_dp_catalog, = bool read); +int msm_dp_catalog_aux_clear_hw_interrupts(struct msm_dp_catalog *msm_dp_c= atalog); +void msm_dp_catalog_aux_reset(struct msm_dp_catalog *msm_dp_catalog); +void msm_dp_catalog_aux_enable(struct msm_dp_catalog *msm_dp_catalog, bool= enable); +int msm_dp_catalog_aux_wait_for_hpd_connect_state(struct msm_dp_catalog *m= sm_dp_catalog, unsigned long wait_us); -u32 dp_catalog_aux_get_irq(struct dp_catalog *dp_catalog); +u32 msm_dp_catalog_aux_get_irq(struct msm_dp_catalog *msm_dp_catalog); =20 /* DP Controller APIs */ -void dp_catalog_ctrl_state_ctrl(struct dp_catalog *dp_catalog, u32 state); -void dp_catalog_ctrl_config_ctrl(struct dp_catalog *dp_catalog, u32 config= ); -void dp_catalog_ctrl_lane_mapping(struct dp_catalog *dp_catalog); -void dp_catalog_ctrl_mainlink_ctrl(struct dp_catalog *dp_catalog, bool ena= ble); -void dp_catalog_ctrl_psr_mainlink_enable(struct dp_catalog *dp_catalog, bo= ol enable); -void dp_catalog_setup_peripheral_flush(struct dp_catalog *dp_catalog); -void dp_catalog_ctrl_config_misc(struct dp_catalog *dp_catalog, u32 cc, u3= 2 tb); -void dp_catalog_ctrl_config_msa(struct dp_catalog *dp_catalog, u32 rate, +void msm_dp_catalog_ctrl_state_ctrl(struct msm_dp_catalog *msm_dp_catalog,= u32 state); +void msm_dp_catalog_ctrl_config_ctrl(struct msm_dp_catalog *msm_dp_catalog= , u32 config); +void msm_dp_catalog_ctrl_lane_mapping(struct msm_dp_catalog *msm_dp_catalo= g); +void msm_dp_catalog_ctrl_mainlink_ctrl(struct msm_dp_catalog *msm_dp_catal= og, bool enable); +void msm_dp_catalog_ctrl_psr_mainlink_enable(struct msm_dp_catalog *msm_dp= _catalog, bool enable); +void msm_dp_catalog_setup_peripheral_flush(struct msm_dp_catalog *msm_dp_c= atalog); +void msm_dp_catalog_ctrl_config_misc(struct msm_dp_catalog *msm_dp_catalog= , u32 cc, u32 tb); +void msm_dp_catalog_ctrl_config_msa(struct msm_dp_catalog *msm_dp_catalog,= u32 rate, u32 stream_rate_khz, bool is_ycbcr_420); -int dp_catalog_ctrl_set_pattern_state_bit(struct dp_catalog *dp_catalog, u= 32 pattern); -u32 dp_catalog_hw_revision(const struct dp_catalog *dp_catalog); -void dp_catalog_ctrl_reset(struct dp_catalog *dp_catalog); -bool dp_catalog_ctrl_mainlink_ready(struct dp_catalog *dp_catalog); -void dp_catalog_ctrl_enable_irq(struct dp_catalog *dp_catalog, bool enable= ); -void dp_catalog_hpd_config_intr(struct dp_catalog *dp_catalog, +int msm_dp_catalog_ctrl_set_pattern_state_bit(struct msm_dp_catalog *msm_d= p_catalog, u32 pattern); +u32 msm_dp_catalog_hw_revision(const struct msm_dp_catalog *msm_dp_catalog= ); +void msm_dp_catalog_ctrl_reset(struct msm_dp_catalog *msm_dp_catalog); +bool msm_dp_catalog_ctrl_mainlink_ready(struct msm_dp_catalog *msm_dp_cata= log); +void msm_dp_catalog_ctrl_enable_irq(struct msm_dp_catalog *msm_dp_catalog,= bool enable); +void msm_dp_catalog_hpd_config_intr(struct msm_dp_catalog *msm_dp_catalog, u32 intr_mask, bool en); -void dp_catalog_ctrl_hpd_enable(struct dp_catalog *dp_catalog); -void dp_catalog_ctrl_hpd_disable(struct dp_catalog *dp_catalog); -void dp_catalog_ctrl_config_psr(struct dp_catalog *dp_catalog); -void dp_catalog_ctrl_set_psr(struct dp_catalog *dp_catalog, bool enter); -u32 dp_catalog_link_is_connected(struct dp_catalog *dp_catalog); -u32 dp_catalog_hpd_get_intr_status(struct dp_catalog *dp_catalog); -void dp_catalog_ctrl_phy_reset(struct dp_catalog *dp_catalog); -int dp_catalog_ctrl_get_interrupt(struct dp_catalog *dp_catalog); -u32 dp_catalog_ctrl_read_psr_interrupt_status(struct dp_catalog *dp_catalo= g); -void dp_catalog_ctrl_update_transfer_unit(struct dp_catalog *dp_catalog, - u32 dp_tu, u32 valid_boundary, +void msm_dp_catalog_ctrl_hpd_enable(struct msm_dp_catalog *msm_dp_catalog); +void msm_dp_catalog_ctrl_hpd_disable(struct msm_dp_catalog *msm_dp_catalog= ); +void msm_dp_catalog_ctrl_config_psr(struct msm_dp_catalog *msm_dp_catalog); +void msm_dp_catalog_ctrl_set_psr(struct msm_dp_catalog *msm_dp_catalog, bo= ol enter); +u32 msm_dp_catalog_link_is_connected(struct msm_dp_catalog *msm_dp_catalog= ); +u32 msm_dp_catalog_hpd_get_intr_status(struct msm_dp_catalog *msm_dp_catal= og); +void msm_dp_catalog_ctrl_phy_reset(struct msm_dp_catalog *msm_dp_catalog); +int msm_dp_catalog_ctrl_get_interrupt(struct msm_dp_catalog *msm_dp_catalo= g); +u32 msm_dp_catalog_ctrl_read_psr_interrupt_status(struct msm_dp_catalog *m= sm_dp_catalog); +void msm_dp_catalog_ctrl_update_transfer_unit(struct msm_dp_catalog *msm_d= p_catalog, + u32 msm_dp_tu, u32 valid_boundary, u32 valid_boundary2); -void dp_catalog_ctrl_send_phy_pattern(struct dp_catalog *dp_catalog, +void msm_dp_catalog_ctrl_send_phy_pattern(struct msm_dp_catalog *msm_dp_ca= talog, u32 pattern); -u32 dp_catalog_ctrl_read_phy_pattern(struct dp_catalog *dp_catalog); +u32 msm_dp_catalog_ctrl_read_phy_pattern(struct msm_dp_catalog *msm_dp_cat= alog); =20 /* DP Panel APIs */ -int dp_catalog_panel_timing_cfg(struct dp_catalog *dp_catalog, u32 total, - u32 sync_start, u32 width_blanking, u32 dp_active); -void dp_catalog_panel_enable_vsc_sdp(struct dp_catalog *dp_catalog, struct= dp_sdp *vsc_sdp); -void dp_catalog_panel_disable_vsc_sdp(struct dp_catalog *dp_catalog); -void dp_catalog_dump_regs(struct dp_catalog *dp_catalog); -void dp_catalog_panel_tpg_enable(struct dp_catalog *dp_catalog, +int msm_dp_catalog_panel_timing_cfg(struct msm_dp_catalog *msm_dp_catalog,= u32 total, + u32 sync_start, u32 width_blanking, u32 msm_dp_active); +void msm_dp_catalog_panel_enable_vsc_sdp(struct msm_dp_catalog *msm_dp_cat= alog, struct dp_sdp *vsc_sdp); +void msm_dp_catalog_panel_disable_vsc_sdp(struct msm_dp_catalog *msm_dp_ca= talog); +void msm_dp_catalog_dump_regs(struct msm_dp_catalog *msm_dp_catalog); +void msm_dp_catalog_panel_tpg_enable(struct msm_dp_catalog *msm_dp_catalog, struct drm_display_mode *drm_mode); -void dp_catalog_panel_tpg_disable(struct dp_catalog *dp_catalog); +void msm_dp_catalog_panel_tpg_disable(struct msm_dp_catalog *msm_dp_catalo= g); =20 -struct dp_catalog *dp_catalog_get(struct device *dev); +struct msm_dp_catalog *msm_dp_catalog_get(struct device *dev); =20 /* DP Audio APIs */ -u32 dp_catalog_audio_get_header(struct dp_catalog *dp_catalog, - enum dp_catalog_audio_sdp_type sdp, - enum dp_catalog_audio_header_type header); -void dp_catalog_audio_set_header(struct dp_catalog *dp_catalog, - enum dp_catalog_audio_sdp_type sdp, - enum dp_catalog_audio_header_type header, +u32 msm_dp_catalog_audio_get_header(struct msm_dp_catalog *msm_dp_catalog, + enum msm_dp_catalog_audio_sdp_type sdp, + enum msm_dp_catalog_audio_header_type header); +void msm_dp_catalog_audio_set_header(struct msm_dp_catalog *msm_dp_catalog, + enum msm_dp_catalog_audio_sdp_type sdp, + enum msm_dp_catalog_audio_header_type header, u32 data); -void dp_catalog_audio_config_acr(struct dp_catalog *catalog, u32 select); -void dp_catalog_audio_enable(struct dp_catalog *catalog, bool enable); -void dp_catalog_audio_config_sdp(struct dp_catalog *catalog); -void dp_catalog_audio_init(struct dp_catalog *catalog); -void dp_catalog_audio_sfe_level(struct dp_catalog *catalog, u32 safe_to_ex= it_level); +void msm_dp_catalog_audio_config_acr(struct msm_dp_catalog *catalog, u32 s= elect); +void msm_dp_catalog_audio_enable(struct msm_dp_catalog *catalog, bool enab= le); +void msm_dp_catalog_audio_config_sdp(struct msm_dp_catalog *catalog); +void msm_dp_catalog_audio_init(struct msm_dp_catalog *catalog); +void msm_dp_catalog_audio_sfe_level(struct msm_dp_catalog *catalog, u32 sa= fe_to_exit_level); =20 #endif /* _DP_CATALOG_H_ */ diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_c= trl.c index f342fc5ae41e..bc2ca8133b79 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -40,7 +40,7 @@ enum { DP_TRAINING_2, }; =20 -struct dp_tu_calc_input { +struct msm_dp_tu_calc_input { u64 lclk; /* 162, 270, 540 and 810 */ u64 pclk_khz; /* in KHz */ u64 hactive; /* active h-width */ @@ -55,7 +55,7 @@ struct dp_tu_calc_input { int num_of_dsc_slices; /* number of slices per line */ }; =20 -struct dp_vc_tu_mapping_table { +struct msm_dp_vc_tu_mapping_table { u32 vic; u8 lanes; u8 lrate; /* DP_LINK_RATE -> 162(6), 270(10), 540(20), 810 (30) */ @@ -69,14 +69,14 @@ struct dp_vc_tu_mapping_table { u8 tu_size_minus1; }; =20 -struct dp_ctrl_private { - struct dp_ctrl dp_ctrl; +struct msm_dp_ctrl_private { + struct msm_dp_ctrl msm_dp_ctrl; struct drm_device *drm_dev; struct device *dev; struct drm_dp_aux *aux; - struct dp_panel *panel; - struct dp_link *link; - struct dp_catalog *catalog; + struct msm_dp_panel *panel; + struct msm_dp_link *link; + struct msm_dp_catalog *catalog; =20 struct phy *phy; =20 @@ -99,8 +99,8 @@ struct dp_ctrl_private { bool stream_clks_on; }; =20 -static int dp_aux_link_configure(struct drm_dp_aux *aux, - struct dp_link_info *link) +static int msm_dp_aux_link_configure(struct drm_dp_aux *aux, + struct msm_dp_link_info *link) { u8 values[2]; int err; @@ -118,14 +118,14 @@ static int dp_aux_link_configure(struct drm_dp_aux *a= ux, return 0; } =20 -void dp_ctrl_push_idle(struct dp_ctrl *dp_ctrl) +void msm_dp_ctrl_push_idle(struct msm_dp_ctrl *msm_dp_ctrl) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); =20 reinit_completion(&ctrl->idle_comp); - dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_PUSH_IDLE); + msm_dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_PUSH_IDLE); =20 if (!wait_for_completion_timeout(&ctrl->idle_comp, IDLE_PATTERN_COMPLETION_TIMEOUT_JIFFIES)) @@ -134,7 +134,7 @@ void dp_ctrl_push_idle(struct dp_ctrl *dp_ctrl) drm_dbg_dp(ctrl->drm_dev, "mainlink off\n"); } =20 -static void dp_ctrl_config_ctrl(struct dp_ctrl_private *ctrl) +static void msm_dp_ctrl_config_ctrl(struct msm_dp_ctrl_private *ctrl) { u32 config =3D 0, tbd; const u8 *dpcd =3D ctrl->panel->dpcd; @@ -142,15 +142,15 @@ static void dp_ctrl_config_ctrl(struct dp_ctrl_privat= e *ctrl) /* Default-> LSCLK DIV: 1/4 LCLK */ config |=3D (2 << DP_CONFIGURATION_CTRL_LSCLK_DIV_SHIFT); =20 - if (ctrl->panel->dp_mode.out_fmt_is_yuv_420) + if (ctrl->panel->msm_dp_mode.out_fmt_is_yuv_420) config |=3D DP_CONFIGURATION_CTRL_RGB_YUV; /* YUV420 */ =20 /* Scrambler reset enable */ if (drm_dp_alternate_scrambler_reset_cap(dpcd)) config |=3D DP_CONFIGURATION_CTRL_ASSR; =20 - tbd =3D dp_link_get_test_bits_depth(ctrl->link, - ctrl->panel->dp_mode.bpp); + tbd =3D msm_dp_link_get_test_bits_depth(ctrl->link, + ctrl->panel->msm_dp_mode.bpp); =20 config |=3D tbd << DP_CONFIGURATION_CTRL_BPC_SHIFT; =20 @@ -170,24 +170,24 @@ static void dp_ctrl_config_ctrl(struct dp_ctrl_privat= e *ctrl) if (ctrl->panel->psr_cap.version) config |=3D DP_CONFIGURATION_CTRL_SEND_VSC; =20 - dp_catalog_ctrl_config_ctrl(ctrl->catalog, config); + msm_dp_catalog_ctrl_config_ctrl(ctrl->catalog, config); } =20 -static void dp_ctrl_configure_source_params(struct dp_ctrl_private *ctrl) +static void msm_dp_ctrl_configure_source_params(struct msm_dp_ctrl_private= *ctrl) { u32 cc, tb; =20 - dp_catalog_ctrl_lane_mapping(ctrl->catalog); - dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, true); - dp_catalog_setup_peripheral_flush(ctrl->catalog); + msm_dp_catalog_ctrl_lane_mapping(ctrl->catalog); + msm_dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, true); + msm_dp_catalog_setup_peripheral_flush(ctrl->catalog); =20 - dp_ctrl_config_ctrl(ctrl); + msm_dp_ctrl_config_ctrl(ctrl); =20 - tb =3D dp_link_get_test_bits_depth(ctrl->link, - ctrl->panel->dp_mode.bpp); - cc =3D dp_link_get_colorimetry_config(ctrl->link); - dp_catalog_ctrl_config_misc(ctrl->catalog, cc, tb); - dp_panel_timing_cfg(ctrl->panel); + tb =3D msm_dp_link_get_test_bits_depth(ctrl->link, + ctrl->panel->msm_dp_mode.bpp); + cc =3D msm_dp_link_get_colorimetry_config(ctrl->link); + msm_dp_catalog_ctrl_config_misc(ctrl->catalog, cc, tb); + msm_dp_panel_timing_cfg(ctrl->panel); } =20 /* @@ -310,7 +310,7 @@ static int _tu_param_compare(s64 a, s64 b) } } =20 -static void dp_panel_update_tu_timings(struct dp_tu_calc_input *in, +static void msm_dp_panel_update_tu_timings(struct msm_dp_tu_calc_input *in, struct tu_algo_data *tu) { int nlanes =3D in->nlanes; @@ -622,9 +622,9 @@ static void _tu_valid_boundary_calc(struct tu_algo_data= *tu) } } =20 -static void _dp_ctrl_calc_tu(struct dp_ctrl_private *ctrl, - struct dp_tu_calc_input *in, - struct dp_vc_tu_mapping_table *tu_table) +static void _dp_ctrl_calc_tu(struct msm_dp_ctrl_private *ctrl, + struct msm_dp_tu_calc_input *in, + struct msm_dp_vc_tu_mapping_table *tu_table) { struct tu_algo_data *tu; int compare_result_1, compare_result_2; @@ -645,7 +645,7 @@ static void _dp_ctrl_calc_tu(struct dp_ctrl_private *ct= rl, if (!tu) return; =20 - dp_panel_update_tu_timings(in, tu); + msm_dp_panel_update_tu_timings(in, tu); =20 tu->err_fp =3D drm_fixp_from_fraction(1000, 1); /* 1000 */ =20 @@ -956,21 +956,21 @@ static void _dp_ctrl_calc_tu(struct dp_ctrl_private *= ctrl, kfree(tu); } =20 -static void dp_ctrl_calc_tu_parameters(struct dp_ctrl_private *ctrl, - struct dp_vc_tu_mapping_table *tu_table) +static void msm_dp_ctrl_calc_tu_parameters(struct msm_dp_ctrl_private *ctr= l, + struct msm_dp_vc_tu_mapping_table *tu_table) { - struct dp_tu_calc_input in; + struct msm_dp_tu_calc_input in; struct drm_display_mode *drm_mode; =20 - drm_mode =3D &ctrl->panel->dp_mode.drm_mode; + drm_mode =3D &ctrl->panel->msm_dp_mode.drm_mode; =20 in.lclk =3D ctrl->link->link_params.rate / 1000; in.pclk_khz =3D drm_mode->clock; in.hactive =3D drm_mode->hdisplay; in.hporch =3D drm_mode->htotal - drm_mode->hdisplay; in.nlanes =3D ctrl->link->link_params.num_lanes; - in.bpp =3D ctrl->panel->dp_mode.bpp; - in.pixel_enc =3D ctrl->panel->dp_mode.out_fmt_is_yuv_420 ? 420 : 444; + in.bpp =3D ctrl->panel->msm_dp_mode.bpp; + in.pixel_enc =3D ctrl->panel->msm_dp_mode.out_fmt_is_yuv_420 ? 420 : 444; in.dsc_en =3D 0; in.async_en =3D 0; in.fec_en =3D 0; @@ -980,16 +980,16 @@ static void dp_ctrl_calc_tu_parameters(struct dp_ctrl= _private *ctrl, _dp_ctrl_calc_tu(ctrl, &in, tu_table); } =20 -static void dp_ctrl_setup_tr_unit(struct dp_ctrl_private *ctrl) +static void msm_dp_ctrl_setup_tr_unit(struct msm_dp_ctrl_private *ctrl) { - u32 dp_tu =3D 0x0; + u32 msm_dp_tu =3D 0x0; u32 valid_boundary =3D 0x0; u32 valid_boundary2 =3D 0x0; - struct dp_vc_tu_mapping_table tu_calc_table; + struct msm_dp_vc_tu_mapping_table tu_calc_table; =20 - dp_ctrl_calc_tu_parameters(ctrl, &tu_calc_table); + msm_dp_ctrl_calc_tu_parameters(ctrl, &tu_calc_table); =20 - dp_tu |=3D tu_calc_table.tu_size_minus1; + msm_dp_tu |=3D tu_calc_table.tu_size_minus1; valid_boundary |=3D tu_calc_table.valid_boundary_link; valid_boundary |=3D (tu_calc_table.delay_start_link << 16); =20 @@ -1001,13 +1001,13 @@ static void dp_ctrl_setup_tr_unit(struct dp_ctrl_pr= ivate *ctrl) valid_boundary2 |=3D BIT(0); =20 pr_debug("dp_tu=3D0x%x, valid_boundary=3D0x%x, valid_boundary2=3D0x%x\n", - dp_tu, valid_boundary, valid_boundary2); + msm_dp_tu, valid_boundary, valid_boundary2); =20 - dp_catalog_ctrl_update_transfer_unit(ctrl->catalog, - dp_tu, valid_boundary, valid_boundary2); + msm_dp_catalog_ctrl_update_transfer_unit(ctrl->catalog, + msm_dp_tu, valid_boundary, valid_boundary2); } =20 -static int dp_ctrl_wait4video_ready(struct dp_ctrl_private *ctrl) +static int msm_dp_ctrl_wait4video_ready(struct msm_dp_ctrl_private *ctrl) { int ret =3D 0; =20 @@ -1019,7 +1019,7 @@ static int dp_ctrl_wait4video_ready(struct dp_ctrl_pr= ivate *ctrl) return ret; } =20 -static int dp_ctrl_set_vx_px(struct dp_ctrl_private *ctrl, +static int msm_dp_ctrl_set_vx_px(struct msm_dp_ctrl_private *ctrl, u8 v_level, u8 p_level) { union phy_configure_opts *phy_opts =3D &ctrl->phy_opts; @@ -1034,9 +1034,9 @@ static int dp_ctrl_set_vx_px(struct dp_ctrl_private *= ctrl, return 0; } =20 -static int dp_ctrl_update_vx_px(struct dp_ctrl_private *ctrl) +static int msm_dp_ctrl_update_vx_px(struct msm_dp_ctrl_private *ctrl) { - struct dp_link *link =3D ctrl->link; + struct msm_dp_link *link =3D ctrl->link; int ret =3D 0, lane, lane_cnt; u8 buf[4]; u32 max_level_reached =3D 0; @@ -1046,7 +1046,7 @@ static int dp_ctrl_update_vx_px(struct dp_ctrl_privat= e *ctrl) drm_dbg_dp(ctrl->drm_dev, "voltage level: %d emphasis level: %d\n", voltage_swing_level, pre_emphasis_level); - ret =3D dp_ctrl_set_vx_px(ctrl, + ret =3D msm_dp_ctrl_set_vx_px(ctrl, voltage_swing_level, pre_emphasis_level); =20 if (ret) @@ -1083,7 +1083,7 @@ static int dp_ctrl_update_vx_px(struct dp_ctrl_privat= e *ctrl) return ret; } =20 -static bool dp_ctrl_train_pattern_set(struct dp_ctrl_private *ctrl, +static bool msm_dp_ctrl_train_pattern_set(struct msm_dp_ctrl_private *ctrl, u8 pattern) { u8 buf; @@ -1100,7 +1100,7 @@ static bool dp_ctrl_train_pattern_set(struct dp_ctrl_= private *ctrl, return ret =3D=3D 1; } =20 -static int dp_ctrl_read_link_status(struct dp_ctrl_private *ctrl, +static int msm_dp_ctrl_read_link_status(struct msm_dp_ctrl_private *ctrl, u8 *link_status) { int ret =3D 0, len; @@ -1114,24 +1114,24 @@ static int dp_ctrl_read_link_status(struct dp_ctrl_= private *ctrl, return ret; } =20 -static int dp_ctrl_link_train_1(struct dp_ctrl_private *ctrl, +static int msm_dp_ctrl_link_train_1(struct msm_dp_ctrl_private *ctrl, int *training_step) { int tries, old_v_level, ret =3D 0; u8 link_status[DP_LINK_STATUS_SIZE]; int const maximum_retries =3D 4; =20 - dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); + msm_dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); =20 *training_step =3D DP_TRAINING_1; =20 - ret =3D dp_catalog_ctrl_set_pattern_state_bit(ctrl->catalog, 1); + ret =3D msm_dp_catalog_ctrl_set_pattern_state_bit(ctrl->catalog, 1); if (ret) return ret; - dp_ctrl_train_pattern_set(ctrl, DP_TRAINING_PATTERN_1 | + msm_dp_ctrl_train_pattern_set(ctrl, DP_TRAINING_PATTERN_1 | DP_LINK_SCRAMBLING_DISABLE); =20 - ret =3D dp_ctrl_update_vx_px(ctrl); + ret =3D msm_dp_ctrl_update_vx_px(ctrl); if (ret) return ret; =20 @@ -1140,7 +1140,7 @@ static int dp_ctrl_link_train_1(struct dp_ctrl_privat= e *ctrl, for (tries =3D 0; tries < maximum_retries; tries++) { drm_dp_link_train_clock_recovery_delay(ctrl->aux, ctrl->panel->dpcd); =20 - ret =3D dp_ctrl_read_link_status(ctrl, link_status); + ret =3D msm_dp_ctrl_read_link_status(ctrl, link_status); if (ret) return ret; =20 @@ -1160,8 +1160,8 @@ static int dp_ctrl_link_train_1(struct dp_ctrl_privat= e *ctrl, old_v_level =3D ctrl->link->phy_params.v_level; } =20 - dp_link_adjust_levels(ctrl->link, link_status); - ret =3D dp_ctrl_update_vx_px(ctrl); + msm_dp_link_adjust_levels(ctrl->link, link_status); + ret =3D msm_dp_ctrl_update_vx_px(ctrl); if (ret) return ret; } @@ -1170,7 +1170,7 @@ static int dp_ctrl_link_train_1(struct dp_ctrl_privat= e *ctrl, return -ETIMEDOUT; } =20 -static int dp_ctrl_link_rate_down_shift(struct dp_ctrl_private *ctrl) +static int msm_dp_ctrl_link_rate_down_shift(struct msm_dp_ctrl_private *ct= rl) { int ret =3D 0; =20 @@ -1198,7 +1198,7 @@ static int dp_ctrl_link_rate_down_shift(struct dp_ctr= l_private *ctrl) return ret; } =20 -static int dp_ctrl_link_lane_down_shift(struct dp_ctrl_private *ctrl) +static int msm_dp_ctrl_link_lane_down_shift(struct msm_dp_ctrl_private *ct= rl) { =20 if (ctrl->link->link_params.num_lanes =3D=3D 1) @@ -1213,13 +1213,13 @@ static int dp_ctrl_link_lane_down_shift(struct dp_c= trl_private *ctrl) return 0; } =20 -static void dp_ctrl_clear_training_pattern(struct dp_ctrl_private *ctrl) +static void msm_dp_ctrl_clear_training_pattern(struct msm_dp_ctrl_private = *ctrl) { - dp_ctrl_train_pattern_set(ctrl, DP_TRAINING_PATTERN_DISABLE); + msm_dp_ctrl_train_pattern_set(ctrl, DP_TRAINING_PATTERN_DISABLE); drm_dp_link_train_channel_eq_delay(ctrl->aux, ctrl->panel->dpcd); } =20 -static int dp_ctrl_link_train_2(struct dp_ctrl_private *ctrl, +static int msm_dp_ctrl_link_train_2(struct msm_dp_ctrl_private *ctrl, int *training_step) { int tries =3D 0, ret =3D 0; @@ -1228,7 +1228,7 @@ static int dp_ctrl_link_train_2(struct dp_ctrl_privat= e *ctrl, int const maximum_retries =3D 5; u8 link_status[DP_LINK_STATUS_SIZE]; =20 - dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); + msm_dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); =20 *training_step =3D DP_TRAINING_2; =20 @@ -1243,16 +1243,16 @@ static int dp_ctrl_link_train_2(struct dp_ctrl_priv= ate *ctrl, state_ctrl_bit =3D 2; } =20 - ret =3D dp_catalog_ctrl_set_pattern_state_bit(ctrl->catalog, state_ctrl_b= it); + ret =3D msm_dp_catalog_ctrl_set_pattern_state_bit(ctrl->catalog, state_ct= rl_bit); if (ret) return ret; =20 - dp_ctrl_train_pattern_set(ctrl, pattern); + msm_dp_ctrl_train_pattern_set(ctrl, pattern); =20 for (tries =3D 0; tries <=3D maximum_retries; tries++) { drm_dp_link_train_channel_eq_delay(ctrl->aux, ctrl->panel->dpcd); =20 - ret =3D dp_ctrl_read_link_status(ctrl, link_status); + ret =3D msm_dp_ctrl_read_link_status(ctrl, link_status); if (ret) return ret; =20 @@ -1261,8 +1261,8 @@ static int dp_ctrl_link_train_2(struct dp_ctrl_privat= e *ctrl, return 0; } =20 - dp_link_adjust_levels(ctrl->link, link_status); - ret =3D dp_ctrl_update_vx_px(ctrl); + msm_dp_link_adjust_levels(ctrl->link, link_status); + ret =3D msm_dp_ctrl_update_vx_px(ctrl); if (ret) return ret; =20 @@ -1271,24 +1271,24 @@ static int dp_ctrl_link_train_2(struct dp_ctrl_priv= ate *ctrl, return -ETIMEDOUT; } =20 -static int dp_ctrl_link_train(struct dp_ctrl_private *ctrl, +static int msm_dp_ctrl_link_train(struct msm_dp_ctrl_private *ctrl, int *training_step) { int ret =3D 0; const u8 *dpcd =3D ctrl->panel->dpcd; u8 encoding[] =3D { 0, DP_SET_ANSI_8B10B }; u8 assr; - struct dp_link_info link_info =3D {0}; + struct msm_dp_link_info link_info =3D {0}; =20 - dp_ctrl_config_ctrl(ctrl); + msm_dp_ctrl_config_ctrl(ctrl); =20 link_info.num_lanes =3D ctrl->link->link_params.num_lanes; link_info.rate =3D ctrl->link->link_params.rate; link_info.capabilities =3D DP_LINK_CAP_ENHANCED_FRAMING; =20 - dp_link_reset_phy_params_vx_px(ctrl->link); + msm_dp_link_reset_phy_params_vx_px(ctrl->link); =20 - dp_aux_link_configure(ctrl->aux, &link_info); + msm_dp_aux_link_configure(ctrl->aux, &link_info); =20 if (drm_dp_max_downspread(dpcd)) encoding[0] |=3D DP_SPREAD_AMP_0_5; @@ -1302,7 +1302,7 @@ static int dp_ctrl_link_train(struct dp_ctrl_private = *ctrl, &assr, 1); } =20 - ret =3D dp_ctrl_link_train_1(ctrl, training_step); + ret =3D msm_dp_ctrl_link_train_1(ctrl, training_step); if (ret) { DRM_ERROR("link training #1 failed. ret=3D%d\n", ret); goto end; @@ -1311,7 +1311,7 @@ static int dp_ctrl_link_train(struct dp_ctrl_private = *ctrl, /* print success info as this is a result of user initiated action */ drm_dbg_dp(ctrl->drm_dev, "link training #1 successful\n"); =20 - ret =3D dp_ctrl_link_train_2(ctrl, training_step); + ret =3D msm_dp_ctrl_link_train_2(ctrl, training_step); if (ret) { DRM_ERROR("link training #2 failed. ret=3D%d\n", ret); goto end; @@ -1321,17 +1321,17 @@ static int dp_ctrl_link_train(struct dp_ctrl_privat= e *ctrl, drm_dbg_dp(ctrl->drm_dev, "link training #2 successful\n"); =20 end: - dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); + msm_dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); =20 return ret; } =20 -static int dp_ctrl_setup_main_link(struct dp_ctrl_private *ctrl, +static int msm_dp_ctrl_setup_main_link(struct msm_dp_ctrl_private *ctrl, int *training_step) { int ret =3D 0; =20 - dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, true); + msm_dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, true); =20 if (ctrl->link->sink_request & DP_TEST_LINK_PHY_TEST_PATTERN) return ret; @@ -1342,17 +1342,17 @@ static int dp_ctrl_setup_main_link(struct dp_ctrl_p= rivate *ctrl, * a link training pattern, we have to first do soft reset. */ =20 - ret =3D dp_ctrl_link_train(ctrl, training_step); + ret =3D msm_dp_ctrl_link_train(ctrl, training_step); =20 return ret; } =20 -int dp_ctrl_core_clk_enable(struct dp_ctrl *dp_ctrl) +int msm_dp_ctrl_core_clk_enable(struct msm_dp_ctrl *msm_dp_ctrl) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; int ret =3D 0; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); =20 if (ctrl->core_clks_on) { drm_dbg_dp(ctrl->drm_dev, "core clks already enabled\n"); @@ -1374,11 +1374,11 @@ int dp_ctrl_core_clk_enable(struct dp_ctrl *dp_ctrl) return 0; } =20 -void dp_ctrl_core_clk_disable(struct dp_ctrl *dp_ctrl) +void msm_dp_ctrl_core_clk_disable(struct msm_dp_ctrl *msm_dp_ctrl) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); =20 clk_bulk_disable_unprepare(ctrl->num_core_clks, ctrl->core_clks); =20 @@ -1391,12 +1391,12 @@ void dp_ctrl_core_clk_disable(struct dp_ctrl *dp_ct= rl) ctrl->core_clks_on ? "on" : "off"); } =20 -static int dp_ctrl_link_clk_enable(struct dp_ctrl *dp_ctrl) +static int msm_dp_ctrl_link_clk_enable(struct msm_dp_ctrl *msm_dp_ctrl) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; int ret =3D 0; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); =20 if (ctrl->link_clks_on) { drm_dbg_dp(ctrl->drm_dev, "links clks already enabled\n"); @@ -1406,7 +1406,7 @@ static int dp_ctrl_link_clk_enable(struct dp_ctrl *dp= _ctrl) if (!ctrl->core_clks_on) { drm_dbg_dp(ctrl->drm_dev, "Enable core clks before link clks\n"); =20 - dp_ctrl_core_clk_enable(dp_ctrl); + msm_dp_ctrl_core_clk_enable(msm_dp_ctrl); } =20 ret =3D clk_bulk_prepare_enable(ctrl->num_link_clks, ctrl->link_clks); @@ -1424,11 +1424,11 @@ static int dp_ctrl_link_clk_enable(struct dp_ctrl *= dp_ctrl) return 0; } =20 -static void dp_ctrl_link_clk_disable(struct dp_ctrl *dp_ctrl) +static void msm_dp_ctrl_link_clk_disable(struct msm_dp_ctrl *msm_dp_ctrl) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); =20 clk_bulk_disable_unprepare(ctrl->num_link_clks, ctrl->link_clks); =20 @@ -1441,7 +1441,7 @@ static void dp_ctrl_link_clk_disable(struct dp_ctrl *= dp_ctrl) ctrl->core_clks_on ? "on" : "off"); } =20 -static int dp_ctrl_enable_mainlink_clocks(struct dp_ctrl_private *ctrl) +static int msm_dp_ctrl_enable_mainlink_clocks(struct msm_dp_ctrl_private *= ctrl) { int ret =3D 0; struct phy *phy =3D ctrl->phy; @@ -1455,7 +1455,7 @@ static int dp_ctrl_enable_mainlink_clocks(struct dp_c= trl_private *ctrl) phy_power_on(phy); =20 dev_pm_opp_set_rate(ctrl->dev, ctrl->link->link_params.rate * 1000); - ret =3D dp_ctrl_link_clk_enable(&ctrl->dp_ctrl); + ret =3D msm_dp_ctrl_link_clk_enable(&ctrl->msm_dp_ctrl); if (ret) DRM_ERROR("Unable to start link clocks. ret=3D%d\n", ret); =20 @@ -1464,13 +1464,13 @@ static int dp_ctrl_enable_mainlink_clocks(struct dp= _ctrl_private *ctrl) return ret; } =20 -void dp_ctrl_reset_irq_ctrl(struct dp_ctrl *dp_ctrl, bool enable) +void msm_dp_ctrl_reset_irq_ctrl(struct msm_dp_ctrl *msm_dp_ctrl, bool enab= le) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); =20 - dp_catalog_ctrl_reset(ctrl->catalog); + msm_dp_catalog_ctrl_reset(ctrl->catalog); =20 /* * all dp controller programmable registers will not @@ -1478,28 +1478,28 @@ void dp_ctrl_reset_irq_ctrl(struct dp_ctrl *dp_ctrl= , bool enable) * therefore interrupt mask bits have to be updated * to enable/disable interrupts */ - dp_catalog_ctrl_enable_irq(ctrl->catalog, enable); + msm_dp_catalog_ctrl_enable_irq(ctrl->catalog, enable); } =20 -void dp_ctrl_config_psr(struct dp_ctrl *dp_ctrl) +void msm_dp_ctrl_config_psr(struct msm_dp_ctrl *msm_dp_ctrl) { u8 cfg; - struct dp_ctrl_private *ctrl =3D container_of(dp_ctrl, - struct dp_ctrl_private, dp_ctrl); + struct msm_dp_ctrl_private *ctrl =3D container_of(msm_dp_ctrl, + struct msm_dp_ctrl_private, msm_dp_ctrl); =20 if (!ctrl->panel->psr_cap.version) return; =20 - dp_catalog_ctrl_config_psr(ctrl->catalog); + msm_dp_catalog_ctrl_config_psr(ctrl->catalog); =20 cfg =3D DP_PSR_ENABLE; drm_dp_dpcd_write(ctrl->aux, DP_PSR_EN_CFG, &cfg, 1); } =20 -void dp_ctrl_set_psr(struct dp_ctrl *dp_ctrl, bool enter) +void msm_dp_ctrl_set_psr(struct msm_dp_ctrl *msm_dp_ctrl, bool enter) { - struct dp_ctrl_private *ctrl =3D container_of(dp_ctrl, - struct dp_ctrl_private, dp_ctrl); + struct msm_dp_ctrl_private *ctrl =3D container_of(msm_dp_ctrl, + struct msm_dp_ctrl_private, msm_dp_ctrl); =20 if (!ctrl->panel->psr_cap.version) return; @@ -1516,64 +1516,64 @@ void dp_ctrl_set_psr(struct dp_ctrl *dp_ctrl, bool = enter) */ if (enter) { reinit_completion(&ctrl->psr_op_comp); - dp_catalog_ctrl_set_psr(ctrl->catalog, true); + msm_dp_catalog_ctrl_set_psr(ctrl->catalog, true); =20 if (!wait_for_completion_timeout(&ctrl->psr_op_comp, PSR_OPERATION_COMPLETION_TIMEOUT_JIFFIES)) { DRM_ERROR("PSR_ENTRY timedout\n"); - dp_catalog_ctrl_set_psr(ctrl->catalog, false); + msm_dp_catalog_ctrl_set_psr(ctrl->catalog, false); return; } =20 - dp_ctrl_push_idle(dp_ctrl); - dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); + msm_dp_ctrl_push_idle(msm_dp_ctrl); + msm_dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); =20 - dp_catalog_ctrl_psr_mainlink_enable(ctrl->catalog, false); + msm_dp_catalog_ctrl_psr_mainlink_enable(ctrl->catalog, false); } else { - dp_catalog_ctrl_psr_mainlink_enable(ctrl->catalog, true); + msm_dp_catalog_ctrl_psr_mainlink_enable(ctrl->catalog, true); =20 - dp_catalog_ctrl_set_psr(ctrl->catalog, false); - dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_SEND_VIDEO); - dp_ctrl_wait4video_ready(ctrl); - dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); + msm_dp_catalog_ctrl_set_psr(ctrl->catalog, false); + msm_dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_SEND_VIDEO); + msm_dp_ctrl_wait4video_ready(ctrl); + msm_dp_catalog_ctrl_state_ctrl(ctrl->catalog, 0); } } =20 -void dp_ctrl_phy_init(struct dp_ctrl *dp_ctrl) +void msm_dp_ctrl_phy_init(struct msm_dp_ctrl *msm_dp_ctrl) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; struct phy *phy; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); phy =3D ctrl->phy; =20 - dp_catalog_ctrl_phy_reset(ctrl->catalog); + msm_dp_catalog_ctrl_phy_reset(ctrl->catalog); phy_init(phy); =20 drm_dbg_dp(ctrl->drm_dev, "phy=3D%p init=3D%d power_on=3D%d\n", phy, phy->init_count, phy->power_count); } =20 -void dp_ctrl_phy_exit(struct dp_ctrl *dp_ctrl) +void msm_dp_ctrl_phy_exit(struct msm_dp_ctrl *msm_dp_ctrl) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; struct phy *phy; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); phy =3D ctrl->phy; =20 - dp_catalog_ctrl_phy_reset(ctrl->catalog); + msm_dp_catalog_ctrl_phy_reset(ctrl->catalog); phy_exit(phy); drm_dbg_dp(ctrl->drm_dev, "phy=3D%p init=3D%d power_on=3D%d\n", phy, phy->init_count, phy->power_count); } =20 -static int dp_ctrl_reinitialize_mainlink(struct dp_ctrl_private *ctrl) +static int msm_dp_ctrl_reinitialize_mainlink(struct msm_dp_ctrl_private *c= trl) { struct phy *phy =3D ctrl->phy; int ret =3D 0; =20 - dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); + msm_dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); ctrl->phy_opts.dp.lanes =3D ctrl->link->link_params.num_lanes; phy_configure(phy, &ctrl->phy_opts); /* @@ -1583,13 +1583,13 @@ static int dp_ctrl_reinitialize_mainlink(struct dp_= ctrl_private *ctrl) */ dev_pm_opp_set_rate(ctrl->dev, 0); =20 - dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); + msm_dp_ctrl_link_clk_disable(&ctrl->msm_dp_ctrl); =20 phy_power_off(phy); /* hw recommended delay before re-enabling clocks */ msleep(20); =20 - ret =3D dp_ctrl_enable_mainlink_clocks(ctrl); + ret =3D msm_dp_ctrl_enable_mainlink_clocks(ctrl); if (ret) { DRM_ERROR("Failed to enable mainlink clks. ret=3D%d\n", ret); return ret; @@ -1598,18 +1598,18 @@ static int dp_ctrl_reinitialize_mainlink(struct dp_= ctrl_private *ctrl) return ret; } =20 -static int dp_ctrl_deinitialize_mainlink(struct dp_ctrl_private *ctrl) +static int msm_dp_ctrl_deinitialize_mainlink(struct msm_dp_ctrl_private *c= trl) { struct phy *phy; =20 phy =3D ctrl->phy; =20 - dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); + msm_dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); =20 - dp_catalog_ctrl_reset(ctrl->catalog); + msm_dp_catalog_ctrl_reset(ctrl->catalog); =20 dev_pm_opp_set_rate(ctrl->dev, 0); - dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); + msm_dp_ctrl_link_clk_disable(&ctrl->msm_dp_ctrl); =20 phy_power_off(phy); =20 @@ -1622,30 +1622,30 @@ static int dp_ctrl_deinitialize_mainlink(struct dp_= ctrl_private *ctrl) return 0; } =20 -static int dp_ctrl_link_maintenance(struct dp_ctrl_private *ctrl) +static int msm_dp_ctrl_link_maintenance(struct msm_dp_ctrl_private *ctrl) { int ret =3D 0; int training_step =3D DP_TRAINING_NONE; =20 - dp_ctrl_push_idle(&ctrl->dp_ctrl); + msm_dp_ctrl_push_idle(&ctrl->msm_dp_ctrl); =20 ctrl->link->phy_params.p_level =3D 0; ctrl->link->phy_params.v_level =3D 0; =20 - ret =3D dp_ctrl_setup_main_link(ctrl, &training_step); + ret =3D msm_dp_ctrl_setup_main_link(ctrl, &training_step); if (ret) goto end; =20 - dp_ctrl_clear_training_pattern(ctrl); + msm_dp_ctrl_clear_training_pattern(ctrl); =20 - dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_SEND_VIDEO); + msm_dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_SEND_VIDEO); =20 - ret =3D dp_ctrl_wait4video_ready(ctrl); + ret =3D msm_dp_ctrl_wait4video_ready(ctrl); end: return ret; } =20 -static bool dp_ctrl_send_phy_test_pattern(struct dp_ctrl_private *ctrl) +static bool msm_dp_ctrl_send_phy_test_pattern(struct msm_dp_ctrl_private *= ctrl) { bool success =3D false; u32 pattern_sent =3D 0x0; @@ -1653,17 +1653,17 @@ static bool dp_ctrl_send_phy_test_pattern(struct dp= _ctrl_private *ctrl) =20 drm_dbg_dp(ctrl->drm_dev, "request: 0x%x\n", pattern_requested); =20 - if (dp_ctrl_set_vx_px(ctrl, + if (msm_dp_ctrl_set_vx_px(ctrl, ctrl->link->phy_params.v_level, ctrl->link->phy_params.p_level)) { DRM_ERROR("Failed to set v/p levels\n"); return false; } - dp_catalog_ctrl_send_phy_pattern(ctrl->catalog, pattern_requested); - dp_ctrl_update_vx_px(ctrl); - dp_link_send_test_response(ctrl->link); + msm_dp_catalog_ctrl_send_phy_pattern(ctrl->catalog, pattern_requested); + msm_dp_ctrl_update_vx_px(ctrl); + msm_dp_link_send_test_response(ctrl->link); =20 - pattern_sent =3D dp_catalog_ctrl_read_phy_pattern(ctrl->catalog); + pattern_sent =3D msm_dp_catalog_ctrl_read_phy_pattern(ctrl->catalog); =20 switch (pattern_sent) { case MR_LINK_TRAINING1: @@ -1697,7 +1697,7 @@ static bool dp_ctrl_send_phy_test_pattern(struct dp_c= trl_private *ctrl) return success; } =20 -static int dp_ctrl_process_phy_test_request(struct dp_ctrl_private *ctrl) +static int msm_dp_ctrl_process_phy_test_request(struct msm_dp_ctrl_private= *ctrl) { int ret; unsigned long pixel_rate; @@ -1713,15 +1713,15 @@ static int dp_ctrl_process_phy_test_request(struct = dp_ctrl_private *ctrl) * running. Add the global reset just before disabling the * link clocks and core clocks. */ - dp_ctrl_off(&ctrl->dp_ctrl); + msm_dp_ctrl_off(&ctrl->msm_dp_ctrl); =20 - ret =3D dp_ctrl_on_link(&ctrl->dp_ctrl); + ret =3D msm_dp_ctrl_on_link(&ctrl->msm_dp_ctrl); if (ret) { DRM_ERROR("failed to enable DP link controller\n"); return ret; } =20 - pixel_rate =3D ctrl->panel->dp_mode.drm_mode.clock; + pixel_rate =3D ctrl->panel->msm_dp_mode.drm_mode.clock; ret =3D clk_set_rate(ctrl->pixel_clk, pixel_rate * 1000); if (ret) { DRM_ERROR("Failed to set pixel clock rate. ret=3D%d\n", ret); @@ -1739,49 +1739,49 @@ static int dp_ctrl_process_phy_test_request(struct = dp_ctrl_private *ctrl) ctrl->stream_clks_on =3D true; } =20 - dp_ctrl_send_phy_test_pattern(ctrl); + msm_dp_ctrl_send_phy_test_pattern(ctrl); =20 return 0; } =20 -void dp_ctrl_handle_sink_request(struct dp_ctrl *dp_ctrl) +void msm_dp_ctrl_handle_sink_request(struct msm_dp_ctrl *msm_dp_ctrl) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; u32 sink_request =3D 0x0; =20 - if (!dp_ctrl) { + if (!msm_dp_ctrl) { DRM_ERROR("invalid input\n"); return; } =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); sink_request =3D ctrl->link->sink_request; =20 if (sink_request & DP_TEST_LINK_PHY_TEST_PATTERN) { drm_dbg_dp(ctrl->drm_dev, "PHY_TEST_PATTERN request\n"); - if (dp_ctrl_process_phy_test_request(ctrl)) { + if (msm_dp_ctrl_process_phy_test_request(ctrl)) { DRM_ERROR("process phy_test_req failed\n"); return; } } =20 if (sink_request & DP_LINK_STATUS_UPDATED) { - if (dp_ctrl_link_maintenance(ctrl)) { + if (msm_dp_ctrl_link_maintenance(ctrl)) { DRM_ERROR("LM failed: TEST_LINK_TRAINING\n"); return; } } =20 if (sink_request & DP_TEST_LINK_TRAINING) { - dp_link_send_test_response(ctrl->link); - if (dp_ctrl_link_maintenance(ctrl)) { + msm_dp_link_send_test_response(ctrl->link); + if (msm_dp_ctrl_link_maintenance(ctrl)) { DRM_ERROR("LM failed: TEST_LINK_TRAINING\n"); return; } } } =20 -static bool dp_ctrl_clock_recovery_any_ok( +static bool msm_dp_ctrl_clock_recovery_any_ok( const u8 link_status[DP_LINK_STATUS_SIZE], int lane_count) { @@ -1800,20 +1800,20 @@ static bool dp_ctrl_clock_recovery_any_ok( return drm_dp_clock_recovery_ok(link_status, reduced_cnt); } =20 -static bool dp_ctrl_channel_eq_ok(struct dp_ctrl_private *ctrl) +static bool msm_dp_ctrl_channel_eq_ok(struct msm_dp_ctrl_private *ctrl) { u8 link_status[DP_LINK_STATUS_SIZE]; int num_lanes =3D ctrl->link->link_params.num_lanes; =20 - dp_ctrl_read_link_status(ctrl, link_status); + msm_dp_ctrl_read_link_status(ctrl, link_status); =20 return drm_dp_channel_eq_ok(link_status, num_lanes); } =20 -int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl) +int msm_dp_ctrl_on_link(struct msm_dp_ctrl *msm_dp_ctrl) { int rc =3D 0; - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; u32 rate; int link_train_max_retries =3D 5; u32 const phy_cts_pixel_clk_khz =3D 148500; @@ -1821,15 +1821,15 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl) unsigned int training_step; unsigned long pixel_rate; =20 - if (!dp_ctrl) + if (!msm_dp_ctrl) return -EINVAL; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); =20 rate =3D ctrl->panel->link_info.rate; - pixel_rate =3D ctrl->panel->dp_mode.drm_mode.clock; + pixel_rate =3D ctrl->panel->msm_dp_mode.drm_mode.clock; =20 - dp_ctrl_core_clk_enable(&ctrl->dp_ctrl); + msm_dp_ctrl_core_clk_enable(&ctrl->msm_dp_ctrl); =20 if (ctrl->link->sink_request & DP_TEST_LINK_PHY_TEST_PATTERN) { drm_dbg_dp(ctrl->drm_dev, @@ -1840,7 +1840,7 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl) ctrl->link->link_params.rate =3D rate; ctrl->link->link_params.num_lanes =3D ctrl->panel->link_info.num_lanes; - if (ctrl->panel->dp_mode.out_fmt_is_yuv_420) + if (ctrl->panel->msm_dp_mode.out_fmt_is_yuv_420) pixel_rate >>=3D 1; } =20 @@ -1848,32 +1848,32 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl) ctrl->link->link_params.rate, ctrl->link->link_params.num_lanes, pixel_rate); =20 - rc =3D dp_ctrl_enable_mainlink_clocks(ctrl); + rc =3D msm_dp_ctrl_enable_mainlink_clocks(ctrl); if (rc) return rc; =20 while (--link_train_max_retries) { training_step =3D DP_TRAINING_NONE; - rc =3D dp_ctrl_setup_main_link(ctrl, &training_step); + rc =3D msm_dp_ctrl_setup_main_link(ctrl, &training_step); if (rc =3D=3D 0) { /* training completed successfully */ break; } else if (training_step =3D=3D DP_TRAINING_1) { /* link train_1 failed */ - if (!dp_catalog_link_is_connected(ctrl->catalog)) + if (!msm_dp_catalog_link_is_connected(ctrl->catalog)) break; =20 - dp_ctrl_read_link_status(ctrl, link_status); + msm_dp_ctrl_read_link_status(ctrl, link_status); =20 - rc =3D dp_ctrl_link_rate_down_shift(ctrl); + rc =3D msm_dp_ctrl_link_rate_down_shift(ctrl); if (rc < 0) { /* already in RBR =3D 1.6G */ - if (dp_ctrl_clock_recovery_any_ok(link_status, + if (msm_dp_ctrl_clock_recovery_any_ok(link_status, ctrl->link->link_params.num_lanes)) { /* * some lanes are ready, * reduce lane number */ - rc =3D dp_ctrl_link_lane_down_shift(ctrl); + rc =3D msm_dp_ctrl_link_lane_down_shift(ctrl); if (rc < 0) { /* lane =3D=3D 1 already */ /* end with failure */ break; @@ -1885,16 +1885,16 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl) } } else if (training_step =3D=3D DP_TRAINING_2) { /* link train_2 failed */ - if (!dp_catalog_link_is_connected(ctrl->catalog)) + if (!msm_dp_catalog_link_is_connected(ctrl->catalog)) break; =20 - dp_ctrl_read_link_status(ctrl, link_status); + msm_dp_ctrl_read_link_status(ctrl, link_status); =20 if (!drm_dp_clock_recovery_ok(link_status, ctrl->link->link_params.num_lanes)) - rc =3D dp_ctrl_link_rate_down_shift(ctrl); + rc =3D msm_dp_ctrl_link_rate_down_shift(ctrl); else - rc =3D dp_ctrl_link_lane_down_shift(ctrl); + rc =3D msm_dp_ctrl_link_lane_down_shift(ctrl); =20 if (rc < 0) { /* end with failure */ @@ -1902,10 +1902,10 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl) } =20 /* stop link training before start re training */ - dp_ctrl_clear_training_pattern(ctrl); + msm_dp_ctrl_clear_training_pattern(ctrl); } =20 - rc =3D dp_ctrl_reinitialize_mainlink(ctrl); + rc =3D msm_dp_ctrl_reinitialize_mainlink(ctrl); if (rc) { DRM_ERROR("Failed to reinitialize mainlink. rc=3D%d\n", rc); break; @@ -1926,38 +1926,38 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl) * link training failed * end txing train pattern here */ - dp_ctrl_clear_training_pattern(ctrl); + msm_dp_ctrl_clear_training_pattern(ctrl); =20 - dp_ctrl_deinitialize_mainlink(ctrl); + msm_dp_ctrl_deinitialize_mainlink(ctrl); rc =3D -ECONNRESET; } =20 return rc; } =20 -static int dp_ctrl_link_retrain(struct dp_ctrl_private *ctrl) +static int msm_dp_ctrl_link_retrain(struct msm_dp_ctrl_private *ctrl) { int training_step =3D DP_TRAINING_NONE; =20 - return dp_ctrl_setup_main_link(ctrl, &training_step); + return msm_dp_ctrl_setup_main_link(ctrl, &training_step); } =20 -int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train) +int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl, bool force_link= _train) { int ret =3D 0; bool mainlink_ready =3D false; - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; unsigned long pixel_rate; unsigned long pixel_rate_orig; =20 - if (!dp_ctrl) + if (!msm_dp_ctrl) return -EINVAL; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); =20 - pixel_rate =3D pixel_rate_orig =3D ctrl->panel->dp_mode.drm_mode.clock; + pixel_rate =3D pixel_rate_orig =3D ctrl->panel->msm_dp_mode.drm_mode.cloc= k; =20 - if (dp_ctrl->wide_bus_en || ctrl->panel->dp_mode.out_fmt_is_yuv_420) + if (msm_dp_ctrl->wide_bus_en || ctrl->panel->msm_dp_mode.out_fmt_is_yuv_4= 20) pixel_rate >>=3D 1; =20 drm_dbg_dp(ctrl->drm_dev, "rate=3D%d, num_lanes=3D%d, pixel_rate=3D%lu\n", @@ -1969,7 +1969,7 @@ int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool f= orce_link_train) ctrl->core_clks_on, ctrl->link_clks_on, ctrl->stream_clks_on); =20 if (!ctrl->link_clks_on) { /* link clk is off */ - ret =3D dp_ctrl_enable_mainlink_clocks(ctrl); + ret =3D msm_dp_ctrl_enable_mainlink_clocks(ctrl); if (ret) { DRM_ERROR("Failed to start link clocks. ret=3D%d\n", ret); goto end; @@ -1993,11 +1993,11 @@ int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool= force_link_train) ctrl->stream_clks_on =3D true; } =20 - if (force_link_train || !dp_ctrl_channel_eq_ok(ctrl)) - dp_ctrl_link_retrain(ctrl); + if (force_link_train || !msm_dp_ctrl_channel_eq_ok(ctrl)) + msm_dp_ctrl_link_retrain(ctrl); =20 /* stop txing train pattern to end link training */ - dp_ctrl_clear_training_pattern(ctrl); + msm_dp_ctrl_clear_training_pattern(ctrl); =20 /* * Set up transfer unit values and set controller state to send @@ -2005,22 +2005,22 @@ int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool= force_link_train) */ reinit_completion(&ctrl->video_comp); =20 - dp_ctrl_configure_source_params(ctrl); + msm_dp_ctrl_configure_source_params(ctrl); =20 - dp_catalog_ctrl_config_msa(ctrl->catalog, + msm_dp_catalog_ctrl_config_msa(ctrl->catalog, ctrl->link->link_params.rate, pixel_rate_orig, - ctrl->panel->dp_mode.out_fmt_is_yuv_420); + ctrl->panel->msm_dp_mode.out_fmt_is_yuv_420); =20 - dp_ctrl_setup_tr_unit(ctrl); + msm_dp_ctrl_setup_tr_unit(ctrl); =20 - dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_SEND_VIDEO); + msm_dp_catalog_ctrl_state_ctrl(ctrl->catalog, DP_STATE_CTRL_SEND_VIDEO); =20 - ret =3D dp_ctrl_wait4video_ready(ctrl); + ret =3D msm_dp_ctrl_wait4video_ready(ctrl); if (ret) return ret; =20 - mainlink_ready =3D dp_catalog_ctrl_mainlink_ready(ctrl->catalog); + mainlink_ready =3D msm_dp_catalog_ctrl_mainlink_ready(ctrl->catalog); drm_dbg_dp(ctrl->drm_dev, "mainlink %s\n", mainlink_ready ? "READY" : "NOT READY"); =20 @@ -2028,20 +2028,20 @@ int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool= force_link_train) return ret; } =20 -void dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl) +void msm_dp_ctrl_off_link_stream(struct msm_dp_ctrl *msm_dp_ctrl) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; struct phy *phy; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); phy =3D ctrl->phy; =20 - dp_catalog_panel_disable_vsc_sdp(ctrl->catalog); + msm_dp_catalog_panel_disable_vsc_sdp(ctrl->catalog); =20 /* set dongle to D3 (power off) mode */ - dp_link_psm_config(ctrl->link, &ctrl->panel->link_info, true); + msm_dp_link_psm_config(ctrl->link, &ctrl->panel->link_info, true); =20 - dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); + msm_dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); =20 if (ctrl->stream_clks_on) { clk_disable_unprepare(ctrl->pixel_clk); @@ -2049,7 +2049,7 @@ void dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl) } =20 dev_pm_opp_set_rate(ctrl->dev, 0); - dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); + msm_dp_ctrl_link_clk_disable(&ctrl->msm_dp_ctrl); =20 phy_power_off(phy); =20 @@ -2061,17 +2061,17 @@ void dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctr= l) phy, phy->init_count, phy->power_count); } =20 -void dp_ctrl_off_link(struct dp_ctrl *dp_ctrl) +void msm_dp_ctrl_off_link(struct msm_dp_ctrl *msm_dp_ctrl) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; struct phy *phy; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); phy =3D ctrl->phy; =20 - dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); + msm_dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); =20 - dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); + msm_dp_ctrl_link_clk_disable(&ctrl->msm_dp_ctrl); =20 DRM_DEBUG_DP("Before, phy=3D%p init_count=3D%d power_on=3D%d\n", phy, phy->init_count, phy->power_count); @@ -2082,19 +2082,19 @@ void dp_ctrl_off_link(struct dp_ctrl *dp_ctrl) phy, phy->init_count, phy->power_count); } =20 -void dp_ctrl_off(struct dp_ctrl *dp_ctrl) +void msm_dp_ctrl_off(struct msm_dp_ctrl *msm_dp_ctrl) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; struct phy *phy; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); phy =3D ctrl->phy; =20 - dp_catalog_panel_disable_vsc_sdp(ctrl->catalog); + msm_dp_catalog_panel_disable_vsc_sdp(ctrl->catalog); =20 - dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); + msm_dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); =20 - dp_catalog_ctrl_reset(ctrl->catalog); + msm_dp_catalog_ctrl_reset(ctrl->catalog); =20 if (ctrl->stream_clks_on) { clk_disable_unprepare(ctrl->pixel_clk); @@ -2102,26 +2102,26 @@ void dp_ctrl_off(struct dp_ctrl *dp_ctrl) } =20 dev_pm_opp_set_rate(ctrl->dev, 0); - dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); + msm_dp_ctrl_link_clk_disable(&ctrl->msm_dp_ctrl); =20 phy_power_off(phy); drm_dbg_dp(ctrl->drm_dev, "phy=3D%p init=3D%d power_on=3D%d\n", phy, phy->init_count, phy->power_count); } =20 -irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl) +irqreturn_t msm_dp_ctrl_isr(struct msm_dp_ctrl *msm_dp_ctrl) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; u32 isr; irqreturn_t ret =3D IRQ_NONE; =20 - if (!dp_ctrl) + if (!msm_dp_ctrl) return IRQ_NONE; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); =20 if (ctrl->panel->psr_cap.version) { - isr =3D dp_catalog_ctrl_read_psr_interrupt_status(ctrl->catalog); + isr =3D msm_dp_catalog_ctrl_read_psr_interrupt_status(ctrl->catalog); =20 if (isr) complete(&ctrl->psr_op_comp); @@ -2136,7 +2136,7 @@ irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl) drm_dbg_dp(ctrl->drm_dev, "PSR frame capture done\n"); } =20 - isr =3D dp_catalog_ctrl_get_interrupt(ctrl->catalog); + isr =3D msm_dp_catalog_ctrl_get_interrupt(ctrl->catalog); =20 =20 if (isr & DP_CTRL_INTR_READY_FOR_VIDEO) { @@ -2164,13 +2164,13 @@ static const char *ctrl_clks[] =3D { "ctrl_link_iface", }; =20 -static int dp_ctrl_clk_init(struct dp_ctrl *dp_ctrl) +static int msm_dp_ctrl_clk_init(struct msm_dp_ctrl *msm_dp_ctrl) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; struct device *dev; int i, rc; =20 - ctrl =3D container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + ctrl =3D container_of(msm_dp_ctrl, struct msm_dp_ctrl_private, msm_dp_ctr= l); dev =3D ctrl->dev; =20 ctrl->num_core_clks =3D ARRAY_SIZE(core_clks); @@ -2204,12 +2204,12 @@ static int dp_ctrl_clk_init(struct dp_ctrl *dp_ctrl) return 0; } =20 -struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, - struct dp_panel *panel, struct drm_dp_aux *aux, - struct dp_catalog *catalog, +struct msm_dp_ctrl *msm_dp_ctrl_get(struct device *dev, struct msm_dp_link= *link, + struct msm_dp_panel *panel, struct drm_dp_aux *aux, + struct msm_dp_catalog *catalog, struct phy *phy) { - struct dp_ctrl_private *ctrl; + struct msm_dp_ctrl_private *ctrl; int ret; =20 if (!dev || !panel || !aux || @@ -2228,7 +2228,7 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struc= t dp_link *link, if (ret) { dev_err(dev, "invalid DP OPP table in device tree\n"); /* caller do PTR_ERR(opp_table) */ - return (struct dp_ctrl *)ERR_PTR(ret); + return (struct msm_dp_ctrl *)ERR_PTR(ret); } =20 /* OPP table is optional */ @@ -2248,11 +2248,11 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, str= uct dp_link *link, ctrl->dev =3D dev; ctrl->phy =3D phy; =20 - ret =3D dp_ctrl_clk_init(&ctrl->dp_ctrl); + ret =3D msm_dp_ctrl_clk_init(&ctrl->msm_dp_ctrl); if (ret) { dev_err(dev, "failed to init clocks\n"); return ERR_PTR(ret); } =20 - return &ctrl->dp_ctrl; + return &ctrl->msm_dp_ctrl; } diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.h b/drivers/gpu/drm/msm/dp/dp_c= trl.h index ffcbd9a25748..b7abfedbf574 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.h +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.h @@ -11,34 +11,34 @@ #include "dp_link.h" #include "dp_catalog.h" =20 -struct dp_ctrl { +struct msm_dp_ctrl { bool wide_bus_en; }; =20 struct phy; =20 -int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl); -int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train); -void dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl); -void dp_ctrl_off_link(struct dp_ctrl *dp_ctrl); -void dp_ctrl_off(struct dp_ctrl *dp_ctrl); -void dp_ctrl_push_idle(struct dp_ctrl *dp_ctrl); -irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl); -void dp_ctrl_handle_sink_request(struct dp_ctrl *dp_ctrl); -struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, - struct dp_panel *panel, struct drm_dp_aux *aux, - struct dp_catalog *catalog, +int msm_dp_ctrl_on_link(struct msm_dp_ctrl *msm_dp_ctrl); +int msm_dp_ctrl_on_stream(struct msm_dp_ctrl *msm_dp_ctrl, bool force_link= _train); +void msm_dp_ctrl_off_link_stream(struct msm_dp_ctrl *msm_dp_ctrl); +void msm_dp_ctrl_off_link(struct msm_dp_ctrl *msm_dp_ctrl); +void msm_dp_ctrl_off(struct msm_dp_ctrl *msm_dp_ctrl); +void msm_dp_ctrl_push_idle(struct msm_dp_ctrl *msm_dp_ctrl); +irqreturn_t msm_dp_ctrl_isr(struct msm_dp_ctrl *msm_dp_ctrl); +void msm_dp_ctrl_handle_sink_request(struct msm_dp_ctrl *msm_dp_ctrl); +struct msm_dp_ctrl *msm_dp_ctrl_get(struct device *dev, struct msm_dp_link= *link, + struct msm_dp_panel *panel, struct drm_dp_aux *aux, + struct msm_dp_catalog *catalog, struct phy *phy); =20 -void dp_ctrl_reset_irq_ctrl(struct dp_ctrl *dp_ctrl, bool enable); -void dp_ctrl_phy_init(struct dp_ctrl *dp_ctrl); -void dp_ctrl_phy_exit(struct dp_ctrl *dp_ctrl); -void dp_ctrl_irq_phy_exit(struct dp_ctrl *dp_ctrl); +void msm_dp_ctrl_reset_irq_ctrl(struct msm_dp_ctrl *msm_dp_ctrl, bool enab= le); +void msm_dp_ctrl_phy_init(struct msm_dp_ctrl *msm_dp_ctrl); +void msm_dp_ctrl_phy_exit(struct msm_dp_ctrl *msm_dp_ctrl); +void msm_dp_ctrl_irq_phy_exit(struct msm_dp_ctrl *msm_dp_ctrl); =20 -void dp_ctrl_set_psr(struct dp_ctrl *dp_ctrl, bool enable); -void dp_ctrl_config_psr(struct dp_ctrl *dp_ctrl); +void msm_dp_ctrl_set_psr(struct msm_dp_ctrl *msm_dp_ctrl, bool enable); +void msm_dp_ctrl_config_psr(struct msm_dp_ctrl *msm_dp_ctrl); =20 -int dp_ctrl_core_clk_enable(struct dp_ctrl *dp_ctrl); -void dp_ctrl_core_clk_disable(struct dp_ctrl *dp_ctrl); +int msm_dp_ctrl_core_clk_enable(struct msm_dp_ctrl *msm_dp_ctrl); +void msm_dp_ctrl_core_clk_disable(struct msm_dp_ctrl *msm_dp_ctrl); =20 #endif /* _DP_CTRL_H_ */ diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c b/drivers/gpu/drm/msm/dp/dp_= debug.c index b8611f6d2296..22fd946ee201 100644 --- a/drivers/gpu/drm/msm/dp/dp_debug.c +++ b/drivers/gpu/drm/msm/dp/dp_debug.c @@ -17,15 +17,15 @@ =20 #define DEBUG_NAME "msm_dp" =20 -struct dp_debug_private { - struct dp_link *link; - struct dp_panel *panel; +struct msm_dp_debug_private { + struct msm_dp_link *link; + struct msm_dp_panel *panel; struct drm_connector *connector; }; =20 -static int dp_debug_show(struct seq_file *seq, void *p) +static int msm_dp_debug_show(struct seq_file *seq, void *p) { - struct dp_debug_private *debug =3D seq->private; + struct msm_dp_debug_private *debug =3D seq->private; u64 lclk =3D 0; u32 link_params_rate; const struct drm_display_mode *drm_mode; @@ -33,7 +33,7 @@ static int dp_debug_show(struct seq_file *seq, void *p) if (!debug) return -ENODEV; =20 - drm_mode =3D &debug->panel->dp_mode.drm_mode; + drm_mode =3D &debug->panel->msm_dp_mode.drm_mode; =20 seq_printf(seq, "\tname =3D %s\n", DEBUG_NAME); seq_printf(seq, "\tdrm_dp_link\n\t\trate =3D %u\n", @@ -55,8 +55,8 @@ static int dp_debug_show(struct seq_file *seq, void *p) drm_mode->hsync_end - drm_mode->hsync_start, drm_mode->vsync_end - drm_mode->vsync_start); seq_printf(seq, "\t\tactive_low =3D %dx%d\n", - debug->panel->dp_mode.h_active_low, - debug->panel->dp_mode.v_active_low); + debug->panel->msm_dp_mode.h_active_low, + debug->panel->msm_dp_mode.v_active_low); seq_printf(seq, "\t\th_skew =3D %d\n", drm_mode->hskew); seq_printf(seq, "\t\trefresh rate =3D %d\n", @@ -64,7 +64,7 @@ static int dp_debug_show(struct seq_file *seq, void *p) seq_printf(seq, "\t\tpixel clock khz =3D %d\n", drm_mode->clock); seq_printf(seq, "\t\tbpp =3D %d\n", - debug->panel->dp_mode.bpp); + debug->panel->msm_dp_mode.bpp); =20 /* Link Information */ seq_printf(seq, "\tdp_link:\n\t\ttest_requested =3D %d\n", @@ -83,11 +83,11 @@ static int dp_debug_show(struct seq_file *seq, void *p) =20 return 0; } -DEFINE_SHOW_ATTRIBUTE(dp_debug); +DEFINE_SHOW_ATTRIBUTE(msm_dp_debug); =20 -static int dp_test_data_show(struct seq_file *m, void *data) +static int msm_dp_test_data_show(struct seq_file *m, void *data) { - const struct dp_debug_private *debug =3D m->private; + const struct msm_dp_debug_private *debug =3D m->private; const struct drm_connector *connector =3D debug->connector; u32 bpc; =20 @@ -98,18 +98,18 @@ static int dp_test_data_show(struct seq_file *m, void *= data) seq_printf(m, "vdisplay: %d\n", debug->link->test_video.test_v_height); seq_printf(m, "bpc: %u\n", - dp_link_bit_depth_to_bpp(bpc) / 3); + msm_dp_link_bit_depth_to_bpp(bpc) / 3); } else { seq_puts(m, "0"); } =20 return 0; } -DEFINE_SHOW_ATTRIBUTE(dp_test_data); +DEFINE_SHOW_ATTRIBUTE(msm_dp_test_data); =20 -static int dp_test_type_show(struct seq_file *m, void *data) +static int msm_dp_test_type_show(struct seq_file *m, void *data) { - const struct dp_debug_private *debug =3D m->private; + const struct msm_dp_debug_private *debug =3D m->private; const struct drm_connector *connector =3D debug->connector; =20 if (connector->status =3D=3D connector_status_connected) @@ -119,15 +119,15 @@ static int dp_test_type_show(struct seq_file *m, void= *data) =20 return 0; } -DEFINE_SHOW_ATTRIBUTE(dp_test_type); +DEFINE_SHOW_ATTRIBUTE(msm_dp_test_type); =20 -static ssize_t dp_test_active_write(struct file *file, +static ssize_t msm_dp_test_active_write(struct file *file, const char __user *ubuf, size_t len, loff_t *offp) { char *input_buffer; int status =3D 0; - const struct dp_debug_private *debug; + const struct msm_dp_debug_private *debug; const struct drm_connector *connector; int val =3D 0; =20 @@ -164,9 +164,9 @@ static ssize_t dp_test_active_write(struct file *file, return len; } =20 -static int dp_test_active_show(struct seq_file *m, void *data) +static int msm_dp_test_active_show(struct seq_file *m, void *data) { - struct dp_debug_private *debug =3D m->private; + struct msm_dp_debug_private *debug =3D m->private; struct drm_connector *connector =3D debug->connector; =20 if (connector->status =3D=3D connector_status_connected) { @@ -181,28 +181,28 @@ static int dp_test_active_show(struct seq_file *m, vo= id *data) return 0; } =20 -static int dp_test_active_open(struct inode *inode, +static int msm_dp_test_active_open(struct inode *inode, struct file *file) { - return single_open(file, dp_test_active_show, + return single_open(file, msm_dp_test_active_show, inode->i_private); } =20 static const struct file_operations test_active_fops =3D { .owner =3D THIS_MODULE, - .open =3D dp_test_active_open, + .open =3D msm_dp_test_active_open, .read =3D seq_read, .llseek =3D seq_lseek, .release =3D single_release, - .write =3D dp_test_active_write + .write =3D msm_dp_test_active_write }; =20 -int dp_debug_init(struct device *dev, struct dp_panel *panel, - struct dp_link *link, +int msm_dp_debug_init(struct device *dev, struct msm_dp_panel *panel, + struct msm_dp_link *link, struct drm_connector *connector, struct dentry *root, bool is_edp) { - struct dp_debug_private *debug; + struct msm_dp_debug_private *debug; =20 if (!dev || !panel || !link) { DRM_ERROR("invalid input\n"); @@ -217,20 +217,20 @@ int dp_debug_init(struct device *dev, struct dp_panel= *panel, debug->panel =3D panel; =20 debugfs_create_file("dp_debug", 0444, root, - debug, &dp_debug_fops); + debug, &msm_dp_debug_fops); =20 if (!is_edp) { - debugfs_create_file("msm_dp_test_active", 0444, + debugfs_create_file("dp_test_active", 0444, root, debug, &test_active_fops); =20 - debugfs_create_file("msm_dp_test_data", 0444, + debugfs_create_file("dp_test_data", 0444, root, - debug, &dp_test_data_fops); + debug, &msm_dp_test_data_fops); =20 - debugfs_create_file("msm_dp_test_type", 0444, + debugfs_create_file("dp_test_type", 0444, root, - debug, &dp_test_type_fops); + debug, &msm_dp_test_type_fops); } =20 return 0; diff --git a/drivers/gpu/drm/msm/dp/dp_debug.h b/drivers/gpu/drm/msm/dp/dp_= debug.h index 7e1aa892fc09..6dc0ff4f0f65 100644 --- a/drivers/gpu/drm/msm/dp/dp_debug.h +++ b/drivers/gpu/drm/msm/dp/dp_debug.h @@ -12,7 +12,7 @@ #if defined(CONFIG_DEBUG_FS) =20 /** - * dp_debug_get() - configure and get the DisplayPlot debug module data + * msm_dp_debug_get() - configure and get the DisplayPlot debug module data * * @dev: device instance of the caller * @panel: instance of panel module @@ -25,8 +25,8 @@ * This function sets up the debug module and provides a way * for debugfs input to be communicated with existing modules */ -int dp_debug_init(struct device *dev, struct dp_panel *panel, - struct dp_link *link, +int msm_dp_debug_init(struct device *dev, struct msm_dp_panel *panel, + struct msm_dp_link *link, struct drm_connector *connector, struct dentry *root, bool is_edp); @@ -34,8 +34,8 @@ int dp_debug_init(struct device *dev, struct dp_panel *pa= nel, #else =20 static inline -int dp_debug_init(struct device *dev, struct dp_panel *panel, - struct dp_link *link, +int msm_dp_debug_init(struct device *dev, struct msm_dp_panel *panel, + struct msm_dp_link *link, struct drm_connector *connector, struct dentry *root, bool is_edp) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/d= p_display.c index f01980b0888a..5cc349f672c0 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -67,13 +67,13 @@ enum { =20 #define WAIT_FOR_RESUME_TIMEOUT_JIFFIES (HZ / 2) =20 -struct dp_event { +struct msm_dp_event { u32 event_id; u32 data; u32 delay; }; =20 -struct dp_display_private { +struct msm_dp_display_private { int irq; =20 unsigned int id; @@ -85,14 +85,14 @@ struct dp_display_private { =20 struct drm_device *drm_dev; =20 - struct dp_catalog *catalog; + struct msm_dp_catalog *catalog; struct drm_dp_aux *aux; - struct dp_link *link; - struct dp_panel *panel; - struct dp_ctrl *ctrl; + struct msm_dp_link *link; + struct msm_dp_panel *panel; + struct msm_dp_ctrl *ctrl; =20 - struct dp_display_mode dp_mode; - struct msm_dp dp_display; + struct msm_dp_display_mode msm_dp_mode; + struct msm_dp msm_dp_display; =20 /* wait for audio signaling */ struct completion audio_comp; @@ -104,12 +104,12 @@ struct dp_display_private { u32 event_pndx; u32 event_gndx; struct task_struct *ev_tsk; - struct dp_event event_list[DP_EVENT_Q_MAX]; + struct msm_dp_event event_list[DP_EVENT_Q_MAX]; spinlock_t event_lock; =20 bool wide_bus_supported; =20 - struct dp_audio *audio; + struct msm_dp_audio *audio; }; =20 struct msm_dp_desc { @@ -169,7 +169,7 @@ static const struct msm_dp_desc x1e80100_dp_descs[] =3D= { {} }; =20 -static const struct of_device_id dp_dt_match[] =3D { +static const struct of_device_id msm_dp_dt_match[] =3D { { .compatible =3D "qcom,sa8775p-dp", .data =3D &sa8775p_dp_descs }, { .compatible =3D "qcom,sc7180-dp", .data =3D &sc7180_dp_descs }, { .compatible =3D "qcom,sc7280-dp", .data =3D &sc7280_dp_descs }, @@ -185,55 +185,55 @@ static const struct of_device_id dp_dt_match[] =3D { {} }; =20 -static struct dp_display_private *dev_get_dp_display_private(struct device= *dev) +static struct msm_dp_display_private *dev_get_dp_display_private(struct de= vice *dev) { struct msm_dp *dp =3D dev_get_drvdata(dev); =20 - return container_of(dp, struct dp_display_private, dp_display); + return container_of(dp, struct msm_dp_display_private, msm_dp_display); } =20 -static int dp_add_event(struct dp_display_private *dp_priv, u32 event, +static int msm_dp_add_event(struct msm_dp_display_private *msm_dp_priv, u3= 2 event, u32 data, u32 delay) { unsigned long flag; - struct dp_event *todo; + struct msm_dp_event *todo; int pndx; =20 - spin_lock_irqsave(&dp_priv->event_lock, flag); - pndx =3D dp_priv->event_pndx + 1; + spin_lock_irqsave(&msm_dp_priv->event_lock, flag); + pndx =3D msm_dp_priv->event_pndx + 1; pndx %=3D DP_EVENT_Q_MAX; - if (pndx =3D=3D dp_priv->event_gndx) { + if (pndx =3D=3D msm_dp_priv->event_gndx) { pr_err("event_q is full: pndx=3D%d gndx=3D%d\n", - dp_priv->event_pndx, dp_priv->event_gndx); - spin_unlock_irqrestore(&dp_priv->event_lock, flag); + msm_dp_priv->event_pndx, msm_dp_priv->event_gndx); + spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag); return -EPERM; } - todo =3D &dp_priv->event_list[dp_priv->event_pndx++]; - dp_priv->event_pndx %=3D DP_EVENT_Q_MAX; + todo =3D &msm_dp_priv->event_list[msm_dp_priv->event_pndx++]; + msm_dp_priv->event_pndx %=3D DP_EVENT_Q_MAX; todo->event_id =3D event; todo->data =3D data; todo->delay =3D delay; - wake_up(&dp_priv->event_q); - spin_unlock_irqrestore(&dp_priv->event_lock, flag); + wake_up(&msm_dp_priv->event_q); + spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag); =20 return 0; } =20 -static int dp_del_event(struct dp_display_private *dp_priv, u32 event) +static int msm_dp_del_event(struct msm_dp_display_private *msm_dp_priv, u3= 2 event) { unsigned long flag; - struct dp_event *todo; + struct msm_dp_event *todo; u32 gndx; =20 - spin_lock_irqsave(&dp_priv->event_lock, flag); - if (dp_priv->event_pndx =3D=3D dp_priv->event_gndx) { - spin_unlock_irqrestore(&dp_priv->event_lock, flag); + spin_lock_irqsave(&msm_dp_priv->event_lock, flag); + if (msm_dp_priv->event_pndx =3D=3D msm_dp_priv->event_gndx) { + spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag); return -ENOENT; } =20 - gndx =3D dp_priv->event_gndx; - while (dp_priv->event_pndx !=3D gndx) { - todo =3D &dp_priv->event_list[gndx]; + gndx =3D msm_dp_priv->event_gndx; + while (msm_dp_priv->event_pndx !=3D gndx) { + todo =3D &msm_dp_priv->event_list[gndx]; if (todo->event_id =3D=3D event) { todo->event_id =3D EV_NO_EVENT; /* deleted */ todo->delay =3D 0; @@ -241,60 +241,60 @@ static int dp_del_event(struct dp_display_private *dp= _priv, u32 event) gndx++; gndx %=3D DP_EVENT_Q_MAX; } - spin_unlock_irqrestore(&dp_priv->event_lock, flag); + spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag); =20 return 0; } =20 -void dp_display_signal_audio_start(struct msm_dp *dp_display) +void msm_dp_display_signal_audio_start(struct msm_dp *msm_dp_display) { - struct dp_display_private *dp; + struct msm_dp_display_private *dp; =20 - dp =3D container_of(dp_display, struct dp_display_private, dp_display); + dp =3D container_of(msm_dp_display, struct msm_dp_display_private, msm_dp= _display); =20 reinit_completion(&dp->audio_comp); } =20 -void dp_display_signal_audio_complete(struct msm_dp *dp_display) +void msm_dp_display_signal_audio_complete(struct msm_dp *msm_dp_display) { - struct dp_display_private *dp; + struct msm_dp_display_private *dp; =20 - dp =3D container_of(dp_display, struct dp_display_private, dp_display); + dp =3D container_of(msm_dp_display, struct msm_dp_display_private, msm_dp= _display); =20 complete_all(&dp->audio_comp); } =20 -static int dp_hpd_event_thread_start(struct dp_display_private *dp_priv); +static int msm_dp_hpd_event_thread_start(struct msm_dp_display_private *ms= m_dp_priv); =20 -static int dp_display_bind(struct device *dev, struct device *master, +static int msm_dp_display_bind(struct device *dev, struct device *master, void *data) { int rc =3D 0; - struct dp_display_private *dp =3D dev_get_dp_display_private(dev); + struct msm_dp_display_private *dp =3D dev_get_dp_display_private(dev); struct msm_drm_private *priv =3D dev_get_drvdata(master); struct drm_device *drm =3D priv->dev; =20 - dp->dp_display.drm_dev =3D drm; - priv->dp[dp->id] =3D &dp->dp_display; + dp->msm_dp_display.drm_dev =3D drm; + priv->dp[dp->id] =3D &dp->msm_dp_display; =20 =20 =20 dp->drm_dev =3D drm; dp->aux->drm_dev =3D drm; - rc =3D dp_aux_register(dp->aux); + rc =3D msm_dp_aux_register(dp->aux); if (rc) { DRM_ERROR("DRM DP AUX register failed\n"); goto end; } =20 =20 - rc =3D dp_register_audio_driver(dev, dp->audio); + rc =3D msm_dp_register_audio_driver(dev, dp->audio); if (rc) { DRM_ERROR("Audio registration Dp failed\n"); goto end; } =20 - rc =3D dp_hpd_event_thread_start(dp); + rc =3D msm_dp_hpd_event_thread_start(dp); if (rc) { DRM_ERROR("Event thread create failed\n"); goto end; @@ -305,44 +305,44 @@ static int dp_display_bind(struct device *dev, struct= device *master, return rc; } =20 -static void dp_display_unbind(struct device *dev, struct device *master, +static void msm_dp_display_unbind(struct device *dev, struct device *maste= r, void *data) { - struct dp_display_private *dp =3D dev_get_dp_display_private(dev); + struct msm_dp_display_private *dp =3D dev_get_dp_display_private(dev); struct msm_drm_private *priv =3D dev_get_drvdata(master); =20 kthread_stop(dp->ev_tsk); =20 of_dp_aux_depopulate_bus(dp->aux); =20 - dp_unregister_audio_driver(dev, dp->audio); - dp_aux_unregister(dp->aux); + msm_dp_unregister_audio_driver(dev, dp->audio); + msm_dp_aux_unregister(dp->aux); dp->drm_dev =3D NULL; dp->aux->drm_dev =3D NULL; priv->dp[dp->id] =3D NULL; } =20 -static const struct component_ops dp_display_comp_ops =3D { - .bind =3D dp_display_bind, - .unbind =3D dp_display_unbind, +static const struct component_ops msm_dp_display_comp_ops =3D { + .bind =3D msm_dp_display_bind, + .unbind =3D msm_dp_display_unbind, }; =20 -static void dp_display_send_hpd_event(struct msm_dp *dp_display) +static void msm_dp_display_send_hpd_event(struct msm_dp *msm_dp_display) { - struct dp_display_private *dp; + struct msm_dp_display_private *dp; struct drm_connector *connector; =20 - dp =3D container_of(dp_display, struct dp_display_private, dp_display); + dp =3D container_of(msm_dp_display, struct msm_dp_display_private, msm_dp= _display); =20 - connector =3D dp->dp_display.connector; + connector =3D dp->msm_dp_display.connector; drm_helper_hpd_irq_event(connector->dev); } =20 -static int dp_display_send_hpd_notification(struct dp_display_private *dp, +static int msm_dp_display_send_hpd_notification(struct msm_dp_display_priv= ate *dp, bool hpd) { - if ((hpd && dp->dp_display.link_ready) || - (!hpd && !dp->dp_display.link_ready)) { + if ((hpd && dp->msm_dp_display.link_ready) || + (!hpd && !dp->msm_dp_display.link_ready)) { drm_dbg_dp(dp->drm_dev, "HPD already %s\n", (hpd ? "on" : "off")); return 0; @@ -351,139 +351,139 @@ static int dp_display_send_hpd_notification(struct = dp_display_private *dp, /* reset video pattern flag on disconnect */ if (!hpd) { dp->panel->video_test =3D false; - if (!dp->dp_display.is_edp) - drm_dp_set_subconnector_property(dp->dp_display.connector, + if (!dp->msm_dp_display.is_edp) + drm_dp_set_subconnector_property(dp->msm_dp_display.connector, connector_status_disconnected, dp->panel->dpcd, dp->panel->downstream_ports); } =20 - dp->dp_display.link_ready =3D hpd; + dp->msm_dp_display.link_ready =3D hpd; =20 drm_dbg_dp(dp->drm_dev, "type=3D%d hpd=3D%d\n", - dp->dp_display.connector_type, hpd); - dp_display_send_hpd_event(&dp->dp_display); + dp->msm_dp_display.connector_type, hpd); + msm_dp_display_send_hpd_event(&dp->msm_dp_display); =20 return 0; } =20 -static int dp_display_process_hpd_high(struct dp_display_private *dp) +static int msm_dp_display_process_hpd_high(struct msm_dp_display_private *= dp) { - struct drm_connector *connector =3D dp->dp_display.connector; + struct drm_connector *connector =3D dp->msm_dp_display.connector; const struct drm_display_info *info =3D &connector->display_info; int rc =3D 0; =20 - rc =3D dp_panel_read_sink_caps(dp->panel, connector); + rc =3D msm_dp_panel_read_sink_caps(dp->panel, connector); if (rc) goto end; =20 - dp_link_process_request(dp->link); + msm_dp_link_process_request(dp->link); =20 - if (!dp->dp_display.is_edp) + if (!dp->msm_dp_display.is_edp) drm_dp_set_subconnector_property(connector, connector_status_connected, dp->panel->dpcd, dp->panel->downstream_ports); =20 - dp->dp_display.psr_supported =3D dp->panel->psr_cap.version && psr_enable= d; + dp->msm_dp_display.psr_supported =3D dp->panel->psr_cap.version && psr_en= abled; =20 dp->audio_supported =3D info->has_audio; - dp_panel_handle_sink_request(dp->panel); + msm_dp_panel_handle_sink_request(dp->panel); =20 /* * set sink to normal operation mode -- D0 * before dpcd read */ - dp_link_psm_config(dp->link, &dp->panel->link_info, false); + msm_dp_link_psm_config(dp->link, &dp->panel->link_info, false); =20 - dp_link_reset_phy_params_vx_px(dp->link); - rc =3D dp_ctrl_on_link(dp->ctrl); + msm_dp_link_reset_phy_params_vx_px(dp->link); + rc =3D msm_dp_ctrl_on_link(dp->ctrl); if (rc) { DRM_ERROR("failed to complete DP link training\n"); goto end; } =20 - dp_add_event(dp, EV_USER_NOTIFICATION, true, 0); + msm_dp_add_event(dp, EV_USER_NOTIFICATION, true, 0); =20 end: return rc; } =20 -static void dp_display_host_phy_init(struct dp_display_private *dp) +static void msm_dp_display_host_phy_init(struct msm_dp_display_private *dp) { drm_dbg_dp(dp->drm_dev, "type=3D%d core_init=3D%d phy_init=3D%d\n", - dp->dp_display.connector_type, dp->core_initialized, + dp->msm_dp_display.connector_type, dp->core_initialized, dp->phy_initialized); =20 if (!dp->phy_initialized) { - dp_ctrl_phy_init(dp->ctrl); + msm_dp_ctrl_phy_init(dp->ctrl); dp->phy_initialized =3D true; } } =20 -static void dp_display_host_phy_exit(struct dp_display_private *dp) +static void msm_dp_display_host_phy_exit(struct msm_dp_display_private *dp) { drm_dbg_dp(dp->drm_dev, "type=3D%d core_init=3D%d phy_init=3D%d\n", - dp->dp_display.connector_type, dp->core_initialized, + dp->msm_dp_display.connector_type, dp->core_initialized, dp->phy_initialized); =20 if (dp->phy_initialized) { - dp_ctrl_phy_exit(dp->ctrl); + msm_dp_ctrl_phy_exit(dp->ctrl); dp->phy_initialized =3D false; } } =20 -static void dp_display_host_init(struct dp_display_private *dp) +static void msm_dp_display_host_init(struct msm_dp_display_private *dp) { drm_dbg_dp(dp->drm_dev, "type=3D%d core_init=3D%d phy_init=3D%d\n", - dp->dp_display.connector_type, dp->core_initialized, + dp->msm_dp_display.connector_type, dp->core_initialized, dp->phy_initialized); =20 - dp_ctrl_core_clk_enable(dp->ctrl); - dp_ctrl_reset_irq_ctrl(dp->ctrl, true); - dp_aux_init(dp->aux); + msm_dp_ctrl_core_clk_enable(dp->ctrl); + msm_dp_ctrl_reset_irq_ctrl(dp->ctrl, true); + msm_dp_aux_init(dp->aux); dp->core_initialized =3D true; } =20 -static void dp_display_host_deinit(struct dp_display_private *dp) +static void msm_dp_display_host_deinit(struct msm_dp_display_private *dp) { drm_dbg_dp(dp->drm_dev, "type=3D%d core_init=3D%d phy_init=3D%d\n", - dp->dp_display.connector_type, dp->core_initialized, + dp->msm_dp_display.connector_type, dp->core_initialized, dp->phy_initialized); =20 - dp_ctrl_reset_irq_ctrl(dp->ctrl, false); - dp_aux_deinit(dp->aux); - dp_ctrl_core_clk_disable(dp->ctrl); + msm_dp_ctrl_reset_irq_ctrl(dp->ctrl, false); + msm_dp_aux_deinit(dp->aux); + msm_dp_ctrl_core_clk_disable(dp->ctrl); dp->core_initialized =3D false; } =20 -static int dp_display_usbpd_configure_cb(struct device *dev) +static int msm_dp_display_usbpd_configure_cb(struct device *dev) { - struct dp_display_private *dp =3D dev_get_dp_display_private(dev); + struct msm_dp_display_private *dp =3D dev_get_dp_display_private(dev); =20 - dp_display_host_phy_init(dp); + msm_dp_display_host_phy_init(dp); =20 - return dp_display_process_hpd_high(dp); + return msm_dp_display_process_hpd_high(dp); } =20 -static int dp_display_notify_disconnect(struct device *dev) +static int msm_dp_display_notify_disconnect(struct device *dev) { - struct dp_display_private *dp =3D dev_get_dp_display_private(dev); + struct msm_dp_display_private *dp =3D dev_get_dp_display_private(dev); =20 - dp_add_event(dp, EV_USER_NOTIFICATION, false, 0); + msm_dp_add_event(dp, EV_USER_NOTIFICATION, false, 0); =20 return 0; } =20 -static void dp_display_handle_video_request(struct dp_display_private *dp) +static void msm_dp_display_handle_video_request(struct msm_dp_display_priv= ate *dp) { if (dp->link->sink_request & DP_TEST_LINK_VIDEO_PATTERN) { dp->panel->video_test =3D true; - dp_link_send_test_response(dp->link); + msm_dp_link_send_test_response(dp->link); } } =20 -static int dp_display_handle_port_status_changed(struct dp_display_private= *dp) +static int msm_dp_display_handle_port_status_changed(struct msm_dp_display= _private *dp) { int rc =3D 0; =20 @@ -491,12 +491,12 @@ static int dp_display_handle_port_status_changed(stru= ct dp_display_private *dp) drm_dbg_dp(dp->drm_dev, "sink count is zero, nothing to do\n"); if (dp->hpd_state !=3D ST_DISCONNECTED) { dp->hpd_state =3D ST_DISCONNECT_PENDING; - dp_add_event(dp, EV_USER_NOTIFICATION, false, 0); + msm_dp_add_event(dp, EV_USER_NOTIFICATION, false, 0); } } else { if (dp->hpd_state =3D=3D ST_DISCONNECTED) { dp->hpd_state =3D ST_MAINLINK_READY; - rc =3D dp_display_process_hpd_high(dp); + rc =3D msm_dp_display_process_hpd_high(dp); if (rc) dp->hpd_state =3D ST_DISCONNECTED; } @@ -505,7 +505,7 @@ static int dp_display_handle_port_status_changed(struct= dp_display_private *dp) return rc; } =20 -static int dp_display_handle_irq_hpd(struct dp_display_private *dp) +static int msm_dp_display_handle_irq_hpd(struct msm_dp_display_private *dp) { u32 sink_request =3D dp->link->sink_request; =20 @@ -519,48 +519,48 @@ static int dp_display_handle_irq_hpd(struct dp_displa= y_private *dp) } } =20 - dp_ctrl_handle_sink_request(dp->ctrl); + msm_dp_ctrl_handle_sink_request(dp->ctrl); =20 if (sink_request & DP_TEST_LINK_VIDEO_PATTERN) - dp_display_handle_video_request(dp); + msm_dp_display_handle_video_request(dp); =20 return 0; } =20 -static int dp_display_usbpd_attention_cb(struct device *dev) +static int msm_dp_display_usbpd_attention_cb(struct device *dev) { int rc =3D 0; u32 sink_request; - struct dp_display_private *dp =3D dev_get_dp_display_private(dev); + struct msm_dp_display_private *dp =3D dev_get_dp_display_private(dev); =20 /* check for any test request issued by sink */ - rc =3D dp_link_process_request(dp->link); + rc =3D msm_dp_link_process_request(dp->link); if (!rc) { sink_request =3D dp->link->sink_request; drm_dbg_dp(dp->drm_dev, "hpd_state=3D%d sink_request=3D%d\n", dp->hpd_state, sink_request); if (sink_request & DS_PORT_STATUS_CHANGED) - rc =3D dp_display_handle_port_status_changed(dp); + rc =3D msm_dp_display_handle_port_status_changed(dp); else - rc =3D dp_display_handle_irq_hpd(dp); + rc =3D msm_dp_display_handle_irq_hpd(dp); } =20 return rc; } =20 -static int dp_hpd_plug_handle(struct dp_display_private *dp, u32 data) +static int msm_dp_hpd_plug_handle(struct msm_dp_display_private *dp, u32 d= ata) { u32 state; int ret; - struct platform_device *pdev =3D dp->dp_display.pdev; + struct platform_device *pdev =3D dp->msm_dp_display.pdev; =20 - dp_aux_enable_xfers(dp->aux, true); + msm_dp_aux_enable_xfers(dp->aux, true); =20 mutex_lock(&dp->event_mutex); =20 state =3D dp->hpd_state; drm_dbg_dp(dp->drm_dev, "Before, type=3D%d hpd_state=3D%d\n", - dp->dp_display.connector_type, state); + dp->msm_dp_display.connector_type, state); =20 if (state =3D=3D ST_DISPLAY_OFF) { mutex_unlock(&dp->event_mutex); @@ -574,7 +574,7 @@ static int dp_hpd_plug_handle(struct dp_display_private= *dp, u32 data) =20 if (state =3D=3D ST_DISCONNECT_PENDING) { /* wait until ST_DISCONNECTED */ - dp_add_event(dp, EV_HPD_PLUG_INT, 0, 1); /* delay =3D 1 */ + msm_dp_add_event(dp, EV_HPD_PLUG_INT, 0, 1); /* delay =3D 1 */ mutex_unlock(&dp->event_mutex); return 0; } @@ -586,7 +586,7 @@ static int dp_hpd_plug_handle(struct dp_display_private= *dp, u32 data) return ret; } =20 - ret =3D dp_display_usbpd_configure_cb(&pdev->dev); + ret =3D msm_dp_display_usbpd_configure_cb(&pdev->dev); if (ret) { /* link train failed */ dp->hpd_state =3D ST_DISCONNECTED; pm_runtime_put_sync(&pdev->dev); @@ -595,60 +595,60 @@ static int dp_hpd_plug_handle(struct dp_display_priva= te *dp, u32 data) } =20 drm_dbg_dp(dp->drm_dev, "After, type=3D%d hpd_state=3D%d\n", - dp->dp_display.connector_type, state); + dp->msm_dp_display.connector_type, state); mutex_unlock(&dp->event_mutex); =20 /* uevent will complete connection part */ return 0; }; =20 -static void dp_display_handle_plugged_change(struct msm_dp *dp_display, +static void msm_dp_display_handle_plugged_change(struct msm_dp *msm_dp_dis= play, bool plugged) { - struct dp_display_private *dp; + struct msm_dp_display_private *dp; =20 - dp =3D container_of(dp_display, - struct dp_display_private, dp_display); + dp =3D container_of(msm_dp_display, + struct msm_dp_display_private, msm_dp_display); =20 /* notify audio subsystem only if sink supports audio */ - if (dp_display->plugged_cb && dp_display->codec_dev && + if (msm_dp_display->plugged_cb && msm_dp_display->codec_dev && dp->audio_supported) - dp_display->plugged_cb(dp_display->codec_dev, plugged); + msm_dp_display->plugged_cb(msm_dp_display->codec_dev, plugged); } =20 -static int dp_hpd_unplug_handle(struct dp_display_private *dp, u32 data) +static int msm_dp_hpd_unplug_handle(struct msm_dp_display_private *dp, u32= data) { u32 state; - struct platform_device *pdev =3D dp->dp_display.pdev; + struct platform_device *pdev =3D dp->msm_dp_display.pdev; =20 - dp_aux_enable_xfers(dp->aux, false); + msm_dp_aux_enable_xfers(dp->aux, false); =20 mutex_lock(&dp->event_mutex); =20 state =3D dp->hpd_state; =20 drm_dbg_dp(dp->drm_dev, "Before, type=3D%d hpd_state=3D%d\n", - dp->dp_display.connector_type, state); + dp->msm_dp_display.connector_type, state); =20 /* unplugged, no more irq_hpd handle */ - dp_del_event(dp, EV_IRQ_HPD_INT); + msm_dp_del_event(dp, EV_IRQ_HPD_INT); =20 if (state =3D=3D ST_DISCONNECTED) { /* triggered by irq_hdp with sink_count =3D 0 */ if (dp->link->sink_count =3D=3D 0) { - dp_display_host_phy_exit(dp); + msm_dp_display_host_phy_exit(dp); } - dp_display_notify_disconnect(&dp->dp_display.pdev->dev); + msm_dp_display_notify_disconnect(&dp->msm_dp_display.pdev->dev); mutex_unlock(&dp->event_mutex); return 0; } else if (state =3D=3D ST_DISCONNECT_PENDING) { mutex_unlock(&dp->event_mutex); return 0; } else if (state =3D=3D ST_MAINLINK_READY) { - dp_ctrl_off_link(dp->ctrl); - dp_display_host_phy_exit(dp); + msm_dp_ctrl_off_link(dp->ctrl); + msm_dp_display_host_phy_exit(dp); dp->hpd_state =3D ST_DISCONNECTED; - dp_display_notify_disconnect(&dp->dp_display.pdev->dev); + msm_dp_display_notify_disconnect(&dp->msm_dp_display.pdev->dev); pm_runtime_put_sync(&pdev->dev); mutex_unlock(&dp->event_mutex); return 0; @@ -658,7 +658,7 @@ static int dp_hpd_unplug_handle(struct dp_display_priva= te *dp, u32 data) * We don't need separate work for disconnect as * connect/attention interrupts are disabled */ - dp_display_notify_disconnect(&dp->dp_display.pdev->dev); + msm_dp_display_notify_disconnect(&dp->msm_dp_display.pdev->dev); =20 if (state =3D=3D ST_DISPLAY_OFF) { dp->hpd_state =3D ST_DISCONNECTED; @@ -667,10 +667,10 @@ static int dp_hpd_unplug_handle(struct dp_display_pri= vate *dp, u32 data) } =20 /* signal the disconnect event early to ensure proper teardown */ - dp_display_handle_plugged_change(&dp->dp_display, false); + msm_dp_display_handle_plugged_change(&dp->msm_dp_display, false); =20 drm_dbg_dp(dp->drm_dev, "After, type=3D%d hpd_state=3D%d\n", - dp->dp_display.connector_type, state); + dp->msm_dp_display.connector_type, state); =20 /* uevent will complete disconnection part */ pm_runtime_put_sync(&pdev->dev); @@ -678,7 +678,7 @@ static int dp_hpd_unplug_handle(struct dp_display_priva= te *dp, u32 data) return 0; } =20 -static int dp_irq_hpd_handle(struct dp_display_private *dp, u32 data) +static int msm_dp_irq_hpd_handle(struct msm_dp_display_private *dp, u32 da= ta) { u32 state; =20 @@ -687,7 +687,7 @@ static int dp_irq_hpd_handle(struct dp_display_private = *dp, u32 data) /* irq_hpd can happen at either connected or disconnected state */ state =3D dp->hpd_state; drm_dbg_dp(dp->drm_dev, "Before, type=3D%d hpd_state=3D%d\n", - dp->dp_display.connector_type, state); + dp->msm_dp_display.connector_type, state); =20 if (state =3D=3D ST_DISPLAY_OFF) { mutex_unlock(&dp->event_mutex); @@ -696,33 +696,33 @@ static int dp_irq_hpd_handle(struct dp_display_privat= e *dp, u32 data) =20 if (state =3D=3D ST_MAINLINK_READY || state =3D=3D ST_DISCONNECT_PENDING)= { /* wait until ST_CONNECTED */ - dp_add_event(dp, EV_IRQ_HPD_INT, 0, 1); /* delay =3D 1 */ + msm_dp_add_event(dp, EV_IRQ_HPD_INT, 0, 1); /* delay =3D 1 */ mutex_unlock(&dp->event_mutex); return 0; } =20 - dp_display_usbpd_attention_cb(&dp->dp_display.pdev->dev); + msm_dp_display_usbpd_attention_cb(&dp->msm_dp_display.pdev->dev); =20 drm_dbg_dp(dp->drm_dev, "After, type=3D%d hpd_state=3D%d\n", - dp->dp_display.connector_type, state); + dp->msm_dp_display.connector_type, state); =20 mutex_unlock(&dp->event_mutex); =20 return 0; } =20 -static void dp_display_deinit_sub_modules(struct dp_display_private *dp) +static void msm_dp_display_deinit_sub_modules(struct msm_dp_display_privat= e *dp) { - dp_audio_put(dp->audio); - dp_panel_put(dp->panel); - dp_aux_put(dp->aux); + msm_dp_audio_put(dp->audio); + msm_dp_panel_put(dp->panel); + msm_dp_aux_put(dp->aux); } =20 -static int dp_init_sub_modules(struct dp_display_private *dp) +static int msm_dp_init_sub_modules(struct msm_dp_display_private *dp) { int rc =3D 0; - struct device *dev =3D &dp->dp_display.pdev->dev; - struct dp_panel_in panel_in =3D { + struct device *dev =3D &dp->msm_dp_display.pdev->dev; + struct msm_dp_panel_in panel_in =3D { .dev =3D dev, }; struct phy *phy; @@ -732,14 +732,14 @@ static int dp_init_sub_modules(struct dp_display_priv= ate *dp) return PTR_ERR(phy); =20 rc =3D phy_set_mode_ext(phy, PHY_MODE_DP, - dp->dp_display.is_edp ? PHY_SUBMODE_EDP : PHY_SUBMODE_DP); + dp->msm_dp_display.is_edp ? PHY_SUBMODE_EDP : PHY_SUBMODE_DP); if (rc) { DRM_ERROR("failed to set phy submode, rc =3D %d\n", rc); dp->catalog =3D NULL; goto error; } =20 - dp->catalog =3D dp_catalog_get(dev); + dp->catalog =3D msm_dp_catalog_get(dev); if (IS_ERR(dp->catalog)) { rc =3D PTR_ERR(dp->catalog); DRM_ERROR("failed to initialize catalog, rc =3D %d\n", rc); @@ -747,9 +747,9 @@ static int dp_init_sub_modules(struct dp_display_privat= e *dp) goto error; } =20 - dp->aux =3D dp_aux_get(dev, dp->catalog, + dp->aux =3D msm_dp_aux_get(dev, dp->catalog, phy, - dp->dp_display.is_edp); + dp->msm_dp_display.is_edp); if (IS_ERR(dp->aux)) { rc =3D PTR_ERR(dp->aux); DRM_ERROR("failed to initialize aux, rc =3D %d\n", rc); @@ -757,7 +757,7 @@ static int dp_init_sub_modules(struct dp_display_privat= e *dp) goto error; } =20 - dp->link =3D dp_link_get(dev, dp->aux); + dp->link =3D msm_dp_link_get(dev, dp->aux); if (IS_ERR(dp->link)) { rc =3D PTR_ERR(dp->link); DRM_ERROR("failed to initialize link, rc =3D %d\n", rc); @@ -769,7 +769,7 @@ static int dp_init_sub_modules(struct dp_display_privat= e *dp) panel_in.catalog =3D dp->catalog; panel_in.link =3D dp->link; =20 - dp->panel =3D dp_panel_get(&panel_in); + dp->panel =3D msm_dp_panel_get(&panel_in); if (IS_ERR(dp->panel)) { rc =3D PTR_ERR(dp->panel); DRM_ERROR("failed to initialize panel, rc =3D %d\n", rc); @@ -777,7 +777,7 @@ static int dp_init_sub_modules(struct dp_display_privat= e *dp) goto error_link; } =20 - dp->ctrl =3D dp_ctrl_get(dev, dp->link, dp->panel, dp->aux, + dp->ctrl =3D msm_dp_ctrl_get(dev, dp->link, dp->panel, dp->aux, dp->catalog, phy); if (IS_ERR(dp->ctrl)) { @@ -787,7 +787,7 @@ static int dp_init_sub_modules(struct dp_display_privat= e *dp) goto error_ctrl; } =20 - dp->audio =3D dp_audio_get(dp->dp_display.pdev, dp->panel, dp->catalog); + dp->audio =3D msm_dp_audio_get(dp->msm_dp_display.pdev, dp->panel, dp->ca= talog); if (IS_ERR(dp->audio)) { rc =3D PTR_ERR(dp->audio); pr_err("failed to initialize audio, rc =3D %d\n", rc); @@ -798,51 +798,51 @@ static int dp_init_sub_modules(struct dp_display_priv= ate *dp) return rc; =20 error_ctrl: - dp_panel_put(dp->panel); + msm_dp_panel_put(dp->panel); error_link: - dp_aux_put(dp->aux); + msm_dp_aux_put(dp->aux); error: return rc; } =20 -static int dp_display_set_mode(struct msm_dp *dp_display, - struct dp_display_mode *mode) +static int msm_dp_display_set_mode(struct msm_dp *msm_dp_display, + struct msm_dp_display_mode *mode) { - struct dp_display_private *dp; + struct msm_dp_display_private *dp; =20 - dp =3D container_of(dp_display, struct dp_display_private, dp_display); + dp =3D container_of(msm_dp_display, struct msm_dp_display_private, msm_dp= _display); =20 - drm_mode_copy(&dp->panel->dp_mode.drm_mode, &mode->drm_mode); - dp->panel->dp_mode.bpp =3D mode->bpp; - dp->panel->dp_mode.out_fmt_is_yuv_420 =3D mode->out_fmt_is_yuv_420; - dp_panel_init_panel_info(dp->panel); + drm_mode_copy(&dp->panel->msm_dp_mode.drm_mode, &mode->drm_mode); + dp->panel->msm_dp_mode.bpp =3D mode->bpp; + dp->panel->msm_dp_mode.out_fmt_is_yuv_420 =3D mode->out_fmt_is_yuv_420; + msm_dp_panel_init_panel_info(dp->panel); return 0; } =20 -static int dp_display_enable(struct dp_display_private *dp, bool force_lin= k_train) +static int msm_dp_display_enable(struct msm_dp_display_private *dp, bool f= orce_link_train) { int rc =3D 0; - struct msm_dp *dp_display =3D &dp->dp_display; + struct msm_dp *msm_dp_display =3D &dp->msm_dp_display; =20 drm_dbg_dp(dp->drm_dev, "sink_count=3D%d\n", dp->link->sink_count); - if (dp_display->power_on) { + if (msm_dp_display->power_on) { drm_dbg_dp(dp->drm_dev, "Link already setup, return\n"); return 0; } =20 - rc =3D dp_ctrl_on_stream(dp->ctrl, force_link_train); + rc =3D msm_dp_ctrl_on_stream(dp->ctrl, force_link_train); if (!rc) - dp_display->power_on =3D true; + msm_dp_display->power_on =3D true; =20 return rc; } =20 -static int dp_display_post_enable(struct msm_dp *dp_display) +static int msm_dp_display_post_enable(struct msm_dp *msm_dp_display) { - struct dp_display_private *dp; + struct msm_dp_display_private *dp; u32 rate; =20 - dp =3D container_of(dp_display, struct dp_display_private, dp_display); + dp =3D container_of(msm_dp_display, struct msm_dp_display_private, msm_dp= _display); =20 rate =3D dp->link->link_params.rate; =20 @@ -852,85 +852,85 @@ static int dp_display_post_enable(struct msm_dp *dp_d= isplay) } =20 /* signal the connect event late to synchronize video and display */ - dp_display_handle_plugged_change(dp_display, true); + msm_dp_display_handle_plugged_change(msm_dp_display, true); =20 - if (dp_display->psr_supported) - dp_ctrl_config_psr(dp->ctrl); + if (msm_dp_display->psr_supported) + msm_dp_ctrl_config_psr(dp->ctrl); =20 return 0; } =20 -static int dp_display_disable(struct dp_display_private *dp) +static int msm_dp_display_disable(struct msm_dp_display_private *dp) { - struct msm_dp *dp_display =3D &dp->dp_display; + struct msm_dp *msm_dp_display =3D &dp->msm_dp_display; =20 - if (!dp_display->power_on) + if (!msm_dp_display->power_on) return 0; =20 /* wait only if audio was enabled */ - if (dp_display->audio_enabled) { + if (msm_dp_display->audio_enabled) { /* signal the disconnect event */ - dp_display_handle_plugged_change(dp_display, false); + msm_dp_display_handle_plugged_change(msm_dp_display, false); if (!wait_for_completion_timeout(&dp->audio_comp, HZ * 5)) DRM_ERROR("audio comp timeout\n"); } =20 - dp_display->audio_enabled =3D false; + msm_dp_display->audio_enabled =3D false; =20 if (dp->link->sink_count =3D=3D 0) { /* * irq_hpd with sink_count =3D 0 * hdmi unplugged out of dongle */ - dp_ctrl_off_link_stream(dp->ctrl); + msm_dp_ctrl_off_link_stream(dp->ctrl); } else { /* * unplugged interrupt * dongle unplugged out of DUT */ - dp_ctrl_off(dp->ctrl); - dp_display_host_phy_exit(dp); + msm_dp_ctrl_off(dp->ctrl); + msm_dp_display_host_phy_exit(dp); } =20 - dp_display->power_on =3D false; + msm_dp_display->power_on =3D false; =20 drm_dbg_dp(dp->drm_dev, "sink count: %d\n", dp->link->sink_count); return 0; } =20 -int dp_display_set_plugged_cb(struct msm_dp *dp_display, +int msm_dp_display_set_plugged_cb(struct msm_dp *msm_dp_display, hdmi_codec_plugged_cb fn, struct device *codec_dev) { bool plugged; =20 - dp_display->plugged_cb =3D fn; - dp_display->codec_dev =3D codec_dev; - plugged =3D dp_display->link_ready; - dp_display_handle_plugged_change(dp_display, plugged); + msm_dp_display->plugged_cb =3D fn; + msm_dp_display->codec_dev =3D codec_dev; + plugged =3D msm_dp_display->link_ready; + msm_dp_display_handle_plugged_change(msm_dp_display, plugged); =20 return 0; } =20 /** - * dp_bridge_mode_valid - callback to determine if specified mode is valid + * msm_dp_bridge_mode_valid - callback to determine if specified mode is v= alid * @bridge: Pointer to drm bridge structure * @info: display info * @mode: Pointer to drm mode structure * Returns: Validity status for specified mode */ -enum drm_mode_status dp_bridge_mode_valid(struct drm_bridge *bridge, +enum drm_mode_status msm_dp_bridge_mode_valid(struct drm_bridge *bridge, const struct drm_display_info *info, const struct drm_display_mode *mode) { const u32 num_components =3D 3, default_bpp =3D 24; - struct dp_display_private *dp_display; - struct dp_link_info *link_info; + struct msm_dp_display_private *msm_dp_display; + struct msm_dp_link_info *link_info; u32 mode_rate_khz =3D 0, supported_rate_khz =3D 0, mode_bpp =3D 0; struct msm_dp *dp; int mode_pclk_khz =3D mode->clock; =20 - dp =3D to_dp_bridge(bridge)->dp_display; + dp =3D to_dp_bridge(bridge)->msm_dp_display; =20 if (!dp || !mode_pclk_khz || !dp->connector) { DRM_ERROR("invalid params\n"); @@ -940,18 +940,18 @@ enum drm_mode_status dp_bridge_mode_valid(struct drm_= bridge *bridge, if (mode->clock > DP_MAX_PIXEL_CLK_KHZ) return MODE_CLOCK_HIGH; =20 - dp_display =3D container_of(dp, struct dp_display_private, dp_display); - link_info =3D &dp_display->panel->link_info; + msm_dp_display =3D container_of(dp, struct msm_dp_display_private, msm_dp= _display); + link_info =3D &msm_dp_display->panel->link_info; =20 if (drm_mode_is_420_only(&dp->connector->display_info, mode) && - dp_display->panel->vsc_sdp_supported) + msm_dp_display->panel->vsc_sdp_supported) mode_pclk_khz /=3D 2; =20 mode_bpp =3D dp->connector->display_info.bpc * num_components; if (!mode_bpp) mode_bpp =3D default_bpp; =20 - mode_bpp =3D dp_panel_get_mode_bpp(dp_display->panel, + mode_bpp =3D msm_dp_panel_get_mode_bpp(msm_dp_display->panel, mode_bpp, mode_pclk_khz); =20 mode_rate_khz =3D mode_pclk_khz * mode_bpp; @@ -963,50 +963,50 @@ enum drm_mode_status dp_bridge_mode_valid(struct drm_= bridge *bridge, return MODE_OK; } =20 -int dp_display_get_modes(struct msm_dp *dp) +int msm_dp_display_get_modes(struct msm_dp *dp) { - struct dp_display_private *dp_display; + struct msm_dp_display_private *msm_dp_display; =20 if (!dp) { DRM_ERROR("invalid params\n"); return 0; } =20 - dp_display =3D container_of(dp, struct dp_display_private, dp_display); + msm_dp_display =3D container_of(dp, struct msm_dp_display_private, msm_dp= _display); =20 - return dp_panel_get_modes(dp_display->panel, + return msm_dp_panel_get_modes(msm_dp_display->panel, dp->connector); } =20 -bool dp_display_check_video_test(struct msm_dp *dp) +bool msm_dp_display_check_video_test(struct msm_dp *dp) { - struct dp_display_private *dp_display; + struct msm_dp_display_private *msm_dp_display; =20 - dp_display =3D container_of(dp, struct dp_display_private, dp_display); + msm_dp_display =3D container_of(dp, struct msm_dp_display_private, msm_dp= _display); =20 - return dp_display->panel->video_test; + return msm_dp_display->panel->video_test; } =20 -int dp_display_get_test_bpp(struct msm_dp *dp) +int msm_dp_display_get_test_bpp(struct msm_dp *dp) { - struct dp_display_private *dp_display; + struct msm_dp_display_private *msm_dp_display; =20 if (!dp) { DRM_ERROR("invalid params\n"); return 0; } =20 - dp_display =3D container_of(dp, struct dp_display_private, dp_display); + msm_dp_display =3D container_of(dp, struct msm_dp_display_private, msm_dp= _display); =20 - return dp_link_bit_depth_to_bpp( - dp_display->link->test_video.test_bit_depth); + return msm_dp_link_bit_depth_to_bpp( + msm_dp_display->link->test_video.test_bit_depth); } =20 void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp) { - struct dp_display_private *dp_display; + struct msm_dp_display_private *msm_dp_display; =20 - dp_display =3D container_of(dp, struct dp_display_private, dp_display); + msm_dp_display =3D container_of(dp, struct msm_dp_display_private, msm_dp= _display); =20 /* * if we are reading registers we need the link clocks to be on @@ -1015,65 +1015,65 @@ void msm_dp_snapshot(struct msm_disp_state *disp_st= ate, struct msm_dp *dp) * power_on status before dumping DP registers to avoid crash due * to unclocked access */ - mutex_lock(&dp_display->event_mutex); + mutex_lock(&msm_dp_display->event_mutex); =20 if (!dp->power_on) { - mutex_unlock(&dp_display->event_mutex); + mutex_unlock(&msm_dp_display->event_mutex); return; } =20 - dp_catalog_snapshot(dp_display->catalog, disp_state); + msm_dp_catalog_snapshot(msm_dp_display->catalog, disp_state); =20 - mutex_unlock(&dp_display->event_mutex); + mutex_unlock(&msm_dp_display->event_mutex); } =20 -void dp_display_set_psr(struct msm_dp *dp_display, bool enter) +void msm_dp_display_set_psr(struct msm_dp *msm_dp_display, bool enter) { - struct dp_display_private *dp; + struct msm_dp_display_private *dp; =20 - if (!dp_display) { + if (!msm_dp_display) { DRM_ERROR("invalid params\n"); return; } =20 - dp =3D container_of(dp_display, struct dp_display_private, dp_display); - dp_ctrl_set_psr(dp->ctrl, enter); + dp =3D container_of(msm_dp_display, struct msm_dp_display_private, msm_dp= _display); + msm_dp_ctrl_set_psr(dp->ctrl, enter); } =20 static int hpd_event_thread(void *data) { - struct dp_display_private *dp_priv; + struct msm_dp_display_private *msm_dp_priv; unsigned long flag; - struct dp_event *todo; + struct msm_dp_event *todo; int timeout_mode =3D 0; =20 - dp_priv =3D (struct dp_display_private *)data; + msm_dp_priv =3D (struct msm_dp_display_private *)data; =20 while (1) { if (timeout_mode) { - wait_event_timeout(dp_priv->event_q, - (dp_priv->event_pndx =3D=3D dp_priv->event_gndx) || + wait_event_timeout(msm_dp_priv->event_q, + (msm_dp_priv->event_pndx =3D=3D msm_dp_priv->event_gndx) || kthread_should_stop(), EVENT_TIMEOUT); } else { - wait_event_interruptible(dp_priv->event_q, - (dp_priv->event_pndx !=3D dp_priv->event_gndx) || + wait_event_interruptible(msm_dp_priv->event_q, + (msm_dp_priv->event_pndx !=3D msm_dp_priv->event_gndx) || kthread_should_stop()); } =20 if (kthread_should_stop()) break; =20 - spin_lock_irqsave(&dp_priv->event_lock, flag); - todo =3D &dp_priv->event_list[dp_priv->event_gndx]; + spin_lock_irqsave(&msm_dp_priv->event_lock, flag); + todo =3D &msm_dp_priv->event_list[msm_dp_priv->event_gndx]; if (todo->delay) { - struct dp_event *todo_next; + struct msm_dp_event *todo_next; =20 - dp_priv->event_gndx++; - dp_priv->event_gndx %=3D DP_EVENT_Q_MAX; + msm_dp_priv->event_gndx++; + msm_dp_priv->event_gndx %=3D DP_EVENT_Q_MAX; =20 /* re enter delay event into q */ - todo_next =3D &dp_priv->event_list[dp_priv->event_pndx++]; - dp_priv->event_pndx %=3D DP_EVENT_Q_MAX; + todo_next =3D &msm_dp_priv->event_list[msm_dp_priv->event_pndx++]; + msm_dp_priv->event_pndx %=3D DP_EVENT_Q_MAX; todo_next->event_id =3D todo->event_id; todo_next->data =3D todo->data; todo_next->delay =3D todo->delay - 1; @@ -1084,33 +1084,33 @@ static int hpd_event_thread(void *data) =20 /* switch to timeout mode */ timeout_mode =3D 1; - spin_unlock_irqrestore(&dp_priv->event_lock, flag); + spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag); continue; } =20 /* timeout with no events in q */ - if (dp_priv->event_pndx =3D=3D dp_priv->event_gndx) { - spin_unlock_irqrestore(&dp_priv->event_lock, flag); + if (msm_dp_priv->event_pndx =3D=3D msm_dp_priv->event_gndx) { + spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag); continue; } =20 - dp_priv->event_gndx++; - dp_priv->event_gndx %=3D DP_EVENT_Q_MAX; + msm_dp_priv->event_gndx++; + msm_dp_priv->event_gndx %=3D DP_EVENT_Q_MAX; timeout_mode =3D 0; - spin_unlock_irqrestore(&dp_priv->event_lock, flag); + spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag); =20 switch (todo->event_id) { case EV_HPD_PLUG_INT: - dp_hpd_plug_handle(dp_priv, todo->data); + msm_dp_hpd_plug_handle(msm_dp_priv, todo->data); break; case EV_HPD_UNPLUG_INT: - dp_hpd_unplug_handle(dp_priv, todo->data); + msm_dp_hpd_unplug_handle(msm_dp_priv, todo->data); break; case EV_IRQ_HPD_INT: - dp_irq_hpd_handle(dp_priv, todo->data); + msm_dp_irq_hpd_handle(msm_dp_priv, todo->data); break; case EV_USER_NOTIFICATION: - dp_display_send_hpd_notification(dp_priv, + msm_dp_display_send_hpd_notification(msm_dp_priv, todo->data); break; default: @@ -1121,22 +1121,22 @@ static int hpd_event_thread(void *data) return 0; } =20 -static int dp_hpd_event_thread_start(struct dp_display_private *dp_priv) +static int msm_dp_hpd_event_thread_start(struct msm_dp_display_private *ms= m_dp_priv) { /* set event q to empty */ - dp_priv->event_gndx =3D 0; - dp_priv->event_pndx =3D 0; + msm_dp_priv->event_gndx =3D 0; + msm_dp_priv->event_pndx =3D 0; =20 - dp_priv->ev_tsk =3D kthread_run(hpd_event_thread, dp_priv, "dp_hpd_handle= r"); - if (IS_ERR(dp_priv->ev_tsk)) - return PTR_ERR(dp_priv->ev_tsk); + msm_dp_priv->ev_tsk =3D kthread_run(hpd_event_thread, msm_dp_priv, "dp_hp= d_handler"); + if (IS_ERR(msm_dp_priv->ev_tsk)) + return PTR_ERR(msm_dp_priv->ev_tsk); =20 return 0; } =20 -static irqreturn_t dp_display_irq_handler(int irq, void *dev_id) +static irqreturn_t msm_dp_display_irq_handler(int irq, void *dev_id) { - struct dp_display_private *dp =3D dev_id; + struct msm_dp_display_private *dp =3D dev_id; irqreturn_t ret =3D IRQ_NONE; u32 hpd_isr_status; =20 @@ -1145,43 +1145,43 @@ static irqreturn_t dp_display_irq_handler(int irq, = void *dev_id) return IRQ_NONE; } =20 - hpd_isr_status =3D dp_catalog_hpd_get_intr_status(dp->catalog); + hpd_isr_status =3D msm_dp_catalog_hpd_get_intr_status(dp->catalog); =20 if (hpd_isr_status & 0x0F) { drm_dbg_dp(dp->drm_dev, "type=3D%d isr=3D0x%x\n", - dp->dp_display.connector_type, hpd_isr_status); + dp->msm_dp_display.connector_type, hpd_isr_status); /* hpd related interrupts */ if (hpd_isr_status & DP_DP_HPD_PLUG_INT_MASK) - dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0); + msm_dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0); =20 if (hpd_isr_status & DP_DP_IRQ_HPD_INT_MASK) { - dp_add_event(dp, EV_IRQ_HPD_INT, 0, 0); + msm_dp_add_event(dp, EV_IRQ_HPD_INT, 0, 0); } =20 if (hpd_isr_status & DP_DP_HPD_REPLUG_INT_MASK) { - dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0); - dp_add_event(dp, EV_HPD_PLUG_INT, 0, 3); + msm_dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0); + msm_dp_add_event(dp, EV_HPD_PLUG_INT, 0, 3); } =20 if (hpd_isr_status & DP_DP_HPD_UNPLUG_INT_MASK) - dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0); + msm_dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0); =20 ret =3D IRQ_HANDLED; } =20 /* DP controller isr */ - ret |=3D dp_ctrl_isr(dp->ctrl); + ret |=3D msm_dp_ctrl_isr(dp->ctrl); =20 /* DP aux isr */ - ret |=3D dp_aux_isr(dp->aux); + ret |=3D msm_dp_aux_isr(dp->aux); =20 return ret; } =20 -static int dp_display_request_irq(struct dp_display_private *dp) +static int msm_dp_display_request_irq(struct msm_dp_display_private *dp) { int rc =3D 0; - struct platform_device *pdev =3D dp->dp_display.pdev; + struct platform_device *pdev =3D dp->msm_dp_display.pdev; =20 dp->irq =3D platform_get_irq(pdev, 0); if (dp->irq < 0) { @@ -1189,7 +1189,7 @@ static int dp_display_request_irq(struct dp_display_p= rivate *dp) return dp->irq; } =20 - rc =3D devm_request_irq(&pdev->dev, dp->irq, dp_display_irq_handler, + rc =3D devm_request_irq(&pdev->dev, dp->irq, msm_dp_display_irq_handler, IRQF_TRIGGER_HIGH|IRQF_NO_AUTOEN, "dp_display_isr", dp); =20 @@ -1202,7 +1202,7 @@ static int dp_display_request_irq(struct dp_display_p= rivate *dp) return 0; } =20 -static const struct msm_dp_desc *dp_display_get_desc(struct platform_devic= e *pdev) +static const struct msm_dp_desc *msm_dp_display_get_desc(struct platform_d= evice *pdev) { const struct msm_dp_desc *descs =3D of_device_get_match_data(&pdev->dev); struct resource *res; @@ -1221,7 +1221,7 @@ static const struct msm_dp_desc *dp_display_get_desc(= struct platform_device *pde return NULL; } =20 -static int dp_display_probe_tail(struct device *dev) +static int msm_dp_display_probe_tail(struct device *dev) { struct msm_dp *dp =3D dev_get_drvdata(dev); int ret; @@ -1241,19 +1241,19 @@ static int dp_display_probe_tail(struct device *dev) return ret; } =20 - ret =3D component_add(dev, &dp_display_comp_ops); + ret =3D component_add(dev, &msm_dp_display_comp_ops); if (ret) DRM_ERROR("component add failed, rc=3D%d\n", ret); =20 return ret; } =20 -static int dp_auxbus_done_probe(struct drm_dp_aux *aux) +static int msm_dp_auxbus_done_probe(struct drm_dp_aux *aux) { - return dp_display_probe_tail(aux->dev); + return msm_dp_display_probe_tail(aux->dev); } =20 -static int dp_display_get_connector_type(struct platform_device *pdev, +static int msm_dp_display_get_connector_type(struct platform_device *pdev, const struct msm_dp_desc *desc) { struct device_node *node =3D pdev->dev.of_node; @@ -1272,10 +1272,10 @@ static int dp_display_get_connector_type(struct pla= tform_device *pdev, return connector_type; } =20 -static int dp_display_probe(struct platform_device *pdev) +static int msm_dp_display_probe(struct platform_device *pdev) { int rc =3D 0; - struct dp_display_private *dp; + struct msm_dp_display_private *dp; const struct msm_dp_desc *desc; =20 if (!pdev || !pdev->dev.of_node) { @@ -1287,18 +1287,18 @@ static int dp_display_probe(struct platform_device = *pdev) if (!dp) return -ENOMEM; =20 - desc =3D dp_display_get_desc(pdev); + desc =3D msm_dp_display_get_desc(pdev); if (!desc) return -EINVAL; =20 - dp->dp_display.pdev =3D pdev; + dp->msm_dp_display.pdev =3D pdev; dp->id =3D desc->id; - dp->dp_display.connector_type =3D dp_display_get_connector_type(pdev, des= c); + dp->msm_dp_display.connector_type =3D msm_dp_display_get_connector_type(p= dev, desc); dp->wide_bus_supported =3D desc->wide_bus_supported; - dp->dp_display.is_edp =3D - (dp->dp_display.connector_type =3D=3D DRM_MODE_CONNECTOR_eDP); + dp->msm_dp_display.is_edp =3D + (dp->msm_dp_display.connector_type =3D=3D DRM_MODE_CONNECTOR_eDP); =20 - rc =3D dp_init_sub_modules(dp); + rc =3D msm_dp_init_sub_modules(dp); if (rc) { DRM_ERROR("init sub module failed\n"); return -EPROBE_DEFER; @@ -1310,28 +1310,28 @@ static int dp_display_probe(struct platform_device = *pdev) spin_lock_init(&dp->event_lock); =20 /* Store DP audio handle inside DP display */ - dp->dp_display.dp_audio =3D dp->audio; + dp->msm_dp_display.msm_dp_audio =3D dp->audio; =20 init_completion(&dp->audio_comp); =20 - platform_set_drvdata(pdev, &dp->dp_display); + platform_set_drvdata(pdev, &dp->msm_dp_display); =20 rc =3D devm_pm_runtime_enable(&pdev->dev); if (rc) goto err; =20 - rc =3D dp_display_request_irq(dp); + rc =3D msm_dp_display_request_irq(dp); if (rc) goto err; =20 - if (dp->dp_display.is_edp) { - rc =3D devm_of_dp_aux_populate_bus(dp->aux, dp_auxbus_done_probe); + if (dp->msm_dp_display.is_edp) { + rc =3D devm_of_dp_aux_populate_bus(dp->aux, msm_dp_auxbus_done_probe); if (rc) { DRM_ERROR("eDP auxbus population failed, rc=3D%d\n", rc); goto err; } } else { - rc =3D dp_display_probe_tail(&pdev->dev); + rc =3D msm_dp_display_probe_tail(&pdev->dev); if (rc) goto err; } @@ -1339,70 +1339,70 @@ static int dp_display_probe(struct platform_device = *pdev) return rc; =20 err: - dp_display_deinit_sub_modules(dp); + msm_dp_display_deinit_sub_modules(dp); return rc; } =20 -static void dp_display_remove(struct platform_device *pdev) +static void msm_dp_display_remove(struct platform_device *pdev) { - struct dp_display_private *dp =3D dev_get_dp_display_private(&pdev->dev); + struct msm_dp_display_private *dp =3D dev_get_dp_display_private(&pdev->d= ev); =20 - component_del(&pdev->dev, &dp_display_comp_ops); - dp_display_deinit_sub_modules(dp); + component_del(&pdev->dev, &msm_dp_display_comp_ops); + msm_dp_display_deinit_sub_modules(dp); platform_set_drvdata(pdev, NULL); } =20 -static int dp_pm_runtime_suspend(struct device *dev) +static int msm_dp_pm_runtime_suspend(struct device *dev) { - struct dp_display_private *dp =3D dev_get_dp_display_private(dev); + struct msm_dp_display_private *dp =3D dev_get_dp_display_private(dev); =20 disable_irq(dp->irq); =20 - if (dp->dp_display.is_edp) { - dp_display_host_phy_exit(dp); - dp_catalog_ctrl_hpd_disable(dp->catalog); + if (dp->msm_dp_display.is_edp) { + msm_dp_display_host_phy_exit(dp); + msm_dp_catalog_ctrl_hpd_disable(dp->catalog); } - dp_display_host_deinit(dp); + msm_dp_display_host_deinit(dp); =20 return 0; } =20 -static int dp_pm_runtime_resume(struct device *dev) +static int msm_dp_pm_runtime_resume(struct device *dev) { - struct dp_display_private *dp =3D dev_get_dp_display_private(dev); + struct msm_dp_display_private *dp =3D dev_get_dp_display_private(dev); =20 /* * for eDP, host cotroller, HPD block and PHY are enabled here * but with HPD irq disabled * * for DP, only host controller is enabled here. - * HPD block is enabled at dp_bridge_hpd_enable() + * HPD block is enabled at msm_dp_bridge_hpd_enable() * PHY will be enabled at plugin handler later */ - dp_display_host_init(dp); - if (dp->dp_display.is_edp) { - dp_catalog_ctrl_hpd_enable(dp->catalog); - dp_display_host_phy_init(dp); + msm_dp_display_host_init(dp); + if (dp->msm_dp_display.is_edp) { + msm_dp_catalog_ctrl_hpd_enable(dp->catalog); + msm_dp_display_host_phy_init(dp); } =20 enable_irq(dp->irq); return 0; } =20 -static const struct dev_pm_ops dp_pm_ops =3D { - SET_RUNTIME_PM_OPS(dp_pm_runtime_suspend, dp_pm_runtime_resume, NULL) +static const struct dev_pm_ops msm_dp_pm_ops =3D { + SET_RUNTIME_PM_OPS(msm_dp_pm_runtime_suspend, msm_dp_pm_runtime_resume, N= ULL) SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume) }; =20 -static struct platform_driver dp_display_driver =3D { - .probe =3D dp_display_probe, - .remove_new =3D dp_display_remove, +static struct platform_driver msm_dp_display_driver =3D { + .probe =3D msm_dp_display_probe, + .remove_new =3D msm_dp_display_remove, .driver =3D { .name =3D "msm-dp-display", - .of_match_table =3D dp_dt_match, + .of_match_table =3D msm_dp_dt_match, .suppress_bind_attrs =3D true, - .pm =3D &dp_pm_ops, + .pm =3D &msm_dp_pm_ops, }, }; =20 @@ -1410,7 +1410,7 @@ int __init msm_dp_register(void) { int ret; =20 - ret =3D platform_driver_register(&dp_display_driver); + ret =3D platform_driver_register(&msm_dp_display_driver); if (ret) DRM_ERROR("Dp display driver register failed"); =20 @@ -1419,294 +1419,294 @@ int __init msm_dp_register(void) =20 void __exit msm_dp_unregister(void) { - platform_driver_unregister(&dp_display_driver); + platform_driver_unregister(&msm_dp_display_driver); } =20 -bool msm_dp_is_yuv_420_enabled(const struct msm_dp *dp_display, +bool msm_dp_is_yuv_420_enabled(const struct msm_dp *msm_dp_display, const struct drm_display_mode *mode) { - struct dp_display_private *dp; + struct msm_dp_display_private *dp; const struct drm_display_info *info; =20 - dp =3D container_of(dp_display, struct dp_display_private, dp_display); - info =3D &dp_display->connector->display_info; + dp =3D container_of(msm_dp_display, struct msm_dp_display_private, msm_dp= _display); + info =3D &msm_dp_display->connector->display_info; =20 return dp->panel->vsc_sdp_supported && drm_mode_is_420_only(info, mode); } =20 -bool msm_dp_needs_periph_flush(const struct msm_dp *dp_display, +bool msm_dp_needs_periph_flush(const struct msm_dp *msm_dp_display, const struct drm_display_mode *mode) { - return msm_dp_is_yuv_420_enabled(dp_display, mode); + return msm_dp_is_yuv_420_enabled(msm_dp_display, mode); } =20 -bool msm_dp_wide_bus_available(const struct msm_dp *dp_display) +bool msm_dp_wide_bus_available(const struct msm_dp *msm_dp_display) { - struct dp_display_private *dp; + struct msm_dp_display_private *dp; =20 - dp =3D container_of(dp_display, struct dp_display_private, dp_display); + dp =3D container_of(msm_dp_display, struct msm_dp_display_private, msm_dp= _display); =20 - if (dp->dp_mode.out_fmt_is_yuv_420) + if (dp->msm_dp_mode.out_fmt_is_yuv_420) return false; =20 return dp->wide_bus_supported; } =20 -void dp_display_debugfs_init(struct msm_dp *dp_display, struct dentry *roo= t, bool is_edp) +void msm_dp_display_debugfs_init(struct msm_dp *msm_dp_display, struct den= try *root, bool is_edp) { - struct dp_display_private *dp; + struct msm_dp_display_private *dp; struct device *dev; int rc; =20 - dp =3D container_of(dp_display, struct dp_display_private, dp_display); - dev =3D &dp->dp_display.pdev->dev; + dp =3D container_of(msm_dp_display, struct msm_dp_display_private, msm_dp= _display); + dev =3D &dp->msm_dp_display.pdev->dev; =20 - rc =3D dp_debug_init(dev, dp->panel, dp->link, dp->dp_display.connector, = root, is_edp); + rc =3D msm_dp_debug_init(dev, dp->panel, dp->link, dp->msm_dp_display.con= nector, root, is_edp); if (rc) DRM_ERROR("failed to initialize debug, rc =3D %d\n", rc); } =20 -int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev, +int msm_dp_modeset_init(struct msm_dp *msm_dp_display, struct drm_device *= dev, struct drm_encoder *encoder, bool yuv_supported) { - struct dp_display_private *dp_priv; + struct msm_dp_display_private *msm_dp_priv; int ret; =20 - dp_display->drm_dev =3D dev; + msm_dp_display->drm_dev =3D dev; =20 - dp_priv =3D container_of(dp_display, struct dp_display_private, dp_displa= y); + msm_dp_priv =3D container_of(msm_dp_display, struct msm_dp_display_privat= e, msm_dp_display); =20 - ret =3D dp_bridge_init(dp_display, dev, encoder, yuv_supported); + ret =3D msm_dp_bridge_init(msm_dp_display, dev, encoder, yuv_supported); if (ret) { DRM_DEV_ERROR(dev->dev, "failed to create dp bridge: %d\n", ret); return ret; } =20 - dp_display->connector =3D dp_drm_connector_init(dp_display, encoder); - if (IS_ERR(dp_display->connector)) { - ret =3D PTR_ERR(dp_display->connector); + msm_dp_display->connector =3D msm_dp_drm_connector_init(msm_dp_display, e= ncoder); + if (IS_ERR(msm_dp_display->connector)) { + ret =3D PTR_ERR(msm_dp_display->connector); DRM_DEV_ERROR(dev->dev, "failed to create dp connector: %d\n", ret); - dp_display->connector =3D NULL; + msm_dp_display->connector =3D NULL; return ret; } =20 - dp_priv->panel->connector =3D dp_display->connector; + msm_dp_priv->panel->connector =3D msm_dp_display->connector; =20 return 0; } =20 -void dp_bridge_atomic_enable(struct drm_bridge *drm_bridge, +void msm_dp_bridge_atomic_enable(struct drm_bridge *drm_bridge, struct drm_bridge_state *old_bridge_state) { - struct msm_dp_bridge *dp_bridge =3D to_dp_bridge(drm_bridge); - struct msm_dp *dp =3D dp_bridge->dp_display; + struct msm_dp_bridge *msm_dp_bridge =3D to_dp_bridge(drm_bridge); + struct msm_dp *dp =3D msm_dp_bridge->msm_dp_display; int rc =3D 0; - struct dp_display_private *dp_display; + struct msm_dp_display_private *msm_dp_display; u32 state; bool force_link_train =3D false; =20 - dp_display =3D container_of(dp, struct dp_display_private, dp_display); - if (!dp_display->dp_mode.drm_mode.clock) { + msm_dp_display =3D container_of(dp, struct msm_dp_display_private, msm_dp= _display); + if (!msm_dp_display->msm_dp_mode.drm_mode.clock) { DRM_ERROR("invalid params\n"); return; } =20 if (dp->is_edp) - dp_hpd_plug_handle(dp_display, 0); + msm_dp_hpd_plug_handle(msm_dp_display, 0); =20 - mutex_lock(&dp_display->event_mutex); + mutex_lock(&msm_dp_display->event_mutex); if (pm_runtime_resume_and_get(&dp->pdev->dev)) { DRM_ERROR("failed to pm_runtime_resume\n"); - mutex_unlock(&dp_display->event_mutex); + mutex_unlock(&msm_dp_display->event_mutex); return; } =20 - state =3D dp_display->hpd_state; + state =3D msm_dp_display->hpd_state; if (state !=3D ST_DISPLAY_OFF && state !=3D ST_MAINLINK_READY) { - mutex_unlock(&dp_display->event_mutex); + mutex_unlock(&msm_dp_display->event_mutex); return; } =20 - rc =3D dp_display_set_mode(dp, &dp_display->dp_mode); + rc =3D msm_dp_display_set_mode(dp, &msm_dp_display->msm_dp_mode); if (rc) { DRM_ERROR("Failed to perform a mode set, rc=3D%d\n", rc); - mutex_unlock(&dp_display->event_mutex); + mutex_unlock(&msm_dp_display->event_mutex); return; } =20 - state =3D dp_display->hpd_state; + state =3D msm_dp_display->hpd_state; =20 if (state =3D=3D ST_DISPLAY_OFF) { - dp_display_host_phy_init(dp_display); + msm_dp_display_host_phy_init(msm_dp_display); force_link_train =3D true; } =20 - dp_display_enable(dp_display, force_link_train); + msm_dp_display_enable(msm_dp_display, force_link_train); =20 - rc =3D dp_display_post_enable(dp); + rc =3D msm_dp_display_post_enable(dp); if (rc) { DRM_ERROR("DP display post enable failed, rc=3D%d\n", rc); - dp_display_disable(dp_display); + msm_dp_display_disable(msm_dp_display); } =20 /* completed connection */ - dp_display->hpd_state =3D ST_CONNECTED; + msm_dp_display->hpd_state =3D ST_CONNECTED; =20 drm_dbg_dp(dp->drm_dev, "type=3D%d Done\n", dp->connector_type); - mutex_unlock(&dp_display->event_mutex); + mutex_unlock(&msm_dp_display->event_mutex); } =20 -void dp_bridge_atomic_disable(struct drm_bridge *drm_bridge, +void msm_dp_bridge_atomic_disable(struct drm_bridge *drm_bridge, struct drm_bridge_state *old_bridge_state) { - struct msm_dp_bridge *dp_bridge =3D to_dp_bridge(drm_bridge); - struct msm_dp *dp =3D dp_bridge->dp_display; - struct dp_display_private *dp_display; + struct msm_dp_bridge *msm_dp_bridge =3D to_dp_bridge(drm_bridge); + struct msm_dp *dp =3D msm_dp_bridge->msm_dp_display; + struct msm_dp_display_private *msm_dp_display; =20 - dp_display =3D container_of(dp, struct dp_display_private, dp_display); + msm_dp_display =3D container_of(dp, struct msm_dp_display_private, msm_dp= _display); =20 - dp_ctrl_push_idle(dp_display->ctrl); + msm_dp_ctrl_push_idle(msm_dp_display->ctrl); } =20 -void dp_bridge_atomic_post_disable(struct drm_bridge *drm_bridge, +void msm_dp_bridge_atomic_post_disable(struct drm_bridge *drm_bridge, struct drm_bridge_state *old_bridge_state) { - struct msm_dp_bridge *dp_bridge =3D to_dp_bridge(drm_bridge); - struct msm_dp *dp =3D dp_bridge->dp_display; + struct msm_dp_bridge *msm_dp_bridge =3D to_dp_bridge(drm_bridge); + struct msm_dp *dp =3D msm_dp_bridge->msm_dp_display; u32 state; - struct dp_display_private *dp_display; + struct msm_dp_display_private *msm_dp_display; =20 - dp_display =3D container_of(dp, struct dp_display_private, dp_display); + msm_dp_display =3D container_of(dp, struct msm_dp_display_private, msm_dp= _display); =20 if (dp->is_edp) - dp_hpd_unplug_handle(dp_display, 0); + msm_dp_hpd_unplug_handle(msm_dp_display, 0); =20 - mutex_lock(&dp_display->event_mutex); + mutex_lock(&msm_dp_display->event_mutex); =20 - state =3D dp_display->hpd_state; + state =3D msm_dp_display->hpd_state; if (state !=3D ST_DISCONNECT_PENDING && state !=3D ST_CONNECTED) drm_dbg_dp(dp->drm_dev, "type=3D%d wrong hpd_state=3D%d\n", dp->connector_type, state); =20 - dp_display_disable(dp_display); + msm_dp_display_disable(msm_dp_display); =20 - state =3D dp_display->hpd_state; + state =3D msm_dp_display->hpd_state; if (state =3D=3D ST_DISCONNECT_PENDING) { /* completed disconnection */ - dp_display->hpd_state =3D ST_DISCONNECTED; + msm_dp_display->hpd_state =3D ST_DISCONNECTED; } else { - dp_display->hpd_state =3D ST_DISPLAY_OFF; + msm_dp_display->hpd_state =3D ST_DISPLAY_OFF; } =20 drm_dbg_dp(dp->drm_dev, "type=3D%d Done\n", dp->connector_type); =20 pm_runtime_put_sync(&dp->pdev->dev); - mutex_unlock(&dp_display->event_mutex); + mutex_unlock(&msm_dp_display->event_mutex); } =20 -void dp_bridge_mode_set(struct drm_bridge *drm_bridge, +void msm_dp_bridge_mode_set(struct drm_bridge *drm_bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode) { - struct msm_dp_bridge *dp_bridge =3D to_dp_bridge(drm_bridge); - struct msm_dp *dp =3D dp_bridge->dp_display; - struct dp_display_private *dp_display; - struct dp_panel *dp_panel; + struct msm_dp_bridge *msm_dp_bridge =3D to_dp_bridge(drm_bridge); + struct msm_dp *dp =3D msm_dp_bridge->msm_dp_display; + struct msm_dp_display_private *msm_dp_display; + struct msm_dp_panel *msm_dp_panel; =20 - dp_display =3D container_of(dp, struct dp_display_private, dp_display); - dp_panel =3D dp_display->panel; + msm_dp_display =3D container_of(dp, struct msm_dp_display_private, msm_dp= _display); + msm_dp_panel =3D msm_dp_display->panel; =20 - memset(&dp_display->dp_mode, 0x0, sizeof(struct dp_display_mode)); + memset(&msm_dp_display->msm_dp_mode, 0x0, sizeof(struct msm_dp_display_mo= de)); =20 - if (dp_display_check_video_test(dp)) - dp_display->dp_mode.bpp =3D dp_display_get_test_bpp(dp); + if (msm_dp_display_check_video_test(dp)) + msm_dp_display->msm_dp_mode.bpp =3D msm_dp_display_get_test_bpp(dp); else /* Default num_components per pixel =3D 3 */ - dp_display->dp_mode.bpp =3D dp->connector->display_info.bpc * 3; + msm_dp_display->msm_dp_mode.bpp =3D dp->connector->display_info.bpc * 3; =20 - if (!dp_display->dp_mode.bpp) - dp_display->dp_mode.bpp =3D 24; /* Default bpp */ + if (!msm_dp_display->msm_dp_mode.bpp) + msm_dp_display->msm_dp_mode.bpp =3D 24; /* Default bpp */ =20 - drm_mode_copy(&dp_display->dp_mode.drm_mode, adjusted_mode); + drm_mode_copy(&msm_dp_display->msm_dp_mode.drm_mode, adjusted_mode); =20 - dp_display->dp_mode.v_active_low =3D - !!(dp_display->dp_mode.drm_mode.flags & DRM_MODE_FLAG_NVSYNC); + msm_dp_display->msm_dp_mode.v_active_low =3D + !!(msm_dp_display->msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NVSYNC); =20 - dp_display->dp_mode.h_active_low =3D - !!(dp_display->dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC); + msm_dp_display->msm_dp_mode.h_active_low =3D + !!(msm_dp_display->msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC); =20 - dp_display->dp_mode.out_fmt_is_yuv_420 =3D + msm_dp_display->msm_dp_mode.out_fmt_is_yuv_420 =3D drm_mode_is_420_only(&dp->connector->display_info, adjusted_mode) && - dp_panel->vsc_sdp_supported; + msm_dp_panel->vsc_sdp_supported; =20 /* populate wide_bus_support to different layers */ - dp_display->ctrl->wide_bus_en =3D - dp_display->dp_mode.out_fmt_is_yuv_420 ? false : dp_display->wide_bus_su= pported; - dp_display->catalog->wide_bus_en =3D - dp_display->dp_mode.out_fmt_is_yuv_420 ? false : dp_display->wide_bus_su= pported; + msm_dp_display->ctrl->wide_bus_en =3D + msm_dp_display->msm_dp_mode.out_fmt_is_yuv_420 ? false : msm_dp_display-= >wide_bus_supported; + msm_dp_display->catalog->wide_bus_en =3D + msm_dp_display->msm_dp_mode.out_fmt_is_yuv_420 ? false : msm_dp_display-= >wide_bus_supported; } =20 -void dp_bridge_hpd_enable(struct drm_bridge *bridge) +void msm_dp_bridge_hpd_enable(struct drm_bridge *bridge) { - struct msm_dp_bridge *dp_bridge =3D to_dp_bridge(bridge); - struct msm_dp *dp_display =3D dp_bridge->dp_display; - struct dp_display_private *dp =3D container_of(dp_display, struct dp_disp= lay_private, dp_display); + struct msm_dp_bridge *msm_dp_bridge =3D to_dp_bridge(bridge); + struct msm_dp *msm_dp_display =3D msm_dp_bridge->msm_dp_display; + struct msm_dp_display_private *dp =3D container_of(msm_dp_display, struct= msm_dp_display_private, msm_dp_display); =20 /* * this is for external DP with hpd irq enabled case, - * step-1: dp_pm_runtime_resume() enable dp host only + * step-1: msm_dp_pm_runtime_resume() enable dp host only * step-2: enable hdp block and have hpd irq enabled here * step-3: waiting for plugin irq while phy is not initialized * step-4: DP PHY is initialized at plugin handler before link training * */ mutex_lock(&dp->event_mutex); - if (pm_runtime_resume_and_get(&dp_display->pdev->dev)) { + if (pm_runtime_resume_and_get(&msm_dp_display->pdev->dev)) { DRM_ERROR("failed to resume power\n"); mutex_unlock(&dp->event_mutex); return; } =20 - dp_catalog_ctrl_hpd_enable(dp->catalog); + msm_dp_catalog_ctrl_hpd_enable(dp->catalog); =20 /* enable HDP interrupts */ - dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_INT_MASK, true); + msm_dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_INT_MASK, true); =20 - dp_display->internal_hpd =3D true; + msm_dp_display->internal_hpd =3D true; mutex_unlock(&dp->event_mutex); } =20 -void dp_bridge_hpd_disable(struct drm_bridge *bridge) +void msm_dp_bridge_hpd_disable(struct drm_bridge *bridge) { - struct msm_dp_bridge *dp_bridge =3D to_dp_bridge(bridge); - struct msm_dp *dp_display =3D dp_bridge->dp_display; - struct dp_display_private *dp =3D container_of(dp_display, struct dp_disp= lay_private, dp_display); + struct msm_dp_bridge *msm_dp_bridge =3D to_dp_bridge(bridge); + struct msm_dp *msm_dp_display =3D msm_dp_bridge->msm_dp_display; + struct msm_dp_display_private *dp =3D container_of(msm_dp_display, struct= msm_dp_display_private, msm_dp_display); =20 mutex_lock(&dp->event_mutex); /* disable HDP interrupts */ - dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_INT_MASK, false); - dp_catalog_ctrl_hpd_disable(dp->catalog); + msm_dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_INT_MASK, false); + msm_dp_catalog_ctrl_hpd_disable(dp->catalog); =20 - dp_display->internal_hpd =3D false; + msm_dp_display->internal_hpd =3D false; =20 - pm_runtime_put_sync(&dp_display->pdev->dev); + pm_runtime_put_sync(&msm_dp_display->pdev->dev); mutex_unlock(&dp->event_mutex); } =20 -void dp_bridge_hpd_notify(struct drm_bridge *bridge, +void msm_dp_bridge_hpd_notify(struct drm_bridge *bridge, enum drm_connector_status status) { - struct msm_dp_bridge *dp_bridge =3D to_dp_bridge(bridge); - struct msm_dp *dp_display =3D dp_bridge->dp_display; - struct dp_display_private *dp =3D container_of(dp_display, struct dp_disp= lay_private, dp_display); + struct msm_dp_bridge *msm_dp_bridge =3D to_dp_bridge(bridge); + struct msm_dp *msm_dp_display =3D msm_dp_bridge->msm_dp_display; + struct msm_dp_display_private *dp =3D container_of(msm_dp_display, struct= msm_dp_display_private, msm_dp_display); =20 /* Without next_bridge interrupts are handled by the DP core directly */ - if (dp_display->internal_hpd) + if (msm_dp_display->internal_hpd) return; =20 - if (!dp_display->link_ready && status =3D=3D connector_status_connected) - dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0); - else if (dp_display->link_ready && status =3D=3D connector_status_disconn= ected) - dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0); + if (!msm_dp_display->link_ready && status =3D=3D connector_status_connect= ed) + msm_dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0); + else if (msm_dp_display->link_ready && status =3D=3D connector_status_dis= connected) + msm_dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0); } diff --git a/drivers/gpu/drm/msm/dp/dp_display.h b/drivers/gpu/drm/msm/dp/d= p_display.h index ec7fa67e0569..ecbc2d92f546 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.h +++ b/drivers/gpu/drm/msm/dp/dp_display.h @@ -27,18 +27,18 @@ struct msm_dp { =20 hdmi_codec_plugged_cb plugged_cb; =20 - struct dp_audio *dp_audio; + struct msm_dp_audio *msm_dp_audio; bool psr_supported; }; =20 -int dp_display_set_plugged_cb(struct msm_dp *dp_display, +int msm_dp_display_set_plugged_cb(struct msm_dp *msm_dp_display, hdmi_codec_plugged_cb fn, struct device *codec_dev); -int dp_display_get_modes(struct msm_dp *dp_display); -bool dp_display_check_video_test(struct msm_dp *dp_display); -int dp_display_get_test_bpp(struct msm_dp *dp_display); -void dp_display_signal_audio_start(struct msm_dp *dp_display); -void dp_display_signal_audio_complete(struct msm_dp *dp_display); -void dp_display_set_psr(struct msm_dp *dp, bool enter); -void dp_display_debugfs_init(struct msm_dp *dp_display, struct dentry *den= try, bool is_edp); +int msm_dp_display_get_modes(struct msm_dp *msm_dp_display); +bool msm_dp_display_check_video_test(struct msm_dp *msm_dp_display); +int msm_dp_display_get_test_bpp(struct msm_dp *msm_dp_display); +void msm_dp_display_signal_audio_start(struct msm_dp *msm_dp_display); +void msm_dp_display_signal_audio_complete(struct msm_dp *msm_dp_display); +void msm_dp_display_set_psr(struct msm_dp *dp, bool enter); +void msm_dp_display_debugfs_init(struct msm_dp *msm_dp_display, struct den= try *dentry, bool is_edp); =20 #endif /* _DP_DISPLAY_H_ */ diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_dr= m.c index 7eb1621f9e7f..6a0840266c0f 100644 --- a/drivers/gpu/drm/msm/dp/dp_drm.c +++ b/drivers/gpu/drm/msm/dp/dp_drm.c @@ -14,15 +14,15 @@ #include "dp_drm.h" =20 /** - * dp_bridge_detect - callback to determine if connector is connected + * msm_dp_bridge_detect - callback to determine if connector is connected * @bridge: Pointer to drm bridge structure * Returns: Bridge's 'is connected' status */ -static enum drm_connector_status dp_bridge_detect(struct drm_bridge *bridg= e) +static enum drm_connector_status msm_dp_bridge_detect(struct drm_bridge *b= ridge) { struct msm_dp *dp; =20 - dp =3D to_dp_bridge(bridge)->dp_display; + dp =3D to_dp_bridge(bridge)->msm_dp_display; =20 drm_dbg_dp(dp->drm_dev, "link_ready =3D %s\n", (dp->link_ready) ? "true" : "false"); @@ -31,14 +31,14 @@ static enum drm_connector_status dp_bridge_detect(struc= t drm_bridge *bridge) connector_status_disconnected; } =20 -static int dp_bridge_atomic_check(struct drm_bridge *bridge, +static int msm_dp_bridge_atomic_check(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state) { struct msm_dp *dp; =20 - dp =3D to_dp_bridge(bridge)->dp_display; + dp =3D to_dp_bridge(bridge)->msm_dp_display; =20 drm_dbg_dp(dp->drm_dev, "link_ready =3D %s\n", (dp->link_ready) ? "true" : "false"); @@ -62,12 +62,12 @@ static int dp_bridge_atomic_check(struct drm_bridge *br= idge, =20 =20 /** - * dp_bridge_get_modes - callback to add drm modes via drm_mode_probed_add= () + * msm_dp_bridge_get_modes - callback to add drm modes via drm_mode_probed= _add() * @bridge: Poiner to drm bridge * @connector: Pointer to drm connector structure * Returns: Number of modes added */ -static int dp_bridge_get_modes(struct drm_bridge *bridge, struct drm_conne= ctor *connector) +static int msm_dp_bridge_get_modes(struct drm_bridge *bridge, struct drm_c= onnector *connector) { int rc =3D 0; struct msm_dp *dp; @@ -75,11 +75,11 @@ static int dp_bridge_get_modes(struct drm_bridge *bridg= e, struct drm_connector * if (!connector) return 0; =20 - dp =3D to_dp_bridge(bridge)->dp_display; + dp =3D to_dp_bridge(bridge)->msm_dp_display; =20 /* pluggable case assumes EDID is read when HPD */ if (dp->link_ready) { - rc =3D dp_display_get_modes(dp); + rc =3D msm_dp_display_get_modes(dp); if (rc <=3D 0) { DRM_ERROR("failed to get DP sink modes, rc=3D%d\n", rc); return rc; @@ -90,29 +90,29 @@ static int dp_bridge_get_modes(struct drm_bridge *bridg= e, struct drm_connector * return rc; } =20 -static void dp_bridge_debugfs_init(struct drm_bridge *bridge, struct dentr= y *root) +static void msm_dp_bridge_debugfs_init(struct drm_bridge *bridge, struct d= entry *root) { - struct msm_dp *dp =3D to_dp_bridge(bridge)->dp_display; + struct msm_dp *dp =3D to_dp_bridge(bridge)->msm_dp_display; =20 - dp_display_debugfs_init(dp, root, false); + msm_dp_display_debugfs_init(dp, root, false); } =20 -static const struct drm_bridge_funcs dp_bridge_ops =3D { +static const struct drm_bridge_funcs msm_dp_bridge_ops =3D { .atomic_duplicate_state =3D drm_atomic_helper_bridge_duplicate_state, .atomic_destroy_state =3D drm_atomic_helper_bridge_destroy_state, .atomic_reset =3D drm_atomic_helper_bridge_reset, - .atomic_enable =3D dp_bridge_atomic_enable, - .atomic_disable =3D dp_bridge_atomic_disable, - .atomic_post_disable =3D dp_bridge_atomic_post_disable, - .mode_set =3D dp_bridge_mode_set, - .mode_valid =3D dp_bridge_mode_valid, - .get_modes =3D dp_bridge_get_modes, - .detect =3D dp_bridge_detect, - .atomic_check =3D dp_bridge_atomic_check, - .hpd_enable =3D dp_bridge_hpd_enable, - .hpd_disable =3D dp_bridge_hpd_disable, - .hpd_notify =3D dp_bridge_hpd_notify, - .debugfs_init =3D dp_bridge_debugfs_init, + .atomic_enable =3D msm_dp_bridge_atomic_enable, + .atomic_disable =3D msm_dp_bridge_atomic_disable, + .atomic_post_disable =3D msm_dp_bridge_atomic_post_disable, + .mode_set =3D msm_dp_bridge_mode_set, + .mode_valid =3D msm_dp_bridge_mode_valid, + .get_modes =3D msm_dp_bridge_get_modes, + .detect =3D msm_dp_bridge_detect, + .atomic_check =3D msm_dp_bridge_atomic_check, + .hpd_enable =3D msm_dp_bridge_hpd_enable, + .hpd_disable =3D msm_dp_bridge_hpd_disable, + .hpd_notify =3D msm_dp_bridge_hpd_notify, + .debugfs_init =3D msm_dp_bridge_debugfs_init, }; =20 static int edp_bridge_atomic_check(struct drm_bridge *drm_bridge, @@ -120,7 +120,7 @@ static int edp_bridge_atomic_check(struct drm_bridge *d= rm_bridge, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state) { - struct msm_dp *dp =3D to_dp_bridge(drm_bridge)->dp_display; + struct msm_dp *dp =3D to_dp_bridge(drm_bridge)->msm_dp_display; =20 if (WARN_ON(!conn_state)) return -ENODEV; @@ -142,8 +142,8 @@ static void edp_bridge_atomic_enable(struct drm_bridge = *drm_bridge, struct drm_atomic_state *atomic_state =3D old_bridge_state->base.state; struct drm_crtc *crtc; struct drm_crtc_state *old_crtc_state; - struct msm_dp_bridge *dp_bridge =3D to_dp_bridge(drm_bridge); - struct msm_dp *dp =3D dp_bridge->dp_display; + struct msm_dp_bridge *msm_dp_bridge =3D to_dp_bridge(drm_bridge); + struct msm_dp *dp =3D msm_dp_bridge->msm_dp_display; =20 /* * Check the old state of the crtc to determine if the panel @@ -159,11 +159,11 @@ static void edp_bridge_atomic_enable(struct drm_bridg= e *drm_bridge, old_crtc_state =3D drm_atomic_get_old_crtc_state(atomic_state, crtc); =20 if (old_crtc_state && old_crtc_state->self_refresh_active) { - dp_display_set_psr(dp, false); + msm_dp_display_set_psr(dp, false); return; } =20 - dp_bridge_atomic_enable(drm_bridge, old_bridge_state); + msm_dp_bridge_atomic_enable(drm_bridge, old_bridge_state); } =20 static void edp_bridge_atomic_disable(struct drm_bridge *drm_bridge, @@ -172,8 +172,8 @@ static void edp_bridge_atomic_disable(struct drm_bridge= *drm_bridge, struct drm_atomic_state *atomic_state =3D old_bridge_state->base.state; struct drm_crtc *crtc; struct drm_crtc_state *new_crtc_state =3D NULL, *old_crtc_state =3D NULL; - struct msm_dp_bridge *dp_bridge =3D to_dp_bridge(drm_bridge); - struct msm_dp *dp =3D dp_bridge->dp_display; + struct msm_dp_bridge *msm_dp_bridge =3D to_dp_bridge(drm_bridge); + struct msm_dp *dp =3D msm_dp_bridge->msm_dp_display; =20 crtc =3D drm_atomic_get_old_crtc_for_encoder(atomic_state, drm_bridge->encoder); @@ -200,15 +200,15 @@ static void edp_bridge_atomic_disable(struct drm_brid= ge *drm_bridge, * when display disable occurs while the sink is in psr state. */ if (new_crtc_state->self_refresh_active) { - dp_display_set_psr(dp, true); + msm_dp_display_set_psr(dp, true); return; } else if (old_crtc_state->self_refresh_active) { - dp_display_set_psr(dp, false); + msm_dp_display_set_psr(dp, false); return; } =20 out: - dp_bridge_atomic_disable(drm_bridge, old_bridge_state); + msm_dp_bridge_atomic_disable(drm_bridge, old_bridge_state); } =20 static void edp_bridge_atomic_post_disable(struct drm_bridge *drm_bridge, @@ -233,7 +233,7 @@ static void edp_bridge_atomic_post_disable(struct drm_b= ridge *drm_bridge, if (new_crtc_state->self_refresh_active) return; =20 - dp_bridge_atomic_post_disable(drm_bridge, old_bridge_state); + msm_dp_bridge_atomic_post_disable(drm_bridge, old_bridge_state); } =20 /** @@ -250,7 +250,7 @@ static enum drm_mode_status edp_bridge_mode_valid(struc= t drm_bridge *bridge, struct msm_dp *dp; int mode_pclk_khz =3D mode->clock; =20 - dp =3D to_dp_bridge(bridge)->dp_display; + dp =3D to_dp_bridge(bridge)->msm_dp_display; =20 if (!dp || !mode_pclk_khz || !dp->connector) { DRM_ERROR("invalid params\n"); @@ -270,16 +270,16 @@ static enum drm_mode_status edp_bridge_mode_valid(str= uct drm_bridge *bridge, =20 static void edp_bridge_debugfs_init(struct drm_bridge *bridge, struct dent= ry *root) { - struct msm_dp *dp =3D to_dp_bridge(bridge)->dp_display; + struct msm_dp *dp =3D to_dp_bridge(bridge)->msm_dp_display; =20 - dp_display_debugfs_init(dp, root, true); + msm_dp_display_debugfs_init(dp, root, true); } =20 static const struct drm_bridge_funcs edp_bridge_ops =3D { .atomic_enable =3D edp_bridge_atomic_enable, .atomic_disable =3D edp_bridge_atomic_disable, .atomic_post_disable =3D edp_bridge_atomic_post_disable, - .mode_set =3D dp_bridge_mode_set, + .mode_set =3D msm_dp_bridge_mode_set, .mode_valid =3D edp_bridge_mode_valid, .atomic_reset =3D drm_atomic_helper_bridge_reset, .atomic_duplicate_state =3D drm_atomic_helper_bridge_duplicate_state, @@ -288,22 +288,22 @@ static const struct drm_bridge_funcs edp_bridge_ops = =3D { .debugfs_init =3D edp_bridge_debugfs_init, }; =20 -int dp_bridge_init(struct msm_dp *dp_display, struct drm_device *dev, +int msm_dp_bridge_init(struct msm_dp *msm_dp_display, struct drm_device *d= ev, struct drm_encoder *encoder, bool yuv_supported) { int rc; - struct msm_dp_bridge *dp_bridge; + struct msm_dp_bridge *msm_dp_bridge; struct drm_bridge *bridge; =20 - dp_bridge =3D devm_kzalloc(dev->dev, sizeof(*dp_bridge), GFP_KERNEL); - if (!dp_bridge) + msm_dp_bridge =3D devm_kzalloc(dev->dev, sizeof(*msm_dp_bridge), GFP_KERN= EL); + if (!msm_dp_bridge) return -ENOMEM; =20 - dp_bridge->dp_display =3D dp_display; + msm_dp_bridge->msm_dp_display =3D msm_dp_display; =20 - bridge =3D &dp_bridge->bridge; - bridge->funcs =3D dp_display->is_edp ? &edp_bridge_ops : &dp_bridge_ops; - bridge->type =3D dp_display->connector_type; + bridge =3D &msm_dp_bridge->bridge; + bridge->funcs =3D msm_dp_display->is_edp ? &edp_bridge_ops : &msm_dp_brid= ge_ops; + bridge->type =3D msm_dp_display->connector_type; bridge->ycbcr_420_allowed =3D yuv_supported; =20 /* @@ -317,7 +317,7 @@ int dp_bridge_init(struct msm_dp *dp_display, struct dr= m_device *dev, * allows the panel driver to properly power itself on to read the * modes. */ - if (!dp_display->is_edp) { + if (!msm_dp_display->is_edp) { bridge->ops =3D DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_HPD | @@ -338,9 +338,9 @@ int dp_bridge_init(struct msm_dp *dp_display, struct dr= m_device *dev, return rc; } =20 - if (dp_display->next_bridge) { + if (msm_dp_display->next_bridge) { rc =3D drm_bridge_attach(encoder, - dp_display->next_bridge, bridge, + msm_dp_display->next_bridge, bridge, DRM_BRIDGE_ATTACH_NO_CONNECTOR); if (rc < 0) { DRM_ERROR("failed to attach panel bridge: %d\n", rc); @@ -352,16 +352,16 @@ int dp_bridge_init(struct msm_dp *dp_display, struct = drm_device *dev, } =20 /* connector initialization */ -struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display, +struct drm_connector *msm_dp_drm_connector_init(struct msm_dp *msm_dp_disp= lay, struct drm_encoder *encoder) { struct drm_connector *connector =3D NULL; =20 - connector =3D drm_bridge_connector_init(dp_display->drm_dev, encoder); + connector =3D drm_bridge_connector_init(msm_dp_display->drm_dev, encoder); if (IS_ERR(connector)) return connector; =20 - if (!dp_display->is_edp) + if (!msm_dp_display->is_edp) drm_connector_attach_dp_subconnector_property(connector); =20 drm_connector_attach_encoder(connector, encoder); diff --git a/drivers/gpu/drm/msm/dp/dp_drm.h b/drivers/gpu/drm/msm/dp/dp_dr= m.h index ae632fcc407c..8eae2f74839f 100644 --- a/drivers/gpu/drm/msm/dp/dp_drm.h +++ b/drivers/gpu/drm/msm/dp/dp_drm.h @@ -14,32 +14,32 @@ =20 struct msm_dp_bridge { struct drm_bridge bridge; - struct msm_dp *dp_display; + struct msm_dp *msm_dp_display; }; =20 #define to_dp_bridge(x) container_of((x), struct msm_dp_bridge, bridge) =20 -struct drm_connector *dp_drm_connector_init(struct msm_dp *dp_display, +struct drm_connector *msm_dp_drm_connector_init(struct msm_dp *msm_dp_disp= lay, struct drm_encoder *encoder); -int dp_bridge_init(struct msm_dp *dp_display, struct drm_device *dev, +int msm_dp_bridge_init(struct msm_dp *msm_dp_display, struct drm_device *d= ev, struct drm_encoder *encoder, bool yuv_supported); =20 -void dp_bridge_atomic_enable(struct drm_bridge *drm_bridge, +void msm_dp_bridge_atomic_enable(struct drm_bridge *drm_bridge, struct drm_bridge_state *old_bridge_state); -void dp_bridge_atomic_disable(struct drm_bridge *drm_bridge, +void msm_dp_bridge_atomic_disable(struct drm_bridge *drm_bridge, struct drm_bridge_state *old_bridge_state); -void dp_bridge_atomic_post_disable(struct drm_bridge *drm_bridge, +void msm_dp_bridge_atomic_post_disable(struct drm_bridge *drm_bridge, struct drm_bridge_state *old_bridge_state); -enum drm_mode_status dp_bridge_mode_valid(struct drm_bridge *bridge, +enum drm_mode_status msm_dp_bridge_mode_valid(struct drm_bridge *bridge, const struct drm_display_info *info, const struct drm_display_mode *mode); -void dp_bridge_mode_set(struct drm_bridge *drm_bridge, +void msm_dp_bridge_mode_set(struct drm_bridge *drm_bridge, const struct drm_display_mode *mode, const struct drm_display_mode *adjusted_mode); -void dp_bridge_hpd_enable(struct drm_bridge *bridge); -void dp_bridge_hpd_disable(struct drm_bridge *bridge); -void dp_bridge_hpd_notify(struct drm_bridge *bridge, +void msm_dp_bridge_hpd_enable(struct drm_bridge *bridge); +void msm_dp_bridge_hpd_disable(struct drm_bridge *bridge); +void msm_dp_bridge_hpd_notify(struct drm_bridge *bridge, enum drm_connector_status status); =20 #endif /* _DP_DRM_H_ */ diff --git a/drivers/gpu/drm/msm/dp/dp_link.c b/drivers/gpu/drm/msm/dp/dp_l= ink.c index d8967615d84d..1a1fbb2d7d4f 100644 --- a/drivers/gpu/drm/msm/dp/dp_link.c +++ b/drivers/gpu/drm/msm/dp/dp_link.c @@ -28,25 +28,25 @@ enum audio_pattern_type { AUDIO_TEST_PATTERN_SAWTOOTH =3D 0x01, }; =20 -struct dp_link_request { +struct msm_dp_link_request { u32 test_requested; u32 test_link_rate; u32 test_lane_count; }; =20 -struct dp_link_private { +struct msm_dp_link_private { u32 prev_sink_count; struct drm_device *drm_dev; struct drm_dp_aux *aux; - struct dp_link dp_link; + struct msm_dp_link msm_dp_link; =20 - struct dp_link_request request; + struct msm_dp_link_request request; struct mutex psm_mutex; u8 link_status[DP_LINK_STATUS_SIZE]; }; =20 -static int dp_aux_link_power_up(struct drm_dp_aux *aux, - struct dp_link_info *link) +static int msm_dp_aux_link_power_up(struct drm_dp_aux *aux, + struct msm_dp_link_info *link) { u8 value; ssize_t len; @@ -73,8 +73,8 @@ static int dp_aux_link_power_up(struct drm_dp_aux *aux, return 0; } =20 -static int dp_aux_link_power_down(struct drm_dp_aux *aux, - struct dp_link_info *link) +static int msm_dp_aux_link_power_down(struct drm_dp_aux *aux, + struct msm_dp_link_info *link) { u8 value; int err; @@ -96,7 +96,7 @@ static int dp_aux_link_power_down(struct drm_dp_aux *aux, return 0; } =20 -static int dp_link_get_period(struct dp_link_private *link, int const addr) +static int msm_dp_link_get_period(struct msm_dp_link_private *link, int co= nst addr) { int ret =3D 0; u8 data; @@ -122,19 +122,19 @@ static int dp_link_get_period(struct dp_link_private = *link, int const addr) return ret; } =20 -static int dp_link_parse_audio_channel_period(struct dp_link_private *link) +static int msm_dp_link_parse_audio_channel_period(struct msm_dp_link_priva= te *link) { int ret =3D 0; - struct dp_link_test_audio *req =3D &link->dp_link.test_audio; + struct msm_dp_link_test_audio *req =3D &link->msm_dp_link.test_audio; =20 - ret =3D dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH1); + ret =3D msm_dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH1); if (ret =3D=3D -EINVAL) goto exit; =20 req->test_audio_period_ch_1 =3D ret; drm_dbg_dp(link->drm_dev, "test_audio_period_ch_1 =3D 0x%x\n", ret); =20 - ret =3D dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH2); + ret =3D msm_dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH2); if (ret =3D=3D -EINVAL) goto exit; =20 @@ -142,42 +142,42 @@ static int dp_link_parse_audio_channel_period(struct = dp_link_private *link) drm_dbg_dp(link->drm_dev, "test_audio_period_ch_2 =3D 0x%x\n", ret); =20 /* TEST_AUDIO_PERIOD_CH_3 (Byte 0x275) */ - ret =3D dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH3); + ret =3D msm_dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH3); if (ret =3D=3D -EINVAL) goto exit; =20 req->test_audio_period_ch_3 =3D ret; drm_dbg_dp(link->drm_dev, "test_audio_period_ch_3 =3D 0x%x\n", ret); =20 - ret =3D dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH4); + ret =3D msm_dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH4); if (ret =3D=3D -EINVAL) goto exit; =20 req->test_audio_period_ch_4 =3D ret; drm_dbg_dp(link->drm_dev, "test_audio_period_ch_4 =3D 0x%x\n", ret); =20 - ret =3D dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH5); + ret =3D msm_dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH5); if (ret =3D=3D -EINVAL) goto exit; =20 req->test_audio_period_ch_5 =3D ret; drm_dbg_dp(link->drm_dev, "test_audio_period_ch_5 =3D 0x%x\n", ret); =20 - ret =3D dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH6); + ret =3D msm_dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH6); if (ret =3D=3D -EINVAL) goto exit; =20 req->test_audio_period_ch_6 =3D ret; drm_dbg_dp(link->drm_dev, "test_audio_period_ch_6 =3D 0x%x\n", ret); =20 - ret =3D dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH7); + ret =3D msm_dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH7); if (ret =3D=3D -EINVAL) goto exit; =20 req->test_audio_period_ch_7 =3D ret; drm_dbg_dp(link->drm_dev, "test_audio_period_ch_7 =3D 0x%x\n", ret); =20 - ret =3D dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH8); + ret =3D msm_dp_link_get_period(link, DP_TEST_AUDIO_PERIOD_CH8); if (ret =3D=3D -EINVAL) goto exit; =20 @@ -187,7 +187,7 @@ static int dp_link_parse_audio_channel_period(struct dp= _link_private *link) return ret; } =20 -static int dp_link_parse_audio_pattern_type(struct dp_link_private *link) +static int msm_dp_link_parse_audio_pattern_type(struct msm_dp_link_private= *link) { int ret =3D 0; u8 data; @@ -208,13 +208,13 @@ static int dp_link_parse_audio_pattern_type(struct dp= _link_private *link) goto exit; } =20 - link->dp_link.test_audio.test_audio_pattern_type =3D data; + link->msm_dp_link.test_audio.test_audio_pattern_type =3D data; drm_dbg_dp(link->drm_dev, "audio pattern type =3D 0x%x\n", data); exit: return ret; } =20 -static int dp_link_parse_audio_mode(struct dp_link_private *link) +static int msm_dp_link_parse_audio_mode(struct msm_dp_link_private *link) { int ret =3D 0; u8 data; @@ -248,8 +248,8 @@ static int dp_link_parse_audio_mode(struct dp_link_priv= ate *link) goto exit; } =20 - link->dp_link.test_audio.test_audio_sampling_rate =3D sampling_rate; - link->dp_link.test_audio.test_audio_channel_count =3D channel_count; + link->msm_dp_link.test_audio.test_audio_sampling_rate =3D sampling_rate; + link->msm_dp_link.test_audio.test_audio_channel_count =3D channel_count; drm_dbg_dp(link->drm_dev, "sampling_rate =3D 0x%x, channel_count =3D 0x%x\n", sampling_rate, channel_count); @@ -257,25 +257,25 @@ static int dp_link_parse_audio_mode(struct dp_link_pr= ivate *link) return ret; } =20 -static int dp_link_parse_audio_pattern_params(struct dp_link_private *link) +static int msm_dp_link_parse_audio_pattern_params(struct msm_dp_link_priva= te *link) { int ret =3D 0; =20 - ret =3D dp_link_parse_audio_mode(link); + ret =3D msm_dp_link_parse_audio_mode(link); if (ret) goto exit; =20 - ret =3D dp_link_parse_audio_pattern_type(link); + ret =3D msm_dp_link_parse_audio_pattern_type(link); if (ret) goto exit; =20 - ret =3D dp_link_parse_audio_channel_period(link); + ret =3D msm_dp_link_parse_audio_channel_period(link); =20 exit: return ret; } =20 -static bool dp_link_is_video_pattern_valid(u32 pattern) +static bool msm_dp_link_is_video_pattern_valid(u32 pattern) { switch (pattern) { case DP_NO_TEST_PATTERN: @@ -289,12 +289,12 @@ static bool dp_link_is_video_pattern_valid(u32 patter= n) } =20 /** - * dp_link_is_bit_depth_valid() - validates the bit depth requested + * msm_dp_link_is_bit_depth_valid() - validates the bit depth requested * @tbd: bit depth requested by the sink * * Returns true if the requested bit depth is supported. */ -static bool dp_link_is_bit_depth_valid(u32 tbd) +static bool msm_dp_link_is_bit_depth_valid(u32 tbd) { /* DP_TEST_VIDEO_PATTERN_NONE is treated as invalid */ switch (tbd) { @@ -307,7 +307,7 @@ static bool dp_link_is_bit_depth_valid(u32 tbd) } } =20 -static int dp_link_parse_timing_params1(struct dp_link_private *link, +static int msm_dp_link_parse_timing_params1(struct msm_dp_link_private *li= nk, int addr, int len, u32 *val) { u8 bp[2]; @@ -328,7 +328,7 @@ static int dp_link_parse_timing_params1(struct dp_link_= private *link, return 0; } =20 -static int dp_link_parse_timing_params2(struct dp_link_private *link, +static int msm_dp_link_parse_timing_params2(struct msm_dp_link_private *li= nk, int addr, int len, u32 *val1, u32 *val2) { @@ -351,7 +351,7 @@ static int dp_link_parse_timing_params2(struct dp_link_= private *link, return 0; } =20 -static int dp_link_parse_timing_params3(struct dp_link_private *link, +static int msm_dp_link_parse_timing_params3(struct msm_dp_link_private *li= nk, int addr, u32 *val) { u8 bp; @@ -369,13 +369,13 @@ static int dp_link_parse_timing_params3(struct dp_lin= k_private *link, } =20 /** - * dp_link_parse_video_pattern_params() - parses video pattern parameters = from DPCD + * msm_dp_link_parse_video_pattern_params() - parses video pattern paramet= ers from DPCD * @link: Display Port Driver data * * Returns 0 if it successfully parses the video link pattern and the link * bit depth requested by the sink and, and if the values parsed are valid. */ -static int dp_link_parse_video_pattern_params(struct dp_link_private *link) +static int msm_dp_link_parse_video_pattern_params(struct msm_dp_link_priva= te *link) { int ret =3D 0; ssize_t rlen; @@ -388,13 +388,13 @@ static int dp_link_parse_video_pattern_params(struct = dp_link_private *link) return rlen; } =20 - if (!dp_link_is_video_pattern_valid(bp)) { + if (!msm_dp_link_is_video_pattern_valid(bp)) { DRM_ERROR("invalid link video pattern =3D 0x%x\n", bp); ret =3D -EINVAL; return ret; } =20 - link->dp_link.test_video.test_video_pattern =3D bp; + link->msm_dp_link.test_video.test_video_pattern =3D bp; =20 /* Read the requested color bit depth and dynamic range (Byte 0x232) */ rlen =3D drm_dp_dpcd_readb(link->aux, DP_TEST_MISC0, &bp); @@ -404,88 +404,88 @@ static int dp_link_parse_video_pattern_params(struct = dp_link_private *link) } =20 /* Dynamic Range */ - link->dp_link.test_video.test_dyn_range =3D + link->msm_dp_link.test_video.test_dyn_range =3D (bp & DP_TEST_DYNAMIC_RANGE_CEA); =20 /* Color bit depth */ bp &=3D DP_TEST_BIT_DEPTH_MASK; - if (!dp_link_is_bit_depth_valid(bp)) { + if (!msm_dp_link_is_bit_depth_valid(bp)) { DRM_ERROR("invalid link bit depth =3D 0x%x\n", bp); ret =3D -EINVAL; return ret; } =20 - link->dp_link.test_video.test_bit_depth =3D bp; + link->msm_dp_link.test_video.test_bit_depth =3D bp; =20 /* resolution timing params */ - ret =3D dp_link_parse_timing_params1(link, DP_TEST_H_TOTAL_HI, 2, - &link->dp_link.test_video.test_h_total); + ret =3D msm_dp_link_parse_timing_params1(link, DP_TEST_H_TOTAL_HI, 2, + &link->msm_dp_link.test_video.test_h_total); if (ret) { DRM_ERROR("failed to parse test_htotal(DP_TEST_H_TOTAL_HI)\n"); return ret; } =20 - ret =3D dp_link_parse_timing_params1(link, DP_TEST_V_TOTAL_HI, 2, - &link->dp_link.test_video.test_v_total); + ret =3D msm_dp_link_parse_timing_params1(link, DP_TEST_V_TOTAL_HI, 2, + &link->msm_dp_link.test_video.test_v_total); if (ret) { DRM_ERROR("failed to parse test_v_total(DP_TEST_V_TOTAL_HI)\n"); return ret; } =20 - ret =3D dp_link_parse_timing_params1(link, DP_TEST_H_START_HI, 2, - &link->dp_link.test_video.test_h_start); + ret =3D msm_dp_link_parse_timing_params1(link, DP_TEST_H_START_HI, 2, + &link->msm_dp_link.test_video.test_h_start); if (ret) { DRM_ERROR("failed to parse test_h_start(DP_TEST_H_START_HI)\n"); return ret; } =20 - ret =3D dp_link_parse_timing_params1(link, DP_TEST_V_START_HI, 2, - &link->dp_link.test_video.test_v_start); + ret =3D msm_dp_link_parse_timing_params1(link, DP_TEST_V_START_HI, 2, + &link->msm_dp_link.test_video.test_v_start); if (ret) { DRM_ERROR("failed to parse test_v_start(DP_TEST_V_START_HI)\n"); return ret; } =20 - ret =3D dp_link_parse_timing_params2(link, DP_TEST_HSYNC_HI, 2, - &link->dp_link.test_video.test_hsync_pol, - &link->dp_link.test_video.test_hsync_width); + ret =3D msm_dp_link_parse_timing_params2(link, DP_TEST_HSYNC_HI, 2, + &link->msm_dp_link.test_video.test_hsync_pol, + &link->msm_dp_link.test_video.test_hsync_width); if (ret) { DRM_ERROR("failed to parse (DP_TEST_HSYNC_HI)\n"); return ret; } =20 - ret =3D dp_link_parse_timing_params2(link, DP_TEST_VSYNC_HI, 2, - &link->dp_link.test_video.test_vsync_pol, - &link->dp_link.test_video.test_vsync_width); + ret =3D msm_dp_link_parse_timing_params2(link, DP_TEST_VSYNC_HI, 2, + &link->msm_dp_link.test_video.test_vsync_pol, + &link->msm_dp_link.test_video.test_vsync_width); if (ret) { DRM_ERROR("failed to parse (DP_TEST_VSYNC_HI)\n"); return ret; } =20 - ret =3D dp_link_parse_timing_params1(link, DP_TEST_H_WIDTH_HI, 2, - &link->dp_link.test_video.test_h_width); + ret =3D msm_dp_link_parse_timing_params1(link, DP_TEST_H_WIDTH_HI, 2, + &link->msm_dp_link.test_video.test_h_width); if (ret) { DRM_ERROR("failed to parse test_h_width(DP_TEST_H_WIDTH_HI)\n"); return ret; } =20 - ret =3D dp_link_parse_timing_params1(link, DP_TEST_V_HEIGHT_HI, 2, - &link->dp_link.test_video.test_v_height); + ret =3D msm_dp_link_parse_timing_params1(link, DP_TEST_V_HEIGHT_HI, 2, + &link->msm_dp_link.test_video.test_v_height); if (ret) { DRM_ERROR("failed to parse test_v_height\n"); return ret; } =20 - ret =3D dp_link_parse_timing_params3(link, DP_TEST_MISC1, - &link->dp_link.test_video.test_rr_d); - link->dp_link.test_video.test_rr_d &=3D DP_TEST_REFRESH_DENOMINATOR; + ret =3D msm_dp_link_parse_timing_params3(link, DP_TEST_MISC1, + &link->msm_dp_link.test_video.test_rr_d); + link->msm_dp_link.test_video.test_rr_d &=3D DP_TEST_REFRESH_DENOMINATOR; if (ret) { DRM_ERROR("failed to parse test_rr_d (DP_TEST_MISC1)\n"); return ret; } =20 - ret =3D dp_link_parse_timing_params3(link, DP_TEST_REFRESH_RATE_NUMERATOR, - &link->dp_link.test_video.test_rr_n); + ret =3D msm_dp_link_parse_timing_params3(link, DP_TEST_REFRESH_RATE_NUMER= ATOR, + &link->msm_dp_link.test_video.test_rr_n); if (ret) { DRM_ERROR("failed to parse test_rr_n\n"); return ret; @@ -505,34 +505,34 @@ static int dp_link_parse_video_pattern_params(struct = dp_link_private *link) "TEST_V_HEIGHT =3D %d\n" "TEST_REFRESH_DENOMINATOR =3D %d\n" "TEST_REFRESH_NUMERATOR =3D %d\n", - link->dp_link.test_video.test_video_pattern, - link->dp_link.test_video.test_dyn_range, - link->dp_link.test_video.test_bit_depth, - link->dp_link.test_video.test_h_total, - link->dp_link.test_video.test_v_total, - link->dp_link.test_video.test_h_start, - link->dp_link.test_video.test_v_start, - link->dp_link.test_video.test_hsync_pol, - link->dp_link.test_video.test_hsync_width, - link->dp_link.test_video.test_vsync_pol, - link->dp_link.test_video.test_vsync_width, - link->dp_link.test_video.test_h_width, - link->dp_link.test_video.test_v_height, - link->dp_link.test_video.test_rr_d, - link->dp_link.test_video.test_rr_n); + link->msm_dp_link.test_video.test_video_pattern, + link->msm_dp_link.test_video.test_dyn_range, + link->msm_dp_link.test_video.test_bit_depth, + link->msm_dp_link.test_video.test_h_total, + link->msm_dp_link.test_video.test_v_total, + link->msm_dp_link.test_video.test_h_start, + link->msm_dp_link.test_video.test_v_start, + link->msm_dp_link.test_video.test_hsync_pol, + link->msm_dp_link.test_video.test_hsync_width, + link->msm_dp_link.test_video.test_vsync_pol, + link->msm_dp_link.test_video.test_vsync_width, + link->msm_dp_link.test_video.test_h_width, + link->msm_dp_link.test_video.test_v_height, + link->msm_dp_link.test_video.test_rr_d, + link->msm_dp_link.test_video.test_rr_n); =20 return ret; } =20 /** - * dp_link_parse_link_training_params() - parses link training parameters = from + * msm_dp_link_parse_link_training_params() - parses link training paramet= ers from * DPCD * @link: Display Port Driver data * * Returns 0 if it successfully parses the link rate (Byte 0x219) and lane * count (Byte 0x220), and if these values parse are valid. */ -static int dp_link_parse_link_training_params(struct dp_link_private *link) +static int msm_dp_link_parse_link_training_params(struct msm_dp_link_priva= te *link) { u8 bp; ssize_t rlen; @@ -571,13 +571,13 @@ static int dp_link_parse_link_training_params(struct = dp_link_private *link) } =20 /** - * dp_link_parse_phy_test_params() - parses the phy link parameters + * msm_dp_link_parse_phy_test_params() - parses the phy link parameters * @link: Display Port Driver data * * Parses the DPCD (Byte 0x248) for the DP PHY link pattern that is being * requested. */ -static int dp_link_parse_phy_test_params(struct dp_link_private *link) +static int msm_dp_link_parse_phy_test_params(struct msm_dp_link_private *l= ink) { u8 data; ssize_t rlen; @@ -589,7 +589,7 @@ static int dp_link_parse_phy_test_params(struct dp_link= _private *link) return rlen; } =20 - link->dp_link.phy_params.phy_test_pattern_sel =3D data & 0x07; + link->msm_dp_link.phy_params.phy_test_pattern_sel =3D data & 0x07; =20 drm_dbg_dp(link->drm_dev, "phy_test_pattern_sel =3D 0x%x\n", data); =20 @@ -608,12 +608,12 @@ static int dp_link_parse_phy_test_params(struct dp_li= nk_private *link) } =20 /** - * dp_link_is_video_audio_test_requested() - checks for audio/video link r= equest + * msm_dp_link_is_video_audio_test_requested() - checks for audio/video li= nk request * @link: link requested by the sink * * Returns true if the requested link is a permitted audio/video link. */ -static bool dp_link_is_video_audio_test_requested(u32 link) +static bool msm_dp_link_is_video_audio_test_requested(u32 link) { u8 video_audio_test =3D (DP_TEST_LINK_VIDEO_PATTERN | DP_TEST_LINK_AUDIO_PATTERN | @@ -624,13 +624,13 @@ static bool dp_link_is_video_audio_test_requested(u32= link) } =20 /** - * dp_link_parse_request() - parses link request parameters from sink + * msm_dp_link_parse_request() - parses link request parameters from sink * @link: Display Port Driver data * * Parses the DPCD to check if an automated link is requested (Byte 0x201), * and what type of link automation is being requested (Byte 0x218). */ -static int dp_link_parse_request(struct dp_link_private *link) +static int msm_dp_link_parse_request(struct msm_dp_link_private *link) { int ret =3D 0; u8 data; @@ -672,27 +672,27 @@ static int dp_link_parse_request(struct dp_link_priva= te *link) drm_dbg_dp(link->drm_dev, "Test:(0x%x) requested\n", data); link->request.test_requested =3D data; if (link->request.test_requested =3D=3D DP_TEST_LINK_PHY_TEST_PATTERN) { - ret =3D dp_link_parse_phy_test_params(link); + ret =3D msm_dp_link_parse_phy_test_params(link); if (ret) goto end; - ret =3D dp_link_parse_link_training_params(link); + ret =3D msm_dp_link_parse_link_training_params(link); if (ret) goto end; } =20 if (link->request.test_requested =3D=3D DP_TEST_LINK_TRAINING) { - ret =3D dp_link_parse_link_training_params(link); + ret =3D msm_dp_link_parse_link_training_params(link); if (ret) goto end; } =20 - if (dp_link_is_video_audio_test_requested( + if (msm_dp_link_is_video_audio_test_requested( link->request.test_requested)) { - ret =3D dp_link_parse_video_pattern_params(link); + ret =3D msm_dp_link_parse_video_pattern_params(link); if (ret) goto end; =20 - ret =3D dp_link_parse_audio_pattern_params(link); + ret =3D msm_dp_link_parse_audio_pattern_params(link); } end: /* @@ -700,29 +700,29 @@ static int dp_link_parse_request(struct dp_link_priva= te *link) * a DP_TEST_NAK. */ if (ret) { - link->dp_link.test_response =3D DP_TEST_NAK; + link->msm_dp_link.test_response =3D DP_TEST_NAK; } else { if (link->request.test_requested !=3D DP_TEST_LINK_EDID_READ) - link->dp_link.test_response =3D DP_TEST_ACK; + link->msm_dp_link.test_response =3D DP_TEST_ACK; else - link->dp_link.test_response =3D + link->msm_dp_link.test_response =3D DP_TEST_EDID_CHECKSUM_WRITE; } =20 return ret; } =20 -static int dp_link_parse_sink_status_field(struct dp_link_private *link) +static int msm_dp_link_parse_sink_status_field(struct msm_dp_link_private = *link) { int len; =20 - link->prev_sink_count =3D link->dp_link.sink_count; + link->prev_sink_count =3D link->msm_dp_link.sink_count; len =3D drm_dp_read_sink_count(link->aux); if (len < 0) { DRM_ERROR("DP parse sink count failed\n"); return len; } - link->dp_link.sink_count =3D len; + link->msm_dp_link.sink_count =3D len; =20 len =3D drm_dp_dpcd_read_link_status(link->aux, link->link_status); @@ -731,11 +731,11 @@ static int dp_link_parse_sink_status_field(struct dp_= link_private *link) return len; } =20 - return dp_link_parse_request(link); + return msm_dp_link_parse_request(link); } =20 /** - * dp_link_process_link_training_request() - processes new training reques= ts + * msm_dp_link_process_link_training_request() - processes new training re= quests * @link: Display Port link data * * This function will handle new link training requests that are initiated= by @@ -745,7 +745,7 @@ static int dp_link_parse_sink_status_field(struct dp_li= nk_private *link) * The function will return 0 if a link training request has been processe= d, * otherwise it will return -EINVAL. */ -static int dp_link_process_link_training_request(struct dp_link_private *l= ink) +static int msm_dp_link_process_link_training_request(struct msm_dp_link_pr= ivate *link) { if (link->request.test_requested !=3D DP_TEST_LINK_TRAINING) return -EINVAL; @@ -756,49 +756,49 @@ static int dp_link_process_link_training_request(stru= ct dp_link_private *link) link->request.test_link_rate, link->request.test_lane_count); =20 - link->dp_link.link_params.num_lanes =3D link->request.test_lane_count; - link->dp_link.link_params.rate =3D + link->msm_dp_link.link_params.num_lanes =3D link->request.test_lane_count; + link->msm_dp_link.link_params.rate =3D drm_dp_bw_code_to_link_rate(link->request.test_link_rate); =20 return 0; } =20 -bool dp_link_send_test_response(struct dp_link *dp_link) +bool msm_dp_link_send_test_response(struct msm_dp_link *msm_dp_link) { - struct dp_link_private *link =3D NULL; + struct msm_dp_link_private *link =3D NULL; int ret =3D 0; =20 - if (!dp_link) { + if (!msm_dp_link) { DRM_ERROR("invalid input\n"); return false; } =20 - link =3D container_of(dp_link, struct dp_link_private, dp_link); + link =3D container_of(msm_dp_link, struct msm_dp_link_private, msm_dp_lin= k); =20 ret =3D drm_dp_dpcd_writeb(link->aux, DP_TEST_RESPONSE, - dp_link->test_response); + msm_dp_link->test_response); =20 return ret =3D=3D 1; } =20 -int dp_link_psm_config(struct dp_link *dp_link, - struct dp_link_info *link_info, bool enable) +int msm_dp_link_psm_config(struct msm_dp_link *msm_dp_link, + struct msm_dp_link_info *link_info, bool enable) { - struct dp_link_private *link =3D NULL; + struct msm_dp_link_private *link =3D NULL; int ret =3D 0; =20 - if (!dp_link) { + if (!msm_dp_link) { DRM_ERROR("invalid params\n"); return -EINVAL; } =20 - link =3D container_of(dp_link, struct dp_link_private, dp_link); + link =3D container_of(msm_dp_link, struct msm_dp_link_private, msm_dp_lin= k); =20 mutex_lock(&link->psm_mutex); if (enable) - ret =3D dp_aux_link_power_down(link->aux, link_info); + ret =3D msm_dp_aux_link_power_down(link->aux, link_info); else - ret =3D dp_aux_link_power_up(link->aux, link_info); + ret =3D msm_dp_aux_link_power_up(link->aux, link_info); =20 if (ret) DRM_ERROR("Failed to %s low power mode\n", enable ? @@ -808,24 +808,24 @@ int dp_link_psm_config(struct dp_link *dp_link, return ret; } =20 -bool dp_link_send_edid_checksum(struct dp_link *dp_link, u8 checksum) +bool msm_dp_link_send_edid_checksum(struct msm_dp_link *msm_dp_link, u8 ch= ecksum) { - struct dp_link_private *link =3D NULL; + struct msm_dp_link_private *link =3D NULL; int ret =3D 0; =20 - if (!dp_link) { + if (!msm_dp_link) { DRM_ERROR("invalid input\n"); return false; } =20 - link =3D container_of(dp_link, struct dp_link_private, dp_link); + link =3D container_of(msm_dp_link, struct msm_dp_link_private, msm_dp_lin= k); =20 ret =3D drm_dp_dpcd_writeb(link->aux, DP_TEST_EDID_CHECKSUM, checksum); return ret =3D=3D 1; } =20 -static void dp_link_parse_vx_px(struct dp_link_private *link) +static void msm_dp_link_parse_vx_px(struct msm_dp_link_private *link) { drm_dbg_dp(link->drm_dev, "vx: 0=3D%d, 1=3D%d, 2=3D%d, 3=3D%d\n", drm_dp_get_adjust_request_voltage(link->link_status, 0), @@ -845,31 +845,31 @@ static void dp_link_parse_vx_px(struct dp_link_privat= e *link) */ drm_dbg_dp(link->drm_dev, "Current: v_level =3D 0x%x, p_level =3D 0x%x\n", - link->dp_link.phy_params.v_level, - link->dp_link.phy_params.p_level); - link->dp_link.phy_params.v_level =3D + link->msm_dp_link.phy_params.v_level, + link->msm_dp_link.phy_params.p_level); + link->msm_dp_link.phy_params.v_level =3D drm_dp_get_adjust_request_voltage(link->link_status, 0); - link->dp_link.phy_params.p_level =3D + link->msm_dp_link.phy_params.p_level =3D drm_dp_get_adjust_request_pre_emphasis(link->link_status, 0); =20 - link->dp_link.phy_params.p_level >>=3D DP_TRAIN_PRE_EMPHASIS_SHIFT; + link->msm_dp_link.phy_params.p_level >>=3D DP_TRAIN_PRE_EMPHASIS_SHIFT; =20 drm_dbg_dp(link->drm_dev, "Requested: v_level =3D 0x%x, p_level =3D 0x%x\n", - link->dp_link.phy_params.v_level, - link->dp_link.phy_params.p_level); + link->msm_dp_link.phy_params.v_level, + link->msm_dp_link.phy_params.p_level); } =20 /** - * dp_link_process_phy_test_pattern_request() - process new phy link reque= sts + * msm_dp_link_process_phy_test_pattern_request() - process new phy link r= equests * @link: Display Port Driver data * * This function will handle new phy link pattern requests that are initia= ted * by the sink. The function will return 0 if a phy link pattern has been * processed, otherwise it will return -EINVAL. */ -static int dp_link_process_phy_test_pattern_request( - struct dp_link_private *link) +static int msm_dp_link_process_phy_test_pattern_request( + struct msm_dp_link_private *link) { if (!(link->request.test_requested & DP_TEST_LINK_PHY_TEST_PATTERN)) { drm_dbg_dp(link->drm_dev, "no phy test\n"); @@ -886,24 +886,24 @@ static int dp_link_process_phy_test_pattern_request( =20 drm_dbg_dp(link->drm_dev, "Current: rate =3D 0x%x, lane count =3D 0x%x\n", - link->dp_link.link_params.rate, - link->dp_link.link_params.num_lanes); + link->msm_dp_link.link_params.rate, + link->msm_dp_link.link_params.num_lanes); =20 drm_dbg_dp(link->drm_dev, "Requested: rate =3D 0x%x, lane count =3D 0x%x\n", link->request.test_link_rate, link->request.test_lane_count); =20 - link->dp_link.link_params.num_lanes =3D link->request.test_lane_count; - link->dp_link.link_params.rate =3D + link->msm_dp_link.link_params.num_lanes =3D link->request.test_lane_count; + link->msm_dp_link.link_params.rate =3D drm_dp_bw_code_to_link_rate(link->request.test_link_rate); =20 - dp_link_parse_vx_px(link); + msm_dp_link_parse_vx_px(link); =20 return 0; } =20 -static bool dp_link_read_psr_error_status(struct dp_link_private *link) +static bool msm_dp_link_read_psr_error_status(struct msm_dp_link_private *= link) { u8 status; =20 @@ -921,7 +921,7 @@ static bool dp_link_read_psr_error_status(struct dp_lin= k_private *link) return true; } =20 -static bool dp_link_psr_capability_changed(struct dp_link_private *link) +static bool msm_dp_link_psr_capability_changed(struct msm_dp_link_private = *link) { u8 status; =20 @@ -941,7 +941,7 @@ static u8 get_link_status(const u8 link_status[DP_LINK_= STATUS_SIZE], int r) } =20 /** - * dp_link_process_link_status_update() - processes link status updates + * msm_dp_link_process_link_status_update() - processes link status updates * @link: Display Port link module data * * This function will check for changes in the link status, e.g. clock @@ -951,13 +951,13 @@ static u8 get_link_status(const u8 link_status[DP_LIN= K_STATUS_SIZE], int r) * The function will return 0 if the a link status update has been process= ed, * otherwise it will return -EINVAL. */ -static int dp_link_process_link_status_update(struct dp_link_private *link) +static int msm_dp_link_process_link_status_update(struct msm_dp_link_priva= te *link) { bool channel_eq_done =3D drm_dp_channel_eq_ok(link->link_status, - link->dp_link.link_params.num_lanes); + link->msm_dp_link.link_params.num_lanes); =20 bool clock_recovery_done =3D drm_dp_clock_recovery_ok(link->link_status, - link->dp_link.link_params.num_lanes); + link->msm_dp_link.link_params.num_lanes); =20 drm_dbg_dp(link->drm_dev, "channel_eq_done =3D %d, clock_recovery_done =3D %d\n", @@ -970,7 +970,7 @@ static int dp_link_process_link_status_update(struct dp= _link_private *link) } =20 /** - * dp_link_process_ds_port_status_change() - process port status changes + * msm_dp_link_process_ds_port_status_change() - process port status chang= es * @link: Display Port Driver data * * This function will handle downstream port updates that are initiated by @@ -980,122 +980,122 @@ static int dp_link_process_link_status_update(struc= t dp_link_private *link) * The function will return 0 if a downstream port update has been * processed, otherwise it will return -EINVAL. */ -static int dp_link_process_ds_port_status_change(struct dp_link_private *l= ink) +static int msm_dp_link_process_ds_port_status_change(struct msm_dp_link_pr= ivate *link) { if (get_link_status(link->link_status, DP_LANE_ALIGN_STATUS_UPDATED) & DP_DOWNSTREAM_PORT_STATUS_CHANGED) goto reset; =20 - if (link->prev_sink_count =3D=3D link->dp_link.sink_count) + if (link->prev_sink_count =3D=3D link->msm_dp_link.sink_count) return -EINVAL; =20 reset: /* reset prev_sink_count */ - link->prev_sink_count =3D link->dp_link.sink_count; + link->prev_sink_count =3D link->msm_dp_link.sink_count; =20 return 0; } =20 -static bool dp_link_is_video_pattern_requested(struct dp_link_private *lin= k) +static bool msm_dp_link_is_video_pattern_requested(struct msm_dp_link_priv= ate *link) { return (link->request.test_requested & DP_TEST_LINK_VIDEO_PATTERN) && !(link->request.test_requested & DP_TEST_LINK_AUDIO_DISABLED_VIDEO); } =20 -static bool dp_link_is_audio_pattern_requested(struct dp_link_private *lin= k) +static bool msm_dp_link_is_audio_pattern_requested(struct msm_dp_link_priv= ate *link) { return (link->request.test_requested & DP_TEST_LINK_AUDIO_PATTERN); } =20 -static void dp_link_reset_data(struct dp_link_private *link) +static void msm_dp_link_reset_data(struct msm_dp_link_private *link) { - link->request =3D (const struct dp_link_request){ 0 }; - link->dp_link.test_video =3D (const struct dp_link_test_video){ 0 }; - link->dp_link.test_video.test_bit_depth =3D DP_TEST_BIT_DEPTH_UNKNOWN; - link->dp_link.test_audio =3D (const struct dp_link_test_audio){ 0 }; - link->dp_link.phy_params.phy_test_pattern_sel =3D 0; - link->dp_link.sink_request =3D 0; - link->dp_link.test_response =3D 0; + link->request =3D (const struct msm_dp_link_request){ 0 }; + link->msm_dp_link.test_video =3D (const struct msm_dp_link_test_video){ 0= }; + link->msm_dp_link.test_video.test_bit_depth =3D DP_TEST_BIT_DEPTH_UNKNOWN; + link->msm_dp_link.test_audio =3D (const struct msm_dp_link_test_audio){ 0= }; + link->msm_dp_link.phy_params.phy_test_pattern_sel =3D 0; + link->msm_dp_link.sink_request =3D 0; + link->msm_dp_link.test_response =3D 0; } =20 /** - * dp_link_process_request() - handle HPD IRQ transition to HIGH - * @dp_link: pointer to link module data + * msm_dp_link_process_request() - handle HPD IRQ transition to HIGH + * @msm_dp_link: pointer to link module data * * This function will handle the HPD IRQ state transitions from LOW to HIGH * (including cases when there are back to back HPD IRQ HIGH) indicating * the start of a new link training request or sink status update. */ -int dp_link_process_request(struct dp_link *dp_link) +int msm_dp_link_process_request(struct msm_dp_link *msm_dp_link) { int ret =3D 0; - struct dp_link_private *link; + struct msm_dp_link_private *link; =20 - if (!dp_link) { + if (!msm_dp_link) { DRM_ERROR("invalid input\n"); return -EINVAL; } =20 - link =3D container_of(dp_link, struct dp_link_private, dp_link); + link =3D container_of(msm_dp_link, struct msm_dp_link_private, msm_dp_lin= k); =20 - dp_link_reset_data(link); + msm_dp_link_reset_data(link); =20 - ret =3D dp_link_parse_sink_status_field(link); + ret =3D msm_dp_link_parse_sink_status_field(link); if (ret) return ret; =20 if (link->request.test_requested =3D=3D DP_TEST_LINK_EDID_READ) { - dp_link->sink_request |=3D DP_TEST_LINK_EDID_READ; - } else if (!dp_link_process_ds_port_status_change(link)) { - dp_link->sink_request |=3D DS_PORT_STATUS_CHANGED; - } else if (!dp_link_process_link_training_request(link)) { - dp_link->sink_request |=3D DP_TEST_LINK_TRAINING; - } else if (!dp_link_process_phy_test_pattern_request(link)) { - dp_link->sink_request |=3D DP_TEST_LINK_PHY_TEST_PATTERN; - } else if (dp_link_read_psr_error_status(link)) { + msm_dp_link->sink_request |=3D DP_TEST_LINK_EDID_READ; + } else if (!msm_dp_link_process_ds_port_status_change(link)) { + msm_dp_link->sink_request |=3D DS_PORT_STATUS_CHANGED; + } else if (!msm_dp_link_process_link_training_request(link)) { + msm_dp_link->sink_request |=3D DP_TEST_LINK_TRAINING; + } else if (!msm_dp_link_process_phy_test_pattern_request(link)) { + msm_dp_link->sink_request |=3D DP_TEST_LINK_PHY_TEST_PATTERN; + } else if (msm_dp_link_read_psr_error_status(link)) { DRM_ERROR("PSR IRQ_HPD received\n"); - } else if (dp_link_psr_capability_changed(link)) { + } else if (msm_dp_link_psr_capability_changed(link)) { drm_dbg_dp(link->drm_dev, "PSR Capability changed\n"); } else { - ret =3D dp_link_process_link_status_update(link); + ret =3D msm_dp_link_process_link_status_update(link); if (!ret) { - dp_link->sink_request |=3D DP_LINK_STATUS_UPDATED; + msm_dp_link->sink_request |=3D DP_LINK_STATUS_UPDATED; } else { - if (dp_link_is_video_pattern_requested(link)) { + if (msm_dp_link_is_video_pattern_requested(link)) { ret =3D 0; - dp_link->sink_request |=3D DP_TEST_LINK_VIDEO_PATTERN; + msm_dp_link->sink_request |=3D DP_TEST_LINK_VIDEO_PATTERN; } - if (dp_link_is_audio_pattern_requested(link)) { - dp_link->sink_request |=3D DP_TEST_LINK_AUDIO_PATTERN; + if (msm_dp_link_is_audio_pattern_requested(link)) { + msm_dp_link->sink_request |=3D DP_TEST_LINK_AUDIO_PATTERN; ret =3D -EINVAL; } } } =20 drm_dbg_dp(link->drm_dev, "sink request=3D%#x\n", - dp_link->sink_request); + msm_dp_link->sink_request); return ret; } =20 -int dp_link_get_colorimetry_config(struct dp_link *dp_link) +int msm_dp_link_get_colorimetry_config(struct msm_dp_link *msm_dp_link) { u32 cc =3D DP_MISC0_COLORIMERY_CFG_LEGACY_RGB; - struct dp_link_private *link; + struct msm_dp_link_private *link; =20 - if (!dp_link) { + if (!msm_dp_link) { DRM_ERROR("invalid input\n"); return -EINVAL; } =20 - link =3D container_of(dp_link, struct dp_link_private, dp_link); + link =3D container_of(msm_dp_link, struct msm_dp_link_private, msm_dp_lin= k); =20 /* * Unless a video pattern CTS test is ongoing, use RGB_VESA * Only RGB_VESA and RGB_CEA supported for now */ - if (dp_link_is_video_pattern_requested(link)) { - if (link->dp_link.test_video.test_dyn_range & + if (msm_dp_link_is_video_pattern_requested(link)) { + if (link->msm_dp_link.test_video.test_dyn_range & DP_TEST_DYNAMIC_RANGE_CEA) cc =3D DP_MISC0_COLORIMERY_CFG_CEA_RGB; } @@ -1103,22 +1103,22 @@ int dp_link_get_colorimetry_config(struct dp_link *= dp_link) return cc; } =20 -int dp_link_adjust_levels(struct dp_link *dp_link, u8 *link_status) +int msm_dp_link_adjust_levels(struct msm_dp_link *msm_dp_link, u8 *link_st= atus) { int i; u8 max_p_level; int v_max =3D 0, p_max =3D 0; - struct dp_link_private *link; + struct msm_dp_link_private *link; =20 - if (!dp_link) { + if (!msm_dp_link) { DRM_ERROR("invalid input\n"); return -EINVAL; } =20 - link =3D container_of(dp_link, struct dp_link_private, dp_link); + link =3D container_of(msm_dp_link, struct msm_dp_link_private, msm_dp_lin= k); =20 /* use the max level across lanes */ - for (i =3D 0; i < dp_link->link_params.num_lanes; i++) { + for (i =3D 0; i < msm_dp_link->link_params.num_lanes; i++) { u8 data_v =3D drm_dp_get_adjust_request_voltage(link_status, i); u8 data_p =3D drm_dp_get_adjust_request_pre_emphasis(link_status, i); @@ -1131,56 +1131,56 @@ int dp_link_adjust_levels(struct dp_link *dp_link, = u8 *link_status) p_max =3D data_p; } =20 - dp_link->phy_params.v_level =3D v_max >> DP_TRAIN_VOLTAGE_SWING_SHIFT; - dp_link->phy_params.p_level =3D p_max >> DP_TRAIN_PRE_EMPHASIS_SHIFT; + msm_dp_link->phy_params.v_level =3D v_max >> DP_TRAIN_VOLTAGE_SWING_SHIFT; + msm_dp_link->phy_params.p_level =3D p_max >> DP_TRAIN_PRE_EMPHASIS_SHIFT; =20 /** * Adjust the voltage swing and pre-emphasis level combination to within * the allowable range. */ - if (dp_link->phy_params.v_level > DP_TRAIN_LEVEL_MAX) { + if (msm_dp_link->phy_params.v_level > DP_TRAIN_LEVEL_MAX) { drm_dbg_dp(link->drm_dev, "Requested vSwingLevel=3D%d, change to %d\n", - dp_link->phy_params.v_level, + msm_dp_link->phy_params.v_level, DP_TRAIN_LEVEL_MAX); - dp_link->phy_params.v_level =3D DP_TRAIN_LEVEL_MAX; + msm_dp_link->phy_params.v_level =3D DP_TRAIN_LEVEL_MAX; } =20 - if (dp_link->phy_params.p_level > DP_TRAIN_LEVEL_MAX) { + if (msm_dp_link->phy_params.p_level > DP_TRAIN_LEVEL_MAX) { drm_dbg_dp(link->drm_dev, "Requested preEmphasisLevel=3D%d, change to %d\n", - dp_link->phy_params.p_level, + msm_dp_link->phy_params.p_level, DP_TRAIN_LEVEL_MAX); - dp_link->phy_params.p_level =3D DP_TRAIN_LEVEL_MAX; + msm_dp_link->phy_params.p_level =3D DP_TRAIN_LEVEL_MAX; } =20 - max_p_level =3D DP_TRAIN_LEVEL_MAX - dp_link->phy_params.v_level; - if (dp_link->phy_params.p_level > max_p_level) { + max_p_level =3D DP_TRAIN_LEVEL_MAX - msm_dp_link->phy_params.v_level; + if (msm_dp_link->phy_params.p_level > max_p_level) { drm_dbg_dp(link->drm_dev, "Requested preEmphasisLevel=3D%d, change to %d\n", - dp_link->phy_params.p_level, + msm_dp_link->phy_params.p_level, max_p_level); - dp_link->phy_params.p_level =3D max_p_level; + msm_dp_link->phy_params.p_level =3D max_p_level; } =20 drm_dbg_dp(link->drm_dev, "adjusted: v_level=3D%d, p_level=3D%d\n", - dp_link->phy_params.v_level, dp_link->phy_params.p_level); + msm_dp_link->phy_params.v_level, msm_dp_link->phy_params.p_level); =20 return 0; } =20 -void dp_link_reset_phy_params_vx_px(struct dp_link *dp_link) +void msm_dp_link_reset_phy_params_vx_px(struct msm_dp_link *msm_dp_link) { - dp_link->phy_params.v_level =3D 0; - dp_link->phy_params.p_level =3D 0; + msm_dp_link->phy_params.v_level =3D 0; + msm_dp_link->phy_params.p_level =3D 0; } =20 -u32 dp_link_get_test_bits_depth(struct dp_link *dp_link, u32 bpp) +u32 msm_dp_link_get_test_bits_depth(struct msm_dp_link *msm_dp_link, u32 b= pp) { u32 tbd; - struct dp_link_private *link; + struct msm_dp_link_private *link; =20 - link =3D container_of(dp_link, struct dp_link_private, dp_link); + link =3D container_of(msm_dp_link, struct msm_dp_link_private, msm_dp_lin= k); =20 /* * Few simplistic rules and assumptions made here: @@ -1209,10 +1209,10 @@ u32 dp_link_get_test_bits_depth(struct dp_link *dp_= link, u32 bpp) return tbd; } =20 -struct dp_link *dp_link_get(struct device *dev, struct drm_dp_aux *aux) +struct msm_dp_link *msm_dp_link_get(struct device *dev, struct drm_dp_aux = *aux) { - struct dp_link_private *link; - struct dp_link *dp_link; + struct msm_dp_link_private *link; + struct msm_dp_link *msm_dp_link; =20 if (!dev || !aux) { DRM_ERROR("invalid input\n"); @@ -1226,7 +1226,7 @@ struct dp_link *dp_link_get(struct device *dev, struc= t drm_dp_aux *aux) link->aux =3D aux; =20 mutex_init(&link->psm_mutex); - dp_link =3D &link->dp_link; + msm_dp_link =3D &link->msm_dp_link; =20 - return dp_link; + return msm_dp_link; } diff --git a/drivers/gpu/drm/msm/dp/dp_link.h b/drivers/gpu/drm/msm/dp/dp_l= ink.h index 5846337bb56f..8db5d5698a97 100644 --- a/drivers/gpu/drm/msm/dp/dp_link.h +++ b/drivers/gpu/drm/msm/dp/dp_link.h @@ -12,7 +12,7 @@ #define DP_TEST_BIT_DEPTH_UNKNOWN 0xFFFFFFFF #define DP_LINK_CAP_ENHANCED_FRAMING (1 << 0) =20 -struct dp_link_info { +struct msm_dp_link_info { unsigned char revision; unsigned int rate; unsigned int num_lanes; @@ -21,7 +21,7 @@ struct dp_link_info { =20 #define DP_TRAIN_LEVEL_MAX 3 =20 -struct dp_link_test_video { +struct msm_dp_link_test_video { u32 test_video_pattern; u32 test_bit_depth; u32 test_dyn_range; @@ -39,7 +39,7 @@ struct dp_link_test_video { u32 test_rr_n; }; =20 -struct dp_link_test_audio { +struct msm_dp_link_test_audio { u32 test_audio_sampling_rate; u32 test_audio_channel_count; u32 test_audio_pattern_type; @@ -53,21 +53,21 @@ struct dp_link_test_audio { u32 test_audio_period_ch_8; }; =20 -struct dp_link_phy_params { +struct msm_dp_link_phy_params { u32 phy_test_pattern_sel; u8 v_level; u8 p_level; }; =20 -struct dp_link { +struct msm_dp_link { u32 sink_request; u32 test_response; =20 u8 sink_count; - struct dp_link_test_video test_video; - struct dp_link_test_audio test_audio; - struct dp_link_phy_params phy_params; - struct dp_link_info link_params; + struct msm_dp_link_test_video test_video; + struct msm_dp_link_test_audio test_audio; + struct msm_dp_link_phy_params phy_params; + struct msm_dp_link_info link_params; }; =20 /** @@ -78,7 +78,7 @@ struct dp_link { * git bit depth value. This function assumes that bit depth has * already been validated. */ -static inline u32 dp_link_bit_depth_to_bpp(u32 tbd) +static inline u32 msm_dp_link_bit_depth_to_bpp(u32 tbd) { /* * Few simplistic rules and assumptions made here: @@ -99,22 +99,22 @@ static inline u32 dp_link_bit_depth_to_bpp(u32 tbd) } } =20 -void dp_link_reset_phy_params_vx_px(struct dp_link *dp_link); -u32 dp_link_get_test_bits_depth(struct dp_link *dp_link, u32 bpp); -int dp_link_process_request(struct dp_link *dp_link); -int dp_link_get_colorimetry_config(struct dp_link *dp_link); -int dp_link_adjust_levels(struct dp_link *dp_link, u8 *link_status); -bool dp_link_send_test_response(struct dp_link *dp_link); -int dp_link_psm_config(struct dp_link *dp_link, - struct dp_link_info *link_info, bool enable); -bool dp_link_send_edid_checksum(struct dp_link *dp_link, u8 checksum); +void msm_dp_link_reset_phy_params_vx_px(struct msm_dp_link *msm_dp_link); +u32 msm_dp_link_get_test_bits_depth(struct msm_dp_link *msm_dp_link, u32 b= pp); +int msm_dp_link_process_request(struct msm_dp_link *msm_dp_link); +int msm_dp_link_get_colorimetry_config(struct msm_dp_link *msm_dp_link); +int msm_dp_link_adjust_levels(struct msm_dp_link *msm_dp_link, u8 *link_st= atus); +bool msm_dp_link_send_test_response(struct msm_dp_link *msm_dp_link); +int msm_dp_link_psm_config(struct msm_dp_link *msm_dp_link, + struct msm_dp_link_info *link_info, bool enable); +bool msm_dp_link_send_edid_checksum(struct msm_dp_link *msm_dp_link, u8 ch= ecksum); =20 /** - * dp_link_get() - get the functionalities of dp test module + * msm_dp_link_get() - get the functionalities of dp test module * * - * return: a pointer to dp_link struct + * return: a pointer to msm_dp_link struct */ -struct dp_link *dp_link_get(struct device *dev, struct drm_dp_aux *aux); +struct msm_dp_link *msm_dp_link_get(struct device *dev, struct drm_dp_aux = *aux); =20 #endif /* _DP_LINK_H_ */ diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c b/drivers/gpu/drm/msm/dp/dp_= panel.c index 6ff6c9ef351f..5d7eaa31bf31 100644 --- a/drivers/gpu/drm/msm/dp/dp_panel.c +++ b/drivers/gpu/drm/msm/dp/dp_panel.c @@ -14,52 +14,52 @@ #define DP_MAX_NUM_DP_LANES 4 #define DP_LINK_RATE_HBR2 540000 /* kbytes */ =20 -struct dp_panel_private { +struct msm_dp_panel_private { struct device *dev; struct drm_device *drm_dev; - struct dp_panel dp_panel; + struct msm_dp_panel msm_dp_panel; struct drm_dp_aux *aux; - struct dp_link *link; - struct dp_catalog *catalog; + struct msm_dp_link *link; + struct msm_dp_catalog *catalog; bool panel_on; }; =20 -static void dp_panel_read_psr_cap(struct dp_panel_private *panel) +static void msm_dp_panel_read_psr_cap(struct msm_dp_panel_private *panel) { ssize_t rlen; - struct dp_panel *dp_panel; + struct msm_dp_panel *msm_dp_panel; =20 - dp_panel =3D &panel->dp_panel; + msm_dp_panel =3D &panel->msm_dp_panel; =20 /* edp sink */ - if (dp_panel->dpcd[DP_EDP_CONFIGURATION_CAP]) { + if (msm_dp_panel->dpcd[DP_EDP_CONFIGURATION_CAP]) { rlen =3D drm_dp_dpcd_read(panel->aux, DP_PSR_SUPPORT, - &dp_panel->psr_cap, sizeof(dp_panel->psr_cap)); - if (rlen =3D=3D sizeof(dp_panel->psr_cap)) { + &msm_dp_panel->psr_cap, sizeof(msm_dp_panel->psr_cap)); + if (rlen =3D=3D sizeof(msm_dp_panel->psr_cap)) { drm_dbg_dp(panel->drm_dev, "psr version: 0x%x, psr_cap: 0x%x\n", - dp_panel->psr_cap.version, - dp_panel->psr_cap.capabilities); + msm_dp_panel->psr_cap.version, + msm_dp_panel->psr_cap.capabilities); } else DRM_ERROR("failed to read psr info, rlen=3D%zd\n", rlen); } } =20 -static int dp_panel_read_dpcd(struct dp_panel *dp_panel) +static int msm_dp_panel_read_dpcd(struct msm_dp_panel *msm_dp_panel) { int rc; - struct dp_panel_private *panel; - struct dp_link_info *link_info; + struct msm_dp_panel_private *panel; + struct msm_dp_link_info *link_info; u8 *dpcd, major, minor; =20 - panel =3D container_of(dp_panel, struct dp_panel_private, dp_panel); - dpcd =3D dp_panel->dpcd; + panel =3D container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_= panel); + dpcd =3D msm_dp_panel->dpcd; rc =3D drm_dp_read_dpcd_caps(panel->aux, dpcd); if (rc) return rc; =20 - dp_panel->vsc_sdp_supported =3D drm_dp_vsc_sdp_supported(panel->aux, dpcd= ); - link_info =3D &dp_panel->link_info; + msm_dp_panel->vsc_sdp_supported =3D drm_dp_vsc_sdp_supported(panel->aux, = dpcd); + link_info =3D &msm_dp_panel->link_info; link_info->revision =3D dpcd[DP_DPCD_REV]; major =3D (link_info->revision >> 4) & 0x0f; minor =3D link_info->revision & 0x0f; @@ -68,12 +68,12 @@ static int dp_panel_read_dpcd(struct dp_panel *dp_panel) link_info->num_lanes =3D drm_dp_max_lane_count(dpcd); =20 /* Limit data lanes from data-lanes of endpoint property of dtsi */ - if (link_info->num_lanes > dp_panel->max_dp_lanes) - link_info->num_lanes =3D dp_panel->max_dp_lanes; + if (link_info->num_lanes > msm_dp_panel->max_dp_lanes) + link_info->num_lanes =3D msm_dp_panel->max_dp_lanes; =20 /* Limit link rate from link-frequencies of endpoint property of dtsi */ - if (link_info->rate > dp_panel->max_dp_link_rate) - link_info->rate =3D dp_panel->max_dp_link_rate; + if (link_info->rate > msm_dp_panel->max_dp_link_rate) + link_info->rate =3D msm_dp_panel->max_dp_link_rate; =20 drm_dbg_dp(panel->drm_dev, "version: %d.%d\n", major, minor); drm_dbg_dp(panel->drm_dev, "link_rate=3D%d\n", link_info->rate); @@ -82,21 +82,21 @@ static int dp_panel_read_dpcd(struct dp_panel *dp_panel) if (drm_dp_enhanced_frame_cap(dpcd)) link_info->capabilities |=3D DP_LINK_CAP_ENHANCED_FRAMING; =20 - dp_panel_read_psr_cap(panel); + msm_dp_panel_read_psr_cap(panel); =20 return rc; } =20 -static u32 dp_panel_get_supported_bpp(struct dp_panel *dp_panel, +static u32 msm_dp_panel_get_supported_bpp(struct msm_dp_panel *msm_dp_pane= l, u32 mode_edid_bpp, u32 mode_pclk_khz) { - const struct dp_link_info *link_info; + const struct msm_dp_link_info *link_info; const u32 max_supported_bpp =3D 30, min_supported_bpp =3D 18; u32 bpp, data_rate_khz; =20 bpp =3D min(mode_edid_bpp, max_supported_bpp); =20 - link_info =3D &dp_panel->link_info; + link_info =3D &msm_dp_panel->link_info; data_rate_khz =3D link_info->num_lanes * link_info->rate * 8; =20 do { @@ -108,39 +108,39 @@ static u32 dp_panel_get_supported_bpp(struct dp_panel= *dp_panel, return min_supported_bpp; } =20 -int dp_panel_read_sink_caps(struct dp_panel *dp_panel, +int msm_dp_panel_read_sink_caps(struct msm_dp_panel *msm_dp_panel, struct drm_connector *connector) { int rc, bw_code; int count; - struct dp_panel_private *panel; + struct msm_dp_panel_private *panel; =20 - if (!dp_panel || !connector) { + if (!msm_dp_panel || !connector) { DRM_ERROR("invalid input\n"); return -EINVAL; } =20 - panel =3D container_of(dp_panel, struct dp_panel_private, dp_panel); + panel =3D container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_= panel); =20 drm_dbg_dp(panel->drm_dev, "max_lanes=3D%d max_link_rate=3D%d\n", - dp_panel->max_dp_lanes, dp_panel->max_dp_link_rate); + msm_dp_panel->max_dp_lanes, msm_dp_panel->max_dp_link_rate); =20 - rc =3D dp_panel_read_dpcd(dp_panel); + rc =3D msm_dp_panel_read_dpcd(msm_dp_panel); if (rc) { DRM_ERROR("read dpcd failed %d\n", rc); return rc; } =20 - bw_code =3D drm_dp_link_rate_to_bw_code(dp_panel->link_info.rate); + bw_code =3D drm_dp_link_rate_to_bw_code(msm_dp_panel->link_info.rate); if (!is_link_rate_valid(bw_code) || - !is_lane_count_valid(dp_panel->link_info.num_lanes) || - (bw_code > dp_panel->max_bw_code)) { - DRM_ERROR("Illegal link rate=3D%d lane=3D%d\n", dp_panel->link_info.rate, - dp_panel->link_info.num_lanes); + !is_lane_count_valid(msm_dp_panel->link_info.num_lanes) || + (bw_code > msm_dp_panel->max_bw_code)) { + DRM_ERROR("Illegal link rate=3D%d lane=3D%d\n", msm_dp_panel->link_info.= rate, + msm_dp_panel->link_info.num_lanes); return -EINVAL; } =20 - if (drm_dp_is_branch(dp_panel->dpcd)) { + if (drm_dp_is_branch(msm_dp_panel->dpcd)) { count =3D drm_dp_read_sink_count(panel->aux); if (!count) { panel->link->sink_count =3D 0; @@ -148,21 +148,21 @@ int dp_panel_read_sink_caps(struct dp_panel *dp_panel, } } =20 - rc =3D drm_dp_read_downstream_info(panel->aux, dp_panel->dpcd, - dp_panel->downstream_ports); + rc =3D drm_dp_read_downstream_info(panel->aux, msm_dp_panel->dpcd, + msm_dp_panel->downstream_ports); if (rc) return rc; =20 - drm_edid_free(dp_panel->drm_edid); + drm_edid_free(msm_dp_panel->drm_edid); =20 - dp_panel->drm_edid =3D drm_edid_read_ddc(connector, &panel->aux->ddc); + msm_dp_panel->drm_edid =3D drm_edid_read_ddc(connector, &panel->aux->ddc); =20 - drm_edid_connector_update(connector, dp_panel->drm_edid); + drm_edid_connector_update(connector, msm_dp_panel->drm_edid); =20 - if (!dp_panel->drm_edid) { + if (!msm_dp_panel->drm_edid) { DRM_ERROR("panel edid read failed\n"); /* check edid read fail is due to unplug */ - if (!dp_catalog_link_is_connected(panel->catalog)) { + if (!msm_dp_catalog_link_is_connected(panel->catalog)) { rc =3D -ETIMEDOUT; goto end; } @@ -172,87 +172,87 @@ int dp_panel_read_sink_caps(struct dp_panel *dp_panel, return rc; } =20 -u32 dp_panel_get_mode_bpp(struct dp_panel *dp_panel, +u32 msm_dp_panel_get_mode_bpp(struct msm_dp_panel *msm_dp_panel, u32 mode_edid_bpp, u32 mode_pclk_khz) { - struct dp_panel_private *panel; + struct msm_dp_panel_private *panel; u32 bpp; =20 - if (!dp_panel || !mode_edid_bpp || !mode_pclk_khz) { + if (!msm_dp_panel || !mode_edid_bpp || !mode_pclk_khz) { DRM_ERROR("invalid input\n"); return 0; } =20 - panel =3D container_of(dp_panel, struct dp_panel_private, dp_panel); + panel =3D container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_= panel); =20 - if (dp_panel->video_test) - bpp =3D dp_link_bit_depth_to_bpp( + if (msm_dp_panel->video_test) + bpp =3D msm_dp_link_bit_depth_to_bpp( panel->link->test_video.test_bit_depth); else - bpp =3D dp_panel_get_supported_bpp(dp_panel, mode_edid_bpp, + bpp =3D msm_dp_panel_get_supported_bpp(msm_dp_panel, mode_edid_bpp, mode_pclk_khz); =20 return bpp; } =20 -int dp_panel_get_modes(struct dp_panel *dp_panel, +int msm_dp_panel_get_modes(struct msm_dp_panel *msm_dp_panel, struct drm_connector *connector) { - if (!dp_panel) { + if (!msm_dp_panel) { DRM_ERROR("invalid input\n"); return -EINVAL; } =20 - if (dp_panel->drm_edid) + if (msm_dp_panel->drm_edid) return drm_edid_connector_add_modes(connector); =20 return 0; } =20 -static u8 dp_panel_get_edid_checksum(const struct edid *edid) +static u8 msm_dp_panel_get_edid_checksum(const struct edid *edid) { edid +=3D edid->extensions; =20 return edid->checksum; } =20 -void dp_panel_handle_sink_request(struct dp_panel *dp_panel) +void msm_dp_panel_handle_sink_request(struct msm_dp_panel *msm_dp_panel) { - struct dp_panel_private *panel; + struct msm_dp_panel_private *panel; =20 - if (!dp_panel) { + if (!msm_dp_panel) { DRM_ERROR("invalid input\n"); return; } =20 - panel =3D container_of(dp_panel, struct dp_panel_private, dp_panel); + panel =3D container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_= panel); =20 if (panel->link->sink_request & DP_TEST_LINK_EDID_READ) { /* FIXME: get rid of drm_edid_raw() */ - const struct edid *edid =3D drm_edid_raw(dp_panel->drm_edid); + const struct edid *edid =3D drm_edid_raw(msm_dp_panel->drm_edid); u8 checksum; =20 if (edid) - checksum =3D dp_panel_get_edid_checksum(edid); + checksum =3D msm_dp_panel_get_edid_checksum(edid); else - checksum =3D dp_panel->connector->real_edid_checksum; + checksum =3D msm_dp_panel->connector->real_edid_checksum; =20 - dp_link_send_edid_checksum(panel->link, checksum); - dp_link_send_test_response(panel->link); + msm_dp_link_send_edid_checksum(panel->link, checksum); + msm_dp_link_send_test_response(panel->link); } } =20 -void dp_panel_tpg_config(struct dp_panel *dp_panel, bool enable) +void msm_dp_panel_tpg_config(struct msm_dp_panel *msm_dp_panel, bool enabl= e) { - struct dp_catalog *catalog; - struct dp_panel_private *panel; + struct msm_dp_catalog *catalog; + struct msm_dp_panel_private *panel; =20 - if (!dp_panel) { + if (!msm_dp_panel) { DRM_ERROR("invalid input\n"); return; } =20 - panel =3D container_of(dp_panel, struct dp_panel_private, dp_panel); + panel =3D container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_= panel); catalog =3D panel->catalog; =20 if (!panel->panel_on) { @@ -262,31 +262,31 @@ void dp_panel_tpg_config(struct dp_panel *dp_panel, b= ool enable) } =20 if (!enable) { - dp_catalog_panel_tpg_disable(catalog); + msm_dp_catalog_panel_tpg_disable(catalog); return; } =20 drm_dbg_dp(panel->drm_dev, "calling catalog tpg_enable\n"); - dp_catalog_panel_tpg_enable(catalog, &panel->dp_panel.dp_mode.drm_mode); + msm_dp_catalog_panel_tpg_enable(catalog, &panel->msm_dp_panel.msm_dp_mode= .drm_mode); } =20 -static int dp_panel_setup_vsc_sdp_yuv_420(struct dp_panel *dp_panel) +static int msm_dp_panel_setup_vsc_sdp_yuv_420(struct msm_dp_panel *msm_dp_= panel) { - struct dp_catalog *catalog; - struct dp_panel_private *panel; - struct dp_display_mode *dp_mode; + struct msm_dp_catalog *catalog; + struct msm_dp_panel_private *panel; + struct msm_dp_display_mode *msm_dp_mode; struct drm_dp_vsc_sdp vsc_sdp_data; struct dp_sdp vsc_sdp; ssize_t len; =20 - if (!dp_panel) { + if (!msm_dp_panel) { DRM_ERROR("invalid input\n"); return -EINVAL; } =20 - panel =3D container_of(dp_panel, struct dp_panel_private, dp_panel); + panel =3D container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_= panel); catalog =3D panel->catalog; - dp_mode =3D &dp_panel->dp_mode; + msm_dp_mode =3D &msm_dp_panel->msm_dp_mode; =20 memset(&vsc_sdp_data, 0, sizeof(vsc_sdp_data)); =20 @@ -300,7 +300,7 @@ static int dp_panel_setup_vsc_sdp_yuv_420(struct dp_pan= el *dp_panel) vsc_sdp_data.colorimetry =3D DP_COLORIMETRY_DEFAULT; =20 /* VSC SDP Payload for DB17 */ - vsc_sdp_data.bpc =3D dp_mode->bpp / 3; + vsc_sdp_data.bpc =3D msm_dp_mode->bpp / 3; vsc_sdp_data.dynamic_range =3D DP_DYNAMIC_RANGE_CTA; =20 /* VSC SDP Payload for DB18 */ @@ -312,36 +312,36 @@ static int dp_panel_setup_vsc_sdp_yuv_420(struct dp_p= anel *dp_panel) return len; } =20 - dp_catalog_panel_enable_vsc_sdp(catalog, &vsc_sdp); + msm_dp_catalog_panel_enable_vsc_sdp(catalog, &vsc_sdp); =20 return 0; } =20 -void dp_panel_dump_regs(struct dp_panel *dp_panel) +void msm_dp_panel_dump_regs(struct msm_dp_panel *msm_dp_panel) { - struct dp_catalog *catalog; - struct dp_panel_private *panel; + struct msm_dp_catalog *catalog; + struct msm_dp_panel_private *panel; =20 - panel =3D container_of(dp_panel, struct dp_panel_private, dp_panel); + panel =3D container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_= panel); catalog =3D panel->catalog; =20 - dp_catalog_dump_regs(catalog); + msm_dp_catalog_dump_regs(catalog); } =20 -int dp_panel_timing_cfg(struct dp_panel *dp_panel) +int msm_dp_panel_timing_cfg(struct msm_dp_panel *msm_dp_panel) { u32 data, total_ver, total_hor; - struct dp_catalog *catalog; - struct dp_panel_private *panel; + struct msm_dp_catalog *catalog; + struct msm_dp_panel_private *panel; struct drm_display_mode *drm_mode; u32 width_blanking; u32 sync_start; - u32 dp_active; + u32 msm_dp_active; u32 total; =20 - panel =3D container_of(dp_panel, struct dp_panel_private, dp_panel); + panel =3D container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_= panel); catalog =3D panel->catalog; - drm_mode =3D &panel->dp_panel.dp_mode.drm_mode; + drm_mode =3D &panel->msm_dp_panel.msm_dp_mode.drm_mode; =20 drm_dbg_dp(panel->drm_dev, "width=3D%d hporch=3D %d %d %d\n", drm_mode->hdisplay, drm_mode->htotal - drm_mode->hsync_end, @@ -371,9 +371,9 @@ int dp_panel_timing_cfg(struct dp_panel *dp_panel) =20 data =3D drm_mode->vsync_end - drm_mode->vsync_start; data <<=3D 16; - data |=3D (panel->dp_panel.dp_mode.v_active_low << 31); + data |=3D (panel->msm_dp_panel.msm_dp_mode.v_active_low << 31); data |=3D drm_mode->hsync_end - drm_mode->hsync_start; - data |=3D (panel->dp_panel.dp_mode.h_active_low << 15); + data |=3D (panel->msm_dp_panel.msm_dp_mode.h_active_low << 15); =20 width_blanking =3D data; =20 @@ -381,26 +381,26 @@ int dp_panel_timing_cfg(struct dp_panel *dp_panel) data <<=3D 16; data |=3D drm_mode->hdisplay; =20 - dp_active =3D data; + msm_dp_active =3D data; =20 - dp_catalog_panel_timing_cfg(catalog, total, sync_start, width_blanking, d= p_active); + msm_dp_catalog_panel_timing_cfg(catalog, total, sync_start, width_blankin= g, msm_dp_active); =20 - if (dp_panel->dp_mode.out_fmt_is_yuv_420) - dp_panel_setup_vsc_sdp_yuv_420(dp_panel); + if (msm_dp_panel->msm_dp_mode.out_fmt_is_yuv_420) + msm_dp_panel_setup_vsc_sdp_yuv_420(msm_dp_panel); =20 panel->panel_on =3D true; =20 return 0; } =20 -int dp_panel_init_panel_info(struct dp_panel *dp_panel) +int msm_dp_panel_init_panel_info(struct msm_dp_panel *msm_dp_panel) { struct drm_display_mode *drm_mode; - struct dp_panel_private *panel; + struct msm_dp_panel_private *panel; =20 - drm_mode =3D &dp_panel->dp_mode.drm_mode; + drm_mode =3D &msm_dp_panel->msm_dp_mode.drm_mode; =20 - panel =3D container_of(dp_panel, struct dp_panel_private, dp_panel); + panel =3D container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_= panel); =20 /* * print resolution info as this is a result @@ -421,18 +421,18 @@ int dp_panel_init_panel_info(struct dp_panel *dp_pane= l) drm_mode->vsync_end - drm_mode->vsync_start); drm_dbg_dp(panel->drm_dev, "pixel clock (KHz)=3D(%d)\n", drm_mode->clock); - drm_dbg_dp(panel->drm_dev, "bpp =3D %d\n", dp_panel->dp_mode.bpp); + drm_dbg_dp(panel->drm_dev, "bpp =3D %d\n", msm_dp_panel->msm_dp_mode.bpp); =20 - dp_panel->dp_mode.bpp =3D dp_panel_get_mode_bpp(dp_panel, dp_panel->dp_mo= de.bpp, - dp_panel->dp_mode.drm_mode.clock); + msm_dp_panel->msm_dp_mode.bpp =3D msm_dp_panel_get_mode_bpp(msm_dp_panel,= msm_dp_panel->msm_dp_mode.bpp, + msm_dp_panel->msm_dp_mode.drm_mode.clock); =20 drm_dbg_dp(panel->drm_dev, "updated bpp =3D %d\n", - dp_panel->dp_mode.bpp); + msm_dp_panel->msm_dp_mode.bpp); =20 return 0; } =20 -static u32 dp_panel_link_frequencies(struct device_node *of_node) +static u32 msm_dp_panel_link_frequencies(struct device_node *of_node) { struct device_node *endpoint; u64 frequency =3D 0; @@ -456,17 +456,17 @@ static u32 dp_panel_link_frequencies(struct device_no= de *of_node) return frequency; } =20 -static int dp_panel_parse_dt(struct dp_panel *dp_panel) +static int msm_dp_panel_parse_dt(struct msm_dp_panel *msm_dp_panel) { - struct dp_panel_private *panel; + struct msm_dp_panel_private *panel; struct device_node *of_node; int cnt; =20 - panel =3D container_of(dp_panel, struct dp_panel_private, dp_panel); + panel =3D container_of(msm_dp_panel, struct msm_dp_panel_private, msm_dp_= panel); of_node =3D panel->dev->of_node; =20 /* - * data-lanes is the property of dp_out endpoint + * data-lanes is the property of msm_dp_out endpoint */ cnt =3D drm_of_get_data_lanes_count_ep(of_node, 1, 0, 1, DP_MAX_NUM_DP_LA= NES); if (cnt < 0) { @@ -475,21 +475,21 @@ static int dp_panel_parse_dt(struct dp_panel *dp_pane= l) } =20 if (cnt > 0) - dp_panel->max_dp_lanes =3D cnt; + msm_dp_panel->max_dp_lanes =3D cnt; else - dp_panel->max_dp_lanes =3D DP_MAX_NUM_DP_LANES; /* 4 lanes */ + msm_dp_panel->max_dp_lanes =3D DP_MAX_NUM_DP_LANES; /* 4 lanes */ =20 - dp_panel->max_dp_link_rate =3D dp_panel_link_frequencies(of_node); - if (!dp_panel->max_dp_link_rate) - dp_panel->max_dp_link_rate =3D DP_LINK_RATE_HBR2; + msm_dp_panel->max_dp_link_rate =3D msm_dp_panel_link_frequencies(of_node); + if (!msm_dp_panel->max_dp_link_rate) + msm_dp_panel->max_dp_link_rate =3D DP_LINK_RATE_HBR2; =20 return 0; } =20 -struct dp_panel *dp_panel_get(struct dp_panel_in *in) +struct msm_dp_panel *msm_dp_panel_get(struct msm_dp_panel_in *in) { - struct dp_panel_private *panel; - struct dp_panel *dp_panel; + struct msm_dp_panel_private *panel; + struct msm_dp_panel *msm_dp_panel; int ret; =20 if (!in->dev || !in->catalog || !in->aux || !in->link) { @@ -506,20 +506,20 @@ struct dp_panel *dp_panel_get(struct dp_panel_in *in) panel->catalog =3D in->catalog; panel->link =3D in->link; =20 - dp_panel =3D &panel->dp_panel; - dp_panel->max_bw_code =3D DP_LINK_BW_8_1; + msm_dp_panel =3D &panel->msm_dp_panel; + msm_dp_panel->max_bw_code =3D DP_LINK_BW_8_1; =20 - ret =3D dp_panel_parse_dt(dp_panel); + ret =3D msm_dp_panel_parse_dt(msm_dp_panel); if (ret) return ERR_PTR(ret); =20 - return dp_panel; + return msm_dp_panel; } =20 -void dp_panel_put(struct dp_panel *dp_panel) +void msm_dp_panel_put(struct msm_dp_panel *msm_dp_panel) { - if (!dp_panel) + if (!msm_dp_panel) return; =20 - drm_edid_free(dp_panel->drm_edid); + drm_edid_free(msm_dp_panel->drm_edid); } diff --git a/drivers/gpu/drm/msm/dp/dp_panel.h b/drivers/gpu/drm/msm/dp/dp_= panel.h index 6722e3923fa5..0e944db3adf2 100644 --- a/drivers/gpu/drm/msm/dp/dp_panel.h +++ b/drivers/gpu/drm/msm/dp/dp_panel.h @@ -13,7 +13,7 @@ =20 struct edid; =20 -struct dp_display_mode { +struct msm_dp_display_mode { struct drm_display_mode drm_mode; u32 bpp; u32 h_active_low; @@ -21,28 +21,28 @@ struct dp_display_mode { bool out_fmt_is_yuv_420; }; =20 -struct dp_panel_in { +struct msm_dp_panel_in { struct device *dev; struct drm_dp_aux *aux; - struct dp_link *link; - struct dp_catalog *catalog; + struct msm_dp_link *link; + struct msm_dp_catalog *catalog; }; =20 -struct dp_panel_psr { +struct msm_dp_panel_psr { u8 version; u8 capabilities; }; =20 -struct dp_panel { +struct msm_dp_panel { /* dpcd raw data */ u8 dpcd[DP_RECEIVER_CAP_SIZE]; u8 downstream_ports[DP_MAX_DOWNSTREAM_PORTS]; =20 - struct dp_link_info link_info; + struct msm_dp_link_info link_info; const struct drm_edid *drm_edid; struct drm_connector *connector; - struct dp_display_mode dp_mode; - struct dp_panel_psr psr_cap; + struct msm_dp_display_mode msm_dp_mode; + struct msm_dp_panel_psr psr_cap; bool video_test; bool vsc_sdp_supported; =20 @@ -52,18 +52,18 @@ struct dp_panel { u32 max_bw_code; }; =20 -int dp_panel_init_panel_info(struct dp_panel *dp_panel); -int dp_panel_deinit(struct dp_panel *dp_panel); -int dp_panel_timing_cfg(struct dp_panel *dp_panel); -void dp_panel_dump_regs(struct dp_panel *dp_panel); -int dp_panel_read_sink_caps(struct dp_panel *dp_panel, +int msm_dp_panel_init_panel_info(struct msm_dp_panel *msm_dp_panel); +int msm_dp_panel_deinit(struct msm_dp_panel *msm_dp_panel); +int msm_dp_panel_timing_cfg(struct msm_dp_panel *msm_dp_panel); +void msm_dp_panel_dump_regs(struct msm_dp_panel *msm_dp_panel); +int msm_dp_panel_read_sink_caps(struct msm_dp_panel *msm_dp_panel, struct drm_connector *connector); -u32 dp_panel_get_mode_bpp(struct dp_panel *dp_panel, u32 mode_max_bpp, +u32 msm_dp_panel_get_mode_bpp(struct msm_dp_panel *msm_dp_panel, u32 mode_= max_bpp, u32 mode_pclk_khz); -int dp_panel_get_modes(struct dp_panel *dp_panel, +int msm_dp_panel_get_modes(struct msm_dp_panel *msm_dp_panel, struct drm_connector *connector); -void dp_panel_handle_sink_request(struct dp_panel *dp_panel); -void dp_panel_tpg_config(struct dp_panel *dp_panel, bool enable); +void msm_dp_panel_handle_sink_request(struct msm_dp_panel *msm_dp_panel); +void msm_dp_panel_tpg_config(struct msm_dp_panel *msm_dp_panel, bool enabl= e); =20 /** * is_link_rate_valid() - validates the link rate @@ -80,7 +80,7 @@ static inline bool is_link_rate_valid(u32 bw_code) } =20 /** - * dp_link_is_lane_count_valid() - validates the lane count + * msm_dp_link_is_lane_count_valid() - validates the lane count * @lane_count: lane count requested by the sink * * Returns true if the requested lane count is supported. @@ -92,6 +92,6 @@ static inline bool is_lane_count_valid(u32 lane_count) lane_count =3D=3D 4); } =20 -struct dp_panel *dp_panel_get(struct dp_panel_in *in); -void dp_panel_put(struct dp_panel *dp_panel); +struct msm_dp_panel *msm_dp_panel_get(struct msm_dp_panel_in *in); +void msm_dp_panel_put(struct msm_dp_panel *msm_dp_panel); #endif /* _DP_PANEL_H_ */ diff --git a/drivers/gpu/drm/msm/dp/dp_utils.c b/drivers/gpu/drm/msm/dp/dp_= utils.c index da9207caf72d..2a40f07fe2d5 100644 --- a/drivers/gpu/drm/msm/dp/dp_utils.c +++ b/drivers/gpu/drm/msm/dp/dp_utils.c @@ -9,7 +9,7 @@ =20 #define DP_SDP_HEADER_SIZE 8 =20 -u8 dp_utils_get_g0_value(u8 data) +u8 msm_dp_utils_get_g0_value(u8 data) { u8 c[4]; u8 g[4]; @@ -30,7 +30,7 @@ u8 dp_utils_get_g0_value(u8 data) return ret_data; } =20 -u8 dp_utils_get_g1_value(u8 data) +u8 msm_dp_utils_get_g1_value(u8 data) { u8 c[4]; u8 g[4]; @@ -51,7 +51,7 @@ u8 dp_utils_get_g1_value(u8 data) return ret_data; } =20 -u8 dp_utils_calculate_parity(u32 data) +u8 msm_dp_utils_calculate_parity(u32 data) { u8 x0 =3D 0; u8 x1 =3D 0; @@ -65,8 +65,8 @@ u8 dp_utils_calculate_parity(u32 data) iData =3D (data >> i * 4) & 0xF; =20 ci =3D iData ^ x1; - x1 =3D x0 ^ dp_utils_get_g1_value(ci); - x0 =3D dp_utils_get_g0_value(ci); + x1 =3D x0 ^ msm_dp_utils_get_g1_value(ci); + x0 =3D msm_dp_utils_get_g0_value(ci); } =20 parity_byte =3D x1 | (x0 << 4); @@ -74,7 +74,7 @@ u8 dp_utils_calculate_parity(u32 data) return parity_byte; } =20 -ssize_t dp_utils_pack_sdp_header(struct dp_sdp_header *sdp_header, u32 *he= ader_buff) +ssize_t msm_dp_utils_pack_sdp_header(struct dp_sdp_header *sdp_header, u32= *header_buff) { size_t length; =20 @@ -83,14 +83,14 @@ ssize_t dp_utils_pack_sdp_header(struct dp_sdp_header *= sdp_header, u32 *header_b return -ENOSPC; =20 header_buff[0] =3D FIELD_PREP(HEADER_0_MASK, sdp_header->HB0) | - FIELD_PREP(PARITY_0_MASK, dp_utils_calculate_parity(sdp_header->HB0)) | + FIELD_PREP(PARITY_0_MASK, msm_dp_utils_calculate_parity(sdp_header->HB0)= ) | FIELD_PREP(HEADER_1_MASK, sdp_header->HB1) | - FIELD_PREP(PARITY_1_MASK, dp_utils_calculate_parity(sdp_header->HB1)); + FIELD_PREP(PARITY_1_MASK, msm_dp_utils_calculate_parity(sdp_header->HB1)= ); =20 header_buff[1] =3D FIELD_PREP(HEADER_2_MASK, sdp_header->HB2) | - FIELD_PREP(PARITY_2_MASK, dp_utils_calculate_parity(sdp_header->HB2)) | + FIELD_PREP(PARITY_2_MASK, msm_dp_utils_calculate_parity(sdp_header->HB2)= ) | FIELD_PREP(HEADER_3_MASK, sdp_header->HB3) | - FIELD_PREP(PARITY_3_MASK, dp_utils_calculate_parity(sdp_header->HB3)); + FIELD_PREP(PARITY_3_MASK, msm_dp_utils_calculate_parity(sdp_header->HB3)= ); =20 return length; } diff --git a/drivers/gpu/drm/msm/dp/dp_utils.h b/drivers/gpu/drm/msm/dp/dp_= utils.h index 7c056d9798dc..88d53157f5b5 100644 --- a/drivers/gpu/drm/msm/dp/dp_utils.h +++ b/drivers/gpu/drm/msm/dp/dp_utils.h @@ -28,9 +28,9 @@ #define HEADER_3_MASK GENMASK(23, 16) #define PARITY_3_MASK GENMASK(31, 24) =20 -u8 dp_utils_get_g0_value(u8 data); -u8 dp_utils_get_g1_value(u8 data); -u8 dp_utils_calculate_parity(u32 data); -ssize_t dp_utils_pack_sdp_header(struct dp_sdp_header *sdp_header, u32 *he= ader_buff); +u8 msm_dp_utils_get_g0_value(u8 data); +u8 msm_dp_utils_get_g1_value(u8 data); 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a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Follow the estalished prefix and rename eDP bridge symbols to use msm_edp_ prefix, moving the edp to the end of the symbol name. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/dp/dp_drm.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_drm.c b/drivers/gpu/drm/msm/dp/dp_dr= m.c index 6a0840266c0f..d3e241ea6941 100644 --- a/drivers/gpu/drm/msm/dp/dp_drm.c +++ b/drivers/gpu/drm/msm/dp/dp_drm.c @@ -115,7 +115,7 @@ static const struct drm_bridge_funcs msm_dp_bridge_ops = =3D { .debugfs_init =3D msm_dp_bridge_debugfs_init, }; =20 -static int edp_bridge_atomic_check(struct drm_bridge *drm_bridge, +static int msm_edp_bridge_atomic_check(struct drm_bridge *drm_bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state) @@ -136,7 +136,7 @@ static int edp_bridge_atomic_check(struct drm_bridge *d= rm_bridge, return 0; } =20 -static void edp_bridge_atomic_enable(struct drm_bridge *drm_bridge, +static void msm_edp_bridge_atomic_enable(struct drm_bridge *drm_bridge, struct drm_bridge_state *old_bridge_state) { struct drm_atomic_state *atomic_state =3D old_bridge_state->base.state; @@ -147,7 +147,7 @@ static void edp_bridge_atomic_enable(struct drm_bridge = *drm_bridge, =20 /* * Check the old state of the crtc to determine if the panel - * was put into psr state previously by the edp_bridge_atomic_disable. + * was put into psr state previously by the msm_edp_bridge_atomic_disable. * If the panel is in psr, just exit psr state and skip the full * bridge enable sequence. */ @@ -166,7 +166,7 @@ static void edp_bridge_atomic_enable(struct drm_bridge = *drm_bridge, msm_dp_bridge_atomic_enable(drm_bridge, old_bridge_state); } =20 -static void edp_bridge_atomic_disable(struct drm_bridge *drm_bridge, +static void msm_edp_bridge_atomic_disable(struct drm_bridge *drm_bridge, struct drm_bridge_state *old_bridge_state) { struct drm_atomic_state *atomic_state =3D old_bridge_state->base.state; @@ -194,7 +194,7 @@ static void edp_bridge_atomic_disable(struct drm_bridge= *drm_bridge, * If old crtc state is active, then this is a display disable * call while the sink is in psr state. So, exit psr here. * The eDP controller will be disabled in the - * edp_bridge_atomic_post_disable function. + * msm_edp_bridge_atomic_post_disable function. * * We observed sink is stuck in self refresh if psr exit is skipped * when display disable occurs while the sink is in psr state. @@ -211,7 +211,7 @@ static void edp_bridge_atomic_disable(struct drm_bridge= *drm_bridge, msm_dp_bridge_atomic_disable(drm_bridge, old_bridge_state); } =20 -static void edp_bridge_atomic_post_disable(struct drm_bridge *drm_bridge, +static void msm_edp_bridge_atomic_post_disable(struct drm_bridge *drm_brid= ge, struct drm_bridge_state *old_bridge_state) { struct drm_atomic_state *atomic_state =3D old_bridge_state->base.state; @@ -228,7 +228,7 @@ static void edp_bridge_atomic_post_disable(struct drm_b= ridge *drm_bridge, return; =20 /* - * Self refresh mode is already set in edp_bridge_atomic_disable. + * Self refresh mode is already set in msm_edp_bridge_atomic_disable. */ if (new_crtc_state->self_refresh_active) return; @@ -237,13 +237,13 @@ static void edp_bridge_atomic_post_disable(struct drm= _bridge *drm_bridge, } =20 /** - * edp_bridge_mode_valid - callback to determine if specified mode is valid + * msm_edp_bridge_mode_valid - callback to determine if specified mode is = valid * @bridge: Pointer to drm bridge structure * @info: display info * @mode: Pointer to drm mode structure * Returns: Validity status for specified mode */ -static enum drm_mode_status edp_bridge_mode_valid(struct drm_bridge *bridg= e, +static enum drm_mode_status msm_edp_bridge_mode_valid(struct drm_bridge *b= ridge, const struct drm_display_info *info, const struct drm_display_mode *mode) { @@ -268,24 +268,24 @@ static enum drm_mode_status edp_bridge_mode_valid(str= uct drm_bridge *bridge, return MODE_OK; } =20 -static void edp_bridge_debugfs_init(struct drm_bridge *bridge, struct dent= ry *root) +static void msm_edp_bridge_debugfs_init(struct drm_bridge *bridge, struct = dentry *root) { struct msm_dp *dp =3D to_dp_bridge(bridge)->msm_dp_display; =20 msm_dp_display_debugfs_init(dp, root, true); } =20 -static const struct drm_bridge_funcs edp_bridge_ops =3D { - .atomic_enable =3D edp_bridge_atomic_enable, - .atomic_disable =3D edp_bridge_atomic_disable, - .atomic_post_disable =3D edp_bridge_atomic_post_disable, +static const struct drm_bridge_funcs msm_edp_bridge_ops =3D { + .atomic_enable =3D msm_edp_bridge_atomic_enable, + .atomic_disable =3D msm_edp_bridge_atomic_disable, + .atomic_post_disable =3D msm_edp_bridge_atomic_post_disable, .mode_set =3D msm_dp_bridge_mode_set, - .mode_valid =3D edp_bridge_mode_valid, + .mode_valid =3D msm_edp_bridge_mode_valid, .atomic_reset =3D drm_atomic_helper_bridge_reset, .atomic_duplicate_state =3D drm_atomic_helper_bridge_duplicate_state, .atomic_destroy_state =3D drm_atomic_helper_bridge_destroy_state, - .atomic_check =3D edp_bridge_atomic_check, - .debugfs_init =3D edp_bridge_debugfs_init, + .atomic_check =3D msm_edp_bridge_atomic_check, + .debugfs_init =3D msm_edp_bridge_debugfs_init, }; =20 int msm_dp_bridge_init(struct msm_dp *msm_dp_display, struct drm_device *d= ev, @@ -302,7 +302,7 @@ int msm_dp_bridge_init(struct msm_dp *msm_dp_display, s= truct drm_device *dev, msm_dp_bridge->msm_dp_display =3D msm_dp_display; =20 bridge =3D &msm_dp_bridge->bridge; - bridge->funcs =3D msm_dp_display->is_edp ? &edp_bridge_ops : &msm_dp_brid= ge_ops; + bridge->funcs =3D msm_dp_display->is_edp ? &msm_edp_bridge_ops : &msm_dp_= bridge_ops; bridge->type =3D msm_dp_display->connector_type; bridge->ycbcr_420_allowed =3D yuv_supported; =20 --=20 2.39.5 From nobody Mon Nov 25 05:53:25 2024 Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BAC7320969B for ; Tue, 29 Oct 2024 20:28:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.54 ARC-Seal: i=1; a=rsa-sha256; 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Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_display.c | 38 ++++++++++++++++++---------------= ---- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/d= p_display.c index 5cc349f672c0..aba925aab7ad 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -118,7 +118,7 @@ struct msm_dp_desc { bool wide_bus_supported; }; =20 -static const struct msm_dp_desc sa8775p_dp_descs[] =3D { +static const struct msm_dp_desc msm_dp_desc_sa8775p[] =3D { { .io_start =3D 0x0af54000, .id =3D MSM_DP_CONTROLLER_0, .wide_bus_suppor= ted =3D true }, { .io_start =3D 0x0af5c000, .id =3D MSM_DP_CONTROLLER_1, .wide_bus_suppor= ted =3D true }, { .io_start =3D 0x22154000, .id =3D MSM_DP_CONTROLLER_2, .wide_bus_suppor= ted =3D true }, @@ -126,25 +126,25 @@ static const struct msm_dp_desc sa8775p_dp_descs[] = =3D { {} }; =20 -static const struct msm_dp_desc sc7180_dp_descs[] =3D { +static const struct msm_dp_desc msm_dp_desc_sc7180[] =3D { { .io_start =3D 0x0ae90000, .id =3D MSM_DP_CONTROLLER_0, .wide_bus_suppor= ted =3D true }, {} }; =20 -static const struct msm_dp_desc sc7280_dp_descs[] =3D { +static const struct msm_dp_desc msm_dp_desc_sc7280[] =3D { { .io_start =3D 0x0ae90000, .id =3D MSM_DP_CONTROLLER_0, .wide_bus_suppor= ted =3D true }, { .io_start =3D 0x0aea0000, .id =3D MSM_DP_CONTROLLER_1, .wide_bus_suppor= ted =3D true }, {} }; =20 -static const struct msm_dp_desc sc8180x_dp_descs[] =3D { +static const struct msm_dp_desc msm_dp_desc_sc8180x[] =3D { { .io_start =3D 0x0ae90000, .id =3D MSM_DP_CONTROLLER_0, .wide_bus_suppor= ted =3D true }, { .io_start =3D 0x0ae98000, .id =3D MSM_DP_CONTROLLER_1, .wide_bus_suppor= ted =3D true }, { .io_start =3D 0x0ae9a000, .id =3D MSM_DP_CONTROLLER_2, .wide_bus_suppor= ted =3D true }, {} }; =20 -static const struct msm_dp_desc sc8280xp_dp_descs[] =3D { +static const struct msm_dp_desc msm_dp_desc_sc8280xp[] =3D { { .io_start =3D 0x0ae90000, .id =3D MSM_DP_CONTROLLER_0, .wide_bus_suppor= ted =3D true }, { .io_start =3D 0x0ae98000, .id =3D MSM_DP_CONTROLLER_1, .wide_bus_suppor= ted =3D true }, { .io_start =3D 0x0ae9a000, .id =3D MSM_DP_CONTROLLER_2, .wide_bus_suppor= ted =3D true }, @@ -156,12 +156,12 @@ static const struct msm_dp_desc sc8280xp_dp_descs[] = =3D { {} }; =20 -static const struct msm_dp_desc sm8650_dp_descs[] =3D { +static const struct msm_dp_desc msm_dp_desc_sm8650[] =3D { { .io_start =3D 0x0af54000, .id =3D MSM_DP_CONTROLLER_0, .wide_bus_suppor= ted =3D true }, {} }; =20 -static const struct msm_dp_desc x1e80100_dp_descs[] =3D { +static const struct msm_dp_desc msm_dp_desc_x1e80100[] =3D { { .io_start =3D 0x0ae90000, .id =3D MSM_DP_CONTROLLER_0, .wide_bus_suppor= ted =3D true }, { .io_start =3D 0x0ae98000, .id =3D MSM_DP_CONTROLLER_1, .wide_bus_suppor= ted =3D true }, { .io_start =3D 0x0ae9a000, .id =3D MSM_DP_CONTROLLER_2, .wide_bus_suppor= ted =3D true }, @@ -170,18 +170,18 @@ static const struct msm_dp_desc x1e80100_dp_descs[] = =3D { }; =20 static const struct of_device_id msm_dp_dt_match[] =3D { - { .compatible =3D "qcom,sa8775p-dp", .data =3D &sa8775p_dp_descs }, - { .compatible =3D "qcom,sc7180-dp", .data =3D &sc7180_dp_descs }, - { .compatible =3D "qcom,sc7280-dp", .data =3D &sc7280_dp_descs }, - { .compatible =3D "qcom,sc7280-edp", .data =3D &sc7280_dp_descs }, - { .compatible =3D "qcom,sc8180x-dp", .data =3D &sc8180x_dp_descs }, - { .compatible =3D "qcom,sc8180x-edp", .data =3D &sc8180x_dp_descs }, - { .compatible =3D "qcom,sc8280xp-dp", .data =3D &sc8280xp_dp_descs }, - { .compatible =3D "qcom,sc8280xp-edp", .data =3D &sc8280xp_dp_descs }, - { .compatible =3D "qcom,sdm845-dp", .data =3D &sc7180_dp_descs }, - { .compatible =3D "qcom,sm8350-dp", .data =3D &sc7180_dp_descs }, - { .compatible =3D "qcom,sm8650-dp", .data =3D &sm8650_dp_descs }, - { .compatible =3D "qcom,x1e80100-dp", .data =3D &x1e80100_dp_descs }, + { .compatible =3D "qcom,sa8775p-dp", .data =3D &msm_dp_desc_sa8775p }, + { .compatible =3D "qcom,sc7180-dp", .data =3D &msm_dp_desc_sc7180 }, + { .compatible =3D "qcom,sc7280-dp", .data =3D &msm_dp_desc_sc7280 }, + { .compatible =3D "qcom,sc7280-edp", .data =3D &msm_dp_desc_sc7280 }, + { .compatible =3D "qcom,sc8180x-dp", .data =3D &msm_dp_desc_sc8180x }, + { .compatible =3D "qcom,sc8180x-edp", .data =3D &msm_dp_desc_sc8180x }, + { .compatible =3D "qcom,sc8280xp-dp", .data =3D &msm_dp_desc_sc8280xp }, + { .compatible =3D "qcom,sc8280xp-edp", .data =3D &msm_dp_desc_sc8280xp }, + { .compatible =3D "qcom,sdm845-dp", .data =3D &msm_dp_desc_sc7180 }, + { .compatible =3D "qcom,sm8350-dp", .data =3D &msm_dp_desc_sc7180 }, + { .compatible =3D "qcom,sm8650-dp", .data =3D &msm_dp_desc_sm8650 }, + { .compatible =3D "qcom,x1e80100-dp", .data =3D &msm_dp_desc_x1e80100 }, {} }; =20 --=20 2.39.5