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[88.11.182.158]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-43193573d47sm123144845e9.3.2024.10.28.13.36.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Oct 2024 13:36:45 -0700 (PDT) From: Sergio Paracuellos To: linux-mips@vger.kernel.org Cc: daniel.lezcano@linaro.org, tglx@linutronix.de, tsbogend@alpha.franken.de, john@phrozen.org, linux-kernel@vger.kernel.org, yangshiji66@outlook.com Subject: [PATCH v2] clocksource: Add Ralink System Tick Counter driver Date: Mon, 28 Oct 2024 21:36:43 +0100 Message-Id: <20241028203643.191268-2-sergio.paracuellos@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241028203643.191268-1-sergio.paracuellos@gmail.com> References: <20241028203643.191268-1-sergio.paracuellos@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" System Tick Counter is present on Ralink SoCs RT3352 and MT7620. This driver has been in 'arch/mips/ralink' directory since the beggining of Ralink architecture support. However, it can be moved into a more proper place in 'drivers/clocksource'. Hence add it here adding also support for compile test targets and reducing LOC in architecture code folder. Signed-off-by: Sergio Paracuellos --- arch/mips/ralink/Kconfig | 7 ------- arch/mips/ralink/Makefile | 2 -- drivers/clocksource/Kconfig | 9 +++++++++ drivers/clocksource/Makefile | 1 + .../clocksource/timer-ralink.c | 11 ++++------- 5 files changed, 14 insertions(+), 16 deletions(-) rename arch/mips/ralink/cevt-rt3352.c =3D> drivers/clocksource/timer-ralin= k.c (91%) diff --git a/arch/mips/ralink/Kconfig b/arch/mips/ralink/Kconfig index 08c012a2591f..910d059ec70b 100644 --- a/arch/mips/ralink/Kconfig +++ b/arch/mips/ralink/Kconfig @@ -1,13 +1,6 @@ # SPDX-License-Identifier: GPL-2.0 if RALINK =20 -config CLKEVT_RT3352 - bool - depends on SOC_RT305X || SOC_MT7620 - default y - select TIMER_OF - select CLKSRC_MMIO - config RALINK_ILL_ACC bool depends on SOC_RT305X diff --git a/arch/mips/ralink/Makefile b/arch/mips/ralink/Makefile index 26fabbdea1f1..0c109eae1953 100644 --- a/arch/mips/ralink/Makefile +++ b/arch/mips/ralink/Makefile @@ -10,8 +10,6 @@ ifndef CONFIG_MIPS_GIC obj-y +=3D clk.o timer.o endif =20 -obj-$(CONFIG_CLKEVT_RT3352) +=3D cevt-rt3352.o - obj-$(CONFIG_RALINK_ILL_ACC) +=3D ill_acc.o =20 obj-$(CONFIG_IRQ_INTC) +=3D irq.o diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 95dd4660b5b6..45158c9adfc9 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -753,4 +753,13 @@ config EP93XX_TIMER Enables support for the Cirrus Logic timer block EP93XX. =20 +config RALINK_TIMER + bool "Ralink System Tick Counter" + depends on SOC_RT305X || SOC_MT7620 || COMPILE_TEST + select CLKSRC_MMIO + select TIMER_OF + help + Enables support for system tick counter present on + Ralink SoCs RT3352 and MT7620. + endmenu diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 22743785299e..43ef16a4efa6 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -91,3 +91,4 @@ obj-$(CONFIG_GOLDFISH_TIMER) +=3D timer-goldfish.o obj-$(CONFIG_GXP_TIMER) +=3D timer-gxp.o obj-$(CONFIG_CLKSRC_LOONGSON1_PWM) +=3D timer-loongson1-pwm.o obj-$(CONFIG_EP93XX_TIMER) +=3D timer-ep93xx.o +obj-$(CONFIG_RALINK_TIMER) +=3D timer-ralink.o diff --git a/arch/mips/ralink/cevt-rt3352.c b/drivers/clocksource/timer-ral= ink.c similarity index 91% rename from arch/mips/ralink/cevt-rt3352.c rename to drivers/clocksource/timer-ralink.c index 269d4877d120..6ecdb4228f76 100644 --- a/arch/mips/ralink/cevt-rt3352.c +++ b/drivers/clocksource/timer-ralink.c @@ -1,7 +1,6 @@ +// SPDX-License-Identifier: GPL-2.0 /* - * This file is subject to the terms and conditions of the GNU General Pub= lic - * License. See the file "COPYING" in the main directory of this archive - * for more details. + * Ralink System Tick Counter driver present on RT3352 and MT7620 SoCs. * * Copyright (C) 2013 by John Crispin */ @@ -16,8 +15,6 @@ #include #include =20 -#include - #define SYSTICK_FREQ (50 * 1000) =20 #define SYSTICK_CONFIG 0x00 @@ -40,7 +37,7 @@ static int systick_set_oneshot(struct clock_event_device = *evt); static int systick_shutdown(struct clock_event_device *evt); =20 static int systick_next_event(unsigned long delta, - struct clock_event_device *evt) + struct clock_event_device *evt) { struct systick_device *sdev; u32 count; @@ -60,7 +57,7 @@ static void systick_event_handler(struct clock_event_devi= ce *dev) =20 static irqreturn_t systick_interrupt(int irq, void *dev_id) { - struct clock_event_device *dev =3D (struct clock_event_device *) dev_id; + struct clock_event_device *dev =3D (struct clock_event_device *)dev_id; =20 dev->event_handler(dev); =20 --=20 2.25.1