From nobody Mon Nov 25 13:53:43 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D5E4015C13A; Mon, 28 Oct 2024 16:12:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.13 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730131962; cv=none; b=HEDJvdsjDfEVQQvNv56/oL1I9o80WdxDomrXbi1zEmvHx6a6q1aqA/WYgSXTU+a7z0QQF5FoxLZqtFoC76RzZq8Ju/yIC5LVLd+C9kaiOAi16ERHmkXA+PEf/W/yzoKfgzKmRYgtOA5fvkJFcz5pi/BxYJEo8MKCn7NG592u7bw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730131962; c=relaxed/simple; bh=NevhFlPE+KNvQiSPEghiI9LcPvmTS2/0EMqAIFv1Klc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=bEcDtV/kfmmBSIERwF6zd3Fq7q50VUVKklhD2104qtQr5CMQ9yoA59a4TVyTPFvfnPpVczG71yIXB7E02wLTndCHYeA3oHUSkohhwGZzjTmhFbnfG81rxk9yGenoD75Vbp8nPqyn5zB0Fs0QQxJ9ztAtfNG/N57GhmB6Ro6I/Lg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=mpWj6jqy; arc=none smtp.client-ip=192.198.163.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="mpWj6jqy" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1730131961; x=1761667961; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NevhFlPE+KNvQiSPEghiI9LcPvmTS2/0EMqAIFv1Klc=; b=mpWj6jqyOodbrV9V3c5zPc51iUBXx+LkYQ8GW9KcMUk0mykF8i24ESrZ JUGmNZgI6IA9Xdp0WQXVxRZZG3PYSOGL22VH+jH8TbTcFUiNx2eo6ff+r pCTf2D8xJEJKiQYDw0JWpIDOOnSu+UUnPLGk6P9pf6N9tfDeIyiHYNRGM gBImZ80icHCdLb8VQWUk4KAM2U1fWlfyOwmyilCbROfIgbE+3e42yEQRH WLn8Ip33S5dnCwlH1oCjf+NJGk+me18OHGVDZAcCSsg3fm1kkQ3qFQnas BsjpWEN/k2K+yO2ndvtDjsbJmGqV59vgqQ9arBw/0gypp6HcvTTZYD5Dh Q==; X-CSE-ConnectionGUID: XJcpD+AuQQqvuII3irmZcQ== X-CSE-MsgGUID: YYqIDF1UR2Kcp2gjLm01YQ== X-IronPort-AV: E=McAfee;i="6700,10204,11239"; a="32594375" X-IronPort-AV: E=Sophos;i="6.11,239,1725346800"; d="scan'208";a="32594375" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2024 09:12:34 -0700 X-CSE-ConnectionGUID: IYTBZ+s6S1iSYr7YEVFIsQ== X-CSE-MsgGUID: ihsFtu3hRuy/yB1N+Qhmog== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,239,1725346800"; d="scan'208";a="112478968" Received: from black.fi.intel.com (HELO black.fi.intel.com.) ([10.237.72.28]) by orviesa002.jf.intel.com with ESMTP; 28 Oct 2024 09:12:22 -0700 From: Alexander Shishkin To: Andy Lutomirski , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Peter Zijlstra , Ard Biesheuvel , "Paul E. McKenney" , Josh Poimboeuf , Xiongwei Song , Xin Li , "Mike Rapoport (IBM)" , Brijesh Singh , Michael Roth , Tony Luck , "Kirill A. Shutemov" , Alexey Kardashevskiy Cc: Jonathan Corbet , Alexander Shishkin , Sohil Mehta , Ingo Molnar , Pawan Gupta , Daniel Sneddon , Kai Huang , Sandipan Das , Breno Leitao , Rick Edgecombe , Alexei Starovoitov , Hou Tao , Juergen Gross , Vegard Nossum , Kees Cook , Eric Biggers , Jason Gunthorpe , "Masami Hiramatsu (Google)" , Andrew Morton , Luis Chamberlain , Yuntao Wang , Rasmus Villemoes , Christophe Leroy , Tejun Heo , Changbin Du , Huang Shijie , Geert Uytterhoeven , Namhyung Kim , Arnaldo Carvalho de Melo , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-efi@vger.kernel.org Subject: [PATCH v5 15/16] x86/cpu: Enable LASS during CPU initialization Date: Mon, 28 Oct 2024 18:08:03 +0200 Message-ID: <20241028160917.1380714-16-alexander.shishkin@linux.intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241028160917.1380714-1-alexander.shishkin@linux.intel.com> References: <20241028160917.1380714-1-alexander.shishkin@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Sohil Mehta Being a security feature, enable LASS by default if the platform supports it. While at it, get rid of the comment above the SMAP/SMEP/UMIP/LASS setup instead of updating it to mention LASS as well, as the whole sequence is quite self-explanatory. Signed-off-by: Sohil Mehta Signed-off-by: Alexander Shishkin --- arch/x86/kernel/cpu/common.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index f8eed9548ea1..2f5faa5979a9 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -400,6 +400,12 @@ static __always_inline void setup_umip(struct cpuinfo_= x86 *c) cr4_clear_bits(X86_CR4_UMIP); } =20 +static __always_inline void setup_lass(struct cpuinfo_x86 *c) +{ + if (cpu_feature_enabled(X86_FEATURE_LASS)) + cr4_set_bits(X86_CR4_LASS); +} + /* These bits should not change their value after CPU init is finished. */ static const unsigned long cr4_pinned_mask =3D X86_CR4_SMEP | X86_CR4_SMAP= | X86_CR4_UMIP | X86_CR4_FSGSBASE | X86_CR4_CET | X86_CR4_FRED | @@ -1848,10 +1854,10 @@ static void identify_cpu(struct cpuinfo_x86 *c) /* Disable the PN if appropriate */ squash_the_stupid_serial_number(c); =20 - /* Set up SMEP/SMAP/UMIP */ setup_smep(c); setup_smap(c); setup_umip(c); + setup_lass(c); =20 /* Enable FSGSBASE instructions if available. */ if (cpu_has(c, X86_FEATURE_FSGSBASE)) { --=20 2.45.2