From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 015F51D4148; Fri, 25 Oct 2024 22:37:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895859; cv=none; b=uJpGYjwcBnI2MnBv4ZwxwgiPPk2OExTm3OC+walTGsrmz+5JYiYrZDFhEn2EFI7HDjyGm1aiNfBVsJAUI/WiHZhKviSbLkGzu5JwiTNcwDyi/iBvNdqx6uBJ+x2qFFPGj4lzO2HOpN02wjbe1Ys57F/YOfHGe550K5lMt4MOQPU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895859; c=relaxed/simple; bh=IDSnJY7RsKjislw4CKrh2p9I65EaCS/4prjVLqvtiDc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=c2wFtzB+Sx+hyQa3gWBcmwbUqvPX3eBRjyiRZdhcKcJj5fRG850wLb09JX0KnwhMOCq7hq1RWWpX2IwfrZuT3EgAdXUPo4jeOZxRIhFk2y3RAV9QEuLBhVwEV40UvStDMtXUQRlBu8o7ymIWPV/4XJoX5hnfRQ3OBaOtB5hgN40= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=CM7sD/GZ; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="CM7sD/GZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895857; x=1761431857; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IDSnJY7RsKjislw4CKrh2p9I65EaCS/4prjVLqvtiDc=; b=CM7sD/GZa+9CLxTsqzCCGCoj4rw3TQu3Qqr02w60pCcxGU6jhcnRapnT iHMQLe8fdRGv8NjFNT/uZJ62mthseyijw50q3aYyzL6ux/+ty1yDjiWPt JDT0aQMeAfAGu4X1ypkWCM9Mw09PfYrMD4iaLwNkiEfExtFN3PGBobu8k LsteDTGEj3R0NGFjbl9isAazx9UFOzd3l8rkpNA2k/R5mrqjzBmgi9glN RRuCV/4BjSupnMg8MuYQmJvrFLayPYu5joBV9jHvrj4jyJ2orEEP9jLTx z47XCWs6i1hX0qFYjB4wBWYP5unZbvOYLYITwJ3s4ebHkMiPJ2n7+4m9T Q==; X-CSE-ConnectionGUID: KdZPFd20Sum5LQqiDPCIuQ== X-CSE-MsgGUID: e07nVacLRzGnjQdqDHNvTw== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474620" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474620" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:36 -0700 X-CSE-ConnectionGUID: iP2gRJdkQiqNQDwAUAx8jA== X-CSE-MsgGUID: jBUP6c7cSgatJZfCWgRx4w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596132" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:36 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 01/19] fpga: dfl: omit unneeded argument pdata from dfl_feature_instance_init() Date: Fri, 25 Oct 2024 18:36:56 -0400 Message-ID: <20241025223714.394533-2-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The argument pdata passed to dfl_feature_instance_init() was never used. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - No changes. Changes since v2: - New patch extracted from monolithic v1 patch. --- drivers/fpga/dfl.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index c406b949026f..8512a1da6570 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -520,7 +520,6 @@ void dfl_fpga_dev_feature_uinit(struct platform_device = *pdev) EXPORT_SYMBOL_GPL(dfl_fpga_dev_feature_uinit); =20 static int dfl_feature_instance_init(struct platform_device *pdev, - struct dfl_feature_platform_data *pdata, struct dfl_feature *feature, struct dfl_feature_driver *drv) { @@ -587,8 +586,7 @@ int dfl_fpga_dev_feature_init(struct platform_device *p= dev, while (drv->ops) { dfl_fpga_dev_for_each_feature(pdata, feature) { if (dfl_feature_drv_match(feature, drv)) { - ret =3D dfl_feature_instance_init(pdev, pdata, - feature, drv); + ret =3D dfl_feature_instance_init(pdev, feature, drv); if (ret) goto exit; } --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A2B7420C32A; Fri, 25 Oct 2024 22:37:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895859; cv=none; b=Jq1ttOy9U0F5aEXUg2kCROo4q02cVwNsKAUZF8lnRLwu+Jz8sMvIBBZP/7jkkINccSY0E/guNinFWc78AZEwD7Y7fMKDAcOnxBfMWz/wPbt3gquTnzSnaX9BFI8yzLZRAgzS7A433zuoKpI0Lgj2qVvuMf7zG3YBKkNRaaZEf0g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895859; c=relaxed/simple; bh=t/eDquHdQtPksxf+cN85hxasPj4P3jziW0jkWuve/9w=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WmJ/wWglS8Axm1SnX4ksCXSK5NvEsx8QVfAWs53mEM5fbnLIgh4Mz+67+dRISFGtKMHvfB09O1oBCOF9cFYSHrYz/rCVS2NNcgZylOL7+tcrY9BpquULm6QtO0Vo1sY3OA7U5YU1zor2Xt6kPRVzvC9P7Awy3VVRezjJz/OW8Aw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Q9lKcBiG; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Q9lKcBiG" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895857; x=1761431857; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=t/eDquHdQtPksxf+cN85hxasPj4P3jziW0jkWuve/9w=; b=Q9lKcBiGNrvgYobff63tdNSyA0MgScpgPQpPmZywNM79SQkfJdUZFHyS y4WX54OZrFcLe5ciwP+y7Qivph1O1CfWl31Yn8A2bTZqdwJ4AfGeTgULr o5CgF+7M8QmoT3AiqFFssQA/QA4pEUijqRlLBhwPej0zpWzXt3LqxM9Yf NIriL3WxSvw1pUwhQdu7c6OFKdXFrueYlaVT4oh9PBO9fpBIHKqzFWKDn YnQ+ceuA8BjN8lFTTUVlR5C7p+HZG/7+OjrWjEhIgqUKEvyPJH09Gj9ou rqTTyJSfOJILQ1cHxd9kwJCdhucN3bEKHLmtsRHm9utUAbPrwpfyofctf A==; X-CSE-ConnectionGUID: Fgo6GRAgSE2bmgn9ofbYdw== X-CSE-MsgGUID: ut0miWxbRYiXMApoPXyEeQ== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474624" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474624" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:36 -0700 X-CSE-ConnectionGUID: QmXDFlBlR0KlWFnZuYxElw== X-CSE-MsgGUID: BYSEru3KQsGJnhqKoulsJw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596135" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 02/19] fpga: dfl: return platform data from dfl_fpga_inode_to_feature_dev_data() Date: Fri, 25 Oct 2024 18:36:57 -0400 Message-ID: <20241025223714.394533-3-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Refactor dfl_fpga_inode_to_feature_dev() to directly return the feature device platform data instead of the platform device, and retrieve the device from the data. The null pointer checks are not needed since the platform device is guaranteed to have associated feature device data. This patch is part of a refactoring of the internal DFL APIs to move the feature device data into a new struct dfl_feature_dev_data which lifetime is independent of the corresponding platform device. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - Revise subject and description to detail the refactoring of dfl_fpga_inode_to_feature_dev_data() and mention the reason for the refactoring. Changes since v2: - New patch extracted from monolithic v1 patch. --- drivers/fpga/dfl-afu-main.c | 8 ++------ drivers/fpga/dfl-fme-main.c | 7 ++----- drivers/fpga/dfl.h | 6 +++--- 3 files changed, 7 insertions(+), 14 deletions(-) diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c index 6b97c073849e..6125e2faada8 100644 --- a/drivers/fpga/dfl-afu-main.c +++ b/drivers/fpga/dfl-afu-main.c @@ -595,14 +595,10 @@ static struct dfl_feature_driver port_feature_drvs[] = =3D { =20 static int afu_open(struct inode *inode, struct file *filp) { - struct platform_device *fdev =3D dfl_fpga_inode_to_feature_dev(inode); - struct dfl_feature_platform_data *pdata; + struct dfl_feature_platform_data *pdata =3D dfl_fpga_inode_to_feature_dev= _data(inode); + struct platform_device *fdev =3D pdata->dev; int ret; =20 - pdata =3D dev_get_platdata(&fdev->dev); - if (WARN_ON(!pdata)) - return -ENODEV; - mutex_lock(&pdata->lock); ret =3D dfl_feature_dev_use_begin(pdata, filp->f_flags & O_EXCL); if (!ret) { diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl-fme-main.c index 864924f68f5e..480a187289bb 100644 --- a/drivers/fpga/dfl-fme-main.c +++ b/drivers/fpga/dfl-fme-main.c @@ -598,13 +598,10 @@ static long fme_ioctl_check_extension(struct dfl_feat= ure_platform_data *pdata, =20 static int fme_open(struct inode *inode, struct file *filp) { - struct platform_device *fdev =3D dfl_fpga_inode_to_feature_dev(inode); - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&fdev->dev); + struct dfl_feature_platform_data *pdata =3D dfl_fpga_inode_to_feature_dev= _data(inode); + struct platform_device *fdev =3D pdata->dev; int ret; =20 - if (WARN_ON(!pdata)) - return -ENODEV; - mutex_lock(&pdata->lock); ret =3D dfl_feature_dev_use_begin(pdata, filp->f_flags & O_EXCL); if (!ret) { diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index 5063d73b0d82..2285215f444e 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -398,14 +398,14 @@ int dfl_fpga_dev_ops_register(struct platform_device = *pdev, struct module *owner); void dfl_fpga_dev_ops_unregister(struct platform_device *pdev); =20 -static inline -struct platform_device *dfl_fpga_inode_to_feature_dev(struct inode *inode) +static inline struct dfl_feature_platform_data * +dfl_fpga_inode_to_feature_dev_data(struct inode *inode) { struct dfl_feature_platform_data *pdata; =20 pdata =3D container_of(inode->i_cdev, struct dfl_feature_platform_data, cdev); - return pdata->dev; + return pdata; } =20 #define dfl_fpga_dev_for_each_feature(pdata, feature) \ --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A671620EA27; Fri, 25 Oct 2024 22:37:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895860; cv=none; b=ZoslKDqOIhgU6zwZaqCbjUNqi3QqykcAxyVIoO1myiPOFAFgFeXviCvCrOa7gzvt/MaC7f5DMQAHISdt4Ynvq7Vv0PXuC21yyleVir0lBd8+XzGdBT03AkHUp0dgnYSk/Onj2zV1Pe5kPs1gYGbMPJoQiRKRUa+pJY3ArDPpBWY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895860; c=relaxed/simple; bh=TIhPf4gICUkQlHeW3/dFU2F3Ui/ikGZEwT0j5BenxZo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ogjpO8JYmvT78rkbUbwUdssar6gm80Ikv5AEfQCi+/hVz6cbyOGcwWSby0bgYdPHXlpZEngb8TYOp2lKAmRW0wFwjcdKHBf6MkL6ymMeFjbm0E3IVTfojgDuzl7KzPiS25il4Z10ajvy/xZnaTlY6pVN1RsSKQXW/5by00Wuhfs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=nu020YXP; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="nu020YXP" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895858; x=1761431858; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=TIhPf4gICUkQlHeW3/dFU2F3Ui/ikGZEwT0j5BenxZo=; b=nu020YXPgApI4VvRKYYqH+25UkCfX7NwZtgTnO0PFlhvJNNJQHVk0JoP 7StNQTcxNdaqvTu3iaV03lmEXv+pVLRuwD2K/xG5Ow5tv4IVRp7wAFj0n rlisRlmOAH62PEOfcLq1xvymvSumKnJwnonfsT1Rlw9dwQyNHUTvXkZ6N k6uwrox+MkHWvMurXHH0wM8YXnsDtUjysQMDoTGNs6HbiuXq7IodPKj89 pW/drcfv71BaKECUXqmK6SUA2WHJFY4w3cZwrMXmgy4u6DfHFzrILMJTy SE5iTYIO5WbPIIIaIJjysevwtQyjBpTITjcPZwz5YFrmpEpAwVbjOizE/ g==; X-CSE-ConnectionGUID: wxXPY2MWTB2afRqTl7k3hw== X-CSE-MsgGUID: 2Bt/RGEuQPWvb6cD4/aYkw== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474628" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474628" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:36 -0700 X-CSE-ConnectionGUID: 8Vmv2uZYS9yXTdR0tvfu/A== X-CSE-MsgGUID: LTqm3GKNQlqBVFjMiBnP9w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596138" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 03/19] fpga: dfl: afu: use parent device to log errors on port enable/disable Date: Fri, 25 Oct 2024 18:36:58 -0400 Message-ID: <20241025223714.394533-4-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" AFU port enable/disable may be triggered from userspace at any point, e.g., after a port has been released. This commit prepares a subsequent commit that destroys the port platform device on port release, which is then no longer available during port enable/disable. Use the parent, physical DFL, e.g., PCIe FPGA device instead for logging errors. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - Replace "physical" with "physical DFL" (device) in description for consistency with other patches. Changes since v2: - New patch extracted from monolithic v1 patch. --- drivers/fpga/dfl-afu-main.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c index 6125e2faada8..c0f2db72b5b9 100644 --- a/drivers/fpga/dfl-afu-main.c +++ b/drivers/fpga/dfl-afu-main.c @@ -60,7 +60,8 @@ int __afu_port_enable(struct platform_device *pdev) if (readq_poll_timeout(base + PORT_HDR_CTRL, v, !(v & PORT_CTRL_SFTRST_ACK), RST_POLL_INVL, RST_POLL_TIMEOUT)) { - dev_err(&pdev->dev, "timeout, failure to enable device\n"); + dev_err(pdata->dfl_cdev->parent, + "timeout, failure to enable device\n"); return -ETIMEDOUT; } =20 @@ -99,7 +100,8 @@ int __afu_port_disable(struct platform_device *pdev) if (readq_poll_timeout(base + PORT_HDR_CTRL, v, v & PORT_CTRL_SFTRST_ACK, RST_POLL_INVL, RST_POLL_TIMEOUT)) { - dev_err(&pdev->dev, "timeout, failure to disable device\n"); + dev_err(pdata->dfl_cdev->parent, + "timeout, failure to disable device\n"); return -ETIMEDOUT; } =20 --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E85320EA57; Fri, 25 Oct 2024 22:37:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895861; cv=none; b=qKQ1Jk3wMs1wDci7fs2n8NIyfoOKgYaxaSFCzpfT0bR+hRYZrtDwhlpjM5459tWyLHrrOEerSqYjCLseENCHaJdL2vIiXddZmomRsrK6kSB1KiqnHylnaUiL+zhglENEDHdzBB9HJp9AbSvv/Yve6ZgNaE8t1CKwinOoPnld4IQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895861; c=relaxed/simple; bh=4EpIr/QbHAf5VSnHA+eoSdbqRod75X1ulEa3Hi5vx4U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hiq115eYs4Wc045eNeFTlby8REvgkcE64Wc3xpPZhxoy/z8DqkPuyyZ/8+nnZk0X+AXOh6w0gDEN08XyneJ15JObzMcVohf5m2vJ3eagZhkfJ6KkGBxBQjPbQgEVCaqw2t5WsQ4H7w7kdqKtE69iCNG1wuwcLgabWsaXWeF2OVs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=d1Jp6yr8; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="d1Jp6yr8" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895859; x=1761431859; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=4EpIr/QbHAf5VSnHA+eoSdbqRod75X1ulEa3Hi5vx4U=; b=d1Jp6yr89m/JXcOCdcWub/nGCqLhUmuL+6ifo3WLQp6yAO/kq0HjYm0v cOjbE2QnaLgaKMDBwa9m7F0dFI9u4SO9zmkOKmhpntm1nWv0OJrLBOssd tP5q/xHNCRb9VEQc+N47330XO0xh885W+YsDEdFVxye2dtXw4j7rhzW2f oI3O+s0drT1X3qeczUosPc+q4pMS/Ds/SxRJISHnhZNcNmnr8uxJYuPHs RfDBizIJyLcf0OuBClZt8DZC5/Lzh1PPxd92bzgzNdFQEO49zyF8odIsx 6yjCvRnApnn55TiUpHVTl5hjGKzWAYdTbmgoznMLmL0s9TbQu9ZsPfnyw g==; X-CSE-ConnectionGUID: jQ5ClB3cTFiPsMIn9IQvjQ== X-CSE-MsgGUID: ez2fxgVGS7STST6s7NjlrQ== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474632" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474632" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 X-CSE-ConnectionGUID: 0CyB29yATDiKLsDvmAkaLw== X-CSE-MsgGUID: 83NTp/o1TIyCo+Mo4COcjw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596143" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 04/19] fpga: dfl: afu: define local pointer to feature device Date: Fri, 25 Oct 2024 18:36:59 -0400 Message-ID: <20241025223714.394533-5-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Define local pointer to pdata->dev->dev to avoid repetition. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - No changes. Changes since v2: - New patch extracted from monolithic v1 patch. --- drivers/fpga/dfl-afu-dma-region.c | 9 +++++---- drivers/fpga/dfl-afu-region.c | 5 +++-- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/fpga/dfl-afu-dma-region.c b/drivers/fpga/dfl-afu-dma-r= egion.c index 02b60fde0430..814191e623e1 100644 --- a/drivers/fpga/dfl-afu-dma-region.c +++ b/drivers/fpga/dfl-afu-dma-region.c @@ -301,6 +301,7 @@ afu_dma_region_find_iova(struct dfl_feature_platform_da= ta *pdata, u64 iova) int afu_dma_map_region(struct dfl_feature_platform_data *pdata, u64 user_addr, u64 length, u64 *iova) { + struct device *dev =3D &pdata->dev->dev; struct dfl_afu_dma_region *region; int ret; =20 @@ -325,13 +326,13 @@ int afu_dma_map_region(struct dfl_feature_platform_da= ta *pdata, /* Pin the user memory region */ ret =3D afu_dma_pin_pages(pdata, region); if (ret) { - dev_err(&pdata->dev->dev, "failed to pin memory region\n"); + dev_err(dev, "failed to pin memory region\n"); goto free_region; } =20 /* Only accept continuous pages, return error else */ if (!afu_dma_check_continuous_pages(region)) { - dev_err(&pdata->dev->dev, "pages are not continuous\n"); + dev_err(dev, "pages are not continuous\n"); ret =3D -EINVAL; goto unpin_pages; } @@ -342,7 +343,7 @@ int afu_dma_map_region(struct dfl_feature_platform_data= *pdata, region->length, DMA_BIDIRECTIONAL); if (dma_mapping_error(dfl_fpga_pdata_to_parent(pdata), region->iova)) { - dev_err(&pdata->dev->dev, "failed to map for dma\n"); + dev_err(dev, "failed to map for dma\n"); ret =3D -EFAULT; goto unpin_pages; } @@ -353,7 +354,7 @@ int afu_dma_map_region(struct dfl_feature_platform_data= *pdata, ret =3D afu_dma_region_add(pdata, region); mutex_unlock(&pdata->lock); if (ret) { - dev_err(&pdata->dev->dev, "failed to add dma region\n"); + dev_err(dev, "failed to add dma region\n"); goto unmap_dma; } =20 diff --git a/drivers/fpga/dfl-afu-region.c b/drivers/fpga/dfl-afu-region.c index 2e7b41629406..8f0e9485214a 100644 --- a/drivers/fpga/dfl-afu-region.c +++ b/drivers/fpga/dfl-afu-region.c @@ -50,11 +50,12 @@ static struct dfl_afu_mmio_region *get_region_by_index(= struct dfl_afu *afu, int afu_mmio_region_add(struct dfl_feature_platform_data *pdata, u32 region_index, u64 region_size, u64 phys, u32 flags) { + struct device *dev =3D &pdata->dev->dev; struct dfl_afu_mmio_region *region; struct dfl_afu *afu; int ret =3D 0; =20 - region =3D devm_kzalloc(&pdata->dev->dev, sizeof(*region), GFP_KERNEL); + region =3D devm_kzalloc(dev, sizeof(*region), GFP_KERNEL); if (!region) return -ENOMEM; =20 @@ -85,7 +86,7 @@ int afu_mmio_region_add(struct dfl_feature_platform_data = *pdata, return 0; =20 exit: - devm_kfree(&pdata->dev->dev, region); + devm_kfree(dev, region); return ret; } =20 --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0C8E21440F; Fri, 25 Oct 2024 22:37:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895864; cv=none; b=djFTUL7qWxCrRmWNyh/YMtbgFqu/GgyIcfxQHq/vQ6W3MYQzT3JFLGsF8AFs2COSokGPjL2z979/TFjMGOaVPswb52WWB90OYNS3iv/SnKoLeKPQRCC1ORiLijazAIjgRGBLg1EK9KIaa9PY3711GykYUeHyoxn8qIxhjj12ryc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895864; c=relaxed/simple; bh=ZKQLKJf8qMoAi+ZaDefFo7iLDZn0iAFXB4pv0MiRSyo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=STPlfvhqC15tVXt7Y8afOgfoyA8ER6QaG/YIZlCZ5wpNVzW8MYwpTam6hEe7URXib4ZdPo7vEZnvU+zX5bhWxB9MIqcdb8Ln2TuDPDLoP0z9pRStLQ9EnI+RZ3+MxZ4LdbqlJuH2JD7R6fTqSdTmPKoAoafqigX7lO8vr92NeKQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=R0T1UY4W; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="R0T1UY4W" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895860; x=1761431860; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZKQLKJf8qMoAi+ZaDefFo7iLDZn0iAFXB4pv0MiRSyo=; b=R0T1UY4WFtPzMBMyNkNvdFLO5+eaP1JBAfdnLa8kVuirVFGSWennJI4n 8SYRVCQh6rQrlHptyhlXpkXl7rZ+h43g/8QyumvCpU4zI+kj4KKDLOvoN a1PvKQCeWBovqhiq9mXDqySFiTv6N1IftFmLYSf795EER10GhyoNd9r2V BeGgoWIcyYwqJCC+0A2xoWInNKlzQiddwT3so4dW8v7F4rjZUYhusmgIH J79fqyTz93ZTuWWlK8BO43ZE6tCkSUPRXD123qjP48Zcd0N2bkADDWmwt /h6+fz9Uu0bceqs47obcTqQIgm4jCZZzb4CvplERFgMLltAIj8DS1om9C Q==; X-CSE-ConnectionGUID: qMdX+tftREadLwOTARXsyw== X-CSE-MsgGUID: qAAvhHzcTNi+cMLiTpZRYw== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474638" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474638" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 X-CSE-ConnectionGUID: W1z3XFMSR0yl4eZvbA8+kQ== X-CSE-MsgGUID: o74tM0XsTUeI80zEd0ubWg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596146" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 05/19] fpga: dfl: pass feature platform data instead of device as argument Date: Fri, 25 Oct 2024 18:37:00 -0400 Message-ID: <20241025223714.394533-6-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" For functions which use the feature platform data, instead of invoking dev_get_platdata() on the device, directly pass the data as an argument. This patch is part of a refactoring of the internal DFL APIs to move the feature device data into a new struct dfl_feature_dev_data which lifetime is independent of the corresponding platform device. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - Extend description to mention the reason for the refactoring. Changes since v2: - New patch extracted from monolithic v1 patch. --- drivers/fpga/dfl-afu-error.c | 29 +++++++------- drivers/fpga/dfl-afu-main.c | 76 +++++++++++++++++++----------------- drivers/fpga/dfl-afu.h | 4 +- drivers/fpga/dfl-fme-br.c | 26 ++++++------ drivers/fpga/dfl-fme-error.c | 32 ++++++++------- drivers/fpga/dfl-fme-main.c | 18 ++++++--- drivers/fpga/dfl-fme-pr.c | 6 +-- drivers/fpga/dfl.c | 71 ++++++++++++++------------------- drivers/fpga/dfl.h | 35 +++++++++-------- 9 files changed, 150 insertions(+), 147 deletions(-) diff --git a/drivers/fpga/dfl-afu-error.c b/drivers/fpga/dfl-afu-error.c index ab7be6217368..ad6ea19faaa0 100644 --- a/drivers/fpga/dfl-afu-error.c +++ b/drivers/fpga/dfl-afu-error.c @@ -28,11 +28,11 @@ #define ERROR_MASK GENMASK_ULL(63, 0) =20 /* mask or unmask port errors by the error mask register. */ -static void __afu_port_err_mask(struct device *dev, bool mask) +static void __afu_port_err_mask(struct dfl_feature_platform_data *pdata, b= ool mask) { void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); =20 writeq(mask ? ERROR_MASK : 0, base + PORT_ERROR_MASK); } @@ -42,7 +42,7 @@ static void afu_port_err_mask(struct device *dev, bool ma= sk) struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); =20 mutex_lock(&pdata->lock); - __afu_port_err_mask(dev, mask); + __afu_port_err_mask(pdata, mask); mutex_unlock(&pdata->lock); } =20 @@ -50,13 +50,12 @@ static void afu_port_err_mask(struct device *dev, bool = mask) static int afu_port_err_clear(struct device *dev, u64 err) { struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); - struct platform_device *pdev =3D to_platform_device(dev); void __iomem *base_err, *base_hdr; int enable_ret =3D 0, ret =3D -EBUSY; u64 v; =20 - base_err =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR); - base_hdr =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); + base_err =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); + base_hdr =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 mutex_lock(&pdata->lock); =20 @@ -80,12 +79,12 @@ static int afu_port_err_clear(struct device *dev, u64 e= rr) } =20 /* Halt Port by keeping Port in reset */ - ret =3D __afu_port_disable(pdev); + ret =3D __afu_port_disable(pdata); if (ret) goto done; =20 /* Mask all errors */ - __afu_port_err_mask(dev, true); + __afu_port_err_mask(pdata, true); =20 /* Clear errors if err input matches with current port errors.*/ v =3D readq(base_err + PORT_ERROR); @@ -102,10 +101,10 @@ static int afu_port_err_clear(struct device *dev, u64= err) } =20 /* Clear mask */ - __afu_port_err_mask(dev, false); + __afu_port_err_mask(pdata, false); =20 /* Enable the Port by clearing the reset */ - enable_ret =3D __afu_port_enable(pdev); + enable_ret =3D __afu_port_enable(pdata); =20 done: mutex_unlock(&pdata->lock); @@ -119,7 +118,7 @@ static ssize_t errors_show(struct device *dev, struct d= evice_attribute *attr, void __iomem *base; u64 error; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); =20 mutex_lock(&pdata->lock); error =3D readq(base + PORT_ERROR); @@ -150,7 +149,7 @@ static ssize_t first_error_show(struct device *dev, void __iomem *base; u64 error; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); =20 mutex_lock(&pdata->lock); error =3D readq(base + PORT_FIRST_ERROR); @@ -168,7 +167,7 @@ static ssize_t first_malformed_req_show(struct device *= dev, void __iomem *base; u64 req0, req1; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_ERROR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); =20 mutex_lock(&pdata->lock); req0 =3D readq(base + PORT_MALFORMED_REQ0); @@ -190,13 +189,15 @@ static struct attribute *port_err_attrs[] =3D { static umode_t port_err_attrs_visible(struct kobject *kobj, struct attribute *attr, int n) { + struct dfl_feature_platform_data *pdata; struct device *dev =3D kobj_to_dev(kobj); =20 + pdata =3D dev_get_platdata(dev); /* * sysfs entries are visible only if related private feature is * enumerated. */ - if (!dfl_get_feature_by_id(dev, PORT_FEATURE_ID_ERROR)) + if (!dfl_get_feature_by_id(pdata, PORT_FEATURE_ID_ERROR)) return 0; =20 return attr->mode; diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c index c0f2db72b5b9..c86d01f49633 100644 --- a/drivers/fpga/dfl-afu-main.c +++ b/drivers/fpga/dfl-afu-main.c @@ -26,7 +26,7 @@ =20 /** * __afu_port_enable - enable a port by clear reset - * @pdev: port platform device. + * @pdata: feature device platform data * * Enable Port by clear the port soft reset bit, which is set by default. * The AFU is unable to respond to any MMIO access while in reset. @@ -35,9 +35,8 @@ * * The caller needs to hold lock for protection. */ -int __afu_port_enable(struct platform_device *pdev) +int __afu_port_enable(struct dfl_feature_platform_data *pdata) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); void __iomem *base; u64 v; =20 @@ -46,7 +45,7 @@ int __afu_port_enable(struct platform_device *pdev) if (--pdata->disable_count !=3D 0) return 0; =20 - base =3D dfl_get_feature_ioaddr_by_id(&pdev->dev, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 /* Clear port soft reset */ v =3D readq(base + PORT_HDR_CTRL); @@ -70,22 +69,21 @@ int __afu_port_enable(struct platform_device *pdev) =20 /** * __afu_port_disable - disable a port by hold reset - * @pdev: port platform device. + * @pdata: feature device platform data * * Disable Port by setting the port soft reset bit, it puts the port into = reset. * * The caller needs to hold lock for protection. */ -int __afu_port_disable(struct platform_device *pdev) +int __afu_port_disable(struct dfl_feature_platform_data *pdata) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); void __iomem *base; u64 v; =20 if (pdata->disable_count++ !=3D 0) return 0; =20 - base =3D dfl_get_feature_ioaddr_by_id(&pdev->dev, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 /* Set port soft reset */ v =3D readq(base + PORT_HDR_CTRL); @@ -120,15 +118,15 @@ int __afu_port_disable(struct platform_device *pdev) * (disabled). Any attempts on MMIO access to AFU while in reset, will * result errors reported via port error reporting sub feature (if present= ). */ -static int __port_reset(struct platform_device *pdev) +static int __port_reset(struct dfl_feature_platform_data *pdata) { int ret; =20 - ret =3D __afu_port_disable(pdev); + ret =3D __afu_port_disable(pdata); if (ret) return ret; =20 - return __afu_port_enable(pdev); + return __afu_port_enable(pdata); } =20 static int port_reset(struct platform_device *pdev) @@ -137,17 +135,17 @@ static int port_reset(struct platform_device *pdev) int ret; =20 mutex_lock(&pdata->lock); - ret =3D __port_reset(pdev); + ret =3D __port_reset(pdata); mutex_unlock(&pdata->lock); =20 return ret; } =20 -static int port_get_id(struct platform_device *pdev) +static int port_get_id(struct dfl_feature_platform_data *pdata) { void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(&pdev->dev, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 return FIELD_GET(PORT_CAP_PORT_NUM, readq(base + PORT_HDR_CAP)); } @@ -155,7 +153,8 @@ static int port_get_id(struct platform_device *pdev) static ssize_t id_show(struct device *dev, struct device_attribute *attr, char *buf) { - int id =3D port_get_id(to_platform_device(dev)); + struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + int id =3D port_get_id(pdata); =20 return scnprintf(buf, PAGE_SIZE, "%d\n", id); } @@ -168,7 +167,7 @@ ltr_show(struct device *dev, struct device_attribute *a= ttr, char *buf) void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 mutex_lock(&pdata->lock); v =3D readq(base + PORT_HDR_CTRL); @@ -189,7 +188,7 @@ ltr_store(struct device *dev, struct device_attribute *= attr, if (kstrtobool(buf, <r)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 mutex_lock(&pdata->lock); v =3D readq(base + PORT_HDR_CTRL); @@ -209,7 +208,7 @@ ap1_event_show(struct device *dev, struct device_attrib= ute *attr, char *buf) void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 mutex_lock(&pdata->lock); v =3D readq(base + PORT_HDR_STS); @@ -229,7 +228,7 @@ ap1_event_store(struct device *dev, struct device_attri= bute *attr, if (kstrtobool(buf, &clear) || !clear) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 mutex_lock(&pdata->lock); writeq(PORT_STS_AP1_EVT, base + PORT_HDR_STS); @@ -247,7 +246,7 @@ ap2_event_show(struct device *dev, struct device_attrib= ute *attr, void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 mutex_lock(&pdata->lock); v =3D readq(base + PORT_HDR_STS); @@ -267,7 +266,7 @@ ap2_event_store(struct device *dev, struct device_attri= bute *attr, if (kstrtobool(buf, &clear) || !clear) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 mutex_lock(&pdata->lock); writeq(PORT_STS_AP2_EVT, base + PORT_HDR_STS); @@ -284,7 +283,7 @@ power_state_show(struct device *dev, struct device_attr= ibute *attr, char *buf) void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 mutex_lock(&pdata->lock); v =3D readq(base + PORT_HDR_STS); @@ -305,7 +304,7 @@ userclk_freqcmd_store(struct device *dev, struct device= _attribute *attr, if (kstrtou64(buf, 0, &userclk_freq_cmd)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 mutex_lock(&pdata->lock); writeq(userclk_freq_cmd, base + PORT_HDR_USRCLK_CMD0); @@ -326,7 +325,7 @@ userclk_freqcntrcmd_store(struct device *dev, struct de= vice_attribute *attr, if (kstrtou64(buf, 0, &userclk_freqcntr_cmd)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 mutex_lock(&pdata->lock); writeq(userclk_freqcntr_cmd, base + PORT_HDR_USRCLK_CMD1); @@ -344,7 +343,7 @@ userclk_freqsts_show(struct device *dev, struct device_= attribute *attr, u64 userclk_freqsts; void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 mutex_lock(&pdata->lock); userclk_freqsts =3D readq(base + PORT_HDR_USRCLK_STS0); @@ -362,7 +361,7 @@ userclk_freqcntrsts_show(struct device *dev, struct dev= ice_attribute *attr, u64 userclk_freqcntrsts; void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 mutex_lock(&pdata->lock); userclk_freqcntrsts =3D readq(base + PORT_HDR_USRCLK_STS1); @@ -389,11 +388,13 @@ static struct attribute *port_hdr_attrs[] =3D { static umode_t port_hdr_attrs_visible(struct kobject *kobj, struct attribute *attr, int n) { + struct dfl_feature_platform_data *pdata; struct device *dev =3D kobj_to_dev(kobj); umode_t mode =3D attr->mode; void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_HEADER); + pdata =3D dev_get_platdata(dev); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); =20 if (dfl_feature_revision(base) > 0) { /* @@ -462,7 +463,7 @@ afu_id_show(struct device *dev, struct device_attribute= *attr, char *buf) void __iomem *base; u64 guidl, guidh; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, PORT_FEATURE_ID_AFU); + base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_AFU); =20 mutex_lock(&pdata->lock); if (pdata->disable_count) { @@ -486,13 +487,15 @@ static struct attribute *port_afu_attrs[] =3D { static umode_t port_afu_attrs_visible(struct kobject *kobj, struct attribute *attr, int n) { + struct dfl_feature_platform_data *pdata; struct device *dev =3D kobj_to_dev(kobj); =20 + pdata =3D dev_get_platdata(dev); /* * sysfs entries are visible only if related private feature is * enumerated. */ - if (!dfl_get_feature_by_id(dev, PORT_FEATURE_ID_AFU)) + if (!dfl_get_feature_by_id(pdata, PORT_FEATURE_ID_AFU)) return 0; =20 return attr->mode; @@ -506,9 +509,10 @@ static const struct attribute_group port_afu_group =3D= { static int port_afu_init(struct platform_device *pdev, struct dfl_feature *feature) { + struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); struct resource *res =3D &pdev->resource[feature->resource_index]; =20 - return afu_mmio_region_add(dev_get_platdata(&pdev->dev), + return afu_mmio_region_add(pdata, DFL_PORT_REGION_INDEX_AFU, resource_size(res), res->start, DFL_PORT_REGION_MMAP | DFL_PORT_REGION_READ | @@ -527,9 +531,10 @@ static const struct dfl_feature_ops port_afu_ops =3D { static int port_stp_init(struct platform_device *pdev, struct dfl_feature *feature) { + struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); struct resource *res =3D &pdev->resource[feature->resource_index]; =20 - return afu_mmio_region_add(dev_get_platdata(&pdev->dev), + return afu_mmio_region_add(pdata, DFL_PORT_REGION_INDEX_STP, resource_size(res), res->start, DFL_PORT_REGION_MMAP | DFL_PORT_REGION_READ | @@ -630,7 +635,7 @@ static int afu_release(struct inode *inode, struct file= *filp) dfl_fpga_dev_for_each_feature(pdata, feature) dfl_fpga_set_irq_triggers(feature, 0, feature->nr_irqs, NULL); - __port_reset(pdev); + __port_reset(pdata); afu_dma_region_destroy(pdata); } mutex_unlock(&pdata->lock); @@ -878,16 +883,15 @@ static int afu_dev_destroy(struct platform_device *pd= ev) return 0; } =20 -static int port_enable_set(struct platform_device *pdev, bool enable) +static int port_enable_set(struct dfl_feature_platform_data *pdata, bool e= nable) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); int ret; =20 mutex_lock(&pdata->lock); if (enable) - ret =3D __afu_port_enable(pdev); + ret =3D __afu_port_enable(pdata); else - ret =3D __afu_port_disable(pdev); + ret =3D __afu_port_disable(pdata); mutex_unlock(&pdata->lock); =20 return ret; diff --git a/drivers/fpga/dfl-afu.h b/drivers/fpga/dfl-afu.h index 7bef3e300aa2..6d1e79240c70 100644 --- a/drivers/fpga/dfl-afu.h +++ b/drivers/fpga/dfl-afu.h @@ -77,8 +77,8 @@ struct dfl_afu { }; =20 /* hold pdata->lock when call __afu_port_enable/disable */ -int __afu_port_enable(struct platform_device *pdev); -int __afu_port_disable(struct platform_device *pdev); +int __afu_port_enable(struct dfl_feature_platform_data *pdata); +int __afu_port_disable(struct dfl_feature_platform_data *pdata); =20 void afu_mmio_region_init(struct dfl_feature_platform_data *pdata); int afu_mmio_region_add(struct dfl_feature_platform_data *pdata, diff --git a/drivers/fpga/dfl-fme-br.c b/drivers/fpga/dfl-fme-br.c index 0b01b3895277..c19ddb02a161 100644 --- a/drivers/fpga/dfl-fme-br.c +++ b/drivers/fpga/dfl-fme-br.c @@ -22,34 +22,34 @@ struct fme_br_priv { struct dfl_fme_br_pdata *pdata; struct dfl_fpga_port_ops *port_ops; - struct platform_device *port_pdev; + struct dfl_feature_platform_data *port_pdata; }; =20 static int fme_bridge_enable_set(struct fpga_bridge *bridge, bool enable) { + struct dfl_feature_platform_data *port_pdata; struct fme_br_priv *priv =3D bridge->priv; - struct platform_device *port_pdev; struct dfl_fpga_port_ops *ops; =20 - if (!priv->port_pdev) { - port_pdev =3D dfl_fpga_cdev_find_port(priv->pdata->cdev, - &priv->pdata->port_id, - dfl_fpga_check_port_id); - if (!port_pdev) + if (!priv->port_pdata) { + port_pdata =3D dfl_fpga_cdev_find_port_data(priv->pdata->cdev, + &priv->pdata->port_id, + dfl_fpga_check_port_id); + if (!port_pdata) return -ENODEV; =20 - priv->port_pdev =3D port_pdev; + priv->port_pdata =3D port_pdata; } =20 - if (priv->port_pdev && !priv->port_ops) { - ops =3D dfl_fpga_port_ops_get(priv->port_pdev); + if (priv->port_pdata && !priv->port_ops) { + ops =3D dfl_fpga_port_ops_get(priv->port_pdata); if (!ops || !ops->enable_set) return -ENOENT; =20 priv->port_ops =3D ops; } =20 - return priv->port_ops->enable_set(priv->port_pdev, enable); + return priv->port_ops->enable_set(priv->port_pdata, enable); } =20 static const struct fpga_bridge_ops fme_bridge_ops =3D { @@ -85,8 +85,8 @@ static void fme_br_remove(struct platform_device *pdev) =20 fpga_bridge_unregister(br); =20 - if (priv->port_pdev) - put_device(&priv->port_pdev->dev); + if (priv->port_pdata) + put_device(&priv->port_pdata->dev->dev); if (priv->port_ops) dfl_fpga_port_ops_put(priv->port_ops); } diff --git a/drivers/fpga/dfl-fme-error.c b/drivers/fpga/dfl-fme-error.c index 51c2892ec06d..39b8e3b450d7 100644 --- a/drivers/fpga/dfl-fme-error.c +++ b/drivers/fpga/dfl-fme-error.c @@ -46,7 +46,7 @@ static ssize_t pcie0_errors_show(struct device *dev, void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); =20 mutex_lock(&pdata->lock); value =3D readq(base + PCIE0_ERROR); @@ -67,7 +67,7 @@ static ssize_t pcie0_errors_store(struct device *dev, if (kstrtou64(buf, 0, &val)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); =20 mutex_lock(&pdata->lock); writeq(GENMASK_ULL(63, 0), base + PCIE0_ERROR_MASK); @@ -91,7 +91,7 @@ static ssize_t pcie1_errors_show(struct device *dev, void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); =20 mutex_lock(&pdata->lock); value =3D readq(base + PCIE1_ERROR); @@ -112,7 +112,7 @@ static ssize_t pcie1_errors_store(struct device *dev, if (kstrtou64(buf, 0, &val)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); =20 mutex_lock(&pdata->lock); writeq(GENMASK_ULL(63, 0), base + PCIE1_ERROR_MASK); @@ -132,9 +132,10 @@ static DEVICE_ATTR_RW(pcie1_errors); static ssize_t nonfatal_errors_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)readq(base + RAS_NONFAT_ERROR)); @@ -144,9 +145,10 @@ static DEVICE_ATTR_RO(nonfatal_errors); static ssize_t catfatal_errors_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)readq(base + RAS_CATFAT_ERROR)); @@ -160,7 +162,7 @@ static ssize_t inject_errors_show(struct device *dev, void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); =20 mutex_lock(&pdata->lock); v =3D readq(base + RAS_ERROR_INJECT); @@ -185,7 +187,7 @@ static ssize_t inject_errors_store(struct device *dev, if (inject_error & ~INJECT_ERROR_MASK) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); =20 mutex_lock(&pdata->lock); v =3D readq(base + RAS_ERROR_INJECT); @@ -205,7 +207,7 @@ static ssize_t fme_errors_show(struct device *dev, void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); =20 mutex_lock(&pdata->lock); value =3D readq(base + FME_ERROR); @@ -226,7 +228,7 @@ static ssize_t fme_errors_store(struct device *dev, if (kstrtou64(buf, 0, &val)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); =20 mutex_lock(&pdata->lock); writeq(GENMASK_ULL(63, 0), base + FME_ERROR_MASK); @@ -252,7 +254,7 @@ static ssize_t first_error_show(struct device *dev, void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); =20 mutex_lock(&pdata->lock); value =3D readq(base + FME_FIRST_ERROR); @@ -269,7 +271,7 @@ static ssize_t next_error_show(struct device *dev, void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); =20 mutex_lock(&pdata->lock); value =3D readq(base + FME_NEXT_ERROR); @@ -294,13 +296,15 @@ static struct attribute *fme_global_err_attrs[] =3D { static umode_t fme_global_err_attrs_visible(struct kobject *kobj, struct attribute *attr, int n) { + struct dfl_feature_platform_data *pdata; struct device *dev =3D kobj_to_dev(kobj); =20 + pdata =3D dev_get_platdata(dev); /* * sysfs entries are visible only if related private feature is * enumerated. */ - if (!dfl_get_feature_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR)) + if (!dfl_get_feature_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR)) return 0; =20 return attr->mode; @@ -317,7 +321,7 @@ static void fme_err_mask(struct device *dev, bool mask) struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); =20 mutex_lock(&pdata->lock); =20 diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl-fme-main.c index 480a187289bb..4964e15e910b 100644 --- a/drivers/fpga/dfl-fme-main.c +++ b/drivers/fpga/dfl-fme-main.c @@ -28,10 +28,11 @@ static ssize_t ports_num_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_CAP); =20 @@ -47,10 +48,11 @@ static DEVICE_ATTR_RO(ports_num); static ssize_t bitstream_id_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_BITSTREAM_ID); =20 @@ -65,10 +67,11 @@ static DEVICE_ATTR_RO(bitstream_id); static ssize_t bitstream_metadata_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_BITSTREAM_MD); =20 @@ -79,10 +82,11 @@ static DEVICE_ATTR_RO(bitstream_metadata); static ssize_t cache_size_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_CAP); =20 @@ -94,10 +98,11 @@ static DEVICE_ATTR_RO(cache_size); static ssize_t fabric_version_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_CAP); =20 @@ -109,10 +114,11 @@ static DEVICE_ATTR_RO(fabric_version); static ssize_t socket_id_show(struct device *dev, struct device_attribute *attr, char *buf) { + struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(dev, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_CAP); =20 diff --git a/drivers/fpga/dfl-fme-pr.c b/drivers/fpga/dfl-fme-pr.c index cdcf6dea4cc9..97fc0e402edf 100644 --- a/drivers/fpga/dfl-fme-pr.c +++ b/drivers/fpga/dfl-fme-pr.c @@ -87,8 +87,7 @@ static int fme_pr(struct platform_device *pdev, unsigned = long arg) return -EINVAL; =20 /* get fme header region */ - fme_hdr =3D dfl_get_feature_ioaddr_by_id(&pdev->dev, - FME_FEATURE_ID_HEADER); + fme_hdr =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); =20 /* check port id */ v =3D readq(fme_hdr + FME_HDR_CAP); @@ -378,8 +377,7 @@ static int pr_mgmt_init(struct platform_device *pdev, int ret =3D -ENODEV, i =3D 0; u64 fme_cap, port_offset; =20 - fme_hdr =3D dfl_get_feature_ioaddr_by_id(&pdev->dev, - FME_FEATURE_ID_HEADER); + fme_hdr =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); =20 mutex_lock(&pdata->lock); priv =3D dfl_fpga_pdata_get_private(pdata); diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index 8512a1da6570..4c79d433d216 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -161,7 +161,7 @@ static LIST_HEAD(dfl_port_ops_list); * * Please note that must dfl_fpga_port_ops_put after use the port_ops. */ -struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct platform_device *pd= ev) +struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct dfl_feature_platfor= m_data *pdata) { struct dfl_fpga_port_ops *ops =3D NULL; =20 @@ -171,7 +171,7 @@ struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct = platform_device *pdev) =20 list_for_each_entry(ops, &dfl_port_ops_list, node) { /* match port_ops using the name of platform device */ - if (!strcmp(pdev->name, ops->name)) { + if (!strcmp(pdata->dev->name, ops->name)) { if (!try_module_get(ops->owner)) ops =3D NULL; goto done; @@ -227,19 +227,18 @@ EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_del); * * Return: 1 if port device matches with given port id, otherwise 0. */ -int dfl_fpga_check_port_id(struct platform_device *pdev, void *pport_id) +int dfl_fpga_check_port_id(struct dfl_feature_platform_data *pdata, void *= pport_id) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); struct dfl_fpga_port_ops *port_ops; =20 if (pdata->id !=3D FEATURE_DEV_ID_UNUSED) return pdata->id =3D=3D *(int *)pport_id; =20 - port_ops =3D dfl_fpga_port_ops_get(pdev); + port_ops =3D dfl_fpga_port_ops_get(pdata); if (!port_ops || !port_ops->get_id) return 0; =20 - pdata->id =3D port_ops->get_id(pdev); + pdata->id =3D port_ops->get_id(pdata); dfl_fpga_port_ops_put(port_ops); =20 return pdata->id =3D=3D *(int *)pport_id; @@ -741,11 +740,9 @@ struct dfl_feature_info { u64 params[]; }; =20 -static void dfl_fpga_cdev_add_port_dev(struct dfl_fpga_cdev *cdev, - struct platform_device *port) +static void dfl_fpga_cdev_add_port_data(struct dfl_fpga_cdev *cdev, + struct dfl_feature_platform_data *pdata) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&port->dev); - mutex_lock(&cdev->lock); list_add(&pdata->node, &cdev->port_dev_list); get_device(&pdata->dev->dev); @@ -865,8 +862,8 @@ static int build_info_commit_dev(struct build_feature_d= evs_info *binfo) ret =3D platform_device_add(binfo->feature_dev); if (!ret) { if (type =3D=3D PORT_ID) - dfl_fpga_cdev_add_port_dev(binfo->cdev, - binfo->feature_dev); + dfl_fpga_cdev_add_port_data(binfo->cdev, + pdata); else binfo->cdev->fme_dev =3D get_device(&binfo->feature_dev->dev); @@ -1641,7 +1638,7 @@ void dfl_fpga_feature_devs_remove(struct dfl_fpga_cde= v *cdev) EXPORT_SYMBOL_GPL(dfl_fpga_feature_devs_remove); =20 /** - * __dfl_fpga_cdev_find_port - find a port under given container device + * __dfl_fpga_cdev_find_port_data - find a port under given container devi= ce * * @cdev: container device * @data: data passed to match function @@ -1654,23 +1651,20 @@ EXPORT_SYMBOL_GPL(dfl_fpga_feature_devs_remove); * * NOTE: you will need to drop the device reference with put_device() afte= r use. */ -struct platform_device * -__dfl_fpga_cdev_find_port(struct dfl_fpga_cdev *cdev, void *data, - int (*match)(struct platform_device *, void *)) +struct dfl_feature_platform_data * +__dfl_fpga_cdev_find_port_data(struct dfl_fpga_cdev *cdev, void *data, + int (*match)(struct dfl_feature_platform_data *, void *)) { struct dfl_feature_platform_data *pdata; - struct platform_device *port_dev; =20 list_for_each_entry(pdata, &cdev->port_dev_list, node) { - port_dev =3D pdata->dev; - - if (match(port_dev, data) && get_device(&port_dev->dev)) - return port_dev; + if (match(pdata, data) && get_device(&pdata->dev->dev)) + return pdata; } =20 return NULL; } -EXPORT_SYMBOL_GPL(__dfl_fpga_cdev_find_port); +EXPORT_SYMBOL_GPL(__dfl_fpga_cdev_find_port_data); =20 static int __init dfl_fpga_init(void) { @@ -1705,32 +1699,29 @@ static int __init dfl_fpga_init(void) int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id) { struct dfl_feature_platform_data *pdata; - struct platform_device *port_pdev; int ret =3D -ENODEV; =20 mutex_lock(&cdev->lock); - port_pdev =3D __dfl_fpga_cdev_find_port(cdev, &port_id, - dfl_fpga_check_port_id); - if (!port_pdev) + pdata =3D __dfl_fpga_cdev_find_port_data(cdev, &port_id, + dfl_fpga_check_port_id); + if (!pdata) goto unlock_exit; =20 - if (!device_is_registered(&port_pdev->dev)) { + if (!device_is_registered(&pdata->dev->dev)) { ret =3D -EBUSY; goto put_dev_exit; } =20 - pdata =3D dev_get_platdata(&port_pdev->dev); - mutex_lock(&pdata->lock); ret =3D dfl_feature_dev_use_begin(pdata, true); mutex_unlock(&pdata->lock); if (ret) goto put_dev_exit; =20 - platform_device_del(port_pdev); + platform_device_del(pdata->dev); cdev->released_port_num++; put_dev_exit: - put_device(&port_pdev->dev); + put_device(&pdata->dev->dev); unlock_exit: mutex_unlock(&cdev->lock); return ret; @@ -1751,33 +1742,30 @@ EXPORT_SYMBOL_GPL(dfl_fpga_cdev_release_port); int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev *cdev, int port_id) { struct dfl_feature_platform_data *pdata; - struct platform_device *port_pdev; int ret =3D -ENODEV; =20 mutex_lock(&cdev->lock); - port_pdev =3D __dfl_fpga_cdev_find_port(cdev, &port_id, - dfl_fpga_check_port_id); - if (!port_pdev) + pdata =3D __dfl_fpga_cdev_find_port_data(cdev, &port_id, + dfl_fpga_check_port_id); + if (!pdata) goto unlock_exit; =20 - if (device_is_registered(&port_pdev->dev)) { + if (device_is_registered(&pdata->dev->dev)) { ret =3D -EBUSY; goto put_dev_exit; } =20 - ret =3D platform_device_add(port_pdev); + ret =3D platform_device_add(pdata->dev); if (ret) goto put_dev_exit; =20 - pdata =3D dev_get_platdata(&port_pdev->dev); - mutex_lock(&pdata->lock); dfl_feature_dev_use_end(pdata); mutex_unlock(&pdata->lock); =20 cdev->released_port_num--; put_dev_exit: - put_device(&port_pdev->dev); + put_device(&pdata->dev->dev); unlock_exit: mutex_unlock(&cdev->lock); return ret; @@ -1787,10 +1775,11 @@ EXPORT_SYMBOL_GPL(dfl_fpga_cdev_assign_port); static void config_port_access_mode(struct device *fme_dev, int port_id, bool is_vf) { + struct dfl_feature_platform_data *pdata =3D dev_get_platdata(fme_dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(fme_dev, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_PORT_OFST(port_id)); =20 diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index 2285215f444e..8ef9f33e22c1 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -206,6 +206,8 @@ #define PORT_UINT_CAP_INT_NUM GENMASK_ULL(11, 0) /* Interrupts num */ #define PORT_UINT_CAP_FST_VECT GENMASK_ULL(23, 12) /* First Vector */ =20 +struct dfl_feature_platform_data; + /** * struct dfl_fpga_port_ops - port ops * @@ -219,15 +221,15 @@ struct dfl_fpga_port_ops { const char *name; struct module *owner; struct list_head node; - int (*get_id)(struct platform_device *pdev); - int (*enable_set)(struct platform_device *pdev, bool enable); + int (*get_id)(struct dfl_feature_platform_data *pdata); + int (*enable_set)(struct dfl_feature_platform_data *pdata, bool enable); }; =20 void dfl_fpga_port_ops_add(struct dfl_fpga_port_ops *ops); void dfl_fpga_port_ops_del(struct dfl_fpga_port_ops *ops); -struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct platform_device *pd= ev); +struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct dfl_feature_platfor= m_data *pdata); void dfl_fpga_port_ops_put(struct dfl_fpga_port_ops *ops); -int dfl_fpga_check_port_id(struct platform_device *pdev, void *pport_id); +int dfl_fpga_check_port_id(struct dfl_feature_platform_data *pdata, void *= pport_id); =20 /** * struct dfl_feature_id - dfl private feature id @@ -413,9 +415,8 @@ dfl_fpga_inode_to_feature_dev_data(struct inode *inode) (feature) < (pdata)->features + (pdata)->num; (feature)++) =20 static inline -struct dfl_feature *dfl_get_feature_by_id(struct device *dev, u16 id) +struct dfl_feature *dfl_get_feature_by_id(struct dfl_feature_platform_data= *pdata, u16 id) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); struct dfl_feature *feature; =20 dfl_fpga_dev_for_each_feature(pdata, feature) @@ -426,9 +427,9 @@ struct dfl_feature *dfl_get_feature_by_id(struct device= *dev, u16 id) } =20 static inline -void __iomem *dfl_get_feature_ioaddr_by_id(struct device *dev, u16 id) +void __iomem *dfl_get_feature_ioaddr_by_id(struct dfl_feature_platform_dat= a *pdata, u16 id) { - struct dfl_feature *feature =3D dfl_get_feature_by_id(dev, id); + struct dfl_feature *feature =3D dfl_get_feature_by_id(pdata, id); =20 if (feature && feature->ioaddr) return feature->ioaddr; @@ -527,21 +528,21 @@ void dfl_fpga_feature_devs_remove(struct dfl_fpga_cde= v *cdev); * device returned by __dfl_fpga_cdev_find_port and dfl_fpga_cdev_find_port * functions. */ -struct platform_device * -__dfl_fpga_cdev_find_port(struct dfl_fpga_cdev *cdev, void *data, - int (*match)(struct platform_device *, void *)); +struct dfl_feature_platform_data * +__dfl_fpga_cdev_find_port_data(struct dfl_fpga_cdev *cdev, void *data, + int (*match)(struct dfl_feature_platform_data *, void *)); =20 -static inline struct platform_device * -dfl_fpga_cdev_find_port(struct dfl_fpga_cdev *cdev, void *data, - int (*match)(struct platform_device *, void *)) +static inline struct dfl_feature_platform_data * +dfl_fpga_cdev_find_port_data(struct dfl_fpga_cdev *cdev, void *data, + int (*match)(struct dfl_feature_platform_data *, void *)) { - struct platform_device *pdev; + struct dfl_feature_platform_data *pdata; =20 mutex_lock(&cdev->lock); - pdev =3D __dfl_fpga_cdev_find_port(cdev, data, match); + pdata =3D __dfl_fpga_cdev_find_port_data(cdev, data, match); mutex_unlock(&cdev->lock); =20 - return pdev; + return pdata; } =20 int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id); --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 556AD215C55; Fri, 25 Oct 2024 22:37:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895863; cv=none; b=G8ggjS9ce3ZylsBhJ6ywBeZoAjHHOQ6A3u0tl0Nn5ZaB2oMWDe9PQUEaw45Nv1X/dwcnMpYWxR4Q6YtKnV2UjvEy6QBZPm+hbiZ7YVthIOq2DLIjhWDLb8zUDeWHrsykZGT9JLw3KbJ4cXToBtiEt+HLhLOWnvbk9tTOrcDHQ2U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895863; c=relaxed/simple; bh=tp62J7XWQ63M0Wxps50kozrkGXN+M8YuJV3s90auLx8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CtrzsOTe+wJzRnkafkemgxbLA0Zz3VwdAbSOS9u9KBB0gw3D2kwKqJpINCI+jZXgyyHB6CdBV8ETO1tsCvav27ebnAPAr16Qktd3tAd79XvXDx1yJ1wZBuGM092DTEBOAwgjHuuq5ayvXSKsb/k83sUwJwd9X62aAIgQh4UXjkw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OLAiIaiI; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OLAiIaiI" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895861; x=1761431861; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=tp62J7XWQ63M0Wxps50kozrkGXN+M8YuJV3s90auLx8=; b=OLAiIaiI1/ZHF+SunvnYzkijVXg3tppUUiufuQPoBpYgOSiGZoOoRmyL 2GywEIgkCbuLRhibKaHF5LOabTKrFhySj1M2sCjhID/zAx2uv9pfsVAFI NIWOx5uLdWBBoQISR6srThM2mhGDHTdkCDbJm0+yrpVoTzG05NSuNTgb9 7OzLswA0SDiPYKGo1hjaU2NeSHupt2mpAWAOUgMjjap7kS8Rcmz0DRE7h VqnhO/R0kX/wCtrbSpd5nWT7r5Ok8SOLqacn3H/rF1/NrcQNXlFOws1m8 NY/CHNtUDjvXWNle2fJeirCq1GO5XEJ1lOt3+bDdwvWcTFBTnOV/92iny A==; X-CSE-ConnectionGUID: UWnimcU4Rcm3lJxLGpTdcA== X-CSE-MsgGUID: MGtGjmZIQ6iNxsPio9hBDA== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474642" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474642" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 X-CSE-ConnectionGUID: Tkk7BLINQ/6lULdP2czpLw== X-CSE-MsgGUID: VieHLxe3TWiiwUeYXmnTdg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596149" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 06/19] fpga: dfl: factor out feature data creation from build_info_commit_dev() Date: Fri, 25 Oct 2024 18:37:01 -0400 Message-ID: <20241025223714.394533-7-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a separate function, binfo_create_feature_dev_data(), which allocates and populates the feature platform data, and call the function from build_info_commit_dev(), which registers the feature platform device. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - Replace ERR_PTR(PTR_ERR(feature->ioaddr) with feature->ioaddr and remove unneeded local variable ret. - Add missing commas in description. Changes since v2: - New patch extracted from monolithic v1 patch. --- drivers/fpga/dfl.c | 72 +++++++++++++++++++++++++--------------------- 1 file changed, 40 insertions(+), 32 deletions(-) diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index 4c79d433d216..56a32f5146a3 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -749,22 +749,18 @@ static void dfl_fpga_cdev_add_port_data(struct dfl_fp= ga_cdev *cdev, mutex_unlock(&cdev->lock); } =20 -/* - * register current feature device, it is called when we need to switch to - * another feature parsing or we have parsed all features on given device - * feature list. - */ -static int build_info_commit_dev(struct build_feature_devs_info *binfo) +static struct dfl_feature_platform_data * +binfo_create_feature_dev_data(struct build_feature_devs_info *binfo) { struct platform_device *fdev =3D binfo->feature_dev; struct dfl_feature_platform_data *pdata; struct dfl_feature_info *finfo, *p; enum dfl_id_type type; - int ret, index =3D 0, res_idx =3D 0; + int index =3D 0, res_idx =3D 0; =20 type =3D feature_dev_id_type(fdev); if (WARN_ON_ONCE(type >=3D DFL_ID_MAX)) - return -EINVAL; + return ERR_PTR(-EINVAL); =20 /* * we do not need to care for the memory which is associated with @@ -774,7 +770,7 @@ static int build_info_commit_dev(struct build_feature_d= evs_info *binfo) */ pdata =3D kzalloc(struct_size(pdata, features, binfo->feature_num), GFP_K= ERNEL); if (!pdata) - return -ENOMEM; + return ERR_PTR(-ENOMEM); =20 pdata->dev =3D fdev; pdata->num =3D binfo->feature_num; @@ -799,7 +795,7 @@ static int build_info_commit_dev(struct build_feature_d= evs_info *binfo) fdev->resource =3D kcalloc(binfo->feature_num, sizeof(*fdev->resource), GFP_KERNEL); if (!fdev->resource) - return -ENOMEM; + return ERR_PTR(-ENOMEM); =20 /* fill features and resource information for feature dev */ list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) { @@ -818,7 +814,7 @@ static int build_info_commit_dev(struct build_feature_d= evs_info *binfo) finfo->params, finfo->param_size, GFP_KERNEL); if (!feature->params) - return -ENOMEM; + return ERR_PTR(-ENOMEM); =20 feature->param_size =3D finfo->param_size; } @@ -835,7 +831,7 @@ static int build_info_commit_dev(struct build_feature_d= evs_info *binfo) devm_ioremap_resource(binfo->dev, &finfo->mmio_res); if (IS_ERR(feature->ioaddr)) - return PTR_ERR(feature->ioaddr); + return feature->ioaddr; } else { feature->resource_index =3D res_idx; fdev->resource[res_idx++] =3D finfo->mmio_res; @@ -845,7 +841,7 @@ static int build_info_commit_dev(struct build_feature_d= evs_info *binfo) ctx =3D devm_kcalloc(binfo->dev, finfo->nr_irqs, sizeof(*ctx), GFP_KERNEL); if (!ctx) - return -ENOMEM; + return ERR_PTR(-ENOMEM); =20 for (i =3D 0; i < finfo->nr_irqs; i++) ctx[i].irq =3D @@ -859,25 +855,7 @@ static int build_info_commit_dev(struct build_feature_= devs_info *binfo) kfree(finfo); } =20 - ret =3D platform_device_add(binfo->feature_dev); - if (!ret) { - if (type =3D=3D PORT_ID) - dfl_fpga_cdev_add_port_data(binfo->cdev, - pdata); - else - binfo->cdev->fme_dev =3D - get_device(&binfo->feature_dev->dev); - /* - * reset it to avoid build_info_free() freeing their resource. - * - * The resource of successfully registered feature devices - * will be freed by platform_device_unregister(). See the - * comments in build_info_create_dev(). - */ - binfo->feature_dev =3D NULL; - } - - return ret; + return pdata; } =20 static int @@ -912,6 +890,36 @@ build_info_create_dev(struct build_feature_devs_info *= binfo, return 0; } =20 +static int build_info_commit_dev(struct build_feature_devs_info *binfo) +{ + struct dfl_feature_platform_data *pdata; + int ret; + + pdata =3D binfo_create_feature_dev_data(binfo); + if (IS_ERR(pdata)) + return PTR_ERR(pdata); + + ret =3D platform_device_add(binfo->feature_dev); + if (ret) + return ret; + + if (feature_dev_id_type(binfo->feature_dev) =3D=3D PORT_ID) + dfl_fpga_cdev_add_port_data(binfo->cdev, pdata); + else + binfo->cdev->fme_dev =3D get_device(&binfo->feature_dev->dev); + + /* + * reset it to avoid build_info_free() freeing their resource. + * + * The resource of successfully registered feature devices + * will be freed by platform_device_unregister(). See the + * comments in build_info_create_dev(). + */ + binfo->feature_dev =3D NULL; + + return 0; +} + static void build_info_free(struct build_feature_devs_info *binfo) { struct dfl_feature_info *finfo, *p; --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C961A214439; Fri, 25 Oct 2024 22:37:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895863; cv=none; b=jl6x9+hCJEmeiOib6eIwBGl3OegzTeRYr5cn6GUu9wSkhza6caaxv0i1RXZTz5+IbBy21s/NxLqGH6rTVB/oQcqHvatlpGMZ14RhzP1K/SI1SKd1l1zP3siNZ/rwM9az0BM1md3vVU7D4j6wzRdVl8n3E1SrKiZqk0BFQs9+9Pg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895863; c=relaxed/simple; bh=XihtfDMd0o78dix3GOFl+cpu1wKBIMLXii1mSNYMCXw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rC2LIq+Qa3WLb5pcw6QT7BhY+57TZafgFdkvpuYlDNpvRvdC32WwN+hs722Pm1KsgRGTBSzRvb5OqkPNyjWbsJ+nl6IQIZyh+O0QEJgfoLaMvA1aqlXvxrsvxti+05N9PIuZPTInmVjS4XKC8EnyFe5/U83HMSjbSSVENnGnkCQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OlUUeKDH; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OlUUeKDH" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895861; x=1761431861; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=XihtfDMd0o78dix3GOFl+cpu1wKBIMLXii1mSNYMCXw=; b=OlUUeKDHELABXIl40nVxcDE2jpjHiACQ4S4ahYPxIK+XqIaMrb6QLU4q InultSeuLS1Nh4TgIo/AjZa/exsldmiZrp8hmLph3o3yRHmQ/qSD9A6YD P4YTQQKb0bAOfeGEmIMvANuONJPqrTOTYXl8jnpVeSmYyX22pInlBkWy4 VLPlLvInwcyTnQgQ5u6CA0m9B2CHZqB8r62ZXyvSe7Lkvvcz29wPum7GX BCQLwjqrvwXjjr1LyTxgnfzmp/LDPfnJm4asaaO4rajxPBHP8xop7EjRD 572nC7CurPDdrhMqp7tBkE/ZmL3zI5mYFi58rUTS+XO1PsSOuqVtNxqDO A==; X-CSE-ConnectionGUID: YhmhWY88S+KYPwZ/DtTOeg== X-CSE-MsgGUID: Kvmhexa5TBG+r9cYVyUIvQ== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474646" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474646" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 X-CSE-ConnectionGUID: K3yIrUrpRH+k2W0PNESVww== X-CSE-MsgGUID: f+5RDEfzQPapJ8R2JZz9NA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596153" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 07/19] fpga: dfl: store FIU type in feature platform data Date: Fri, 25 Oct 2024 18:37:02 -0400 Message-ID: <20241025223714.394533-8-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Remove the local function feature_dev_id_type() in favor of persisting the FIU type in struct dfl_feature_platform_data. Add type to struct build_feature_devs_info and drop argument to build_info_create_dev(). Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - Revert change that converts is_feature_dev_detected() to use FIU type, which has been factored out into a separate, second to last patch. - Restore Christmas tree order of local variable declarations in binfo_create_feature_dev_data(). - Replace "favour" with "favor" in description. Changes since v2: - New patch extracted from monolithic v1 patch. --- drivers/fpga/dfl.c | 55 ++++++++++++++++++++++------------------------ drivers/fpga/dfl.h | 3 +++ 2 files changed, 29 insertions(+), 29 deletions(-) diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index 56a32f5146a3..86fcd3084b06 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -119,17 +119,6 @@ static void dfl_id_free(enum dfl_id_type type, int id) mutex_unlock(&dfl_id_mutex); } =20 -static enum dfl_id_type feature_dev_id_type(struct platform_device *pdev) -{ - int i; - - for (i =3D 0; i < ARRAY_SIZE(dfl_devs); i++) - if (!strcmp(dfl_devs[i].name, pdev->name)) - return i; - - return DFL_ID_MAX; -} - static enum dfl_id_type dfh_id_to_type(u16 id) { int i; @@ -379,7 +368,7 @@ dfl_dev_add(struct dfl_feature_platform_data *pdata, if (ret) goto put_dev; =20 - ddev->type =3D feature_dev_id_type(pdev); + ddev->type =3D pdata->type; ddev->feature_id =3D feature->id; ddev->revision =3D feature->revision; ddev->dfh_version =3D feature->dfh_version; @@ -693,6 +682,7 @@ EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister); * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index = of * this device. * @feature_dev: current feature device. + * @type: the current FIU type. * @ioaddr: header register region address of current FIU in enumeration. * @start: register resource start of current FIU. * @len: max register resource length of current FIU. @@ -706,6 +696,7 @@ struct build_feature_devs_info { int *irq_table; =20 struct platform_device *feature_dev; + enum dfl_id_type type; void __iomem *ioaddr; resource_size_t start; resource_size_t len; @@ -754,11 +745,10 @@ binfo_create_feature_dev_data(struct build_feature_de= vs_info *binfo) { struct platform_device *fdev =3D binfo->feature_dev; struct dfl_feature_platform_data *pdata; + enum dfl_id_type type =3D binfo->type; struct dfl_feature_info *finfo, *p; - enum dfl_id_type type; int index =3D 0, res_idx =3D 0; =20 - type =3D feature_dev_id_type(fdev); if (WARN_ON_ONCE(type >=3D DFL_ID_MAX)) return ERR_PTR(-EINVAL); =20 @@ -773,6 +763,7 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) return ERR_PTR(-ENOMEM); =20 pdata->dev =3D fdev; + pdata->type =3D type; pdata->num =3D binfo->feature_num; pdata->dfl_cdev =3D binfo->cdev; pdata->id =3D FEATURE_DEV_ID_UNUSED; @@ -859,14 +850,11 @@ binfo_create_feature_dev_data(struct build_feature_de= vs_info *binfo) } =20 static int -build_info_create_dev(struct build_feature_devs_info *binfo, - enum dfl_id_type type) +build_info_create_dev(struct build_feature_devs_info *binfo) { + enum dfl_id_type type =3D binfo->type; struct platform_device *fdev; =20 - if (type >=3D DFL_ID_MAX) - return -EINVAL; - /* * we use -ENODEV as the initialization indicator which indicates * whether the id need to be reclaimed @@ -903,7 +891,7 @@ static int build_info_commit_dev(struct build_feature_d= evs_info *binfo) if (ret) return ret; =20 - if (feature_dev_id_type(binfo->feature_dev) =3D=3D PORT_ID) + if (binfo->type =3D=3D PORT_ID) dfl_fpga_cdev_add_port_data(binfo->cdev, pdata); else binfo->cdev->fme_dev =3D get_device(&binfo->feature_dev->dev); @@ -917,6 +905,9 @@ static int build_info_commit_dev(struct build_feature_d= evs_info *binfo) */ binfo->feature_dev =3D NULL; =20 + /* reset the binfo for next FIU */ + binfo->type =3D DFL_ID_MAX; + return 0; } =20 @@ -929,8 +920,7 @@ static void build_info_free(struct build_feature_devs_i= nfo *binfo) * build_info_create_dev() */ if (binfo->feature_dev && binfo->feature_dev->id >=3D 0) { - dfl_id_free(feature_dev_id_type(binfo->feature_dev), - binfo->feature_dev->id); + dfl_id_free(binfo->type, binfo->feature_dev->id); =20 list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) { list_del(&finfo->node); @@ -1028,7 +1018,7 @@ static int parse_feature_irqs(struct build_feature_de= vs_info *binfo, * Instead, features with interrupt functionality provide * the information in feature specific registers. */ - type =3D feature_dev_id_type(binfo->feature_dev); + type =3D binfo->type; if (type =3D=3D PORT_ID) { switch (fid) { case PORT_FEATURE_ID_UINT: @@ -1230,7 +1220,7 @@ static int parse_feature_afu(struct build_feature_dev= s_info *binfo, return -EINVAL; } =20 - switch (feature_dev_id_type(binfo->feature_dev)) { + switch (binfo->type) { case PORT_ID: return parse_feature_port_afu(binfo, ofst); default: @@ -1276,6 +1266,7 @@ static void build_info_complete(struct build_feature_= devs_info *binfo) static int parse_feature_fiu(struct build_feature_devs_info *binfo, resource_size_t ofst) { + enum dfl_id_type type; int ret =3D 0; u32 offset; u16 id; @@ -1297,8 +1288,14 @@ static int parse_feature_fiu(struct build_feature_de= vs_info *binfo, v =3D readq(binfo->ioaddr + DFH); id =3D FIELD_GET(DFH_ID, v); =20 + type =3D dfh_id_to_type(id); + if (type >=3D DFL_ID_MAX) + return -EINVAL; + + binfo->type =3D type; + /* create platform device for dfl feature dev */ - ret =3D build_info_create_dev(binfo, dfh_id_to_type(id)); + ret =3D build_info_create_dev(binfo); if (ret) return ret; =20 @@ -1518,13 +1515,13 @@ EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_irq); =20 static int remove_feature_dev(struct device *dev, void *data) { + struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); struct platform_device *pdev =3D to_platform_device(dev); - enum dfl_id_type type =3D feature_dev_id_type(pdev); int id =3D pdev->id; =20 platform_device_unregister(pdev); =20 - dfl_id_free(type, id); + dfl_id_free(pdata->type, id); =20 return 0; } @@ -1576,6 +1573,7 @@ dfl_fpga_feature_devs_enumerate(struct dfl_fpga_enum_= info *info) goto unregister_region_exit; } =20 + binfo->type =3D DFL_ID_MAX; binfo->dev =3D info->dev; binfo->cdev =3D cdev; =20 @@ -1628,8 +1626,7 @@ void dfl_fpga_feature_devs_remove(struct dfl_fpga_cde= v *cdev) =20 /* remove released ports */ if (!device_is_registered(&port_dev->dev)) { - dfl_id_free(feature_dev_id_type(port_dev), - port_dev->id); + dfl_id_free(pdata->type, port_dev->id); platform_device_put(port_dev); } =20 diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index 8ef9f33e22c1..d3a8a8ef908b 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -308,6 +309,7 @@ struct dfl_feature { * @lock: mutex to protect platform data. * @cdev: cdev of feature dev. * @dev: ptr to platform device linked with this platform data. + * @type: type of DFL FIU for the feature dev. See enum dfl_id_type. * @dfl_cdev: ptr to container device. * @id: id used for this feature device. * @disable_count: count for port disable. @@ -322,6 +324,7 @@ struct dfl_feature_platform_data { struct mutex lock; struct cdev cdev; struct platform_device *dev; + enum dfl_id_type type; struct dfl_fpga_cdev *dfl_cdev; int id; unsigned int disable_count; --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 691EF216210; Fri, 25 Oct 2024 22:37:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895873; cv=none; b=WEfmtutFpUAH4+sGHNGCTjhxYFg8pV7m/HIVvG5zKfwXcumIPXY5g/BQnFjyiC6A9FSOny/uL55aV7yovPTAx8FrDU32u1sVA3kzfadgdf2RyA7ZyxHaWomhx3geCcDws1KlYpR/A1aHsaRgX/o4QNHUmNV8eJK76Env2XfWB68= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895873; c=relaxed/simple; bh=Y875wfBzMFp6Xt1Uv7hLDpDdJflTRf/R2fKxsNDl/uk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Y2N5zuHC8rBCEZweC36y6J8VHKAii8Lwli97mS5pb0mcIcBr90G/LTu9vn9xZSmxH6Wq5coa1Wyk53bP2/xsSk7orA/918Ek7FhGmTR8eZkJhvIiThbko3S7TrSMswWs/RRPaIxBbLm6TwJUSQ54jByz8/xUk43MSsKdRnhepjw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=JiHKzhYy; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="JiHKzhYy" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895863; x=1761431863; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Y875wfBzMFp6Xt1Uv7hLDpDdJflTRf/R2fKxsNDl/uk=; b=JiHKzhYydCfT3xiH5VggFd9HH0+tC5fE+2AipREBoUuaBtX9I/2UJGR/ 00lttg5+5JDTuocLL8gCI+F942RR2uDkt53HxhpbiCQ2JvaEfTgiJkT4t h+hbVgaAfqktLNOWS18j3J9pFwH0Q24GPd4YoidmKv4lUU/Eo2mtAkBrG 6GxW0hVhzr9+yjcu2MJZWpnklsLFkOkiZND2uzgCWyfedZPcwYoz8SNRW +NH+/kh9Ne8s811w3kZjXoD9ciMuduhUzf3STauSFLuG6zXEvQoKQv1JD G1+FV78r6PBtpGXeQ1IUIIA8QtwQunf65Aol3Zl6/YtM/B3f/i0pem/w5 Q==; X-CSE-ConnectionGUID: wUM6sqQfSTK9Gu/4kikUVQ== X-CSE-MsgGUID: eOtcxPLOTg24qQumwV+foQ== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474650" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474650" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 X-CSE-ConnectionGUID: hU7bA1rgRWmxljf0+hqIYg== X-CSE-MsgGUID: u2KDIU7eQOis5UfiXwB1Jw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596157" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 08/19] fpga: dfl: refactor internal DFL APIs to take/return feature device data Date: Fri, 25 Oct 2024 18:37:03 -0400 Message-ID: <20241025223714.394533-9-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This change prepares a subsequent commit which factors out the DFL enumeration info from the structure dfl_feature_platform_data into a new structure dfl_feature_dev_data, whose lifetime is independent of the feature device which will be destroyed during port release. Add an alias dfl_feature_dev_data for dfl_feature_platform_data, and an alias to_dfl_feature_dev_data() for dev_get_platdata(), and refactor internal DFL APIs to take/return dfl_feature_dev_data instead. The aliases will be replaced with implementations in a subsequent commit. This change does not introduce any functional changes. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - Add "pdata" -> "fdata" substitution when looping over ports in dfl_fpga_feature_devs_remove(). This is now needed since the last patch of the v2 series has been broken up into many smaller patches, which retain and successively modify the loop until its final removal in the new, significantly smaller last patch. - Replace "infos" with "info" in description. - Replace "may be destroyed" with "will be destroyed" (during port release) in description. - Replace generic "functions" with "internal DFL APIs" in description. Changes since v2: - New patch extracted from monolithic v1 patch. --- drivers/fpga/dfl-afu-dma-region.c | 110 ++++++------ drivers/fpga/dfl-afu-error.c | 60 +++---- drivers/fpga/dfl-afu-main.c | 276 +++++++++++++++--------------- drivers/fpga/dfl-afu-region.c | 48 +++--- drivers/fpga/dfl-afu.h | 26 +-- drivers/fpga/dfl-fme-br.c | 22 +-- drivers/fpga/dfl-fme-error.c | 102 +++++------ drivers/fpga/dfl-fme-main.c | 98 +++++------ drivers/fpga/dfl-fme-pr.c | 84 ++++----- drivers/fpga/dfl.c | 182 ++++++++++---------- drivers/fpga/dfl.h | 77 +++++---- 11 files changed, 544 insertions(+), 541 deletions(-) diff --git a/drivers/fpga/dfl-afu-dma-region.c b/drivers/fpga/dfl-afu-dma-r= egion.c index 814191e623e1..5aa7b8884374 100644 --- a/drivers/fpga/dfl-afu-dma-region.c +++ b/drivers/fpga/dfl-afu-dma-region.c @@ -16,26 +16,26 @@ =20 #include "dfl-afu.h" =20 -void afu_dma_region_init(struct dfl_feature_platform_data *pdata) +void afu_dma_region_init(struct dfl_feature_dev_data *fdata) { - struct dfl_afu *afu =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_afu *afu =3D dfl_fpga_fdata_get_private(fdata); =20 afu->dma_regions =3D RB_ROOT; } =20 /** * afu_dma_pin_pages - pin pages of given dma memory region - * @pdata: feature device platform data + * @fdata: feature dev data * @region: dma memory region to be pinned * * Pin all the pages of given dfl_afu_dma_region. * Return 0 for success or negative error code. */ -static int afu_dma_pin_pages(struct dfl_feature_platform_data *pdata, +static int afu_dma_pin_pages(struct dfl_feature_dev_data *fdata, struct dfl_afu_dma_region *region) { int npages =3D region->length >> PAGE_SHIFT; - struct device *dev =3D &pdata->dev->dev; + struct device *dev =3D &fdata->dev->dev; int ret, pinned; =20 ret =3D account_locked_vm(current->mm, npages, true); @@ -73,17 +73,17 @@ static int afu_dma_pin_pages(struct dfl_feature_platfor= m_data *pdata, =20 /** * afu_dma_unpin_pages - unpin pages of given dma memory region - * @pdata: feature device platform data + * @fdata: feature dev data * @region: dma memory region to be unpinned * * Unpin all the pages of given dfl_afu_dma_region. * Return 0 for success or negative error code. */ -static void afu_dma_unpin_pages(struct dfl_feature_platform_data *pdata, +static void afu_dma_unpin_pages(struct dfl_feature_dev_data *fdata, struct dfl_afu_dma_region *region) { long npages =3D region->length >> PAGE_SHIFT; - struct device *dev =3D &pdata->dev->dev; + struct device *dev =3D &fdata->dev->dev; =20 unpin_user_pages(region->pages, npages); kfree(region->pages); @@ -133,20 +133,20 @@ static bool dma_region_check_iova(struct dfl_afu_dma_= region *region, =20 /** * afu_dma_region_add - add given dma region to rbtree - * @pdata: feature device platform data + * @fdata: feature dev data * @region: dma region to be added * * Return 0 for success, -EEXIST if dma region has already been added. * - * Needs to be called with pdata->lock heold. + * Needs to be called with fdata->lock held. */ -static int afu_dma_region_add(struct dfl_feature_platform_data *pdata, +static int afu_dma_region_add(struct dfl_feature_dev_data *fdata, struct dfl_afu_dma_region *region) { - struct dfl_afu *afu =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_afu *afu =3D dfl_fpga_fdata_get_private(fdata); struct rb_node **new, *parent =3D NULL; =20 - dev_dbg(&pdata->dev->dev, "add region (iova =3D %llx)\n", + dev_dbg(&fdata->dev->dev, "add region (iova =3D %llx)\n", (unsigned long long)region->iova); =20 new =3D &afu->dma_regions.rb_node; @@ -177,50 +177,50 @@ static int afu_dma_region_add(struct dfl_feature_plat= form_data *pdata, =20 /** * afu_dma_region_remove - remove given dma region from rbtree - * @pdata: feature device platform data + * @fdata: feature dev data * @region: dma region to be removed * - * Needs to be called with pdata->lock heold. + * Needs to be called with fdata->lock held. */ -static void afu_dma_region_remove(struct dfl_feature_platform_data *pdata, +static void afu_dma_region_remove(struct dfl_feature_dev_data *fdata, struct dfl_afu_dma_region *region) { struct dfl_afu *afu; =20 - dev_dbg(&pdata->dev->dev, "del region (iova =3D %llx)\n", + dev_dbg(&fdata->dev->dev, "del region (iova =3D %llx)\n", (unsigned long long)region->iova); =20 - afu =3D dfl_fpga_pdata_get_private(pdata); + afu =3D dfl_fpga_fdata_get_private(fdata); rb_erase(®ion->node, &afu->dma_regions); } =20 /** * afu_dma_region_destroy - destroy all regions in rbtree - * @pdata: feature device platform data + * @fdata: feature dev data * - * Needs to be called with pdata->lock heold. + * Needs to be called with fdata->lock held. */ -void afu_dma_region_destroy(struct dfl_feature_platform_data *pdata) +void afu_dma_region_destroy(struct dfl_feature_dev_data *fdata) { - struct dfl_afu *afu =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_afu *afu =3D dfl_fpga_fdata_get_private(fdata); struct rb_node *node =3D rb_first(&afu->dma_regions); struct dfl_afu_dma_region *region; =20 while (node) { region =3D container_of(node, struct dfl_afu_dma_region, node); =20 - dev_dbg(&pdata->dev->dev, "del region (iova =3D %llx)\n", + dev_dbg(&fdata->dev->dev, "del region (iova =3D %llx)\n", (unsigned long long)region->iova); =20 rb_erase(node, &afu->dma_regions); =20 if (region->iova) - dma_unmap_page(dfl_fpga_pdata_to_parent(pdata), + dma_unmap_page(dfl_fpga_fdata_to_parent(fdata), region->iova, region->length, DMA_BIDIRECTIONAL); =20 if (region->pages) - afu_dma_unpin_pages(pdata, region); + afu_dma_unpin_pages(fdata, region); =20 node =3D rb_next(node); kfree(region); @@ -229,7 +229,7 @@ void afu_dma_region_destroy(struct dfl_feature_platform= _data *pdata) =20 /** * afu_dma_region_find - find the dma region from rbtree based on iova and= size - * @pdata: feature device platform data + * @fdata: feature dev data * @iova: address of the dma memory area * @size: size of the dma memory area * @@ -239,14 +239,14 @@ void afu_dma_region_destroy(struct dfl_feature_platfo= rm_data *pdata) * [@iova, @iova+size) * If nothing is matched returns NULL. * - * Needs to be called with pdata->lock held. + * Needs to be called with fdata->lock held. */ struct dfl_afu_dma_region * -afu_dma_region_find(struct dfl_feature_platform_data *pdata, u64 iova, u64= size) +afu_dma_region_find(struct dfl_feature_dev_data *fdata, u64 iova, u64 size) { - struct dfl_afu *afu =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_afu *afu =3D dfl_fpga_fdata_get_private(fdata); struct rb_node *node =3D afu->dma_regions.rb_node; - struct device *dev =3D &pdata->dev->dev; + struct device *dev =3D &fdata->dev->dev; =20 while (node) { struct dfl_afu_dma_region *region; @@ -276,20 +276,20 @@ afu_dma_region_find(struct dfl_feature_platform_data = *pdata, u64 iova, u64 size) =20 /** * afu_dma_region_find_iova - find the dma region from rbtree by iova - * @pdata: feature device platform data + * @fdata: feature dev data * @iova: address of the dma region * - * Needs to be called with pdata->lock held. + * Needs to be called with fdata->lock held. */ static struct dfl_afu_dma_region * -afu_dma_region_find_iova(struct dfl_feature_platform_data *pdata, u64 iova) +afu_dma_region_find_iova(struct dfl_feature_dev_data *fdata, u64 iova) { - return afu_dma_region_find(pdata, iova, 0); + return afu_dma_region_find(fdata, iova, 0); } =20 /** * afu_dma_map_region - map memory region for dma - * @pdata: feature device platform data + * @fdata: feature dev data * @user_addr: address of the memory region * @length: size of the memory region * @iova: pointer of iova address @@ -298,10 +298,10 @@ afu_dma_region_find_iova(struct dfl_feature_platform_= data *pdata, u64 iova) * of the memory region via @iova. * Return 0 for success, otherwise error code. */ -int afu_dma_map_region(struct dfl_feature_platform_data *pdata, +int afu_dma_map_region(struct dfl_feature_dev_data *fdata, u64 user_addr, u64 length, u64 *iova) { - struct device *dev =3D &pdata->dev->dev; + struct device *dev =3D &fdata->dev->dev; struct dfl_afu_dma_region *region; int ret; =20 @@ -324,7 +324,7 @@ int afu_dma_map_region(struct dfl_feature_platform_data= *pdata, region->length =3D length; =20 /* Pin the user memory region */ - ret =3D afu_dma_pin_pages(pdata, region); + ret =3D afu_dma_pin_pages(fdata, region); if (ret) { dev_err(dev, "failed to pin memory region\n"); goto free_region; @@ -338,11 +338,11 @@ int afu_dma_map_region(struct dfl_feature_platform_da= ta *pdata, } =20 /* As pages are continuous then start to do DMA mapping */ - region->iova =3D dma_map_page(dfl_fpga_pdata_to_parent(pdata), + region->iova =3D dma_map_page(dfl_fpga_fdata_to_parent(fdata), region->pages[0], 0, region->length, DMA_BIDIRECTIONAL); - if (dma_mapping_error(dfl_fpga_pdata_to_parent(pdata), region->iova)) { + if (dma_mapping_error(dfl_fpga_fdata_to_parent(fdata), region->iova)) { dev_err(dev, "failed to map for dma\n"); ret =3D -EFAULT; goto unpin_pages; @@ -350,9 +350,9 @@ int afu_dma_map_region(struct dfl_feature_platform_data= *pdata, =20 *iova =3D region->iova; =20 - mutex_lock(&pdata->lock); - ret =3D afu_dma_region_add(pdata, region); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + ret =3D afu_dma_region_add(fdata, region); + mutex_unlock(&fdata->lock); if (ret) { dev_err(dev, "failed to add dma region\n"); goto unmap_dma; @@ -361,10 +361,10 @@ int afu_dma_map_region(struct dfl_feature_platform_da= ta *pdata, return 0; =20 unmap_dma: - dma_unmap_page(dfl_fpga_pdata_to_parent(pdata), + dma_unmap_page(dfl_fpga_fdata_to_parent(fdata), region->iova, region->length, DMA_BIDIRECTIONAL); unpin_pages: - afu_dma_unpin_pages(pdata, region); + afu_dma_unpin_pages(fdata, region); free_region: kfree(region); return ret; @@ -372,34 +372,34 @@ int afu_dma_map_region(struct dfl_feature_platform_da= ta *pdata, =20 /** * afu_dma_unmap_region - unmap dma memory region - * @pdata: feature device platform data + * @fdata: feature dev data * @iova: dma address of the region * * Unmap dma memory region based on @iova. * Return 0 for success, otherwise error code. */ -int afu_dma_unmap_region(struct dfl_feature_platform_data *pdata, u64 iova) +int afu_dma_unmap_region(struct dfl_feature_dev_data *fdata, u64 iova) { struct dfl_afu_dma_region *region; =20 - mutex_lock(&pdata->lock); - region =3D afu_dma_region_find_iova(pdata, iova); + mutex_lock(&fdata->lock); + region =3D afu_dma_region_find_iova(fdata, iova); if (!region) { - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return -EINVAL; } =20 if (region->in_use) { - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return -EBUSY; } =20 - afu_dma_region_remove(pdata, region); - mutex_unlock(&pdata->lock); + afu_dma_region_remove(fdata, region); + mutex_unlock(&fdata->lock); =20 - dma_unmap_page(dfl_fpga_pdata_to_parent(pdata), + dma_unmap_page(dfl_fpga_fdata_to_parent(fdata), region->iova, region->length, DMA_BIDIRECTIONAL); - afu_dma_unpin_pages(pdata, region); + afu_dma_unpin_pages(fdata, region); kfree(region); =20 return 0; diff --git a/drivers/fpga/dfl-afu-error.c b/drivers/fpga/dfl-afu-error.c index ad6ea19faaa0..0f392d1f6d45 100644 --- a/drivers/fpga/dfl-afu-error.c +++ b/drivers/fpga/dfl-afu-error.c @@ -28,36 +28,36 @@ #define ERROR_MASK GENMASK_ULL(63, 0) =20 /* mask or unmask port errors by the error mask register. */ -static void __afu_port_err_mask(struct dfl_feature_platform_data *pdata, b= ool mask) +static void __afu_port_err_mask(struct dfl_feature_dev_data *fdata, bool m= ask) { void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR); =20 writeq(mask ? ERROR_MASK : 0, base + PORT_ERROR_MASK); } =20 static void afu_port_err_mask(struct device *dev, bool mask) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); =20 - mutex_lock(&pdata->lock); - __afu_port_err_mask(pdata, mask); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + __afu_port_err_mask(fdata, mask); + mutex_unlock(&fdata->lock); } =20 /* clear port errors. */ static int afu_port_err_clear(struct device *dev, u64 err) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base_err, *base_hdr; int enable_ret =3D 0, ret =3D -EBUSY; u64 v; =20 - base_err =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); - base_hdr =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base_err =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR); + base_hdr =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); =20 /* * clear Port Errors @@ -79,12 +79,12 @@ static int afu_port_err_clear(struct device *dev, u64 e= rr) } =20 /* Halt Port by keeping Port in reset */ - ret =3D __afu_port_disable(pdata); + ret =3D __afu_port_disable(fdata); if (ret) goto done; =20 /* Mask all errors */ - __afu_port_err_mask(pdata, true); + __afu_port_err_mask(fdata, true); =20 /* Clear errors if err input matches with current port errors.*/ v =3D readq(base_err + PORT_ERROR); @@ -101,28 +101,28 @@ static int afu_port_err_clear(struct device *dev, u64= err) } =20 /* Clear mask */ - __afu_port_err_mask(pdata, false); + __afu_port_err_mask(fdata, false); =20 /* Enable the Port by clearing the reset */ - enable_ret =3D __afu_port_enable(pdata); + enable_ret =3D __afu_port_enable(fdata); =20 done: - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return enable_ret ? enable_ret : ret; } =20 static ssize_t errors_show(struct device *dev, struct device_attribute *at= tr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 error; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); error =3D readq(base + PORT_ERROR); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)error); } @@ -145,15 +145,15 @@ static DEVICE_ATTR_RW(errors); static ssize_t first_error_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 error; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); error =3D readq(base + PORT_FIRST_ERROR); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)error); } @@ -163,16 +163,16 @@ static ssize_t first_malformed_req_show(struct device= *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 req0, req1; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_ERROR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); req0 =3D readq(base + PORT_MALFORMED_REQ0); req1 =3D readq(base + PORT_MALFORMED_REQ1); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%016llx%016llx\n", (unsigned long long)req1, (unsigned long long)req0); @@ -189,15 +189,15 @@ static struct attribute *port_err_attrs[] =3D { static umode_t port_err_attrs_visible(struct kobject *kobj, struct attribute *attr, int n) { - struct dfl_feature_platform_data *pdata; struct device *dev =3D kobj_to_dev(kobj); + struct dfl_feature_dev_data *fdata; =20 - pdata =3D dev_get_platdata(dev); + fdata =3D to_dfl_feature_dev_data(dev); /* * sysfs entries are visible only if related private feature is * enumerated. */ - if (!dfl_get_feature_by_id(pdata, PORT_FEATURE_ID_ERROR)) + if (!dfl_get_feature_by_id(fdata, PORT_FEATURE_ID_ERROR)) return 0; =20 return attr->mode; diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c index c86d01f49633..2049dadf2ee2 100644 --- a/drivers/fpga/dfl-afu-main.c +++ b/drivers/fpga/dfl-afu-main.c @@ -26,7 +26,7 @@ =20 /** * __afu_port_enable - enable a port by clear reset - * @pdata: feature device platform data + * @fdata: port feature dev data. * * Enable Port by clear the port soft reset bit, which is set by default. * The AFU is unable to respond to any MMIO access while in reset. @@ -35,17 +35,17 @@ * * The caller needs to hold lock for protection. */ -int __afu_port_enable(struct dfl_feature_platform_data *pdata) +int __afu_port_enable(struct dfl_feature_dev_data *fdata) { void __iomem *base; u64 v; =20 - WARN_ON(!pdata->disable_count); + WARN_ON(!fdata->disable_count); =20 - if (--pdata->disable_count !=3D 0) + if (--fdata->disable_count !=3D 0) return 0; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 /* Clear port soft reset */ v =3D readq(base + PORT_HDR_CTRL); @@ -59,7 +59,7 @@ int __afu_port_enable(struct dfl_feature_platform_data *p= data) if (readq_poll_timeout(base + PORT_HDR_CTRL, v, !(v & PORT_CTRL_SFTRST_ACK), RST_POLL_INVL, RST_POLL_TIMEOUT)) { - dev_err(pdata->dfl_cdev->parent, + dev_err(fdata->dfl_cdev->parent, "timeout, failure to enable device\n"); return -ETIMEDOUT; } @@ -69,21 +69,21 @@ int __afu_port_enable(struct dfl_feature_platform_data = *pdata) =20 /** * __afu_port_disable - disable a port by hold reset - * @pdata: feature device platform data + * @fdata: port feature dev data. * * Disable Port by setting the port soft reset bit, it puts the port into = reset. * * The caller needs to hold lock for protection. */ -int __afu_port_disable(struct dfl_feature_platform_data *pdata) +int __afu_port_disable(struct dfl_feature_dev_data *fdata) { void __iomem *base; u64 v; =20 - if (pdata->disable_count++ !=3D 0) + if (fdata->disable_count++ !=3D 0) return 0; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 /* Set port soft reset */ v =3D readq(base + PORT_HDR_CTRL); @@ -98,7 +98,7 @@ int __afu_port_disable(struct dfl_feature_platform_data *= pdata) if (readq_poll_timeout(base + PORT_HDR_CTRL, v, v & PORT_CTRL_SFTRST_ACK, RST_POLL_INVL, RST_POLL_TIMEOUT)) { - dev_err(pdata->dfl_cdev->parent, + dev_err(fdata->dfl_cdev->parent, "timeout, failure to disable device\n"); return -ETIMEDOUT; } @@ -118,34 +118,34 @@ int __afu_port_disable(struct dfl_feature_platform_da= ta *pdata) * (disabled). Any attempts on MMIO access to AFU while in reset, will * result errors reported via port error reporting sub feature (if present= ). */ -static int __port_reset(struct dfl_feature_platform_data *pdata) +static int __port_reset(struct dfl_feature_dev_data *fdata) { int ret; =20 - ret =3D __afu_port_disable(pdata); + ret =3D __afu_port_disable(fdata); if (ret) return ret; =20 - return __afu_port_enable(pdata); + return __afu_port_enable(fdata); } =20 static int port_reset(struct platform_device *pdev) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); int ret; =20 - mutex_lock(&pdata->lock); - ret =3D __port_reset(pdata); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + ret =3D __port_reset(fdata); + mutex_unlock(&fdata->lock); =20 return ret; } =20 -static int port_get_id(struct dfl_feature_platform_data *pdata) +static int port_get_id(struct dfl_feature_dev_data *fdata) { void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 return FIELD_GET(PORT_CAP_PORT_NUM, readq(base + PORT_HDR_CAP)); } @@ -153,8 +153,8 @@ static int port_get_id(struct dfl_feature_platform_data= *pdata) static ssize_t id_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); - int id =3D port_get_id(pdata); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); + int id =3D port_get_id(fdata); =20 return scnprintf(buf, PAGE_SIZE, "%d\n", id); } @@ -163,15 +163,15 @@ static DEVICE_ATTR_RO(id); static ssize_t ltr_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); v =3D readq(base + PORT_HDR_CTRL); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "%x\n", (u8)FIELD_GET(PORT_CTRL_LATENCY, v)); } @@ -180,7 +180,7 @@ static ssize_t ltr_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; bool ltr; u64 v; @@ -188,14 +188,14 @@ ltr_store(struct device *dev, struct device_attribute= *attr, if (kstrtobool(buf, <r)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); v =3D readq(base + PORT_HDR_CTRL); v &=3D ~PORT_CTRL_LATENCY; v |=3D FIELD_PREP(PORT_CTRL_LATENCY, ltr ? 1 : 0); writeq(v, base + PORT_HDR_CTRL); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return count; } @@ -204,15 +204,15 @@ static DEVICE_ATTR_RW(ltr); static ssize_t ap1_event_show(struct device *dev, struct device_attribute *attr, char *bu= f) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); v =3D readq(base + PORT_HDR_STS); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "%x\n", (u8)FIELD_GET(PORT_STS_AP1_EVT, v)); } @@ -221,18 +221,18 @@ static ssize_t ap1_event_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; bool clear; =20 if (kstrtobool(buf, &clear) || !clear) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); writeq(PORT_STS_AP1_EVT, base + PORT_HDR_STS); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return count; } @@ -242,15 +242,15 @@ static ssize_t ap2_event_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); v =3D readq(base + PORT_HDR_STS); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "%x\n", (u8)FIELD_GET(PORT_STS_AP2_EVT, v)); } @@ -259,18 +259,18 @@ static ssize_t ap2_event_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; bool clear; =20 if (kstrtobool(buf, &clear) || !clear) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); writeq(PORT_STS_AP2_EVT, base + PORT_HDR_STS); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return count; } @@ -279,15 +279,15 @@ static DEVICE_ATTR_RW(ap2_event); static ssize_t power_state_show(struct device *dev, struct device_attribute *attr, char *= buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); v =3D readq(base + PORT_HDR_STS); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%x\n", (u8)FIELD_GET(PORT_STS_PWR_STATE, v)); } @@ -297,18 +297,18 @@ static ssize_t userclk_freqcmd_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); u64 userclk_freq_cmd; void __iomem *base; =20 if (kstrtou64(buf, 0, &userclk_freq_cmd)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); writeq(userclk_freq_cmd, base + PORT_HDR_USRCLK_CMD0); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return count; } @@ -318,18 +318,18 @@ static ssize_t userclk_freqcntrcmd_store(struct device *dev, struct device_attribute *att= r, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); u64 userclk_freqcntr_cmd; void __iomem *base; =20 if (kstrtou64(buf, 0, &userclk_freqcntr_cmd)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); writeq(userclk_freqcntr_cmd, base + PORT_HDR_USRCLK_CMD1); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return count; } @@ -339,15 +339,15 @@ static ssize_t userclk_freqsts_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); u64 userclk_freqsts; void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); userclk_freqsts =3D readq(base + PORT_HDR_USRCLK_STS0); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)userclk_freqsts); } @@ -357,15 +357,15 @@ static ssize_t userclk_freqcntrsts_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); u64 userclk_freqcntrsts; void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); userclk_freqcntrsts =3D readq(base + PORT_HDR_USRCLK_STS1); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)userclk_freqcntrsts); @@ -388,13 +388,13 @@ static struct attribute *port_hdr_attrs[] =3D { static umode_t port_hdr_attrs_visible(struct kobject *kobj, struct attribute *attr, int n) { - struct dfl_feature_platform_data *pdata; struct device *dev =3D kobj_to_dev(kobj); + struct dfl_feature_dev_data *fdata; umode_t mode =3D attr->mode; void __iomem *base; =20 - pdata =3D dev_get_platdata(dev); - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_HEADER); + fdata =3D to_dfl_feature_dev_data(dev); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER); =20 if (dfl_feature_revision(base) > 0) { /* @@ -459,21 +459,21 @@ static const struct dfl_feature_ops port_hdr_ops =3D { static ssize_t afu_id_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 guidl, guidh; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, PORT_FEATURE_ID_AFU); + base =3D dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_AFU); =20 - mutex_lock(&pdata->lock); - if (pdata->disable_count) { - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + if (fdata->disable_count) { + mutex_unlock(&fdata->lock); return -EBUSY; } =20 guidl =3D readq(base + GUID_L); guidh =3D readq(base + GUID_H); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return scnprintf(buf, PAGE_SIZE, "%016llx%016llx\n", guidh, guidl); } @@ -487,15 +487,15 @@ static struct attribute *port_afu_attrs[] =3D { static umode_t port_afu_attrs_visible(struct kobject *kobj, struct attribute *attr, int n) { - struct dfl_feature_platform_data *pdata; struct device *dev =3D kobj_to_dev(kobj); + struct dfl_feature_dev_data *fdata; =20 - pdata =3D dev_get_platdata(dev); + fdata =3D to_dfl_feature_dev_data(dev); /* * sysfs entries are visible only if related private feature is * enumerated. */ - if (!dfl_get_feature_by_id(pdata, PORT_FEATURE_ID_AFU)) + if (!dfl_get_feature_by_id(fdata, PORT_FEATURE_ID_AFU)) return 0; =20 return attr->mode; @@ -509,10 +509,10 @@ static const struct attribute_group port_afu_group = =3D { static int port_afu_init(struct platform_device *pdev, struct dfl_feature *feature) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct resource *res =3D &pdev->resource[feature->resource_index]; =20 - return afu_mmio_region_add(pdata, + return afu_mmio_region_add(fdata, DFL_PORT_REGION_INDEX_AFU, resource_size(res), res->start, DFL_PORT_REGION_MMAP | DFL_PORT_REGION_READ | @@ -531,10 +531,10 @@ static const struct dfl_feature_ops port_afu_ops =3D { static int port_stp_init(struct platform_device *pdev, struct dfl_feature *feature) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct resource *res =3D &pdev->resource[feature->resource_index]; =20 - return afu_mmio_region_add(pdata, + return afu_mmio_region_add(fdata, DFL_PORT_REGION_INDEX_STP, resource_size(res), res->start, DFL_PORT_REGION_MMAP | DFL_PORT_REGION_READ | @@ -602,18 +602,18 @@ static struct dfl_feature_driver port_feature_drvs[] = =3D { =20 static int afu_open(struct inode *inode, struct file *filp) { - struct dfl_feature_platform_data *pdata =3D dfl_fpga_inode_to_feature_dev= _data(inode); - struct platform_device *fdev =3D pdata->dev; + struct dfl_feature_dev_data *fdata =3D dfl_fpga_inode_to_feature_dev_data= (inode); + struct platform_device *fdev =3D fdata->dev; int ret; =20 - mutex_lock(&pdata->lock); - ret =3D dfl_feature_dev_use_begin(pdata, filp->f_flags & O_EXCL); + mutex_lock(&fdata->lock); + ret =3D dfl_feature_dev_use_begin(fdata, filp->f_flags & O_EXCL); if (!ret) { dev_dbg(&fdev->dev, "Device File Opened %d Times\n", - dfl_feature_dev_use_count(pdata)); + dfl_feature_dev_use_count(fdata)); filp->private_data =3D fdev; } - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return ret; } @@ -621,29 +621,29 @@ static int afu_open(struct inode *inode, struct file = *filp) static int afu_release(struct inode *inode, struct file *filp) { struct platform_device *pdev =3D filp->private_data; - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; struct dfl_feature *feature; =20 dev_dbg(&pdev->dev, "Device File Release\n"); =20 - pdata =3D dev_get_platdata(&pdev->dev); + fdata =3D to_dfl_feature_dev_data(&pdev->dev); =20 - mutex_lock(&pdata->lock); - dfl_feature_dev_use_end(pdata); + mutex_lock(&fdata->lock); + dfl_feature_dev_use_end(fdata); =20 - if (!dfl_feature_dev_use_count(pdata)) { - dfl_fpga_dev_for_each_feature(pdata, feature) + if (!dfl_feature_dev_use_count(fdata)) { + dfl_fpga_dev_for_each_feature(fdata, feature) dfl_fpga_set_irq_triggers(feature, 0, feature->nr_irqs, NULL); - __port_reset(pdata); - afu_dma_region_destroy(pdata); + __port_reset(fdata); + afu_dma_region_destroy(fdata); } - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return 0; } =20 -static long afu_ioctl_check_extension(struct dfl_feature_platform_data *pd= ata, +static long afu_ioctl_check_extension(struct dfl_feature_dev_data *fdata, unsigned long arg) { /* No extension support for now */ @@ -651,7 +651,7 @@ static long afu_ioctl_check_extension(struct dfl_featur= e_platform_data *pdata, } =20 static long -afu_ioctl_get_info(struct dfl_feature_platform_data *pdata, void __user *a= rg) +afu_ioctl_get_info(struct dfl_feature_dev_data *fdata, void __user *arg) { struct dfl_fpga_port_info info; struct dfl_afu *afu; @@ -665,12 +665,12 @@ afu_ioctl_get_info(struct dfl_feature_platform_data *= pdata, void __user *arg) if (info.argsz < minsz) return -EINVAL; =20 - mutex_lock(&pdata->lock); - afu =3D dfl_fpga_pdata_get_private(pdata); + mutex_lock(&fdata->lock); + afu =3D dfl_fpga_fdata_get_private(fdata); info.flags =3D 0; info.num_regions =3D afu->num_regions; info.num_umsgs =3D afu->num_umsgs; - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 if (copy_to_user(arg, &info, sizeof(info))) return -EFAULT; @@ -678,7 +678,7 @@ afu_ioctl_get_info(struct dfl_feature_platform_data *pd= ata, void __user *arg) return 0; } =20 -static long afu_ioctl_get_region_info(struct dfl_feature_platform_data *pd= ata, +static long afu_ioctl_get_region_info(struct dfl_feature_dev_data *fdata, void __user *arg) { struct dfl_fpga_port_region_info rinfo; @@ -694,7 +694,7 @@ static long afu_ioctl_get_region_info(struct dfl_featur= e_platform_data *pdata, if (rinfo.argsz < minsz || rinfo.padding) return -EINVAL; =20 - ret =3D afu_mmio_region_get_by_index(pdata, rinfo.index, ®ion); + ret =3D afu_mmio_region_get_by_index(fdata, rinfo.index, ®ion); if (ret) return ret; =20 @@ -709,7 +709,7 @@ static long afu_ioctl_get_region_info(struct dfl_featur= e_platform_data *pdata, } =20 static long -afu_ioctl_dma_map(struct dfl_feature_platform_data *pdata, void __user *ar= g) +afu_ioctl_dma_map(struct dfl_feature_dev_data *fdata, void __user *arg) { struct dfl_fpga_port_dma_map map; unsigned long minsz; @@ -723,16 +723,16 @@ afu_ioctl_dma_map(struct dfl_feature_platform_data *p= data, void __user *arg) if (map.argsz < minsz || map.flags) return -EINVAL; =20 - ret =3D afu_dma_map_region(pdata, map.user_addr, map.length, &map.iova); + ret =3D afu_dma_map_region(fdata, map.user_addr, map.length, &map.iova); if (ret) return ret; =20 if (copy_to_user(arg, &map, sizeof(map))) { - afu_dma_unmap_region(pdata, map.iova); + afu_dma_unmap_region(fdata, map.iova); return -EFAULT; } =20 - dev_dbg(&pdata->dev->dev, "dma map: ua=3D%llx, len=3D%llx, iova=3D%llx\n", + dev_dbg(&fdata->dev->dev, "dma map: ua=3D%llx, len=3D%llx, iova=3D%llx\n", (unsigned long long)map.user_addr, (unsigned long long)map.length, (unsigned long long)map.iova); @@ -741,7 +741,7 @@ afu_ioctl_dma_map(struct dfl_feature_platform_data *pda= ta, void __user *arg) } =20 static long -afu_ioctl_dma_unmap(struct dfl_feature_platform_data *pdata, void __user *= arg) +afu_ioctl_dma_unmap(struct dfl_feature_dev_data *fdata, void __user *arg) { struct dfl_fpga_port_dma_unmap unmap; unsigned long minsz; @@ -754,33 +754,33 @@ afu_ioctl_dma_unmap(struct dfl_feature_platform_data = *pdata, void __user *arg) if (unmap.argsz < minsz || unmap.flags) return -EINVAL; =20 - return afu_dma_unmap_region(pdata, unmap.iova); + return afu_dma_unmap_region(fdata, unmap.iova); } =20 static long afu_ioctl(struct file *filp, unsigned int cmd, unsigned long a= rg) { struct platform_device *pdev =3D filp->private_data; - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; struct dfl_feature *f; long ret; =20 dev_dbg(&pdev->dev, "%s cmd 0x%x\n", __func__, cmd); =20 - pdata =3D dev_get_platdata(&pdev->dev); + fdata =3D to_dfl_feature_dev_data(&pdev->dev); =20 switch (cmd) { case DFL_FPGA_GET_API_VERSION: return DFL_FPGA_API_VERSION; case DFL_FPGA_CHECK_EXTENSION: - return afu_ioctl_check_extension(pdata, arg); + return afu_ioctl_check_extension(fdata, arg); case DFL_FPGA_PORT_GET_INFO: - return afu_ioctl_get_info(pdata, (void __user *)arg); + return afu_ioctl_get_info(fdata, (void __user *)arg); case DFL_FPGA_PORT_GET_REGION_INFO: - return afu_ioctl_get_region_info(pdata, (void __user *)arg); + return afu_ioctl_get_region_info(fdata, (void __user *)arg); case DFL_FPGA_PORT_DMA_MAP: - return afu_ioctl_dma_map(pdata, (void __user *)arg); + return afu_ioctl_dma_map(fdata, (void __user *)arg); case DFL_FPGA_PORT_DMA_UNMAP: - return afu_ioctl_dma_unmap(pdata, (void __user *)arg); + return afu_ioctl_dma_unmap(fdata, (void __user *)arg); default: /* * Let sub-feature's ioctl function to handle the cmd @@ -788,7 +788,7 @@ static long afu_ioctl(struct file *filp, unsigned int c= md, unsigned long arg) * handled in this sub feature, and returns 0 and other * error code if cmd is handled. */ - dfl_fpga_dev_for_each_feature(pdata, f) + dfl_fpga_dev_for_each_feature(fdata, f) if (f->ops && f->ops->ioctl) { ret =3D f->ops->ioctl(pdev, f, cmd, arg); if (ret !=3D -ENODEV) @@ -808,8 +808,8 @@ static const struct vm_operations_struct afu_vma_ops = =3D { static int afu_mmap(struct file *filp, struct vm_area_struct *vma) { struct platform_device *pdev =3D filp->private_data; - struct dfl_feature_platform_data *pdata; u64 size =3D vma->vm_end - vma->vm_start; + struct dfl_feature_dev_data *fdata; struct dfl_afu_mmio_region region; u64 offset; int ret; @@ -817,10 +817,10 @@ static int afu_mmap(struct file *filp, struct vm_area= _struct *vma) if (!(vma->vm_flags & VM_SHARED)) return -EINVAL; =20 - pdata =3D dev_get_platdata(&pdev->dev); + fdata =3D to_dfl_feature_dev_data(&pdev->dev); =20 offset =3D vma->vm_pgoff << PAGE_SHIFT; - ret =3D afu_mmio_region_get_by_offset(pdata, offset, size, ®ion); + ret =3D afu_mmio_region_get_by_offset(fdata, offset, size, ®ion); if (ret) return ret; =20 @@ -854,45 +854,45 @@ static const struct file_operations afu_fops =3D { =20 static int afu_dev_init(struct platform_device *pdev) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct dfl_afu *afu; =20 afu =3D devm_kzalloc(&pdev->dev, sizeof(*afu), GFP_KERNEL); if (!afu) return -ENOMEM; =20 - mutex_lock(&pdata->lock); - dfl_fpga_pdata_set_private(pdata, afu); - afu_mmio_region_init(pdata); - afu_dma_region_init(pdata); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + dfl_fpga_fdata_set_private(fdata, afu); + afu_mmio_region_init(fdata); + afu_dma_region_init(fdata); + mutex_unlock(&fdata->lock); =20 return 0; } =20 static int afu_dev_destroy(struct platform_device *pdev) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); =20 - mutex_lock(&pdata->lock); - afu_mmio_region_destroy(pdata); - afu_dma_region_destroy(pdata); - dfl_fpga_pdata_set_private(pdata, NULL); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + afu_mmio_region_destroy(fdata); + afu_dma_region_destroy(fdata); + dfl_fpga_fdata_set_private(fdata, NULL); + mutex_unlock(&fdata->lock); =20 return 0; } =20 -static int port_enable_set(struct dfl_feature_platform_data *pdata, bool e= nable) +static int port_enable_set(struct dfl_feature_dev_data *fdata, bool enable) { int ret; =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); if (enable) - ret =3D __afu_port_enable(pdata); + ret =3D __afu_port_enable(fdata); else - ret =3D __afu_port_disable(pdata); - mutex_unlock(&pdata->lock); + ret =3D __afu_port_disable(fdata); + mutex_unlock(&fdata->lock); =20 return ret; } diff --git a/drivers/fpga/dfl-afu-region.c b/drivers/fpga/dfl-afu-region.c index 8f0e9485214a..b11a5b21e666 100644 --- a/drivers/fpga/dfl-afu-region.c +++ b/drivers/fpga/dfl-afu-region.c @@ -12,11 +12,11 @@ =20 /** * afu_mmio_region_init - init function for afu mmio region support - * @pdata: afu platform device's pdata. + * @fdata: afu feature dev data */ -void afu_mmio_region_init(struct dfl_feature_platform_data *pdata) +void afu_mmio_region_init(struct dfl_feature_dev_data *fdata) { - struct dfl_afu *afu =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_afu *afu =3D dfl_fpga_fdata_get_private(fdata); =20 INIT_LIST_HEAD(&afu->regions); } @@ -39,7 +39,7 @@ static struct dfl_afu_mmio_region *get_region_by_index(st= ruct dfl_afu *afu, /** * afu_mmio_region_add - add a mmio region to given feature dev. * - * @pdata: afu platform device's pdata. + * @fdata: afu feature dev data * @region_index: region index. * @region_size: region size. * @phys: region's physical address of this region. @@ -47,10 +47,10 @@ static struct dfl_afu_mmio_region *get_region_by_index(= struct dfl_afu *afu, * * Return: 0 on success, negative error code otherwise. */ -int afu_mmio_region_add(struct dfl_feature_platform_data *pdata, +int afu_mmio_region_add(struct dfl_feature_dev_data *fdata, u32 region_index, u64 region_size, u64 phys, u32 flags) { - struct device *dev =3D &pdata->dev->dev; + struct device *dev =3D &fdata->dev->dev; struct dfl_afu_mmio_region *region; struct dfl_afu *afu; int ret =3D 0; @@ -64,13 +64,13 @@ int afu_mmio_region_add(struct dfl_feature_platform_dat= a *pdata, region->phys =3D phys; region->flags =3D flags; =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); =20 - afu =3D dfl_fpga_pdata_get_private(pdata); + afu =3D dfl_fpga_fdata_get_private(fdata); =20 /* check if @index already exists */ if (get_region_by_index(afu, region_index)) { - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); ret =3D -EEXIST; goto exit; } @@ -81,7 +81,7 @@ int afu_mmio_region_add(struct dfl_feature_platform_data = *pdata, =20 afu->region_cur_offset +=3D region_size; afu->num_regions++; - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return 0; =20 @@ -92,26 +92,26 @@ int afu_mmio_region_add(struct dfl_feature_platform_dat= a *pdata, =20 /** * afu_mmio_region_destroy - destroy all mmio regions under given feature = dev. - * @pdata: afu platform device's pdata. + * @fdata: afu feature dev data */ -void afu_mmio_region_destroy(struct dfl_feature_platform_data *pdata) +void afu_mmio_region_destroy(struct dfl_feature_dev_data *fdata) { - struct dfl_afu *afu =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_afu *afu =3D dfl_fpga_fdata_get_private(fdata); struct dfl_afu_mmio_region *tmp, *region; =20 list_for_each_entry_safe(region, tmp, &afu->regions, node) - devm_kfree(&pdata->dev->dev, region); + devm_kfree(&fdata->dev->dev, region); } =20 /** * afu_mmio_region_get_by_index - find an afu region by index. - * @pdata: afu platform device's pdata. + * @fdata: afu feature dev data * @region_index: region index. * @pregion: ptr to region for result. * * Return: 0 on success, negative error code otherwise. */ -int afu_mmio_region_get_by_index(struct dfl_feature_platform_data *pdata, +int afu_mmio_region_get_by_index(struct dfl_feature_dev_data *fdata, u32 region_index, struct dfl_afu_mmio_region *pregion) { @@ -119,8 +119,8 @@ int afu_mmio_region_get_by_index(struct dfl_feature_pla= tform_data *pdata, struct dfl_afu *afu; int ret =3D 0; =20 - mutex_lock(&pdata->lock); - afu =3D dfl_fpga_pdata_get_private(pdata); + mutex_lock(&fdata->lock); + afu =3D dfl_fpga_fdata_get_private(fdata); region =3D get_region_by_index(afu, region_index); if (!region) { ret =3D -EINVAL; @@ -128,14 +128,14 @@ int afu_mmio_region_get_by_index(struct dfl_feature_p= latform_data *pdata, } *pregion =3D *region; exit: - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return ret; } =20 /** * afu_mmio_region_get_by_offset - find an afu mmio region by offset and s= ize * - * @pdata: afu platform device's pdata. + * @fdata: afu feature dev data * @offset: region offset from start of the device fd. * @size: region size. * @pregion: ptr to region for result. @@ -145,7 +145,7 @@ int afu_mmio_region_get_by_index(struct dfl_feature_pla= tform_data *pdata, * * Return: 0 on success, negative error code otherwise. */ -int afu_mmio_region_get_by_offset(struct dfl_feature_platform_data *pdata, +int afu_mmio_region_get_by_offset(struct dfl_feature_dev_data *fdata, u64 offset, u64 size, struct dfl_afu_mmio_region *pregion) { @@ -153,8 +153,8 @@ int afu_mmio_region_get_by_offset(struct dfl_feature_pl= atform_data *pdata, struct dfl_afu *afu; int ret =3D 0; =20 - mutex_lock(&pdata->lock); - afu =3D dfl_fpga_pdata_get_private(pdata); + mutex_lock(&fdata->lock); + afu =3D dfl_fpga_fdata_get_private(fdata); for_each_region(region, afu) if (region->offset <=3D offset && region->offset + region->size >=3D offset + size) { @@ -163,6 +163,6 @@ int afu_mmio_region_get_by_offset(struct dfl_feature_pl= atform_data *pdata, } ret =3D -EINVAL; exit: - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return ret; } diff --git a/drivers/fpga/dfl-afu.h b/drivers/fpga/dfl-afu.h index 6d1e79240c70..03be4f0969c7 100644 --- a/drivers/fpga/dfl-afu.h +++ b/drivers/fpga/dfl-afu.h @@ -76,27 +76,27 @@ struct dfl_afu { struct rb_root dma_regions; }; =20 -/* hold pdata->lock when call __afu_port_enable/disable */ -int __afu_port_enable(struct dfl_feature_platform_data *pdata); -int __afu_port_disable(struct dfl_feature_platform_data *pdata); +/* hold fdata->lock when call __afu_port_enable/disable */ +int __afu_port_enable(struct dfl_feature_dev_data *fdata); +int __afu_port_disable(struct dfl_feature_dev_data *fdata); =20 -void afu_mmio_region_init(struct dfl_feature_platform_data *pdata); -int afu_mmio_region_add(struct dfl_feature_platform_data *pdata, +void afu_mmio_region_init(struct dfl_feature_dev_data *fdata); +int afu_mmio_region_add(struct dfl_feature_dev_data *fdata, u32 region_index, u64 region_size, u64 phys, u32 flags); -void afu_mmio_region_destroy(struct dfl_feature_platform_data *pdata); -int afu_mmio_region_get_by_index(struct dfl_feature_platform_data *pdata, +void afu_mmio_region_destroy(struct dfl_feature_dev_data *fdata); +int afu_mmio_region_get_by_index(struct dfl_feature_dev_data *fdata, u32 region_index, struct dfl_afu_mmio_region *pregion); -int afu_mmio_region_get_by_offset(struct dfl_feature_platform_data *pdata, +int afu_mmio_region_get_by_offset(struct dfl_feature_dev_data *fdata, u64 offset, u64 size, struct dfl_afu_mmio_region *pregion); -void afu_dma_region_init(struct dfl_feature_platform_data *pdata); -void afu_dma_region_destroy(struct dfl_feature_platform_data *pdata); -int afu_dma_map_region(struct dfl_feature_platform_data *pdata, +void afu_dma_region_init(struct dfl_feature_dev_data *fdata); +void afu_dma_region_destroy(struct dfl_feature_dev_data *fdata); +int afu_dma_map_region(struct dfl_feature_dev_data *fdata, u64 user_addr, u64 length, u64 *iova); -int afu_dma_unmap_region(struct dfl_feature_platform_data *pdata, u64 iova= ); +int afu_dma_unmap_region(struct dfl_feature_dev_data *fdata, u64 iova); struct dfl_afu_dma_region * -afu_dma_region_find(struct dfl_feature_platform_data *pdata, +afu_dma_region_find(struct dfl_feature_dev_data *fdata, u64 iova, u64 size); =20 extern const struct dfl_feature_ops port_err_ops; diff --git a/drivers/fpga/dfl-fme-br.c b/drivers/fpga/dfl-fme-br.c index c19ddb02a161..5c60a38ec76c 100644 --- a/drivers/fpga/dfl-fme-br.c +++ b/drivers/fpga/dfl-fme-br.c @@ -22,34 +22,34 @@ struct fme_br_priv { struct dfl_fme_br_pdata *pdata; struct dfl_fpga_port_ops *port_ops; - struct dfl_feature_platform_data *port_pdata; + struct dfl_feature_dev_data *port_fdata; }; =20 static int fme_bridge_enable_set(struct fpga_bridge *bridge, bool enable) { - struct dfl_feature_platform_data *port_pdata; struct fme_br_priv *priv =3D bridge->priv; + struct dfl_feature_dev_data *port_fdata; struct dfl_fpga_port_ops *ops; =20 - if (!priv->port_pdata) { - port_pdata =3D dfl_fpga_cdev_find_port_data(priv->pdata->cdev, + if (!priv->port_fdata) { + port_fdata =3D dfl_fpga_cdev_find_port_data(priv->pdata->cdev, &priv->pdata->port_id, dfl_fpga_check_port_id); - if (!port_pdata) + if (!port_fdata) return -ENODEV; =20 - priv->port_pdata =3D port_pdata; + priv->port_fdata =3D port_fdata; } =20 - if (priv->port_pdata && !priv->port_ops) { - ops =3D dfl_fpga_port_ops_get(priv->port_pdata); + if (priv->port_fdata && !priv->port_ops) { + ops =3D dfl_fpga_port_ops_get(priv->port_fdata); if (!ops || !ops->enable_set) return -ENOENT; =20 priv->port_ops =3D ops; } =20 - return priv->port_ops->enable_set(priv->port_pdata, enable); + return priv->port_ops->enable_set(priv->port_fdata, enable); } =20 static const struct fpga_bridge_ops fme_bridge_ops =3D { @@ -85,8 +85,8 @@ static void fme_br_remove(struct platform_device *pdev) =20 fpga_bridge_unregister(br); =20 - if (priv->port_pdata) - put_device(&priv->port_pdata->dev->dev); + if (priv->port_fdata) + put_device(&priv->port_fdata->dev->dev); if (priv->port_ops) dfl_fpga_port_ops_put(priv->port_ops); } diff --git a/drivers/fpga/dfl-fme-error.c b/drivers/fpga/dfl-fme-error.c index 39b8e3b450d7..f00d949efe69 100644 --- a/drivers/fpga/dfl-fme-error.c +++ b/drivers/fpga/dfl-fme-error.c @@ -42,15 +42,15 @@ static ssize_t pcie0_errors_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); value =3D readq(base + PCIE0_ERROR); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)value); } @@ -59,7 +59,7 @@ static ssize_t pcie0_errors_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; int ret =3D 0; u64 v, val; @@ -67,9 +67,9 @@ static ssize_t pcie0_errors_store(struct device *dev, if (kstrtou64(buf, 0, &val)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); writeq(GENMASK_ULL(63, 0), base + PCIE0_ERROR_MASK); =20 v =3D readq(base + PCIE0_ERROR); @@ -79,7 +79,7 @@ static ssize_t pcie0_errors_store(struct device *dev, ret =3D -EINVAL; =20 writeq(0ULL, base + PCIE0_ERROR_MASK); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return ret ? ret : count; } static DEVICE_ATTR_RW(pcie0_errors); @@ -87,15 +87,15 @@ static DEVICE_ATTR_RW(pcie0_errors); static ssize_t pcie1_errors_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); value =3D readq(base + PCIE1_ERROR); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)value); } @@ -104,7 +104,7 @@ static ssize_t pcie1_errors_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; int ret =3D 0; u64 v, val; @@ -112,9 +112,9 @@ static ssize_t pcie1_errors_store(struct device *dev, if (kstrtou64(buf, 0, &val)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); writeq(GENMASK_ULL(63, 0), base + PCIE1_ERROR_MASK); =20 v =3D readq(base + PCIE1_ERROR); @@ -124,7 +124,7 @@ static ssize_t pcie1_errors_store(struct device *dev, ret =3D -EINVAL; =20 writeq(0ULL, base + PCIE1_ERROR_MASK); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return ret ? ret : count; } static DEVICE_ATTR_RW(pcie1_errors); @@ -132,10 +132,10 @@ static DEVICE_ATTR_RW(pcie1_errors); static ssize_t nonfatal_errors_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)readq(base + RAS_NONFAT_ERROR)); @@ -145,10 +145,10 @@ static DEVICE_ATTR_RO(nonfatal_errors); static ssize_t catfatal_errors_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)readq(base + RAS_CATFAT_ERROR)); @@ -158,15 +158,15 @@ static DEVICE_ATTR_RO(catfatal_errors); static ssize_t inject_errors_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); v =3D readq(base + RAS_ERROR_INJECT); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)FIELD_GET(INJECT_ERROR_MASK, v)); @@ -176,7 +176,7 @@ static ssize_t inject_errors_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u8 inject_error; u64 v; @@ -187,14 +187,14 @@ static ssize_t inject_errors_store(struct device *dev, if (inject_error & ~INJECT_ERROR_MASK) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); v =3D readq(base + RAS_ERROR_INJECT); v &=3D ~INJECT_ERROR_MASK; v |=3D FIELD_PREP(INJECT_ERROR_MASK, inject_error); writeq(v, base + RAS_ERROR_INJECT); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return count; } @@ -203,15 +203,15 @@ static DEVICE_ATTR_RW(inject_errors); static ssize_t fme_errors_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); value =3D readq(base + FME_ERROR); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)value); } @@ -220,7 +220,7 @@ static ssize_t fme_errors_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v, val; int ret =3D 0; @@ -228,9 +228,9 @@ static ssize_t fme_errors_store(struct device *dev, if (kstrtou64(buf, 0, &val)) return -EINVAL; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); writeq(GENMASK_ULL(63, 0), base + FME_ERROR_MASK); =20 v =3D readq(base + FME_ERROR); @@ -242,7 +242,7 @@ static ssize_t fme_errors_store(struct device *dev, /* Workaround: disable MBP_ERROR if feature revision is 0 */ writeq(dfl_feature_revision(base) ? 0ULL : MBP_ERROR, base + FME_ERROR_MASK); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return ret ? ret : count; } static DEVICE_ATTR_RW(fme_errors); @@ -250,15 +250,15 @@ static DEVICE_ATTR_RW(fme_errors); static ssize_t first_error_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); value =3D readq(base + FME_FIRST_ERROR); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)value); } @@ -267,15 +267,15 @@ static DEVICE_ATTR_RO(first_error); static ssize_t next_error_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 value; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); value =3D readq(base + FME_NEXT_ERROR); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return sprintf(buf, "0x%llx\n", (unsigned long long)value); } @@ -296,15 +296,15 @@ static struct attribute *fme_global_err_attrs[] =3D { static umode_t fme_global_err_attrs_visible(struct kobject *kobj, struct attribute *attr, int n) { - struct dfl_feature_platform_data *pdata; struct device *dev =3D kobj_to_dev(kobj); + struct dfl_feature_dev_data *fdata; =20 - pdata =3D dev_get_platdata(dev); + fdata =3D to_dfl_feature_dev_data(dev); /* * sysfs entries are visible only if related private feature is * enumerated. */ - if (!dfl_get_feature_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR)) + if (!dfl_get_feature_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR)) return 0; =20 return attr->mode; @@ -318,12 +318,12 @@ const struct attribute_group fme_global_err_group =3D= { =20 static void fme_err_mask(struct device *dev, bool mask) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_GLOBAL_ERR); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_GLOBAL_ERR); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); =20 /* Workaround: keep MBP_ERROR always masked if revision is 0 */ if (dfl_feature_revision(base)) @@ -336,7 +336,7 @@ static void fme_err_mask(struct device *dev, bool mask) writeq(mask ? ERROR_MASK : 0, base + RAS_NONFAT_ERROR_MASK); writeq(mask ? ERROR_MASK : 0, base + RAS_CATFAT_ERROR_MASK); =20 - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); } =20 static int fme_global_err_init(struct platform_device *pdev, diff --git a/drivers/fpga/dfl-fme-main.c b/drivers/fpga/dfl-fme-main.c index 4964e15e910b..0c2f259c7025 100644 --- a/drivers/fpga/dfl-fme-main.c +++ b/drivers/fpga/dfl-fme-main.c @@ -28,11 +28,11 @@ static ssize_t ports_num_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_CAP); =20 @@ -48,11 +48,11 @@ static DEVICE_ATTR_RO(ports_num); static ssize_t bitstream_id_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_BITSTREAM_ID); =20 @@ -67,11 +67,11 @@ static DEVICE_ATTR_RO(bitstream_id); static ssize_t bitstream_metadata_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_BITSTREAM_MD); =20 @@ -82,11 +82,11 @@ static DEVICE_ATTR_RO(bitstream_metadata); static ssize_t cache_size_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_CAP); =20 @@ -98,11 +98,11 @@ static DEVICE_ATTR_RO(cache_size); static ssize_t fabric_version_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_CAP); =20 @@ -114,11 +114,11 @@ static DEVICE_ATTR_RO(fabric_version); static ssize_t socket_id_show(struct device *dev, struct device_attribute *attr, char *buf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_CAP); =20 @@ -141,10 +141,10 @@ static const struct attribute_group fme_hdr_group =3D= { .attrs =3D fme_hdr_attrs, }; =20 -static long fme_hdr_ioctl_release_port(struct dfl_feature_platform_data *p= data, +static long fme_hdr_ioctl_release_port(struct dfl_feature_dev_data *fdata, unsigned long arg) { - struct dfl_fpga_cdev *cdev =3D pdata->dfl_cdev; + struct dfl_fpga_cdev *cdev =3D fdata->dfl_cdev; int port_id; =20 if (get_user(port_id, (int __user *)arg)) @@ -153,10 +153,10 @@ static long fme_hdr_ioctl_release_port(struct dfl_fea= ture_platform_data *pdata, return dfl_fpga_cdev_release_port(cdev, port_id); } =20 -static long fme_hdr_ioctl_assign_port(struct dfl_feature_platform_data *pd= ata, +static long fme_hdr_ioctl_assign_port(struct dfl_feature_dev_data *fdata, unsigned long arg) { - struct dfl_fpga_cdev *cdev =3D pdata->dfl_cdev; + struct dfl_fpga_cdev *cdev =3D fdata->dfl_cdev; int port_id; =20 if (get_user(port_id, (int __user *)arg)) @@ -169,13 +169,13 @@ static long fme_hdr_ioctl(struct platform_device *pde= v, struct dfl_feature *feature, unsigned int cmd, unsigned long arg) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); =20 switch (cmd) { case DFL_FPGA_FME_PORT_RELEASE: - return fme_hdr_ioctl_release_port(pdata, arg); + return fme_hdr_ioctl_release_port(fdata, arg); case DFL_FPGA_FME_PORT_ASSIGN: - return fme_hdr_ioctl_assign_port(pdata, arg); + return fme_hdr_ioctl_assign_port(fdata, arg); } =20 return -ENODEV; @@ -417,14 +417,14 @@ static int power_hwmon_read(struct device *dev, enum = hwmon_sensor_types type, static int power_hwmon_write(struct device *dev, enum hwmon_sensor_types t= ype, u32 attr, int channel, long val) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev->parent); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev->paren= t); struct dfl_feature *feature =3D dev_get_drvdata(dev); int ret =3D 0; u64 v; =20 val =3D clamp_val(val / MICRO, 0, PWR_THRESHOLD_MAX); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); =20 switch (attr) { case hwmon_power_max: @@ -444,7 +444,7 @@ static int power_hwmon_write(struct device *dev, enum h= wmon_sensor_types type, break; } =20 - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return ret; } @@ -595,7 +595,7 @@ static struct dfl_feature_driver fme_feature_drvs[] =3D= { }, }; =20 -static long fme_ioctl_check_extension(struct dfl_feature_platform_data *pd= ata, +static long fme_ioctl_check_extension(struct dfl_feature_dev_data *fdata, unsigned long arg) { /* No extension support for now */ @@ -604,46 +604,46 @@ static long fme_ioctl_check_extension(struct dfl_feat= ure_platform_data *pdata, =20 static int fme_open(struct inode *inode, struct file *filp) { - struct dfl_feature_platform_data *pdata =3D dfl_fpga_inode_to_feature_dev= _data(inode); - struct platform_device *fdev =3D pdata->dev; + struct dfl_feature_dev_data *fdata =3D dfl_fpga_inode_to_feature_dev_data= (inode); + struct platform_device *fdev =3D fdata->dev; int ret; =20 - mutex_lock(&pdata->lock); - ret =3D dfl_feature_dev_use_begin(pdata, filp->f_flags & O_EXCL); + mutex_lock(&fdata->lock); + ret =3D dfl_feature_dev_use_begin(fdata, filp->f_flags & O_EXCL); if (!ret) { dev_dbg(&fdev->dev, "Device File Opened %d Times\n", - dfl_feature_dev_use_count(pdata)); - filp->private_data =3D pdata; + dfl_feature_dev_use_count(fdata)); + filp->private_data =3D fdata; } - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return ret; } =20 static int fme_release(struct inode *inode, struct file *filp) { - struct dfl_feature_platform_data *pdata =3D filp->private_data; - struct platform_device *pdev =3D pdata->dev; + struct dfl_feature_dev_data *fdata =3D filp->private_data; + struct platform_device *pdev =3D fdata->dev; struct dfl_feature *feature; =20 dev_dbg(&pdev->dev, "Device File Release\n"); =20 - mutex_lock(&pdata->lock); - dfl_feature_dev_use_end(pdata); + mutex_lock(&fdata->lock); + dfl_feature_dev_use_end(fdata); =20 - if (!dfl_feature_dev_use_count(pdata)) - dfl_fpga_dev_for_each_feature(pdata, feature) + if (!dfl_feature_dev_use_count(fdata)) + dfl_fpga_dev_for_each_feature(fdata, feature) dfl_fpga_set_irq_triggers(feature, 0, feature->nr_irqs, NULL); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return 0; } =20 static long fme_ioctl(struct file *filp, unsigned int cmd, unsigned long a= rg) { - struct dfl_feature_platform_data *pdata =3D filp->private_data; - struct platform_device *pdev =3D pdata->dev; + struct dfl_feature_dev_data *fdata =3D filp->private_data; + struct platform_device *pdev =3D fdata->dev; struct dfl_feature *f; long ret; =20 @@ -653,7 +653,7 @@ static long fme_ioctl(struct file *filp, unsigned int c= md, unsigned long arg) case DFL_FPGA_GET_API_VERSION: return DFL_FPGA_API_VERSION; case DFL_FPGA_CHECK_EXTENSION: - return fme_ioctl_check_extension(pdata, arg); + return fme_ioctl_check_extension(fdata, arg); default: /* * Let sub-feature's ioctl function to handle the cmd. @@ -661,7 +661,7 @@ static long fme_ioctl(struct file *filp, unsigned int c= md, unsigned long arg) * handled in this sub feature, and returns 0 or other * error code if cmd is handled. */ - dfl_fpga_dev_for_each_feature(pdata, f) { + dfl_fpga_dev_for_each_feature(fdata, f) { if (f->ops && f->ops->ioctl) { ret =3D f->ops->ioctl(pdev, f, cmd, arg); if (ret !=3D -ENODEV) @@ -675,27 +675,27 @@ static long fme_ioctl(struct file *filp, unsigned int= cmd, unsigned long arg) =20 static int fme_dev_init(struct platform_device *pdev) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct dfl_fme *fme; =20 fme =3D devm_kzalloc(&pdev->dev, sizeof(*fme), GFP_KERNEL); if (!fme) return -ENOMEM; =20 - mutex_lock(&pdata->lock); - dfl_fpga_pdata_set_private(pdata, fme); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + dfl_fpga_fdata_set_private(fdata, fme); + mutex_unlock(&fdata->lock); =20 return 0; } =20 static void fme_dev_destroy(struct platform_device *pdev) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); =20 - mutex_lock(&pdata->lock); - dfl_fpga_pdata_set_private(pdata, NULL); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + dfl_fpga_fdata_set_private(fdata, NULL); + mutex_unlock(&fdata->lock); } =20 static const struct file_operations fme_fops =3D { diff --git a/drivers/fpga/dfl-fme-pr.c b/drivers/fpga/dfl-fme-pr.c index 97fc0e402edf..b878b260af38 100644 --- a/drivers/fpga/dfl-fme-pr.c +++ b/drivers/fpga/dfl-fme-pr.c @@ -65,7 +65,7 @@ static struct fpga_region *dfl_fme_region_find(struct dfl= _fme *fme, int port_id) =20 static int fme_pr(struct platform_device *pdev, unsigned long arg) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); void __user *argp =3D (void __user *)arg; struct dfl_fpga_fme_port_pr port_pr; struct fpga_image_info *info; @@ -87,7 +87,7 @@ static int fme_pr(struct platform_device *pdev, unsigned = long arg) return -EINVAL; =20 /* get fme header region */ - fme_hdr =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + fme_hdr =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 /* check port id */ v =3D readq(fme_hdr + FME_HDR_CAP); @@ -122,8 +122,8 @@ static int fme_pr(struct platform_device *pdev, unsigne= d long arg) =20 info->flags |=3D FPGA_MGR_PARTIAL_RECONFIG; =20 - mutex_lock(&pdata->lock); - fme =3D dfl_fpga_pdata_get_private(pdata); + mutex_lock(&fdata->lock); + fme =3D dfl_fpga_fdata_get_private(fdata); /* fme device has been unregistered. */ if (!fme) { ret =3D -EINVAL; @@ -155,7 +155,7 @@ static int fme_pr(struct platform_device *pdev, unsigne= d long arg) =20 put_device(®ion->dev); unlock_exit: - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); free_exit: vfree(buf); return ret; @@ -163,16 +163,16 @@ static int fme_pr(struct platform_device *pdev, unsig= ned long arg) =20 /** * dfl_fme_create_mgr - create fpga mgr platform device as child device + * @fdata: fme feature dev data * @feature: sub feature info - * @pdata: fme platform_device's pdata * * Return: mgr platform device if successful, and error code otherwise. */ static struct platform_device * -dfl_fme_create_mgr(struct dfl_feature_platform_data *pdata, +dfl_fme_create_mgr(struct dfl_feature_dev_data *fdata, struct dfl_feature *feature) { - struct platform_device *mgr, *fme =3D pdata->dev; + struct platform_device *mgr, *fme =3D fdata->dev; struct dfl_fme_mgr_pdata mgr_pdata; int ret =3D -ENOMEM; =20 @@ -208,11 +208,11 @@ dfl_fme_create_mgr(struct dfl_feature_platform_data *= pdata, =20 /** * dfl_fme_destroy_mgr - destroy fpga mgr platform device - * @pdata: fme platform device's pdata + * @fdata: fme feature dev data */ -static void dfl_fme_destroy_mgr(struct dfl_feature_platform_data *pdata) +static void dfl_fme_destroy_mgr(struct dfl_feature_dev_data *fdata) { - struct dfl_fme *priv =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_fme *priv =3D dfl_fpga_fdata_get_private(fdata); =20 platform_device_unregister(priv->mgr); } @@ -220,15 +220,15 @@ static void dfl_fme_destroy_mgr(struct dfl_feature_pl= atform_data *pdata) /** * dfl_fme_create_bridge - create fme fpga bridge platform device as child * - * @pdata: fme platform device's pdata + * @fdata: fme feature dev data * @port_id: port id for the bridge to be created. * * Return: bridge platform device if successful, and error code otherwise. */ static struct dfl_fme_bridge * -dfl_fme_create_bridge(struct dfl_feature_platform_data *pdata, int port_id) +dfl_fme_create_bridge(struct dfl_feature_dev_data *fdata, int port_id) { - struct device *dev =3D &pdata->dev->dev; + struct device *dev =3D &fdata->dev->dev; struct dfl_fme_br_pdata br_pdata; struct dfl_fme_bridge *fme_br; int ret =3D -ENOMEM; @@ -237,7 +237,7 @@ dfl_fme_create_bridge(struct dfl_feature_platform_data = *pdata, int port_id) if (!fme_br) return ERR_PTR(ret); =20 - br_pdata.cdev =3D pdata->dfl_cdev; + br_pdata.cdev =3D fdata->dfl_cdev; br_pdata.port_id =3D port_id; =20 fme_br->br =3D platform_device_alloc(DFL_FPGA_FME_BRIDGE, @@ -273,11 +273,11 @@ static void dfl_fme_destroy_bridge(struct dfl_fme_bri= dge *fme_br) =20 /** * dfl_fme_destroy_bridges - destroy all fpga bridge platform device - * @pdata: fme platform device's pdata + * @fdata: fme feature dev data */ -static void dfl_fme_destroy_bridges(struct dfl_feature_platform_data *pdat= a) +static void dfl_fme_destroy_bridges(struct dfl_feature_dev_data *fdata) { - struct dfl_fme *priv =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_fme *priv =3D dfl_fpga_fdata_get_private(fdata); struct dfl_fme_bridge *fbridge, *tmp; =20 list_for_each_entry_safe(fbridge, tmp, &priv->bridge_list, node) { @@ -289,7 +289,7 @@ static void dfl_fme_destroy_bridges(struct dfl_feature_= platform_data *pdata) /** * dfl_fme_create_region - create fpga region platform device as child * - * @pdata: fme platform device's pdata + * @fdata: fme feature dev data * @mgr: mgr platform device needed for region * @br: br platform device needed for region * @port_id: port id @@ -297,12 +297,12 @@ static void dfl_fme_destroy_bridges(struct dfl_featur= e_platform_data *pdata) * Return: fme region if successful, and error code otherwise. */ static struct dfl_fme_region * -dfl_fme_create_region(struct dfl_feature_platform_data *pdata, +dfl_fme_create_region(struct dfl_feature_dev_data *fdata, struct platform_device *mgr, struct platform_device *br, int port_id) { struct dfl_fme_region_pdata region_pdata; - struct device *dev =3D &pdata->dev->dev; + struct device *dev =3D &fdata->dev->dev; struct dfl_fme_region *fme_region; int ret =3D -ENOMEM; =20 @@ -352,11 +352,11 @@ static void dfl_fme_destroy_region(struct dfl_fme_reg= ion *fme_region) =20 /** * dfl_fme_destroy_regions - destroy all fme regions - * @pdata: fme platform device's pdata + * @fdata: fme feature dev data */ -static void dfl_fme_destroy_regions(struct dfl_feature_platform_data *pdat= a) +static void dfl_fme_destroy_regions(struct dfl_feature_dev_data *fdata) { - struct dfl_fme *priv =3D dfl_fpga_pdata_get_private(pdata); + struct dfl_fme *priv =3D dfl_fpga_fdata_get_private(fdata); struct dfl_fme_region *fme_region, *tmp; =20 list_for_each_entry_safe(fme_region, tmp, &priv->region_list, node) { @@ -368,7 +368,7 @@ static void dfl_fme_destroy_regions(struct dfl_feature_= platform_data *pdata) static int pr_mgmt_init(struct platform_device *pdev, struct dfl_feature *feature) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct dfl_fme_region *fme_region; struct dfl_fme_bridge *fme_br; struct platform_device *mgr; @@ -377,17 +377,17 @@ static int pr_mgmt_init(struct platform_device *pdev, int ret =3D -ENODEV, i =3D 0; u64 fme_cap, port_offset; =20 - fme_hdr =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + fme_hdr =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 - mutex_lock(&pdata->lock); - priv =3D dfl_fpga_pdata_get_private(pdata); + mutex_lock(&fdata->lock); + priv =3D dfl_fpga_fdata_get_private(fdata); =20 /* Initialize the region and bridge sub device list */ INIT_LIST_HEAD(&priv->region_list); INIT_LIST_HEAD(&priv->bridge_list); =20 /* Create fpga mgr platform device */ - mgr =3D dfl_fme_create_mgr(pdata, feature); + mgr =3D dfl_fme_create_mgr(fdata, feature); if (IS_ERR(mgr)) { dev_err(&pdev->dev, "fail to create fpga mgr pdev\n"); goto unlock; @@ -403,7 +403,7 @@ static int pr_mgmt_init(struct platform_device *pdev, continue; =20 /* Create bridge for each port */ - fme_br =3D dfl_fme_create_bridge(pdata, i); + fme_br =3D dfl_fme_create_bridge(fdata, i); if (IS_ERR(fme_br)) { ret =3D PTR_ERR(fme_br); goto destroy_region; @@ -412,7 +412,7 @@ static int pr_mgmt_init(struct platform_device *pdev, list_add(&fme_br->node, &priv->bridge_list); =20 /* Create region for each port */ - fme_region =3D dfl_fme_create_region(pdata, mgr, + fme_region =3D dfl_fme_create_region(fdata, mgr, fme_br->br, i); if (IS_ERR(fme_region)) { ret =3D PTR_ERR(fme_region); @@ -421,30 +421,30 @@ static int pr_mgmt_init(struct platform_device *pdev, =20 list_add(&fme_region->node, &priv->region_list); } - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 return 0; =20 destroy_region: - dfl_fme_destroy_regions(pdata); - dfl_fme_destroy_bridges(pdata); - dfl_fme_destroy_mgr(pdata); + dfl_fme_destroy_regions(fdata); + dfl_fme_destroy_bridges(fdata); + dfl_fme_destroy_mgr(fdata); unlock: - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); return ret; } =20 static void pr_mgmt_uinit(struct platform_device *pdev, struct dfl_feature *feature) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); =20 - dfl_fme_destroy_regions(pdata); - dfl_fme_destroy_bridges(pdata); - dfl_fme_destroy_mgr(pdata); - mutex_unlock(&pdata->lock); + dfl_fme_destroy_regions(fdata); + dfl_fme_destroy_bridges(fdata); + dfl_fme_destroy_mgr(fdata); + mutex_unlock(&fdata->lock); } =20 static long fme_pr_ioctl(struct platform_device *pdev, diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index 86fcd3084b06..e8488a771337 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -150,7 +150,7 @@ static LIST_HEAD(dfl_port_ops_list); * * Please note that must dfl_fpga_port_ops_put after use the port_ops. */ -struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct dfl_feature_platfor= m_data *pdata) +struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct dfl_feature_dev_dat= a *fdata) { struct dfl_fpga_port_ops *ops =3D NULL; =20 @@ -160,7 +160,7 @@ struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct = dfl_feature_platform_data =20 list_for_each_entry(ops, &dfl_port_ops_list, node) { /* match port_ops using the name of platform device */ - if (!strcmp(pdata->dev->name, ops->name)) { + if (!strcmp(fdata->dev->name, ops->name)) { if (!try_module_get(ops->owner)) ops =3D NULL; goto done; @@ -216,21 +216,21 @@ EXPORT_SYMBOL_GPL(dfl_fpga_port_ops_del); * * Return: 1 if port device matches with given port id, otherwise 0. */ -int dfl_fpga_check_port_id(struct dfl_feature_platform_data *pdata, void *= pport_id) +int dfl_fpga_check_port_id(struct dfl_feature_dev_data *fdata, void *pport= _id) { struct dfl_fpga_port_ops *port_ops; =20 - if (pdata->id !=3D FEATURE_DEV_ID_UNUSED) - return pdata->id =3D=3D *(int *)pport_id; + if (fdata->id !=3D FEATURE_DEV_ID_UNUSED) + return fdata->id =3D=3D *(int *)pport_id; =20 - port_ops =3D dfl_fpga_port_ops_get(pdata); + port_ops =3D dfl_fpga_port_ops_get(fdata); if (!port_ops || !port_ops->get_id) return 0; =20 - pdata->id =3D port_ops->get_id(pdata); + fdata->id =3D port_ops->get_id(fdata); dfl_fpga_port_ops_put(port_ops); =20 - return pdata->id =3D=3D *(int *)pport_id; + return fdata->id =3D=3D *(int *)pport_id; } EXPORT_SYMBOL_GPL(dfl_fpga_check_port_id); =20 @@ -339,10 +339,10 @@ static void release_dfl_dev(struct device *dev) } =20 static struct dfl_device * -dfl_dev_add(struct dfl_feature_platform_data *pdata, +dfl_dev_add(struct dfl_feature_dev_data *fdata, struct dfl_feature *feature) { - struct platform_device *pdev =3D pdata->dev; + struct platform_device *pdev =3D fdata->dev; struct resource *parent_res; struct dfl_device *ddev; int id, i, ret; @@ -368,11 +368,11 @@ dfl_dev_add(struct dfl_feature_platform_data *pdata, if (ret) goto put_dev; =20 - ddev->type =3D pdata->type; + ddev->type =3D fdata->type; ddev->feature_id =3D feature->id; ddev->revision =3D feature->revision; ddev->dfh_version =3D feature->dfh_version; - ddev->cdev =3D pdata->dfl_cdev; + ddev->cdev =3D fdata->dfl_cdev; if (feature->param_size) { ddev->params =3D kmemdup(feature->params, feature->param_size, GFP_KERNE= L); if (!ddev->params) { @@ -423,11 +423,11 @@ dfl_dev_add(struct dfl_feature_platform_data *pdata, return ERR_PTR(ret); } =20 -static void dfl_devs_remove(struct dfl_feature_platform_data *pdata) +static void dfl_devs_remove(struct dfl_feature_dev_data *fdata) { struct dfl_feature *feature; =20 - dfl_fpga_dev_for_each_feature(pdata, feature) { + dfl_fpga_dev_for_each_feature(fdata, feature) { if (feature->ddev) { device_unregister(&feature->ddev->dev); feature->ddev =3D NULL; @@ -435,13 +435,13 @@ static void dfl_devs_remove(struct dfl_feature_platfo= rm_data *pdata) } } =20 -static int dfl_devs_add(struct dfl_feature_platform_data *pdata) +static int dfl_devs_add(struct dfl_feature_dev_data *fdata) { struct dfl_feature *feature; struct dfl_device *ddev; int ret; =20 - dfl_fpga_dev_for_each_feature(pdata, feature) { + dfl_fpga_dev_for_each_feature(fdata, feature) { if (feature->ioaddr) continue; =20 @@ -450,7 +450,7 @@ static int dfl_devs_add(struct dfl_feature_platform_dat= a *pdata) goto err; } =20 - ddev =3D dfl_dev_add(pdata, feature); + ddev =3D dfl_dev_add(fdata, feature); if (IS_ERR(ddev)) { ret =3D PTR_ERR(ddev); goto err; @@ -462,7 +462,7 @@ static int dfl_devs_add(struct dfl_feature_platform_dat= a *pdata) return 0; =20 err: - dfl_devs_remove(pdata); + dfl_devs_remove(fdata); return ret; } =20 @@ -492,12 +492,12 @@ EXPORT_SYMBOL(dfl_driver_unregister); */ void dfl_fpga_dev_feature_uinit(struct platform_device *pdev) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct dfl_feature *feature; =20 - dfl_devs_remove(pdata); + dfl_devs_remove(fdata); =20 - dfl_fpga_dev_for_each_feature(pdata, feature) { + dfl_fpga_dev_for_each_feature(fdata, feature) { if (feature->ops) { if (feature->ops->uinit) feature->ops->uinit(pdev, feature); @@ -566,13 +566,13 @@ static bool dfl_feature_drv_match(struct dfl_feature = *feature, int dfl_fpga_dev_feature_init(struct platform_device *pdev, struct dfl_feature_driver *feature_drvs) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct dfl_feature_driver *drv =3D feature_drvs; struct dfl_feature *feature; int ret; =20 while (drv->ops) { - dfl_fpga_dev_for_each_feature(pdata, feature) { + dfl_fpga_dev_for_each_feature(fdata, feature) { if (dfl_feature_drv_match(feature, drv)) { ret =3D dfl_feature_instance_init(pdev, feature, drv); if (ret) @@ -582,7 +582,7 @@ int dfl_fpga_dev_feature_init(struct platform_device *p= dev, drv++; } =20 - ret =3D dfl_devs_add(pdata); + ret =3D dfl_devs_add(fdata); if (ret) goto exit; =20 @@ -732,21 +732,21 @@ struct dfl_feature_info { }; =20 static void dfl_fpga_cdev_add_port_data(struct dfl_fpga_cdev *cdev, - struct dfl_feature_platform_data *pdata) + struct dfl_feature_dev_data *fdata) { mutex_lock(&cdev->lock); - list_add(&pdata->node, &cdev->port_dev_list); - get_device(&pdata->dev->dev); + list_add(&fdata->node, &cdev->port_dev_list); + get_device(&fdata->dev->dev); mutex_unlock(&cdev->lock); } =20 -static struct dfl_feature_platform_data * +static struct dfl_feature_dev_data * binfo_create_feature_dev_data(struct build_feature_devs_info *binfo) { struct platform_device *fdev =3D binfo->feature_dev; - struct dfl_feature_platform_data *pdata; enum dfl_id_type type =3D binfo->type; struct dfl_feature_info *finfo, *p; + struct dfl_feature_dev_data *fdata; int index =3D 0, res_idx =3D 0; =20 if (WARN_ON_ONCE(type >=3D DFL_ID_MAX)) @@ -758,17 +758,17 @@ binfo_create_feature_dev_data(struct build_feature_de= vs_info *binfo) * it will be automatically freed by device's release() callback, * platform_device_release(). */ - pdata =3D kzalloc(struct_size(pdata, features, binfo->feature_num), GFP_K= ERNEL); - if (!pdata) + fdata =3D kzalloc(struct_size(fdata, features, binfo->feature_num), GFP_K= ERNEL); + if (!fdata) return ERR_PTR(-ENOMEM); =20 - pdata->dev =3D fdev; - pdata->type =3D type; - pdata->num =3D binfo->feature_num; - pdata->dfl_cdev =3D binfo->cdev; - pdata->id =3D FEATURE_DEV_ID_UNUSED; - mutex_init(&pdata->lock); - lockdep_set_class_and_name(&pdata->lock, &dfl_pdata_keys[type], + fdata->dev =3D fdev; + fdata->type =3D type; + fdata->num =3D binfo->feature_num; + fdata->dfl_cdev =3D binfo->cdev; + fdata->id =3D FEATURE_DEV_ID_UNUSED; + mutex_init(&fdata->lock); + lockdep_set_class_and_name(&fdata->lock, &dfl_pdata_keys[type], dfl_pdata_key_strings[type]); =20 /* @@ -777,9 +777,9 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) * works properly for port device. * and it should always be 0 for fme device. */ - WARN_ON(pdata->disable_count); + WARN_ON(fdata->disable_count); =20 - fdev->dev.platform_data =3D pdata; + fdev->dev.platform_data =3D fdata; =20 /* each sub feature has one MMIO resource */ fdev->num_resources =3D binfo->feature_num; @@ -790,7 +790,7 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) =20 /* fill features and resource information for feature dev */ list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) { - struct dfl_feature *feature =3D &pdata->features[index++]; + struct dfl_feature *feature =3D &fdata->features[index++]; struct dfl_feature_irq_ctx *ctx; unsigned int i; =20 @@ -846,7 +846,7 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) kfree(finfo); } =20 - return pdata; + return fdata; } =20 static int @@ -880,19 +880,19 @@ build_info_create_dev(struct build_feature_devs_info = *binfo) =20 static int build_info_commit_dev(struct build_feature_devs_info *binfo) { - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; int ret; =20 - pdata =3D binfo_create_feature_dev_data(binfo); - if (IS_ERR(pdata)) - return PTR_ERR(pdata); + fdata =3D binfo_create_feature_dev_data(binfo); + if (IS_ERR(fdata)) + return PTR_ERR(fdata); =20 ret =3D platform_device_add(binfo->feature_dev); if (ret) return ret; =20 if (binfo->type =3D=3D PORT_ID) - dfl_fpga_cdev_add_port_data(binfo->cdev, pdata); + dfl_fpga_cdev_add_port_data(binfo->cdev, fdata); else binfo->cdev->fme_dev =3D get_device(&binfo->feature_dev->dev); =20 @@ -1515,13 +1515,13 @@ EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_irq); =20 static int remove_feature_dev(struct device *dev, void *data) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); struct platform_device *pdev =3D to_platform_device(dev); int id =3D pdev->id; =20 platform_device_unregister(pdev); =20 - dfl_id_free(pdata->type, id); + dfl_id_free(fdata->type, id); =20 return 0; } @@ -1615,22 +1615,22 @@ EXPORT_SYMBOL_GPL(dfl_fpga_feature_devs_enumerate); */ void dfl_fpga_feature_devs_remove(struct dfl_fpga_cdev *cdev) { - struct dfl_feature_platform_data *pdata, *ptmp; + struct dfl_feature_dev_data *fdata, *ptmp; =20 mutex_lock(&cdev->lock); if (cdev->fme_dev) put_device(cdev->fme_dev); =20 - list_for_each_entry_safe(pdata, ptmp, &cdev->port_dev_list, node) { - struct platform_device *port_dev =3D pdata->dev; + list_for_each_entry_safe(fdata, ptmp, &cdev->port_dev_list, node) { + struct platform_device *port_dev =3D fdata->dev; =20 /* remove released ports */ if (!device_is_registered(&port_dev->dev)) { - dfl_id_free(pdata->type, port_dev->id); + dfl_id_free(fdata->type, port_dev->id); platform_device_put(port_dev); } =20 - list_del(&pdata->node); + list_del(&fdata->node); put_device(&port_dev->dev); } mutex_unlock(&cdev->lock); @@ -1656,15 +1656,15 @@ EXPORT_SYMBOL_GPL(dfl_fpga_feature_devs_remove); * * NOTE: you will need to drop the device reference with put_device() afte= r use. */ -struct dfl_feature_platform_data * +struct dfl_feature_dev_data * __dfl_fpga_cdev_find_port_data(struct dfl_fpga_cdev *cdev, void *data, - int (*match)(struct dfl_feature_platform_data *, void *)) + int (*match)(struct dfl_feature_dev_data *, void *)) { - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; =20 - list_for_each_entry(pdata, &cdev->port_dev_list, node) { - if (match(pdata, data) && get_device(&pdata->dev->dev)) - return pdata; + list_for_each_entry(fdata, &cdev->port_dev_list, node) { + if (match(fdata, data) && get_device(&fdata->dev->dev)) + return fdata; } =20 return NULL; @@ -1703,30 +1703,30 @@ static int __init dfl_fpga_init(void) */ int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id) { - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; int ret =3D -ENODEV; =20 mutex_lock(&cdev->lock); - pdata =3D __dfl_fpga_cdev_find_port_data(cdev, &port_id, + fdata =3D __dfl_fpga_cdev_find_port_data(cdev, &port_id, dfl_fpga_check_port_id); - if (!pdata) + if (!fdata) goto unlock_exit; =20 - if (!device_is_registered(&pdata->dev->dev)) { + if (!device_is_registered(&fdata->dev->dev)) { ret =3D -EBUSY; goto put_dev_exit; } =20 - mutex_lock(&pdata->lock); - ret =3D dfl_feature_dev_use_begin(pdata, true); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + ret =3D dfl_feature_dev_use_begin(fdata, true); + mutex_unlock(&fdata->lock); if (ret) goto put_dev_exit; =20 - platform_device_del(pdata->dev); + platform_device_del(fdata->dev); cdev->released_port_num++; put_dev_exit: - put_device(&pdata->dev->dev); + put_device(&fdata->dev->dev); unlock_exit: mutex_unlock(&cdev->lock); return ret; @@ -1746,31 +1746,31 @@ EXPORT_SYMBOL_GPL(dfl_fpga_cdev_release_port); */ int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev *cdev, int port_id) { - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; int ret =3D -ENODEV; =20 mutex_lock(&cdev->lock); - pdata =3D __dfl_fpga_cdev_find_port_data(cdev, &port_id, + fdata =3D __dfl_fpga_cdev_find_port_data(cdev, &port_id, dfl_fpga_check_port_id); - if (!pdata) + if (!fdata) goto unlock_exit; =20 - if (device_is_registered(&pdata->dev->dev)) { + if (device_is_registered(&fdata->dev->dev)) { ret =3D -EBUSY; goto put_dev_exit; } =20 - ret =3D platform_device_add(pdata->dev); + ret =3D platform_device_add(fdata->dev); if (ret) goto put_dev_exit; =20 - mutex_lock(&pdata->lock); - dfl_feature_dev_use_end(pdata); - mutex_unlock(&pdata->lock); + mutex_lock(&fdata->lock); + dfl_feature_dev_use_end(fdata); + mutex_unlock(&fdata->lock); =20 cdev->released_port_num--; put_dev_exit: - put_device(&pdata->dev->dev); + put_device(&fdata->dev->dev); unlock_exit: mutex_unlock(&cdev->lock); return ret; @@ -1780,11 +1780,11 @@ EXPORT_SYMBOL_GPL(dfl_fpga_cdev_assign_port); static void config_port_access_mode(struct device *fme_dev, int port_id, bool is_vf) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(fme_dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(fme_dev); void __iomem *base; u64 v; =20 - base =3D dfl_get_feature_ioaddr_by_id(pdata, FME_FEATURE_ID_HEADER); + base =3D dfl_get_feature_ioaddr_by_id(fdata, FME_FEATURE_ID_HEADER); =20 v =3D readq(base + FME_HDR_PORT_OFST(port_id)); =20 @@ -1808,14 +1808,14 @@ static void config_port_access_mode(struct device *= fme_dev, int port_id, */ void dfl_fpga_cdev_config_ports_pf(struct dfl_fpga_cdev *cdev) { - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; =20 mutex_lock(&cdev->lock); - list_for_each_entry(pdata, &cdev->port_dev_list, node) { - if (device_is_registered(&pdata->dev->dev)) + list_for_each_entry(fdata, &cdev->port_dev_list, node) { + if (device_is_registered(&fdata->dev->dev)) continue; =20 - config_port_pf_mode(cdev->fme_dev, pdata->id); + config_port_pf_mode(cdev->fme_dev, fdata->id); } mutex_unlock(&cdev->lock); } @@ -1834,7 +1834,7 @@ EXPORT_SYMBOL_GPL(dfl_fpga_cdev_config_ports_pf); */ int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cdev *cdev, int num_vfs) { - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; int ret =3D 0; =20 mutex_lock(&cdev->lock); @@ -1848,11 +1848,11 @@ int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_c= dev *cdev, int num_vfs) goto done; } =20 - list_for_each_entry(pdata, &cdev->port_dev_list, node) { - if (device_is_registered(&pdata->dev->dev)) + list_for_each_entry(fdata, &cdev->port_dev_list, node) { + if (device_is_registered(&fdata->dev->dev)) continue; =20 - config_port_vf_mode(cdev->fme_dev, pdata->id); + config_port_vf_mode(cdev->fme_dev, fdata->id); } done: mutex_unlock(&cdev->lock); @@ -1985,7 +1985,7 @@ long dfl_feature_ioctl_set_irq(struct platform_device= *pdev, struct dfl_feature *feature, unsigned long arg) { - struct dfl_feature_platform_data *pdata =3D dev_get_platdata(&pdev->dev); + struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(&pdev->dev= ); struct dfl_fpga_irq_set hdr; s32 *fds; long ret; @@ -2005,9 +2005,9 @@ long dfl_feature_ioctl_set_irq(struct platform_device= *pdev, if (IS_ERR(fds)) return PTR_ERR(fds); =20 - mutex_lock(&pdata->lock); + mutex_lock(&fdata->lock); ret =3D dfl_fpga_set_irq_triggers(feature, hdr.start, hdr.count, fds); - mutex_unlock(&pdata->lock); + mutex_unlock(&fdata->lock); =20 kfree(fds); return ret; diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index d3a8a8ef908b..bbd74e1744a8 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -208,6 +208,7 @@ #define PORT_UINT_CAP_FST_VECT GENMASK_ULL(23, 12) /* First Vector */ =20 struct dfl_feature_platform_data; +#define dfl_feature_dev_data dfl_feature_platform_data =20 /** * struct dfl_fpga_port_ops - port ops @@ -222,15 +223,15 @@ struct dfl_fpga_port_ops { const char *name; struct module *owner; struct list_head node; - int (*get_id)(struct dfl_feature_platform_data *pdata); - int (*enable_set)(struct dfl_feature_platform_data *pdata, bool enable); + int (*get_id)(struct dfl_feature_dev_data *fdata); + int (*enable_set)(struct dfl_feature_dev_data *fdata, bool enable); }; =20 void dfl_fpga_port_ops_add(struct dfl_fpga_port_ops *ops); void dfl_fpga_port_ops_del(struct dfl_fpga_port_ops *ops); -struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct dfl_feature_platfor= m_data *pdata); +struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct dfl_feature_dev_dat= a *fdata); void dfl_fpga_port_ops_put(struct dfl_fpga_port_ops *ops); -int dfl_fpga_check_port_id(struct dfl_feature_platform_data *pdata, void *= pport_id); +int dfl_fpga_check_port_id(struct dfl_feature_dev_data *fdata, void *pport= _id); =20 /** * struct dfl_feature_id - dfl private feature id @@ -336,51 +337,51 @@ struct dfl_feature_platform_data { }; =20 static inline -int dfl_feature_dev_use_begin(struct dfl_feature_platform_data *pdata, +int dfl_feature_dev_use_begin(struct dfl_feature_dev_data *fdata, bool excl) { - if (pdata->excl_open) + if (fdata->excl_open) return -EBUSY; =20 if (excl) { - if (pdata->open_count) + if (fdata->open_count) return -EBUSY; =20 - pdata->excl_open =3D true; + fdata->excl_open =3D true; } - pdata->open_count++; + fdata->open_count++; =20 return 0; } =20 static inline -void dfl_feature_dev_use_end(struct dfl_feature_platform_data *pdata) +void dfl_feature_dev_use_end(struct dfl_feature_dev_data *fdata) { - pdata->excl_open =3D false; + fdata->excl_open =3D false; =20 - if (WARN_ON(pdata->open_count <=3D 0)) + if (WARN_ON(fdata->open_count <=3D 0)) return; =20 - pdata->open_count--; + fdata->open_count--; } =20 static inline -int dfl_feature_dev_use_count(struct dfl_feature_platform_data *pdata) +int dfl_feature_dev_use_count(struct dfl_feature_dev_data *fdata) { - return pdata->open_count; + return fdata->open_count; } =20 static inline -void dfl_fpga_pdata_set_private(struct dfl_feature_platform_data *pdata, +void dfl_fpga_fdata_set_private(struct dfl_feature_dev_data *fdata, void *private) { - pdata->private =3D private; + fdata->private =3D private; } =20 static inline -void *dfl_fpga_pdata_get_private(struct dfl_feature_platform_data *pdata) +void *dfl_fpga_fdata_get_private(struct dfl_feature_dev_data *fdata) { - return pdata->private; + return fdata->private; } =20 struct dfl_feature_ops { @@ -413,26 +414,26 @@ dfl_fpga_inode_to_feature_dev_data(struct inode *inod= e) return pdata; } =20 -#define dfl_fpga_dev_for_each_feature(pdata, feature) \ - for ((feature) =3D (pdata)->features; \ - (feature) < (pdata)->features + (pdata)->num; (feature)++) +#define dfl_fpga_dev_for_each_feature(fdata, feature) \ + for ((feature) =3D (fdata)->features; \ + (feature) < (fdata)->features + (fdata)->num; (feature)++) =20 -static inline -struct dfl_feature *dfl_get_feature_by_id(struct dfl_feature_platform_data= *pdata, u16 id) +static inline struct dfl_feature * +dfl_get_feature_by_id(struct dfl_feature_dev_data *fdata, u16 id) { struct dfl_feature *feature; =20 - dfl_fpga_dev_for_each_feature(pdata, feature) + dfl_fpga_dev_for_each_feature(fdata, feature) if (feature->id =3D=3D id) return feature; =20 return NULL; } =20 -static inline -void __iomem *dfl_get_feature_ioaddr_by_id(struct dfl_feature_platform_dat= a *pdata, u16 id) +static inline void __iomem * +dfl_get_feature_ioaddr_by_id(struct dfl_feature_dev_data *fdata, u16 id) { - struct dfl_feature *feature =3D dfl_get_feature_by_id(pdata, id); + struct dfl_feature *feature =3D dfl_get_feature_by_id(fdata, id); =20 if (feature && feature->ioaddr) return feature->ioaddr; @@ -441,10 +442,12 @@ void __iomem *dfl_get_feature_ioaddr_by_id(struct dfl= _feature_platform_data *pda return NULL; } =20 +#define to_dfl_feature_dev_data dev_get_platdata + static inline -struct device *dfl_fpga_pdata_to_parent(struct dfl_feature_platform_data *= pdata) +struct device *dfl_fpga_fdata_to_parent(struct dfl_feature_dev_data *fdata) { - return pdata->dev->dev.parent->parent; + return fdata->dev->dev.parent->parent; } =20 static inline bool dfl_feature_is_fme(void __iomem *base) @@ -531,21 +534,21 @@ void dfl_fpga_feature_devs_remove(struct dfl_fpga_cde= v *cdev); * device returned by __dfl_fpga_cdev_find_port and dfl_fpga_cdev_find_port * functions. */ -struct dfl_feature_platform_data * +struct dfl_feature_dev_data * __dfl_fpga_cdev_find_port_data(struct dfl_fpga_cdev *cdev, void *data, - int (*match)(struct dfl_feature_platform_data *, void *)); + int (*match)(struct dfl_feature_dev_data *, void *)); =20 -static inline struct dfl_feature_platform_data * +static inline struct dfl_feature_dev_data * dfl_fpga_cdev_find_port_data(struct dfl_fpga_cdev *cdev, void *data, - int (*match)(struct dfl_feature_platform_data *, void *)) + int (*match)(struct dfl_feature_dev_data *, void *)) { - struct dfl_feature_platform_data *pdata; + struct dfl_feature_dev_data *fdata; =20 mutex_lock(&cdev->lock); - pdata =3D __dfl_fpga_cdev_find_port_data(cdev, data, match); + fdata =3D __dfl_fpga_cdev_find_port_data(cdev, data, match); mutex_unlock(&cdev->lock); =20 - return pdata; + return fdata; } =20 int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *cdev, int port_id); --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 443EE216E1A; Fri, 25 Oct 2024 22:37:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895869; cv=none; b=E4PjqYoWzXi3VkFtM1bi+yy1L1NCNYz1wQm3uwi6O5OsJvWeismX7b7iHxY1k1QcQBFB7Q/7aBjtLf74B/3BgTvh30bMAu60FGWQnWICPqdse6zMtMAnUjSVvZiLGOgw8Dmpn0NaCAbbwZHS/9H63shVFZHcPhhDrHDxbpG/+QM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895869; c=relaxed/simple; bh=SJxrk0bV7nYjymWWLWOqWQzSFmvtQpa4Xj56BdR8DDw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qThkjjXqpBguEwH60HqBm19HQJptMrpLtOoJlECAdHT3oS36FIAQ2A8bZ3vVm+IIsh/iQfMzyhwuAG2trYCRZGxLsGBCv1uI4VbMMOLqxpt6f1f0BAq8UTzrLKjzW+ubgawR80zO/rumIa8EG7otnVaWGHXF6/yp5wTaIfZqlok= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=jeUKF+tZ; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="jeUKF+tZ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895866; x=1761431866; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=SJxrk0bV7nYjymWWLWOqWQzSFmvtQpa4Xj56BdR8DDw=; b=jeUKF+tZWrtMIPxXWq+UinbegEBsUcmM9PXvtnRp2ufhqj+YUyuJN7/H JC1hs0MjHPBsHWANyTfTKdEkv804OnJ/93W+3jyJ0hUEkm7YetgH2dZMv LV6wrpPbH98RkddHy+U+F1CZTcyhFYUP7i4aJXXlPY8PiflIKA8isnABH /fPvhADYq9LORsFO8h+su42wjPgrVVe6g+xWhl+wHTsYTuXzr4Yei5nWL iet5MYHR2YBgTohTvJ6f4rUPlgUgi19Gds/kF+iMzxpcg7rLAgVWSjxn5 lW7QkK+jRK/WmQwBiORn7DD2kvy5wrHhuZInnakK39aui2HSu6e73IGzL A==; X-CSE-ConnectionGUID: P3S54IFLQTyPfiI23HJ4iQ== X-CSE-MsgGUID: c9PksvHQQ4m37SMulNkYJA== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474656" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474656" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 X-CSE-ConnectionGUID: fx+UHoORTsOgRkCoiEr6Qg== X-CSE-MsgGUID: 30ZDK7VcTV+8ikfK73fcog== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596163" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 09/19] fpga: dfl: factor out feature device registration Date: Fri, 25 Oct 2024 18:37:04 -0400 Message-ID: <20241025223714.394533-10-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add separate functions, feature_dev_{register,unregister}(), that wrap platform_device_add() and platform_device_unregister(), respectively. These are invoked once per feature device in this commit but will be reused in a subsequent commit to destroy and recreate the platform device when the corresponding port is released and reassigned. The function feature_dev_register() will be extended in subsequent commits to allocate the platform device, add resources and platform data, and finally add the platform device to the device hierarchy. The function feature_dev_unregister() is in its final form. After unregistering the device, the device pointer in the feature data is reset to NULL to signal that the platform device has been destroyed. This will substitute device_is_registered() in a subsequent commit. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - New patch extracted from last patch of v3 series. --- drivers/fpga/dfl.c | 31 +++++++++++++++++++++++++++---- 1 file changed, 27 insertions(+), 4 deletions(-) diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index e8488a771337..13787b216e23 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -872,12 +872,35 @@ build_info_create_dev(struct build_feature_devs_info = *binfo) if (fdev->id < 0) return fdev->id; =20 - fdev->dev.parent =3D &binfo->cdev->region->dev; - fdev->dev.devt =3D dfl_get_devt(dfl_devs[type].devt_type, fdev->id); + return 0; +} + +/* + * register current feature device, it is called when we need to switch to + * another feature parsing or we have parsed all features on given device + * feature list. + */ +static int feature_dev_register(struct dfl_feature_dev_data *fdata) +{ + struct platform_device *fdev =3D fdata->dev; + int ret; + + fdev->dev.parent =3D &fdata->dfl_cdev->region->dev; + fdev->dev.devt =3D dfl_get_devt(dfl_devs[fdata->type].devt_type, fdev->id= ); + + ret =3D platform_device_add(fdev); + if (ret) + return ret; =20 return 0; } =20 +static void feature_dev_unregister(struct dfl_feature_dev_data *fdata) +{ + platform_device_unregister(fdata->dev); + fdata->dev =3D NULL; +} + static int build_info_commit_dev(struct build_feature_devs_info *binfo) { struct dfl_feature_dev_data *fdata; @@ -887,7 +910,7 @@ static int build_info_commit_dev(struct build_feature_d= evs_info *binfo) if (IS_ERR(fdata)) return PTR_ERR(fdata); =20 - ret =3D platform_device_add(binfo->feature_dev); + ret =3D feature_dev_register(fdata); if (ret) return ret; =20 @@ -1519,7 +1542,7 @@ static int remove_feature_dev(struct device *dev, voi= d *data) struct platform_device *pdev =3D to_platform_device(dev); int id =3D pdev->id; =20 - platform_device_unregister(pdev); + feature_dev_unregister(fdata); =20 dfl_id_free(fdata->type, id); =20 --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B739F216DE1; Fri, 25 Oct 2024 22:37:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895866; cv=none; b=LgD0OgH9UX0hK2F0ZQfitspPhG67b1vUSJN+A8WuuC+4UGFFx7xv1qdgMUiEQRI5MxAptuppFItA2JO3BvaexLhnmmzDhEzbSNvCTZxsC00QreZxlTc3D+tMq4TEYeKoftyAs/86m7Lqe8b8vzV7n/5iyFhWmtwYgVOrUhgTfEI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895866; c=relaxed/simple; bh=IqcFsxiGHZDj2X9ysBIZdeO53g5MyV5tMg30qgptar4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=kLTb6FZKwpz0Kl/ciwnUElLoZKQ7hKvWiti78Cws//be3+KqdsBtoum4dWbDjlzwJCYke5P8lvh2ny/k+KriQvwwEP88gUapgUUkWzRBHSWRrNAZ6/dtY4EDz0yWABhM4GiTKoGtVNj94zvgiJN1yxuSiqNyDxsbM3nsu61+Ulk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=UDURgIVD; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="UDURgIVD" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895863; x=1761431863; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=IqcFsxiGHZDj2X9ysBIZdeO53g5MyV5tMg30qgptar4=; b=UDURgIVDDGn0nGpLJaohKxmBhJxo7S5gZg0RAN2rxWqpF2fMJ2VzU7zT 6Q6g2x4hv9kZ0FhzJapQphH6bkakABlswanyRLtpwafC4opB+FdygqI91 Im6rJJ6cytwFD/VzmP+evfGXQQHJZGh+9QAyplz5dEyxlIp6KsDD1sW1n aeY1MMtoakAnraPQ3amap0wn0/Zp9xmAZ3ZuvFNF9/uC2O2oKKKHAslVm fyx+GhgbkTlPHh2zPPx4IyMJLveyJ6+PVugsTdjul4srwexvp2j+XNY4r WA135KFPo96PBDZ0RMM/P/RBguIR8wrMInpB0w/gjstkjr2o4S+ia3gMe w==; X-CSE-ConnectionGUID: GA8k+UtgSMyFR1OwBmIQkA== X-CSE-MsgGUID: YurKg3KhQ5KAx6tC1JY22A== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474659" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474659" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 X-CSE-ConnectionGUID: KrDUgKizQimnO36nR4OgHQ== X-CSE-MsgGUID: 5WRN3aoCSOi8va8+qc9h2g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596167" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 10/19] fpga: dfl: factor out feature device data from platform device data Date: Fri, 25 Oct 2024 18:37:05 -0400 Message-ID: <20241025223714.394533-11-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a structure dfl_feature_dev_data to hold the DFL enumeration info previously held in dfl_feature_platform_data. Allocate the new structure using device-managed memory whose lifetime is bound to the lifetime of the physical DFL, e.g., PCIe FPGA device. In a subsequent commit, this will allow the feature platform device to be completely destroyed and recreated on port release and assign, respectively, while retaining the feature data in the new dfl_feature_dev_data structure. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - New patch extracted from last patch of v3 series. --- drivers/fpga/dfl.c | 16 +++++++--------- drivers/fpga/dfl.h | 42 ++++++++++++++++++++++++++++-------------- 2 files changed, 35 insertions(+), 23 deletions(-) diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index 13787b216e23..4268a61bb9f7 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -752,13 +752,7 @@ binfo_create_feature_dev_data(struct build_feature_dev= s_info *binfo) if (WARN_ON_ONCE(type >=3D DFL_ID_MAX)) return ERR_PTR(-EINVAL); =20 - /* - * we do not need to care for the memory which is associated with - * the platform device. After calling platform_device_unregister(), - * it will be automatically freed by device's release() callback, - * platform_device_release(). - */ - fdata =3D kzalloc(struct_size(fdata, features, binfo->feature_num), GFP_K= ERNEL); + fdata =3D devm_kzalloc(binfo->dev, struct_size(fdata, features, binfo->fe= ature_num), GFP_KERNEL); if (!fdata) return ERR_PTR(-ENOMEM); =20 @@ -779,8 +773,6 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) */ WARN_ON(fdata->disable_count); =20 - fdev->dev.platform_data =3D fdata; - /* each sub feature has one MMIO resource */ fdev->num_resources =3D binfo->feature_num; fdev->resource =3D kcalloc(binfo->feature_num, sizeof(*fdev->resource), @@ -882,12 +874,18 @@ build_info_create_dev(struct build_feature_devs_info = *binfo) */ static int feature_dev_register(struct dfl_feature_dev_data *fdata) { + struct dfl_feature_platform_data pdata =3D {}; struct platform_device *fdev =3D fdata->dev; int ret; =20 fdev->dev.parent =3D &fdata->dfl_cdev->region->dev; fdev->dev.devt =3D dfl_get_devt(dfl_devs[fdata->type].devt_type, fdev->id= ); =20 + pdata.fdata =3D fdata; + ret =3D platform_device_add_data(fdev, &pdata, sizeof(pdata)); + if (ret) + return ret; + ret =3D platform_device_add(fdev); if (ret) return ret; diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index bbd74e1744a8..bcbdfcdb9742 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -207,8 +207,7 @@ #define PORT_UINT_CAP_INT_NUM GENMASK_ULL(11, 0) /* Interrupts num */ #define PORT_UINT_CAP_FST_VECT GENMASK_ULL(23, 12) /* First Vector */ =20 -struct dfl_feature_platform_data; -#define dfl_feature_dev_data dfl_feature_platform_data +struct dfl_feature_dev_data; =20 /** * struct dfl_fpga_port_ops - port ops @@ -304,26 +303,24 @@ struct dfl_feature { #define FEATURE_DEV_ID_UNUSED (-1) =20 /** - * struct dfl_feature_platform_data - platform data for feature devices + * struct dfl_feature_dev_data - dfl enumeration data for dfl feature dev. * - * @node: node to link feature devs to container device's port_dev_list. - * @lock: mutex to protect platform data. - * @cdev: cdev of feature dev. - * @dev: ptr to platform device linked with this platform data. + * @node: node to link the data structure to container device's port_dev_l= ist. + * @lock: mutex to protect feature dev data. + * @dev: ptr to the feature's platform device linked with this structure. * @type: type of DFL FIU for the feature dev. See enum dfl_id_type. * @dfl_cdev: ptr to container device. - * @id: id used for this feature device. + * @id: id used for the feature device. * @disable_count: count for port disable. * @excl_open: set on feature device exclusive open. * @open_count: count for feature device open. * @num: number for sub features. * @private: ptr to feature dev private data. - * @features: sub features of this feature dev. + * @features: sub features for the feature dev. */ -struct dfl_feature_platform_data { +struct dfl_feature_dev_data { struct list_head node; struct mutex lock; - struct cdev cdev; struct platform_device *dev; enum dfl_id_type type; struct dfl_fpga_cdev *dfl_cdev; @@ -336,6 +333,17 @@ struct dfl_feature_platform_data { struct dfl_feature features[]; }; =20 +/** + * struct dfl_feature_platform_data - platform data for feature devices + * + * @cdev: cdev of feature dev. + * @fdata: dfl enumeration data for the dfl feature device. + */ +struct dfl_feature_platform_data { + struct cdev cdev; + struct dfl_feature_dev_data *fdata; +}; + static inline int dfl_feature_dev_use_begin(struct dfl_feature_dev_data *fdata, bool excl) @@ -404,14 +412,14 @@ int dfl_fpga_dev_ops_register(struct platform_device = *pdev, struct module *owner); void dfl_fpga_dev_ops_unregister(struct platform_device *pdev); =20 -static inline struct dfl_feature_platform_data * +static inline struct dfl_feature_dev_data * dfl_fpga_inode_to_feature_dev_data(struct inode *inode) { struct dfl_feature_platform_data *pdata; =20 pdata =3D container_of(inode->i_cdev, struct dfl_feature_platform_data, cdev); - return pdata; + return pdata->fdata; } =20 #define dfl_fpga_dev_for_each_feature(fdata, feature) \ @@ -442,7 +450,13 @@ dfl_get_feature_ioaddr_by_id(struct dfl_feature_dev_da= ta *fdata, u16 id) return NULL; } =20 -#define to_dfl_feature_dev_data dev_get_platdata +static inline struct dfl_feature_dev_data * +to_dfl_feature_dev_data(struct device *dev) +{ + struct dfl_feature_platform_data *pdata =3D dev_get_platdata(dev); + + return pdata->fdata; +} =20 static inline struct device *dfl_fpga_fdata_to_parent(struct dfl_feature_dev_data *fdata) --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 50311213142; Fri, 25 Oct 2024 22:37:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895871; cv=none; b=cl8haO90c8+RuWDuvQ1wSCNIw42TQIRSLt+fwVGJhDx5AVAkLIozuwDY2Tw1oYtW0SXuAEU1iPdLIHNndHWRMd7xP3HZAfR+1vDUxhvBcU4R8SQjl4c6rgVqQmNT9bbR3rSKlL4OVlraSnnIElcu+thL+VuZjyKS8nhTbanIoAk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895871; c=relaxed/simple; bh=9Euj4+tmjMl6tgNNZl+Np0awrshyvhZBAyvVAHZroeA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OlLXvq/MGqts/pvXgo9GQjYBhRPTiGlhyU63YrFi+Qd4ID3WdmaFx3SUnKfp7DZpimgWL73FAYKy76JTn2mJUxozBRQvppZf14VK6s0KUslycq4guSXOKK+sD/nT+PeED6aGUoHK2taCP2mUtIiu4gicsj7Aln1AIXfV2IIWrHg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Dutgcn6K; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Dutgcn6K" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895869; x=1761431869; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=9Euj4+tmjMl6tgNNZl+Np0awrshyvhZBAyvVAHZroeA=; b=Dutgcn6KaGVwjqZpzeoCf7Ha+MOkk/nncv62EUpFDkT14o0dUNhKy8NO RSnCJGlGnbN6dNc6Pd51Kh+vHQfk2eW4Wg/+SxmfuW6E31BWBrrWWZthz cHAHwZr6hQmK2CMHSA0CP6h/Hwa5Ctfbfdbg58OhuIbajuBueXIGsxmd1 oVPknowKJK0OqAWoBQ3FpifrG69uXOOjue31NI/ezZWkpQ0FNpzyP2y/I +zu2elrPskcSiBdF2AyDHhQlPI4fdZQbnp3cm/NuORU2C21593j0WnLXh Rxpy1PF1L4tYc9ID6YI4xmdcJ4/i1B1USd8ODSSFGcRUITOIvfOAa/QV+ A==; X-CSE-ConnectionGUID: 8cRdTjQqTwKIFSq9JQcMmw== X-CSE-MsgGUID: PRXL6+c8S4KOv8Dg9G//Yw== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474663" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474663" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:37 -0700 X-CSE-ConnectionGUID: 8+Ma2bvhR7iZtAnFKpbb3A== X-CSE-MsgGUID: 2dUCzM2RQGe7PlINcJOOgg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596170" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 11/19] fpga: dfl: convert features from flexible array member to separate array Date: Fri, 25 Oct 2024 18:37:06 -0400 Message-ID: <20241025223714.394533-12-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use a separate array allocation for features and substitute a pointer for the flexible array member in the feature device data. A subsequent commit will add another array for resources. The current commit converts the flexible array member to a separate allocation for consistency. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - New patch extracted from last patch of v3 series. --- drivers/fpga/dfl.c | 7 ++++++- drivers/fpga/dfl.h | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index 4268a61bb9f7..094bba647085 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -752,10 +752,15 @@ binfo_create_feature_dev_data(struct build_feature_de= vs_info *binfo) if (WARN_ON_ONCE(type >=3D DFL_ID_MAX)) return ERR_PTR(-EINVAL); =20 - fdata =3D devm_kzalloc(binfo->dev, struct_size(fdata, features, binfo->fe= ature_num), GFP_KERNEL); + fdata =3D devm_kzalloc(binfo->dev, sizeof(*fdata), GFP_KERNEL); if (!fdata) return ERR_PTR(-ENOMEM); =20 + fdata->features =3D devm_kcalloc(binfo->dev, binfo->feature_num, + sizeof(*fdata->features), GFP_KERNEL); + if (!fdata->features) + return ERR_PTR(-ENOMEM); + fdata->dev =3D fdev; fdata->type =3D type; fdata->num =3D binfo->feature_num; diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index bcbdfcdb9742..d2765555e109 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -330,7 +330,7 @@ struct dfl_feature_dev_data { int open_count; void *private; int num; - struct dfl_feature features[]; + struct dfl_feature *features; }; =20 /** --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BC8B6216E01; Fri, 25 Oct 2024 22:37:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895866; cv=none; b=RwSYYv7jyT5eHGtyPr3PTuquCAcjlx2bTT+Takv4KwcloDaVKJ3m2jD2tH5ZMGrcDq5X9qeYQ69vUxugBlPXx5KfBJyD0waHE1ZotuGh0154tpuFkchsgjVY6FdKzjwbdKIBqUJyDCv3ulyEx6TKqZXr7AKI/KSzTPvdg+DtKFQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895866; c=relaxed/simple; bh=eZuU5ssbG4GvwWXQo2VcNFPFRBHShENtKzR6jb4Z4kE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CDgGL+vu2cTWsAjmpOmUMdIWeOaXYJvtyVPOsdINMBOADTSQHvfl923ctbLZLFlYJo313NKFUCeJzJ46dd+SsYDvvtowPbfJviYu0Mi5eLhLFLt71FTWHF3jOhpA1/26GbFpiQXIhX3nf4TOmlmntsbSFRIOpomoOY+8+vI+YvQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OkVlqSsR; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OkVlqSsR" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895864; x=1761431864; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=eZuU5ssbG4GvwWXQo2VcNFPFRBHShENtKzR6jb4Z4kE=; b=OkVlqSsRn9THFI+Ipw0IgfGOrP8juoTaLfS+JhLX07DRMP30jjTzT1V3 hnokIMZ0bFC401ypZr0rZjF1/iHLiNRIs2aztKmqihIInQW9letbc4T8s bE3A/y6ad9HFMlIBIPzODerAHlulsdiRAJutvI7B0q+HutABEvLY4TRlw 6Gpbc9w03K90BsKfhFM1qtYKOL9AWq5pYJ+CVAEP3Hgv4alTXIfiRQTPr N5hwsCCr/6pj0ieMErork8EaD455eo/lTWXfdy2z+L4WJqaU8+SMFPf6J Nf0P1SekKbnYNwk4ZfNIdzIaOY6W4JhsOpRzOvuLfLL9ixac/UGId/d54 g==; X-CSE-ConnectionGUID: Q2iyvYdETiWvp7inzuHzOA== X-CSE-MsgGUID: RMmjgRbrQhKl+BbonFhSww== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474667" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474667" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 X-CSE-ConnectionGUID: UyIL4WgARsivMvck8Jw2Ww== X-CSE-MsgGUID: AtuZGmQyR/S/TxEp3m/gQA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596173" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 12/19] fpga: dfl: store MMIO resources in feature device data Date: Fri, 25 Oct 2024 18:37:07 -0400 Message-ID: <20241025223714.394533-13-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Instead of directly copying the MMIO resource of each feature to the feature device resources, add a new member to the feature device data to store the resources and copy them to the feature device using platform_device_add_resources(). This prepares a subsequent commit which completely destroys and recreates the feature device when releasing and reassigning the corresponding port, respectively. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - New patch extracted from last patch of v3 series. --- drivers/fpga/dfl.c | 21 +++++++++++++-------- drivers/fpga/dfl.h | 4 ++++ 2 files changed, 17 insertions(+), 8 deletions(-) diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index 094bba647085..46c1b2534430 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -761,6 +761,11 @@ binfo_create_feature_dev_data(struct build_feature_dev= s_info *binfo) if (!fdata->features) return ERR_PTR(-ENOMEM); =20 + fdata->resources =3D devm_kcalloc(binfo->dev, binfo->feature_num, + sizeof(*fdata->resources), GFP_KERNEL); + if (!fdata->resources) + return ERR_PTR(-ENOMEM); + fdata->dev =3D fdev; fdata->type =3D type; fdata->num =3D binfo->feature_num; @@ -778,13 +783,6 @@ binfo_create_feature_dev_data(struct build_feature_dev= s_info *binfo) */ WARN_ON(fdata->disable_count); =20 - /* each sub feature has one MMIO resource */ - fdev->num_resources =3D binfo->feature_num; - fdev->resource =3D kcalloc(binfo->feature_num, sizeof(*fdev->resource), - GFP_KERNEL); - if (!fdev->resource) - return ERR_PTR(-ENOMEM); - /* fill features and resource information for feature dev */ list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) { struct dfl_feature *feature =3D &fdata->features[index++]; @@ -822,7 +820,7 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) return feature->ioaddr; } else { feature->resource_index =3D res_idx; - fdev->resource[res_idx++] =3D finfo->mmio_res; + fdata->resources[res_idx++] =3D finfo->mmio_res; } =20 if (finfo->nr_irqs) { @@ -843,6 +841,8 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) kfree(finfo); } =20 + fdata->resource_num =3D res_idx; + return fdata; } =20 @@ -886,6 +886,11 @@ static int feature_dev_register(struct dfl_feature_dev= _data *fdata) fdev->dev.parent =3D &fdata->dfl_cdev->region->dev; fdev->dev.devt =3D dfl_get_devt(dfl_devs[fdata->type].devt_type, fdev->id= ); =20 + ret =3D platform_device_add_resources(fdev, fdata->resources, + fdata->resource_num); + if (ret) + return ret; + pdata.fdata =3D fdata; ret =3D platform_device_add_data(fdev, &pdata, sizeof(pdata)); if (ret) diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index d2765555e109..921d946e4820 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -317,6 +317,8 @@ struct dfl_feature { * @num: number for sub features. * @private: ptr to feature dev private data. * @features: sub features for the feature dev. + * @resource_num: number of resources for the feature dev. + * @resources: resources for the feature dev. */ struct dfl_feature_dev_data { struct list_head node; @@ -331,6 +333,8 @@ struct dfl_feature_dev_data { void *private; int num; struct dfl_feature *features; + int resource_num; + struct resource *resources; }; =20 /** --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 15CF4217451; Fri, 25 Oct 2024 22:37:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895869; cv=none; b=jE8IeP7NWFF9qY4+MTHkgTxWN/wlk70h1DQGWIemMGFyXQOku4qM2JVrOnp9N1JMuUkK65SmZD0pjNz5QWCeMXXzLXJtIpwlz0fcpZHXjs1Q+gM8fil1x5ustmXSxDBcFcnrJMC5cNUFbtTWv0BAZA4Jz3mJpDTbCl6LtN1nEHw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895869; c=relaxed/simple; bh=VxSKDHNNoNQrmUsSmHtwgnSSuoA76Ld7CX00Bv7KunE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=qz7O9H07CBvDaMVgFMIM7YrzKKv4cpR1bznXxnsix7hW80+f5sOBkde6wvZFshhh7tw3YawD1+W+WHq4dGD4Rnv2DddVNMaNcwnrYaNIU9SgyQIuBvN+hBiW+5gaFMZG54XUMXJOr2ICwJjA3WUe+VVK/UgYeMwmO1+te43zjM0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=dD2/C0GD; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dD2/C0GD" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895867; x=1761431867; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VxSKDHNNoNQrmUsSmHtwgnSSuoA76Ld7CX00Bv7KunE=; b=dD2/C0GD61uc4rdVGqrg7CUXooaftkeHobLqdtcEE/Bxa/8K2C4VPLAa MiLhBYAR9apVq/O3LAc9P13ncdDgf8vh/AWinQBU9IVLvlafifhToALl2 T6tq8vSuRoYmzsdsNFKYFUVprLxy0AdBd2egv7dOaOz0YuXbodSfhPuaw 6yHNv31iL0+b3OVvMPHdOylb1XfV4vektbPSsiYjxrisqAmUW6E3OGbGq VwCRiUUGcvp7SovC6s5t1vR5J0kyIPspIGrYc7AJfZcJ+nCd9rr+g4HJp pPLTy54ldgVoW+b8hUcsiSMLm2zTxAwJ9COxkmGdUX0NBsWE+EpaAnOdc A==; X-CSE-ConnectionGUID: O8hTlGw1RQyfuRlVLSRYpQ== X-CSE-MsgGUID: d4ah0wjTQwe49U1zgNMnjQ== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474670" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474670" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 X-CSE-ConnectionGUID: fPrFJs44Q4WMTUCa1RE7ag== X-CSE-MsgGUID: LT2xqMQqQciixwj/cLVTYA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596176" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 13/19] fpga: dfl: store platform device name in feature device data Date: Fri, 25 Oct 2024 18:37:08 -0400 Message-ID: <20241025223714.394533-14-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a new member, pdev_name, to the structure dfl_feature_dev_data that holds the platform device name for convenience. A subsequent commit will completely destroy the platform device during port release, after which fdata->dev is unavailable, while fdata itself remains available. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - New patch extracted from last patch of v3 series. --- drivers/fpga/dfl.c | 3 ++- drivers/fpga/dfl.h | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index 46c1b2534430..560d35857405 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -160,7 +160,7 @@ struct dfl_fpga_port_ops *dfl_fpga_port_ops_get(struct = dfl_feature_dev_data *fda =20 list_for_each_entry(ops, &dfl_port_ops_list, node) { /* match port_ops using the name of platform device */ - if (!strcmp(fdata->dev->name, ops->name)) { + if (!strcmp(fdata->pdev_name, ops->name)) { if (!try_module_get(ops->owner)) ops =3D NULL; goto done; @@ -768,6 +768,7 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) =20 fdata->dev =3D fdev; fdata->type =3D type; + fdata->pdev_name =3D dfl_devs[type].name; fdata->num =3D binfo->feature_num; fdata->dfl_cdev =3D binfo->cdev; fdata->id =3D FEATURE_DEV_ID_UNUSED; diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index 921d946e4820..cbff5d543c44 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -309,6 +309,7 @@ struct dfl_feature { * @lock: mutex to protect feature dev data. * @dev: ptr to the feature's platform device linked with this structure. * @type: type of DFL FIU for the feature dev. See enum dfl_id_type. + * @pdev_name: platform device name for the feature dev. * @dfl_cdev: ptr to container device. * @id: id used for the feature device. * @disable_count: count for port disable. @@ -325,6 +326,7 @@ struct dfl_feature_dev_data { struct mutex lock; struct platform_device *dev; enum dfl_id_type type; + const char *pdev_name; struct dfl_fpga_cdev *dfl_cdev; int id; unsigned int disable_count; --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65105217650; Fri, 25 Oct 2024 22:37:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895871; cv=none; b=vEiuy911Qaq4Ud8O6Y34fdfebTtJ3V75jAmIdE1atQlHVT5/1nqa57ub6mISIqyAuPdRs3q7C4w7grlap5TxCKDjxyL3axWP03UJSwBgnQusyvQUIOhHA7mJ25Exal9EMaH3MfZaiV4A6jHDiiMXe55sii4l4/FSDXjLZb5W3VY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895871; c=relaxed/simple; bh=yHSCtip8WZC5ZV34sgV6cAToQV0mnoB6/Ck9qqxq/cs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XDxvnn0j6f0oW5wmNt0BXZ1OT7xUflIIuQ9S+tu7spqMxhc/qutNnRY1QzoWhmDb7XjtJ9cS0fwYhDCRlXsYijXHwZ7xd3PDLKm3958P4SeyxR+Zg+qxACX4h7AzLSx/RQECOJfrfC3blqwB1KpcAvfibatU58jNeSQv1s8E/yM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=bl13ygAG; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="bl13ygAG" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895869; x=1761431869; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=yHSCtip8WZC5ZV34sgV6cAToQV0mnoB6/Ck9qqxq/cs=; b=bl13ygAGPRDWQjtu6AWd3skYaTNMKbESryiy55GaRql5JBuHEfh+LhuC 22dRQHbbYue9ExgKT3/8RhkTXm4uKug9+OwinX/kiaTIrLP3YUyI7bGl/ 8ZvxjO7FjpfQM7N6tsHpgCxcY2UwFXKj0Vg5IcfIlj/uNuBNgggJ8Twy/ /SqlGTiqy+sXcilwZCqRqZ03boUubaWStPWOh4680kqNTMGd+5quJrpot MAZ2j8tKN8HKpi3tlT8xNYlCn5PdjuoA45xGZKfRudUXT514xfTI2BG33 wyGKKycDyZpF3fLJr6R3I8MLEBMtZA5wq3q4JPbvCXQ3DRR9Osy+39kvY A==; X-CSE-ConnectionGUID: fxpKYo4dS3u3Xnrk1u7+qQ== X-CSE-MsgGUID: nQKRxCwISUqahWMjMDNRpA== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474673" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474673" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 X-CSE-ConnectionGUID: ToPLgMKqRw2IEosxYr6Osw== X-CSE-MsgGUID: i5k5oMggSli9aFfwHTIOPA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596179" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 14/19] fpga: dfl: store platform device id in feature device data Date: Fri, 25 Oct 2024 18:37:09 -0400 Message-ID: <20241025223714.394533-15-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Delay the feature device id allocation from build_info_create_dev() to binfo_create_feature_dev_data() and store the id in the feature device data before copying it to the device. This will allow reusing the same id in a subsequent commit which completely destroys and recreates the feature device when releasing and reassigning the corresponding port. Instead of manually freeing the id when no longer needed, use a device-managed resource with a custom action to automatically free the id right before the feature device data is freed. The id registry is guaranteed to be allocated when dfl_id_free_action() is invoked, since the DFL PCIe device and its device-managed resources will be destroyed before dfl_ids_destroy() is called in dfl_fpga_exit(). Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - New patch extracted from last patch of v3 series. --- drivers/fpga/dfl.c | 43 ++++++++++++++++++++++--------------------- drivers/fpga/dfl.h | 2 ++ 2 files changed, 24 insertions(+), 21 deletions(-) diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index 560d35857405..758673b0290a 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -740,6 +740,13 @@ static void dfl_fpga_cdev_add_port_data(struct dfl_fpg= a_cdev *cdev, mutex_unlock(&cdev->lock); } =20 +static void dfl_id_free_action(void *arg) +{ + struct dfl_feature_dev_data *fdata =3D arg; + + dfl_id_free(fdata->type, fdata->pdev_id); +} + static struct dfl_feature_dev_data * binfo_create_feature_dev_data(struct build_feature_devs_info *binfo) { @@ -747,7 +754,7 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) enum dfl_id_type type =3D binfo->type; struct dfl_feature_info *finfo, *p; struct dfl_feature_dev_data *fdata; - int index =3D 0, res_idx =3D 0; + int ret, index =3D 0, res_idx =3D 0; =20 if (WARN_ON_ONCE(type >=3D DFL_ID_MAX)) return ERR_PTR(-EINVAL); @@ -768,6 +775,17 @@ binfo_create_feature_dev_data(struct build_feature_dev= s_info *binfo) =20 fdata->dev =3D fdev; fdata->type =3D type; + + fdata->pdev_id =3D dfl_id_alloc(type, binfo->dev); + if (fdata->pdev_id < 0) + return ERR_PTR(fdata->pdev_id); + + ret =3D devm_add_action_or_reset(binfo->dev, dfl_id_free_action, fdata); + if (ret) + return ERR_PTR(ret); + + fdev->id =3D fdata->pdev_id; + fdata->pdev_name =3D dfl_devs[type].name; fdata->num =3D binfo->feature_num; fdata->dfl_cdev =3D binfo->cdev; @@ -866,10 +884,6 @@ build_info_create_dev(struct build_feature_devs_info *= binfo) =20 INIT_LIST_HEAD(&binfo->sub_features); =20 - fdev->id =3D dfl_id_alloc(type, &fdev->dev); - if (fdev->id < 0) - return fdev->id; - return 0; } =20 @@ -947,17 +961,9 @@ static void build_info_free(struct build_feature_devs_= info *binfo) { struct dfl_feature_info *finfo, *p; =20 - /* - * it is a valid id, free it. See comments in - * build_info_create_dev() - */ - if (binfo->feature_dev && binfo->feature_dev->id >=3D 0) { - dfl_id_free(binfo->type, binfo->feature_dev->id); - - list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) { - list_del(&finfo->node); - kfree(finfo); - } + list_for_each_entry_safe(finfo, p, &binfo->sub_features, node) { + list_del(&finfo->node); + kfree(finfo); } =20 platform_device_put(binfo->feature_dev); @@ -1548,13 +1554,9 @@ EXPORT_SYMBOL_GPL(dfl_fpga_enum_info_add_irq); static int remove_feature_dev(struct device *dev, void *data) { struct dfl_feature_dev_data *fdata =3D to_dfl_feature_dev_data(dev); - struct platform_device *pdev =3D to_platform_device(dev); - int id =3D pdev->id; =20 feature_dev_unregister(fdata); =20 - dfl_id_free(fdata->type, id); - return 0; } =20 @@ -1658,7 +1660,6 @@ void dfl_fpga_feature_devs_remove(struct dfl_fpga_cde= v *cdev) =20 /* remove released ports */ if (!device_is_registered(&port_dev->dev)) { - dfl_id_free(fdata->type, port_dev->id); platform_device_put(port_dev); } =20 diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index cbff5d543c44..2e38c42b3920 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -309,6 +309,7 @@ struct dfl_feature { * @lock: mutex to protect feature dev data. * @dev: ptr to the feature's platform device linked with this structure. * @type: type of DFL FIU for the feature dev. See enum dfl_id_type. + * @pdev_id: platform device id for the feature dev. * @pdev_name: platform device name for the feature dev. * @dfl_cdev: ptr to container device. * @id: id used for the feature device. @@ -326,6 +327,7 @@ struct dfl_feature_dev_data { struct mutex lock; struct platform_device *dev; enum dfl_id_type type; + int pdev_id; const char *pdev_name; struct dfl_fpga_cdev *dfl_cdev; int id; --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A016721892A; Fri, 25 Oct 2024 22:37:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895873; cv=none; b=jfKgaD6PXUpV4xPNy9lo7KUdejS90SQiGPtZIebszFzH4b4ifw25E69RezvatXeJkxqDnjEprRDvm7FlZz0WnZryswQYgiphxebsVIzwydFK1sDjPJ5GwmElq7kzELn+9eul7lxJ6H22GyphWNxlZDJh05aDnblL/r3Nr9d1cg4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895873; c=relaxed/simple; bh=1Aldk6OwAk6MF2c/Uszuz7+5CQKGrzB6NlRJ6uC/Ksk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dT4VTF8AoPVMvwpBGpF+nZYSGHd/o6SCvTsqHu3DivFb9GK1LQqRRbYW1283z2blXyNdfm3wlIh1EcZpC4bPqryFiOFMEt3ynncELJj6T/bPHzVKp9KTT3yQIZnzjFGlfxZ9B8CrrDZr2AmAnJG33uAgRr1XAHINaxmU4IPhFoM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=QptZXaPd; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="QptZXaPd" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895871; x=1761431871; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1Aldk6OwAk6MF2c/Uszuz7+5CQKGrzB6NlRJ6uC/Ksk=; b=QptZXaPdWk/raaDTfV2nfW1ew8leQycE7oILrlF72tX+qkQhxBhYR4Ll MlFU/533PZzogB8cHjcU4zosPu87jM9HgEPD9a4HdsrIUrdNZ42hTKJPX 1/5NL+KAYpA5Mk/LtEhJKuJ2J1bsyWXPz+fyW/4BxEEpvbwK2+fUndLMm zQ95RYLHypoBZJ7JXL9RjfpB8M9m3Q2fHssz2Mw/p7tYVom4t32NfoC8+ UPTQuaRhZkWIr4SEKd4fQYj/H/Cr+qkzPxaKRFymF5cCCtf+a6qHdnYW4 wlZkrwbtntw2CBi+ARE5F8MZubHebOA1rWhatzys4r50NH4EcI4Q6NQg7 w==; X-CSE-ConnectionGUID: JCs5AI45Q+SH58l2TAEwzQ== X-CSE-MsgGUID: doq0Kt28Q5e+xmKeZiawRw== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474678" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474678" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 X-CSE-ConnectionGUID: lTxzzo4AT7C5DR3WgXe1hA== X-CSE-MsgGUID: 3Fib14CEQ/G+eugeWxUtgg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596182" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 15/19] fpga: dfl: convert is_feature_dev_detected() to use FIU type Date: Fri, 25 Oct 2024 18:37:10 -0400 Message-ID: <20241025223714.394533-16-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use binfo->type instead of binfo->feature_dev to decide whether a feature device was detected during feature parsing. A subsequent commit will delay the allocation of the feature platform device to feature_dev_register() and remove binfo->feature_dev. This commit does not introduce any functional changes. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - New patch extracted from last patch of v3 series. --- drivers/fpga/dfl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index 758673b0290a..a9ec37278b2d 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -1248,7 +1248,7 @@ static int parse_feature_port_afu(struct build_featur= e_devs_info *binfo, return create_feature_instance(binfo, ofst, size, FEATURE_ID_AFU); } =20 -#define is_feature_dev_detected(binfo) (!!(binfo)->feature_dev) +#define is_feature_dev_detected(binfo) ((binfo)->type !=3D DFL_ID_MAX) =20 static int parse_feature_afu(struct build_feature_devs_info *binfo, resource_size_t ofst) --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3705121A4AA; Fri, 25 Oct 2024 22:37:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895875; cv=none; b=sPCZ/U6GV2rBvG5zGA5kbBAw9b5Fas+jYUMhPEvlXdB6GxOHozc8lje6e7EOWnBi6jdM44DvXJdRkd6PckDwsOrdA++owzuG2JpG7jtnWcujEqmj37XIwJTQbPz+lygppvMOdlCde+9Qw5TV0S3KB8BrNsoAhwRPz1Q1e1UWzJw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895875; c=relaxed/simple; bh=VimVeM4KDSyxdLFDthXrXB3zhIn6pWiF+ub88+5FCZQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ACwMAT5CkE9xwjJUmr++xruV9FeQmDktxL2yjPhR74VN1MVRV7G874APywURrsWaEIh12753SgPi2LBZxHncR5iNZy1XFWIita6Q6N+M3cyPKjXAo4yr/1k4FJ5J4zQaee9C9Go8JMfkRru51al6zxnIjrf7gYHXUetEYmb2lwQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=N+9C30Yj; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="N+9C30Yj" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895873; x=1761431873; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=VimVeM4KDSyxdLFDthXrXB3zhIn6pWiF+ub88+5FCZQ=; b=N+9C30YjZGlnBQsoLTu61ckN5hn+LTRRiSNjkU6ETzrfu2JoQH0ybQtq zgd8HlGHusG222B8dzSExQyGZZee4G+SQmFi36IkDaYgH0YzqqmVa3JIj SupV8BTEHImW0nzxS5Ho6O8qYxRvSkguYgjE6t7DhcW3wg4pwsfNRq6W5 aD81urZv57N+8wAXmXMSGttkBuIVpAm7M2bKs4QnR8O96XSKRn0DoRZK2 j/Jaf0wEvuhWo/KFTp43VdZWMJthtYCPFqmopw6oabIXrHDSv/M6Poic7 v1X+ZCkJMzlGAYYdQdQIrrALbNrJWcTZbc3rZSGuu2fBX/L5UykHBN5r4 A==; X-CSE-ConnectionGUID: 40mvbc7XSkyGEr2tUZpMZA== X-CSE-MsgGUID: JNW4Z3hRSui+ZSRua1iyLw== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474682" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474682" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 X-CSE-ConnectionGUID: plKLCS7TQTalG3Zv5TiCxg== X-CSE-MsgGUID: loZk0Q6sTJ6C8QdAa0irvA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596186" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 16/19] fpga: dfl: allocate platform device after feature device data Date: Fri, 25 Oct 2024 18:37:11 -0400 Message-ID: <20241025223714.394533-17-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Delay calling platform_device_alloc() from build_info_create_dev() to feature_dev_register(), now that the feature device data contains all necessary data to create the feature device. This completes the new function feature_dev_register(), which will be reused in a subsequent commit to fully recreate the feature device when assigning a port. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - New patch extracted from last patch of v3 series. --- drivers/fpga/dfl.c | 59 +++++++++++++++++----------------------------- 1 file changed, 22 insertions(+), 37 deletions(-) diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index a9ec37278b2d..d9cef150ed0d 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -681,7 +681,6 @@ EXPORT_SYMBOL_GPL(dfl_fpga_dev_ops_unregister); * @nr_irqs: number of irqs for all feature devices. * @irq_table: Linux IRQ numbers for all irqs, indexed by local irq index = of * this device. - * @feature_dev: current feature device. * @type: the current FIU type. * @ioaddr: header register region address of current FIU in enumeration. * @start: register resource start of current FIU. @@ -695,7 +694,6 @@ struct build_feature_devs_info { unsigned int nr_irqs; int *irq_table; =20 - struct platform_device *feature_dev; enum dfl_id_type type; void __iomem *ioaddr; resource_size_t start; @@ -750,7 +748,6 @@ static void dfl_id_free_action(void *arg) static struct dfl_feature_dev_data * binfo_create_feature_dev_data(struct build_feature_devs_info *binfo) { - struct platform_device *fdev =3D binfo->feature_dev; enum dfl_id_type type =3D binfo->type; struct dfl_feature_info *finfo, *p; struct dfl_feature_dev_data *fdata; @@ -773,7 +770,6 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) if (!fdata->resources) return ERR_PTR(-ENOMEM); =20 - fdata->dev =3D fdev; fdata->type =3D type; =20 fdata->pdev_id =3D dfl_id_alloc(type, binfo->dev); @@ -784,8 +780,6 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) if (ret) return ERR_PTR(ret); =20 - fdev->id =3D fdata->pdev_id; - fdata->pdev_name =3D dfl_devs[type].name; fdata->num =3D binfo->feature_num; fdata->dfl_cdev =3D binfo->cdev; @@ -809,7 +803,6 @@ binfo_create_feature_dev_data(struct build_feature_devs= _info *binfo) unsigned int i; =20 /* save resource information for each feature */ - feature->dev =3D fdev; feature->id =3D finfo->fid; feature->revision =3D finfo->revision; feature->dfh_version =3D finfo->dfh_version; @@ -868,18 +861,6 @@ binfo_create_feature_dev_data(struct build_feature_dev= s_info *binfo) static int build_info_create_dev(struct build_feature_devs_info *binfo) { - enum dfl_id_type type =3D binfo->type; - struct platform_device *fdev; - - /* - * we use -ENODEV as the initialization indicator which indicates - * whether the id need to be reclaimed - */ - fdev =3D platform_device_alloc(dfl_devs[type].name, -ENODEV); - if (!fdev) - return -ENOMEM; - - binfo->feature_dev =3D fdev; binfo->feature_num =3D 0; =20 INIT_LIST_HEAD(&binfo->sub_features); @@ -895,27 +876,43 @@ build_info_create_dev(struct build_feature_devs_info = *binfo) static int feature_dev_register(struct dfl_feature_dev_data *fdata) { struct dfl_feature_platform_data pdata =3D {}; - struct platform_device *fdev =3D fdata->dev; + struct platform_device *fdev; + struct dfl_feature *feature; int ret; =20 + fdev =3D platform_device_alloc(fdata->pdev_name, fdata->pdev_id); + if (!fdev) + return -ENOMEM; + + fdata->dev =3D fdev; + fdev->dev.parent =3D &fdata->dfl_cdev->region->dev; fdev->dev.devt =3D dfl_get_devt(dfl_devs[fdata->type].devt_type, fdev->id= ); =20 + dfl_fpga_dev_for_each_feature(fdata, feature) + feature->dev =3D fdev; + ret =3D platform_device_add_resources(fdev, fdata->resources, fdata->resource_num); if (ret) - return ret; + goto err_put_dev; =20 pdata.fdata =3D fdata; ret =3D platform_device_add_data(fdev, &pdata, sizeof(pdata)); if (ret) - return ret; + goto err_put_dev; =20 ret =3D platform_device_add(fdev); if (ret) - return ret; + goto err_put_dev; =20 return 0; + +err_put_dev: + platform_device_put(fdev); + fdata->dev =3D NULL; + + return ret; } =20 static void feature_dev_unregister(struct dfl_feature_dev_data *fdata) @@ -940,16 +937,7 @@ static int build_info_commit_dev(struct build_feature_= devs_info *binfo) if (binfo->type =3D=3D PORT_ID) dfl_fpga_cdev_add_port_data(binfo->cdev, fdata); else - binfo->cdev->fme_dev =3D get_device(&binfo->feature_dev->dev); - - /* - * reset it to avoid build_info_free() freeing their resource. - * - * The resource of successfully registered feature devices - * will be freed by platform_device_unregister(). See the - * comments in build_info_create_dev(). - */ - binfo->feature_dev =3D NULL; + binfo->cdev->fme_dev =3D get_device(&fdata->dev->dev); =20 /* reset the binfo for next FIU */ binfo->type =3D DFL_ID_MAX; @@ -966,8 +954,6 @@ static void build_info_free(struct build_feature_devs_i= nfo *binfo) kfree(finfo); } =20 - platform_device_put(binfo->feature_dev); - devm_kfree(binfo->dev, binfo); } =20 @@ -1262,8 +1248,7 @@ static int parse_feature_afu(struct build_feature_dev= s_info *binfo, case PORT_ID: return parse_feature_port_afu(binfo, ofst); default: - dev_info(binfo->dev, "AFU belonging to FIU %s is not supported yet.\n", - binfo->feature_dev->name); + dev_info(binfo->dev, "AFU belonging to FIU is not supported yet.\n"); } =20 return 0; --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F1B87218936; Fri, 25 Oct 2024 22:37:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895874; cv=none; b=tCtjHuKX8fFShaLUmGEHYYIT2VdKD+V3TEzrDZ0vtuCQS5vcHKv/daFOqLOsnJyGh0xH+Zc7UMLPJLuWCAUV2vxqS9Hf9xLJnCVIaEQ9AmYsSjsJK/KRlnABTes4jAU+5mhbIPIQAuBgWuGtZ+/OgiDBddrE43w6shTmiozRJ8g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895874; c=relaxed/simple; bh=oyrGP68L+m/yEjVuCrFUZOoZlfjTWsoYiD1UjFeOMaY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uguhuH42CZ5egkWQ8zeC4/ZvEyd52RCDSvhs++iolH2jUQKvp5kNTqIVylHqbAilrv1HYcyDnLnwSo3o3+Ea1UtGyBi95S5nZrfgog02K96xXMaIPAYTU1172DJGtvGEOdxFBT1PWUzIE4VpfKmKcSvYZNIfq9rP6+t7azebTw8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=M68btwYY; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="M68btwYY" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895872; x=1761431872; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=oyrGP68L+m/yEjVuCrFUZOoZlfjTWsoYiD1UjFeOMaY=; b=M68btwYYBhLkjPkD9BwNIhUJdQQ/VArCZ2cZ3DC9T6IETkToL706TcGC 0wQIvzwa2214FEvHwjeBNyMuw7j6YeoPl9/SLTE1V8nzse1KctH8Jks/m IFq3TZJHLLOkhT9kn3W51e+O4WAEhUXiaZh0D6ffsSJUxBH3HEbqCZIMP AihJNJh+GVhQ/LYUgBn/9cV9psQHDnWWhy1DVqONO6wHq6SM1Yp+WGUDs /0RhntybZYATW4f9qG8U1Plq5WlNI2u7V7yooXnqqaTtfLI4vLNm64g2Q ToAV5zQYjxGrrLYCr7arzrOzJgPLR8wZW0ZWyifODfAJcVeBEGi9FVutF A==; X-CSE-ConnectionGUID: GtOjx8UcQdW90EgkP+ny0A== X-CSE-MsgGUID: SG5tXkExRIyZBHYEDqZMJA== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474686" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474686" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 X-CSE-ConnectionGUID: skI7CRA7SLensJJqbSNHgw== X-CSE-MsgGUID: /mx8/ywhQUG6N8Yjc+DWnw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596189" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 17/19] fpga: dfl: remove unneeded function build_info_create_dev() Date: Fri, 25 Oct 2024 18:37:12 -0400 Message-ID: <20241025223714.394533-18-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Now that the platform device allocation has been moved from build_info_create_dev() to feature_dev_register(), the former no longer serves its original purpose and may be removed. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - New patch extracted from last patch of v3 series. --- drivers/fpga/dfl.c | 17 ++--------------- 1 file changed, 2 insertions(+), 15 deletions(-) diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index d9cef150ed0d..a2459b0cbc68 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -858,16 +858,6 @@ binfo_create_feature_dev_data(struct build_feature_dev= s_info *binfo) return fdata; } =20 -static int -build_info_create_dev(struct build_feature_devs_info *binfo) -{ - binfo->feature_num =3D 0; - - INIT_LIST_HEAD(&binfo->sub_features); - - return 0; -} - /* * register current feature device, it is called when we need to switch to * another feature parsing or we have parsed all features on given device @@ -1316,11 +1306,8 @@ static int parse_feature_fiu(struct build_feature_de= vs_info *binfo, return -EINVAL; =20 binfo->type =3D type; - - /* create platform device for dfl feature dev */ - ret =3D build_info_create_dev(binfo); - if (ret) - return ret; + binfo->feature_num =3D 0; + INIT_LIST_HEAD(&binfo->sub_features); =20 ret =3D create_feature_instance(binfo, 0, 0, 0); if (ret) --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B76F421A4D5; Fri, 25 Oct 2024 22:37:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895876; cv=none; b=ubPtnmWCsdPSqRrUr9ClYh68HFACJjp6wtp33WUtV8k4vHMxzNy/jsP2bhTJivJrBqrFRk5zCmUPjO1mffY7ZJv6mJEaEHsz4ulJ4cqmXodlMcrGcN0xjKVcJb/bWycFtOaqjavsmBjkXlH8DH1qIeVwSlEDyGppeWVY0lqRr54= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895876; c=relaxed/simple; bh=A5lv/DaRe4r3eZdv9i77hRkmE1RSUozBNErpGGa+Yhk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CYdUO21VLH4QgAxS5+oGiJacaJ/qqQh7IIeiNsSvhC5LzvbeR+NEWAT8ayliiuF+A/PGS37KryPEOmi2Kc+fmrR2UM1C1vMh47MI9seMO+TRfFSUmZojEM3PdWSTahDmzkqx8Ay0YkrhtAYyM1OXdKdlDOaavGMOhlUUmNa/0nk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Qm307agz; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Qm307agz" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895873; x=1761431873; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=A5lv/DaRe4r3eZdv9i77hRkmE1RSUozBNErpGGa+Yhk=; b=Qm307agzN+tAOe41thzuaWHfG/56Um7d3YWfzaS/xGQCb5kDpSgmeDBl ubevDM23QefVat6LnUVG91GpRo0eV/ep5+VOB3gt6wvRy8h6U9fOl3ALt wek17Z2OtFLjENeXVaXO5l5FR9MyeQH8cXxriSvMkccr3VZh6o+gBC9j5 6Bf9NZwiS5LDGJ/vMWm3uls8Z5YScucU3tqMJF3twUZ3zivRoMxWCV2ik sYPl0jh1S7JD6X7NIrKsRv9cSfJm0S/FwzTsAIkPUn3G2uGc0GAAhcAWz M4t3aypd0ZZ9qe6xhJGXel/4V9PD9qbyl+vyKjnfu5H3ZxCbWu/NkYrtA Q==; X-CSE-ConnectionGUID: fLv1r3IwR3Cbm0QuAIiRpA== X-CSE-MsgGUID: hiX6JacVQ4CKSJa4usr+Jg== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474690" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474690" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 X-CSE-ConnectionGUID: uFHXqLuaTdqjBceOB4Yawg== X-CSE-MsgGUID: k1DF94XfQGq9Or7XRpQzrQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596192" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Peter Colberg Subject: [PATCH v4 18/19] fpga: dfl: drop unneeded get_device() and put_device() of feature device Date: Fri, 25 Oct 2024 18:37:13 -0400 Message-ID: <20241025223714.394533-19-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The feature device data was originally stored as platform data, hence the memory allocation was tied to the lifetime of the feature device. Now that the feature device data is tied to the lifetime of the DFL PCIe FPGA device instead, get_device() and put_device() are no longer needed. Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - New patch extracted from last patch of v3 series. --- drivers/fpga/dfl-fme-br.c | 2 -- drivers/fpga/dfl.c | 16 +++++----------- drivers/fpga/dfl.h | 5 ----- 3 files changed, 5 insertions(+), 18 deletions(-) diff --git a/drivers/fpga/dfl-fme-br.c b/drivers/fpga/dfl-fme-br.c index 5c60a38ec76c..a298a041877b 100644 --- a/drivers/fpga/dfl-fme-br.c +++ b/drivers/fpga/dfl-fme-br.c @@ -85,8 +85,6 @@ static void fme_br_remove(struct platform_device *pdev) =20 fpga_bridge_unregister(br); =20 - if (priv->port_fdata) - put_device(&priv->port_fdata->dev->dev); if (priv->port_ops) dfl_fpga_port_ops_put(priv->port_ops); } diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index a2459b0cbc68..ed38e5ec84b6 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -734,7 +734,6 @@ static void dfl_fpga_cdev_add_port_data(struct dfl_fpga= _cdev *cdev, { mutex_lock(&cdev->lock); list_add(&fdata->node, &cdev->port_dev_list); - get_device(&fdata->dev->dev); mutex_unlock(&cdev->lock); } =20 @@ -1636,7 +1635,6 @@ void dfl_fpga_feature_devs_remove(struct dfl_fpga_cde= v *cdev) } =20 list_del(&fdata->node); - put_device(&port_dev->dev); } mutex_unlock(&cdev->lock); =20 @@ -1668,7 +1666,7 @@ __dfl_fpga_cdev_find_port_data(struct dfl_fpga_cdev *= cdev, void *data, struct dfl_feature_dev_data *fdata; =20 list_for_each_entry(fdata, &cdev->port_dev_list, node) { - if (match(fdata, data) && get_device(&fdata->dev->dev)) + if (match(fdata, data)) return fdata; } =20 @@ -1719,19 +1717,17 @@ int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev= *cdev, int port_id) =20 if (!device_is_registered(&fdata->dev->dev)) { ret =3D -EBUSY; - goto put_dev_exit; + goto unlock_exit; } =20 mutex_lock(&fdata->lock); ret =3D dfl_feature_dev_use_begin(fdata, true); mutex_unlock(&fdata->lock); if (ret) - goto put_dev_exit; + goto unlock_exit; =20 platform_device_del(fdata->dev); cdev->released_port_num++; -put_dev_exit: - put_device(&fdata->dev->dev); unlock_exit: mutex_unlock(&cdev->lock); return ret; @@ -1762,20 +1758,18 @@ int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev = *cdev, int port_id) =20 if (device_is_registered(&fdata->dev->dev)) { ret =3D -EBUSY; - goto put_dev_exit; + goto unlock_exit; } =20 ret =3D platform_device_add(fdata->dev); if (ret) - goto put_dev_exit; + goto unlock_exit; =20 mutex_lock(&fdata->lock); dfl_feature_dev_use_end(fdata); mutex_unlock(&fdata->lock); =20 cdev->released_port_num--; -put_dev_exit: - put_device(&fdata->dev->dev); unlock_exit: mutex_unlock(&cdev->lock); return ret; diff --git a/drivers/fpga/dfl.h b/drivers/fpga/dfl.h index 2e38c42b3920..95539f1213cb 100644 --- a/drivers/fpga/dfl.h +++ b/drivers/fpga/dfl.h @@ -551,11 +551,6 @@ struct dfl_fpga_cdev * dfl_fpga_feature_devs_enumerate(struct dfl_fpga_enum_info *info); void dfl_fpga_feature_devs_remove(struct dfl_fpga_cdev *cdev); =20 -/* - * need to drop the device reference with put_device() after use port plat= form - * device returned by __dfl_fpga_cdev_find_port and dfl_fpga_cdev_find_port - * functions. - */ struct dfl_feature_dev_data * __dfl_fpga_cdev_find_port_data(struct dfl_fpga_cdev *cdev, void *data, int (*match)(struct dfl_feature_dev_data *, void *)); --=20 2.47.0 From nobody Mon Nov 25 13:45:22 2024 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 404E021B849; Fri, 25 Oct 2024 22:37:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895876; cv=none; b=A4QhptbTSkq+TkC44/mZ3dFdvJyUYMiICfYavF7d8qzgvkfN5MzyOZMxiw9nWvVqlbi/Z4nzZ/9A/7dVFqM9YXyqUCbjYmXgUUOieegCGLRdNRW1j/1CjcXQ2d21/2rwsoLl7L+Wo6xnZJbZ/OAgVD7eFv3OeAvi2F+71PRQSHI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729895876; c=relaxed/simple; bh=EIYWyyI+XXeIM/gIhaOL+ClCqG20au2otLNv6hsZw8g=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NX34NWMs9g9wWkZvXZvR/nH4YgqP3dxGCT5uzBSL8DwJ7S0mJ2R6/ENW2Tb6zUJ36NEbcty1zwz3jbTxH96p+CJ9EUn4vIf7vQrI8lpfsHw6KucSpM/TkV5PIqDvV6I4vioChQYQ0tH0A0hBlbm+Lfk0LU3+zSF7TkxFQqLmz1Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=TObsh4wo; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="TObsh4wo" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729895874; x=1761431874; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=EIYWyyI+XXeIM/gIhaOL+ClCqG20au2otLNv6hsZw8g=; b=TObsh4wobpvhcTnpW05bA05uvVIWfp751wllyjWgMDR/B6cVHTqOkiY7 hslFhPac2XEqMzmIj/dEGabgWrQU0vN438adxgyvn7tutdj77wN32R+1T 44oDHZvHaAgcqtFtdALk5g4AktAqrdwrPDn7cxWXap188EgKGolKXctSw Dhq1lbfSty6QzYiG2eKzFLW9vL1Qg40aee3yTSGtOiIja6x0E0+Crx2AE /JwFg1A13Y9KDqEdetEBGqJaY3/ftuDqLtLpveDXt5ud75wJIiysTf4/h 1IcvqwgdHULKH1c12E/F0gprehs4AViMNI7YWXBQzWJ+5XmgyW6bnBJ+r g==; X-CSE-ConnectionGUID: +DpuNTYTSfS6Py+Xhb1crQ== X-CSE-MsgGUID: hdsscam9QPyRiCT0yYizCA== X-IronPort-AV: E=McAfee;i="6700,10204,11236"; a="29474694" X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="29474694" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:38 -0700 X-CSE-ConnectionGUID: S2veJ65dToyCC3AZHuvheA== X-CSE-MsgGUID: JHB/2s3qSsavZH+8MsliHA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,233,1725346800"; d="scan'208";a="85596195" Received: from sj-4150-psse-sw-opae-dev3.sj.altera.com ([10.244.138.109]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Oct 2024 15:37:39 -0700 From: Peter Colberg To: Wu Hao , Tom Rix , Moritz Fischer , Xu Yilun , linux-fpga@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Russ Weight , Marco Pagani , Matthew Gerlach , Basheer Ahmed Muddebihal , Russ Weight , Peter Colberg Subject: [PATCH v4 19/19] fpga: dfl: destroy/recreate feature platform device on port release/assign Date: Fri, 25 Oct 2024 18:37:14 -0400 Message-ID: <20241025223714.394533-20-peter.colberg@intel.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241025223714.394533-1-peter.colberg@intel.com> References: <20241025223714.394533-1-peter.colberg@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Xu Yilun Now that the internal DFL APIs have been converted to consume DFL enumeration info from a separate structure, dfl_feature_dev_data, which lifetime is independent of the feature device, proceed to completely destroy and recreate the feature platform device on port release and assign, respectively. This resolves a longstanding issue in the use of platform_device_add(), which states to "not call this routine more than once for any device structure" and which used to print a kernel warning. The function feature_dev_unregister() resets the device pointer in the feature data to NULL to signal that the feature platform device has been destroyed. This substitutes the previous device_is_registered() checks. Signed-off-by: Xu Yilun Signed-off-by: Russ Weight Signed-off-by: Peter Colberg Reviewed-by: Matthew Gerlach Reviewed-by: Basheer Ahmed Muddebihal --- Changes since v3: - New patch extracted from last patch of v3 series. --- drivers/fpga/dfl.c | 24 ++++++------------------ 1 file changed, 6 insertions(+), 18 deletions(-) diff --git a/drivers/fpga/dfl.c b/drivers/fpga/dfl.c index ed38e5ec84b6..3b3b05ca3ddb 100644 --- a/drivers/fpga/dfl.c +++ b/drivers/fpga/dfl.c @@ -1620,22 +1620,10 @@ EXPORT_SYMBOL_GPL(dfl_fpga_feature_devs_enumerate); */ void dfl_fpga_feature_devs_remove(struct dfl_fpga_cdev *cdev) { - struct dfl_feature_dev_data *fdata, *ptmp; - mutex_lock(&cdev->lock); if (cdev->fme_dev) put_device(cdev->fme_dev); =20 - list_for_each_entry_safe(fdata, ptmp, &cdev->port_dev_list, node) { - struct platform_device *port_dev =3D fdata->dev; - - /* remove released ports */ - if (!device_is_registered(&port_dev->dev)) { - platform_device_put(port_dev); - } - - list_del(&fdata->node); - } mutex_unlock(&cdev->lock); =20 remove_feature_devs(cdev); @@ -1715,7 +1703,7 @@ int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *= cdev, int port_id) if (!fdata) goto unlock_exit; =20 - if (!device_is_registered(&fdata->dev->dev)) { + if (!fdata->dev) { ret =3D -EBUSY; goto unlock_exit; } @@ -1726,7 +1714,7 @@ int dfl_fpga_cdev_release_port(struct dfl_fpga_cdev *= cdev, int port_id) if (ret) goto unlock_exit; =20 - platform_device_del(fdata->dev); + feature_dev_unregister(fdata); cdev->released_port_num++; unlock_exit: mutex_unlock(&cdev->lock); @@ -1756,12 +1744,12 @@ int dfl_fpga_cdev_assign_port(struct dfl_fpga_cdev = *cdev, int port_id) if (!fdata) goto unlock_exit; =20 - if (device_is_registered(&fdata->dev->dev)) { + if (fdata->dev) { ret =3D -EBUSY; goto unlock_exit; } =20 - ret =3D platform_device_add(fdata->dev); + ret =3D feature_dev_register(fdata); if (ret) goto unlock_exit; =20 @@ -1811,7 +1799,7 @@ void dfl_fpga_cdev_config_ports_pf(struct dfl_fpga_cd= ev *cdev) =20 mutex_lock(&cdev->lock); list_for_each_entry(fdata, &cdev->port_dev_list, node) { - if (device_is_registered(&fdata->dev->dev)) + if (fdata->dev) continue; =20 config_port_pf_mode(cdev->fme_dev, fdata->id); @@ -1848,7 +1836,7 @@ int dfl_fpga_cdev_config_ports_vf(struct dfl_fpga_cde= v *cdev, int num_vfs) } =20 list_for_each_entry(fdata, &cdev->port_dev_list, node) { - if (device_is_registered(&fdata->dev->dev)) + if (fdata->dev) continue; =20 config_port_vf_mode(cdev->fme_dev, fdata->id); --=20 2.47.0