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AJvYcCXKiBobXbx8MsiN6TL1uBryrGGYsZFAA7eEqTNmt9tnfL3/I0l1Tcxyp33bgQ+WZVCPUfNASNIqPGJFFRA=@vger.kernel.org X-Gm-Message-State: AOJu0YxfqpYVpp8zZP8XQeOR5DfcVN+PyrnhxG3SzF4XvNKnWf3xEBlK j49OKjz2y/kdMzZTbNNyQc090qabglZPYDqos15CV8s+xSKyo3I7JD/+TXKMCRo= X-Google-Smtp-Source: AGHT+IHBrQGT9pmxc4oL2n1+HSGkoaeL5c5Y5zzjK0zgLQAj/a//GEezqB7iJbnehPJAIoa5TXY2sg== X-Received: by 2002:a05:6512:1585:b0:52f:d69e:bb38 with SMTP id 2adb3069b0e04-53b23dcd34fmr3409903e87.2.1729862094046; Fri, 25 Oct 2024 06:14:54 -0700 (PDT) Received: from gpeter-l.lan ([145.224.67.228]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4318b58b6bdsm47616685e9.45.2024.10.25.06.14.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2024 06:14:53 -0700 (PDT) From: Peter Griffin To: alim.akhtar@samsung.com, James.Bottomley@HansenPartnership.com, martin.petersen@oracle.com, avri.altman@wdc.com, bvanassche@acm.org, krzk@kernel.org Cc: tudor.ambarus@linaro.org, andre.draszik@linaro.org, kernel-team@android.com, willmcvicker@google.com, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.org, linux-kernel@vger.kernel.org, ebiggers@kernel.org, Peter Griffin Subject: [PATCH v2 04/11] scsi: ufs: exynos: Add EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR check Date: Fri, 25 Oct 2024 14:14:35 +0100 Message-ID: <20241025131442.112862-5-peter.griffin@linaro.org> X-Mailer: git-send-email 2.47.0.163.g1226f6d8fa-goog In-Reply-To: <20241025131442.112862-1-peter.griffin@linaro.org> References: <20241025131442.112862-1-peter.griffin@linaro.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The values calculated in exynos_ufs_specify_phy_time_attr() are only used in exynos_ufs_config_phy_time_attr() and exynos_ufs_config_phy_cap_attr() if EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR flag is not set. Add a check for this flag to exynos_ufs_specify_phy_time_attr() and return for platforms that don't set it. Signed-off-by: Peter Griffin --- drivers/ufs/host/ufs-exynos.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/ufs/host/ufs-exynos.c b/drivers/ufs/host/ufs-exynos.c index d685d3e93ea1..a1a2fdcb8a40 100644 --- a/drivers/ufs/host/ufs-exynos.c +++ b/drivers/ufs/host/ufs-exynos.c @@ -546,6 +546,9 @@ static void exynos_ufs_specify_phy_time_attr(struct exy= nos_ufs *ufs) struct exynos_ufs_uic_attr *attr =3D ufs->drv_data->uic_attr; struct ufs_phy_time_cfg *t_cfg =3D &ufs->t_cfg; =20 + if (ufs->opts & EXYNOS_UFS_OPT_SKIP_CONFIG_PHY_ATTR) + return; + t_cfg->tx_linereset_p =3D exynos_ufs_calc_time_cntr(ufs, attr->tx_dif_p_nsec); t_cfg->tx_linereset_n =3D --=20 2.47.0.163.g1226f6d8fa-goog