From nobody Mon Nov 25 18:04:47 2024 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2077.outbound.protection.outlook.com [40.107.236.77]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E9C8A1F818C; Fri, 25 Oct 2024 11:14:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.236.77 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729854880; cv=fail; b=cbPS2iO8S5hNhKQr65xZ1DWKBWhTkNn7MIAPyUNcLFwkBOirDjnETQFXrdZ3nbp8teus8DAuCjn9SL+11vo4ukcBG+xLI9ERK32fPec19lEb0rmI7wcNTuxqlTJYhG+CzSRGDHNlytqmpzRXBG8j5dVPPbA3lwhuH/leC4iKab8= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729854880; c=relaxed/simple; bh=9Nus01Y6Sj7VftrizeWy85Vr7MbpELBgcKpxf8CZddM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=R/qjIrIWcvAEmUnF1dBHBYD5G1Y04Oe/9a8ssFPKNNuW3LkrMt7CRs0hDvg5oeNnJ5Ll52gkilK4VoLo12jJ9WUhV0/EtvN4a9IG8Muv1pIbAtMPg2hezYs4I84oLHZPIr+ECEyrxL4D8mzzj1DKe2TZ3Q1gyz75IjKZ0m9MC04= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=QjCzYQ0K; arc=fail smtp.client-ip=40.107.236.77 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="QjCzYQ0K" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=GnrCEl5bHP/stAyEiVnzMk4D/hC1i2xmRieWE/XhIJkf58jr4P/pa0nw5zC1l7fqkNBE96RXGNVdYzVUozFafZzatQqjdeKW4XfSgt1VqAEFPlj38e0n9lNbObyc3mb+k2jum5G8PtGTxBpLzYggT3Pb9jTiC3EtDqN0zgwx2+OlVmScjNswF299NYwiC0rUcB3K2RbNx/LjqRQIt0ftjI8O+dKQyuvMKtzl2VMFXJEoQzAPbtnc27Ej4bOxKtty+V8qSj7PDBfimNVoBcIFB8OSYV5Y+YKK1IbLThSLaB4NtEEGhxuzF3gbLsM15nNmw8LgkFIxjTjZukYMtk1RlQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=FT/VMOMDJVx4XVQB3f3sGXqkV1+5ZEhgKuipvGneiK8=; b=jFwweQSa72U/vXg8QHVDTLUWDxc5sXzd+W8qonNbpJvFH9n3C++wLb3sFEwBu9tkKZPtSV6/QZz+atF6eCYEr6TuMLxzd+uchK7YMEps/HY3bfj6/ACb9DmjyFVyWJejGfxSXB6dxbwhB5xIhLmaarc8ppL0ODlJ0SqJmFmbvTfFEM/hGkBV/l02CV9Kyu0I9FInEEBVVjf9Y8cybLetjer8o7Kb3pBqWSSrf66dqudAhbhXBgRflp6/opVGWvLzDltuFtxMVZPuuNXPEoUFgqxbqNPM15sn3ch8ReRWvYcxAA6wucgt4Pg+ydA4s+JFK8YsvqifihIGQnNc/aamlg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=infradead.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=FT/VMOMDJVx4XVQB3f3sGXqkV1+5ZEhgKuipvGneiK8=; b=QjCzYQ0KH01x9cE43hCiVGVBMxNuSe5/0FcbtwKpSDtlIJHkVUeFab8y0j1iGQ765ARs+aeRY/WSysCUEjOcgXA5vUeuA6NOnHUecUXaZMBI1W6UOeEjYDkaG5cZedHFjwZr/ILTlnouNFczjdMBaFVKWIEYGKtAxbxERWe6a5k= Received: from BN9P220CA0018.NAMP220.PROD.OUTLOOK.COM (2603:10b6:408:13e::23) by DM6PR12MB4234.namprd12.prod.outlook.com (2603:10b6:5:213::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.22; Fri, 25 Oct 2024 11:14:35 +0000 Received: from BL02EPF00021F68.namprd02.prod.outlook.com (2603:10b6:408:13e:cafe::1b) by BN9P220CA0018.outlook.office365.com (2603:10b6:408:13e::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.19 via Frontend Transport; Fri, 25 Oct 2024 11:14:35 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL02EPF00021F68.mail.protection.outlook.com (10.167.249.4) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8093.14 via Frontend Transport; Fri, 25 Oct 2024 11:14:35 +0000 Received: from shatadru.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 25 Oct 2024 06:14:29 -0500 From: Dhananjay Ugwekar To: , , , , , , , , , , , , , CC: , , , , , , , "Dhananjay Ugwekar" Subject: [PATCH v6 01/10] perf/x86/rapl: Remove the unused get_rapl_pmu_cpumask() function Date: Fri, 25 Oct 2024 11:13:39 +0000 Message-ID: <20241025111348.3810-2-Dhananjay.Ugwekar@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> References: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00021F68:EE_|DM6PR12MB4234:EE_ X-MS-Office365-Filtering-Correlation-Id: 76c2c5b8-d765-49b8-0b2c-08dcf4e6353f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|7416014|36860700013|82310400026|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?dEnTSX0kFBLZgQt3BVgS0yDWjN/3cjBO+D/PZ3bTmP2/8jZ5a2C4mYKBpWBm?= =?us-ascii?Q?vgX3Ns9h26119Mz/DKbmhuVYhLWG+dMSnpf9uIPcLYh5xy15QCyYXj07ixtO?= =?us-ascii?Q?ZqtQ0ezEBX5Qy9jLW+5ewYaiKFmBQ8uxrYSeNH9Xx+Lj2xffuNtuMfsNsA7w?= =?us-ascii?Q?1udqJM9YeYXi/4mx27GsBeyVrTGUrukRMcaDP+drT7SaSzAKu7W8A4exYjco?= =?us-ascii?Q?BlM7t/cXvRzoCWzjVH7PXKIU3Nk58c0rtcvA5VRCpnPCBd5kyumYgE6u10Y1?= =?us-ascii?Q?D87iyinkRAmm/O5cakPkp/iEuwFeFaQSQqLGp5VCij7O1ivAzryl5BHssgTt?= =?us-ascii?Q?VgSXX8bCAmacC5olpLS6kNhTccR6436isbRXGT2+1/W6n3G+iTNumoNnGXzS?= =?us-ascii?Q?V0fWJHBWnwrNOFFf0Hn0qRSxo/eRdlOcn220u6oZhr8bN4CCwuRx+nXT/kpv?= =?us-ascii?Q?S3pJjQ3mhklPtRxbvMQMDOJJPrT2Ebnus7QMusi5fT3miz/lZ7kU16FP/suz?= =?us-ascii?Q?vXmj5L2BZDrZ25VKE1r0aMpm6Mf3Sv1Qo6zzgd+984q6PWwQd7eevp6rgh8t?= =?us-ascii?Q?BFYcRlQ6cAxEw+Uk30YxWUAUQAIjjSiYhc85LD9VmHRnhdo2EITN2F1StKB3?= =?us-ascii?Q?SHgQHuty0rjK1HsF85g68+/H6TJS7HeK0kanEu0tmH0V6pZjEh1C5wRzi9SP?= =?us-ascii?Q?0GUVPMIcWxL/5/oyPiUMg3QMrKmyaGpBQNFxNhKWI534BgP6yKHie/LpU9eH?= =?us-ascii?Q?O881aaoRhlE3DNwTnQlxcQvr0tfCuIe4MUhcOORztpq+GIBMOmgr+b6LiBRs?= =?us-ascii?Q?8e5lvvWFkMgJW2OqZ3dQD7jXCX6gvowcuySGlOfzuP8gLHEb8ux81DRlfOgD?= =?us-ascii?Q?xn5iu5qOTB6aSbh3dLNX4t41Q9tWlxVEUtLzpCrxGUaEt63vdEz/vKhVVO0p?= =?us-ascii?Q?YiglUuVbY/fXmeJNoud3eQ1gFenpZSKTXvl/NL5mnHOY68nAgaXq4A1WsmBm?= =?us-ascii?Q?lhNhsiWy24i9uRbvjUAMr/i/skm3RYBnZZqEY3978Hfj8tqGnXYc0iCtvjjn?= =?us-ascii?Q?Y5w/5RrFO+71n9hudtxMDFqBN0Q6JDeI7vB/Dl1F86nx6Gwyjz+wWVrUUnec?= =?us-ascii?Q?dtOHE/H/9OhkNeDu7qcXndS2MQqW8kAjkba6SNBAC+NsKF8DTL/SrifxSBG5?= =?us-ascii?Q?/rtnSpaDG98eMIsZK7vmqRa3haejNgUAzuTaTJb4AkvTYBYaEQjD2PW/An8R?= =?us-ascii?Q?S/zPR3ZZRoRFEkg1cMgZtuIBTjsCoVK+0GLzPyqMbl5gwhgyRGG/8S+g5qet?= =?us-ascii?Q?Rc8htbTCXNJ27PmAyCKeUrmQMLAsplCTBgEp7npbR5TWEgfm6DCYe26tZ1+3?= =?us-ascii?Q?inVvh1KzIU1GbqdpMQez2E4Jio96R7DAWlvK/dSmhV2BYWPfuRazLLiJ88z+?= =?us-ascii?Q?xBC2eZLr7tM=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(7416014)(36860700013)(82310400026)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2024 11:14:35.2122 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 76c2c5b8-d765-49b8-0b2c-08dcf4e6353f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00021F68.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4234 Content-Type: text/plain; charset="utf-8" An earlier commit eliminates the need for this function, so remove it. Signed-off-by: Dhananjay Ugwekar Reviewed-by: Zhang Rui Tested-by: Zhang Rui --- arch/x86/events/rapl.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index a8defc813c36..f70c49ca0ef3 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -153,7 +153,7 @@ static u64 rapl_timer_ms; static struct perf_msr *rapl_msrs; =20 /* - * Helper functions to get the correct topology macros according to the + * Helper function to get the correct topology id according to the * RAPL PMU scope. */ static inline unsigned int get_rapl_pmu_idx(int cpu) @@ -162,12 +162,6 @@ static inline unsigned int get_rapl_pmu_idx(int cpu) topology_logical_die_id(cpu); } =20 -static inline const struct cpumask *get_rapl_pmu_cpumask(int cpu) -{ - return rapl_pmu_is_pkg_scope() ? topology_core_cpumask(cpu) : - topology_die_cpumask(cpu); -} - static inline struct rapl_pmu *cpu_to_rapl_pmu(unsigned int cpu) { unsigned int rapl_pmu_idx =3D get_rapl_pmu_idx(cpu); --=20 2.34.1 From nobody Mon Nov 25 18:04:47 2024 Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2051.outbound.protection.outlook.com [40.107.244.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A2491DDC00; Fri, 25 Oct 2024 11:14:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.244.51 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729854901; cv=fail; b=BaAE3r2byuL9idiavKBCirkmIoAYyLSaJAg04yV3rmT5Y6nnZYiTRvCsxJZgNuD3AENb//8TSO/e/G5NrBnLH9L9Jxe8Te4lVXjlr5yLaBO1sTJJjyfKDb9FtuEc9ocbtjl+rT3o5l/iI65qFgsZCy+nSpIbXIT4EwXMIEtU/q4= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729854901; c=relaxed/simple; bh=lYXOnPULJWzXCsM+AkXhm7PaNcz0Ypyi4FTFhnLHpug=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZG8nVX66NwjrZ/8yaOU+o05u1ptaa4Wgaph81pRDGbqHu60Sn/Sy8yEbRbKkpwqOHesfoFdiDOkCAWZ2QeWuiGtUhDHo1YPg/KiYmUlSTLDHtmEc/j3yqWO0Us9mllUO0E3jfcKBFbjEAg7AvVvueP2ZUSqckcRBadzK8EHT2/w= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=nBJ7eXlC; arc=fail smtp.client-ip=40.107.244.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="nBJ7eXlC" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=D8JJFebkO9ni3Q8kCQzFQQ7/u3HrzWlKPTfqamYFGeYzqcbE+V5K03G3CrM3nKN6VRqOB5ymj8Rua7PDhx1/RBlVZGT7u2D9j3hhPVW7Cj0tFaYIRu+KdfHAKa1F/tj2qkKNT7szPBv1Azx5YTkwOSd9t5GMZXXWe0jmN0iyCwTc0E/7H8cU5pxUOl6DNvRH4Gi5MxHkaEdeDbRRFwFpyrBJ9TtJ6lxd+tvTJBX8kFLRDSI+gFJRKwLLuSNwIdwT7po34Jf0fDRx++ATuh2BfUeibKR7FenUs1ur4a+Hnql7zUABbMwqZBeyF4mufZNz1erfgAw+5amGHb8pPxJjCw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=DG5+1UdnhO5LWzuTCluQSll+5xAZUcZirvdVkkXLxPQ=; b=GVSip4RDV+apODiaHiKXBrPXJhW29Ue3L50zmuGCGpf3rbmGSJSDI5y2zrGKSX6NabFZd9qdKEfM47mM6Onskzw2njd1SNgA/a2i5nYVj9ajZiisoceX4HAwvHp4rm88MVq/LcjaJr/uk2bWREO3gAF9QUmdoaAPOejUfBivIj3qXXxImJBhnCNKdWGZmIYa33UqL+gmV7mT7KxPeIYsDV6fNJi/nsIMuKKP+7/P3A+IMLkgiAK9GM48UaRw843Rdo91ScBukbVjKAGYAFsRNGU78IVWQyiB/x0SzXyf8fQwaFGjWmASVpUXwLuZ9CC6g3Gsd17BECC1eeprchkX9Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=infradead.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=DG5+1UdnhO5LWzuTCluQSll+5xAZUcZirvdVkkXLxPQ=; b=nBJ7eXlCysUowgrNuOsW8IQGlLi+PaToa8+31H21PueabVZuQ7kSsLHoohm8vG44V8IQBdPsbsSAw+Sek2g9WnRn9BuSzAH3yL5QXbl+LDOdzvCOmI/+3uJy0/U/n2bnaTg8hAq7/OlppabpJXadkfZNydbznLXVEQIDBL9gR6c= Received: from BN9PR03CA0709.namprd03.prod.outlook.com (2603:10b6:408:ef::24) by DS0PR12MB6536.namprd12.prod.outlook.com (2603:10b6:8:d3::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.20; Fri, 25 Oct 2024 11:14:55 +0000 Received: from BL6PEPF00020E60.namprd04.prod.outlook.com (2603:10b6:408:ef:cafe::3d) by BN9PR03CA0709.outlook.office365.com (2603:10b6:408:ef::24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.21 via Frontend Transport; Fri, 25 Oct 2024 11:14:55 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL6PEPF00020E60.mail.protection.outlook.com (10.167.249.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8093.14 via Frontend Transport; Fri, 25 Oct 2024 11:14:54 +0000 Received: from shatadru.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 25 Oct 2024 06:14:47 -0500 From: Dhananjay Ugwekar To: , , , , , , , , , , , , , CC: , , , , , , , "Oleksandr Natalenko" , Dhananjay Ugwekar Subject: [PATCH v6 02/10] x86/topology: Introduce topology_logical_core_id() Date: Fri, 25 Oct 2024 11:13:40 +0000 Message-ID: <20241025111348.3810-3-Dhananjay.Ugwekar@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> References: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E60:EE_|DS0PR12MB6536:EE_ X-MS-Office365-Filtering-Correlation-Id: df1b5e76-2a40-4d07-bf95-08dcf4e640e8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|7416014|1800799024|82310400026|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?PqM9USR/jpiNcX5uvKw1RuF93OKhQ+M5lrrQ65rYYwEVr2fWtOfPlWTw2+t1?= =?us-ascii?Q?sePocghQAZxLXmgnrXvTsiXwhCq82+GGGRZq+yoY7gcJufgqirqmy+oLnMYW?= =?us-ascii?Q?ro0nNJxLWAlTlMpARPVRX5LphoUILNoGJ0S+JvqamYIEZK/jIhOSmW+oP3Zb?= =?us-ascii?Q?ax/4/8RbjXn8MFyjtY2oyalzLQ8tR7GxUjoWw1EDpPDaAi5OMylmybEDZvu8?= =?us-ascii?Q?h7TSdhocnBcYbBpayezJ2XBPO7twEaGO9ZynBqoEwI6AcFRoFRDFk2l1Fkz0?= =?us-ascii?Q?SaSNcTsFDDF1SSUKCTzSDapGOAGGINuNa/PWHvnhs7cFLx9qmPmRkMrdBe9F?= =?us-ascii?Q?A0KjieFiQemboJAOKvj0ZPrg2qgWRdGLNKEH+7i0TwIBsHV7j8SyV9BB7dho?= =?us-ascii?Q?t+hUODSNj+RPxVigJR6bs+Uebq3mwyxgAJcn+zjDO0P11NjFSfHw1LAn/S9A?= =?us-ascii?Q?9Lbvak/rcg4OPYfXeMKMjMYlnlfOeCnSpGZFV6IL54iRu0DDLm6z1KL/FR1Z?= =?us-ascii?Q?/TBwg1l5b0S+5bho97xxoDiLSWnLZbJka2aRYEki5qeib3FeAUQp7oB3LAJH?= =?us-ascii?Q?LB/j0KD+vY+re4zYc6g/IRy3hg4ewCEV7cHfxRsve1ebsdKl40e1SqI73nSk?= =?us-ascii?Q?pJvXY9j+O6lDE9QQH2zL+TlAzq565tOQXdwnEz6slq0TKgJOTVhdV0xY+/Ma?= =?us-ascii?Q?NiNAvveZ0tH6TyqTlekSNiJsc10xiut0gyvnUjzN8AhUcZgLkyvW7xfPMi6W?= =?us-ascii?Q?5JoTUjT/2/1oF3Fv87P8s8Y3bcnzro31ddeW0RLUcq/l36EHBxYaJSOzpgQh?= =?us-ascii?Q?cuVR+kEqPeNjLU7IfA4E5lcf0sYLQjPzRCD6pY7HwUvsG7FIc86zEA/yUDXB?= =?us-ascii?Q?tGnW9zVw+YiUy80Q+kztz+xuGLlPfsqkwkSspQybdshGQu8lI45lI14m0Mm0?= =?us-ascii?Q?dDJDBGPBOj10/XRc/IS2rilH+kuoCyXbgYw4DuZkmPxDpXeTGT6fhOv5fgLy?= =?us-ascii?Q?3rXLTsRv7C4JPTekt58MyzumkK6j52lLxsOnJGVsii0wO+jSIOcGUiNWWeUq?= =?us-ascii?Q?0SmUj8ffcP9gmPfYMFtP6DJBwkP4BFeS80qh2lkNnURFPbaphFd6SN+wCHFQ?= =?us-ascii?Q?7QEAajBsZt8AsA6eaIEr+BuRTvlfRhBGMqtWq+J2yklGReV7N3nWBDXsdtb0?= =?us-ascii?Q?6dGNckN+lc9y+Dj2kaEKucdREX1x0UpynEIGBlRuoiL7hRCJIcCnwgSPfdSO?= =?us-ascii?Q?YvOT/L3sc2PNwDUuupyjlqOek+SKaW3nI6HS4laz8+aICUhqBm0HJZMr7daa?= =?us-ascii?Q?iHE5+lS2Wg2CSrs3OOLN9+z9OA4LlY+5wOJJ96tslq6dRzaBi/Y2+vTikUoK?= =?us-ascii?Q?7Hs09eZe8B+YvvSk+F/PhhmHi8CHkckHozIB7/nZUxx9bqcCIH/SprInZdu4?= =?us-ascii?Q?R9xV8FsWL44=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(376014)(7416014)(1800799024)(82310400026)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2024 11:14:54.7793 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: df1b5e76-2a40-4d07-bf95-08dcf4e640e8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E60.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB6536 Content-Type: text/plain; charset="utf-8" From: K Prateek Nayak On x86, topology_core_id() returns a unique core ID within the PKG domain. Looking at match_smt() suggests that a core ID just needs to be unique within a LLC domain. For use cases such as the core RAPL PMU, there exists a need for a unique core ID across the entire system with multiple PKG domains. Introduce topology_logical_core_id() to derive a unique core ID across the system. Signed-off-by: K Prateek Nayak Reviewed-by: Zhang Rui Tested-by: K Prateek Nayak Tested-by: Oleksandr Natalenko Signed-off-by: Dhananjay Ugwekar Reviewed-by: Gautham R. Shenoy --- Documentation/arch/x86/topology.rst | 4 ++++ arch/x86/include/asm/processor.h | 1 + arch/x86/include/asm/topology.h | 1 + arch/x86/kernel/cpu/debugfs.c | 1 + arch/x86/kernel/cpu/topology_common.c | 1 + 5 files changed, 8 insertions(+) diff --git a/Documentation/arch/x86/topology.rst b/Documentation/arch/x86/t= opology.rst index 7352ab89a55a..c12837e61bda 100644 --- a/Documentation/arch/x86/topology.rst +++ b/Documentation/arch/x86/topology.rst @@ -135,6 +135,10 @@ Thread-related topology information in the kernel: The ID of the core to which a thread belongs. It is also printed in /p= roc/cpuinfo "core_id." =20 + - topology_logical_core_id(); + + The logical core ID to which a thread belongs. + =20 =20 System topology examples diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/proces= sor.h index 4a686f0e5dbf..595859cbf7ff 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -98,6 +98,7 @@ struct cpuinfo_topology { // Logical ID mappings u32 logical_pkg_id; u32 logical_die_id; + u32 logical_core_id; =20 // AMD Node ID and Nodes per Package info u32 amd_node_id; diff --git a/arch/x86/include/asm/topology.h b/arch/x86/include/asm/topolog= y.h index aef70336d624..672fccf9f845 100644 --- a/arch/x86/include/asm/topology.h +++ b/arch/x86/include/asm/topology.h @@ -137,6 +137,7 @@ extern const struct cpumask *cpu_clustergroup_mask(int = cpu); #define topology_logical_package_id(cpu) (cpu_data(cpu).topo.logical_pkg_i= d) #define topology_physical_package_id(cpu) (cpu_data(cpu).topo.pkg_id) #define topology_logical_die_id(cpu) (cpu_data(cpu).topo.logical_die_id) +#define topology_logical_core_id(cpu) (cpu_data(cpu).topo.logical_core_id) #define topology_die_id(cpu) (cpu_data(cpu).topo.die_id) #define topology_core_id(cpu) (cpu_data(cpu).topo.core_id) #define topology_ppin(cpu) (cpu_data(cpu).ppin) diff --git a/arch/x86/kernel/cpu/debugfs.c b/arch/x86/kernel/cpu/debugfs.c index 3baf3e435834..b1eb6d7828db 100644 --- a/arch/x86/kernel/cpu/debugfs.c +++ b/arch/x86/kernel/cpu/debugfs.c @@ -24,6 +24,7 @@ static int cpu_debug_show(struct seq_file *m, void *p) seq_printf(m, "core_id: %u\n", c->topo.core_id); seq_printf(m, "logical_pkg_id: %u\n", c->topo.logical_pkg_id); seq_printf(m, "logical_die_id: %u\n", c->topo.logical_die_id); + seq_printf(m, "logical_core_id: %u\n", c->topo.logical_core_id); seq_printf(m, "llc_id: %u\n", c->topo.llc_id); seq_printf(m, "l2c_id: %u\n", c->topo.l2c_id); seq_printf(m, "amd_node_id: %u\n", c->topo.amd_node_id); diff --git a/arch/x86/kernel/cpu/topology_common.c b/arch/x86/kernel/cpu/to= pology_common.c index 9a6069e7133c..23722aa21e2f 100644 --- a/arch/x86/kernel/cpu/topology_common.c +++ b/arch/x86/kernel/cpu/topology_common.c @@ -151,6 +151,7 @@ static void topo_set_ids(struct topo_scan *tscan, bool = early) if (!early) { c->topo.logical_pkg_id =3D topology_get_logical_id(apicid, TOPO_PKG_DOMA= IN); c->topo.logical_die_id =3D topology_get_logical_id(apicid, TOPO_DIE_DOMA= IN); + c->topo.logical_core_id =3D topology_get_logical_id(apicid, TOPO_CORE_DO= MAIN); } =20 /* Package relative core ID */ --=20 2.34.1 From nobody Mon Nov 25 18:04:47 2024 Received: from NAM12-BN8-obe.outbound.protection.outlook.com (mail-bn8nam12on2080.outbound.protection.outlook.com [40.107.237.80]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6A171F818C; Fri, 25 Oct 2024 11:15:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.237.80 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729854919; cv=fail; b=uNXwPCe4f8keroQ8qJwK31ro0Brihp57s/G97cVr+nGhFzKjzPtIROiZqQqfRx5LNBNOghJ0B0rTrolijElP0q0Rcx78zSpFmxla1bW66mAPNfk68W+CR5rIF2vM5HoIgYpi6+LKwSEVRBu3+4q1isx4TyAKcySbt76hLze7R6M= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729854919; c=relaxed/simple; bh=151CHlnVgmoq1dJcq0MmTHrTmzg7hsqkM+kg1WYnRNk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Lrw4kkDhBJhL6OwzM3/iqcfwleBMxo01G4hG2ZFePY+4VIJ1tc2f8FmvBUe6Q143ob1EWpqOSmVxoq6qkuFjWWNm4A7Tc480LxKs9p+SVr6HbYcNKG11DdEVcuF2Ji7ov+vZBa1Y+CAVEs40hFhhzfHwaF9k9aJQ0E2bgT1Xk08= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=edosmxUA; arc=fail smtp.client-ip=40.107.237.80 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="edosmxUA" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=dt8DRxZy1NXZGftCWnDr0zN66IKrKAYxLIY7UcuZ/FeL4UqtPPDqFSuyeXHakIuivpmjHr/T48aEi86rgf6/pn5zJouhWr2C0UBfpjGDOrQkEIXWMPQOURi09iMhpgAgzw0YjPdZLQG5rjMgLqinkl1pj63BcWbNTr+wvZ3vyKugrs2ubkgWKRpfCWdiGZJyJtU+KXPhJMLkC2alrw2UlhNzPV1sV7tEiwMQ8QID33T7dHmAHJLosSXcm91z7i+bfHcoxuysuCE1oS4i9ykOvCu20MJDoTrfEVOKcVdvEihi9MAFPyToYzDft1Lv2343AYd31bfnnO2ZuGfNl8Xl5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=uA1vtkwWX/GbXoHm6NhyDM1ColKr1CAUZuHE3EdQlO8=; b=lUlyJ9/7oZ4TD92q9YaA8gVkD/Orzs1iE7I9B/DuGSSzE80HsWiU8oAajbDu2N9gDz+hYQW8H4ryvmKw9RzQWtT36KqGh/ApFcoU55YjeRvRsQdsmfOVO4jVbYwD7J4GKVMC+lYPIPdIjAySf2wPdvTSWI5eFP8eYTf212gA9SxjqmjGaKayWz51UozVj86qdDoOl/k1AxbH5+VoC0NPE1OsRMSWFIUS1AozsxAQPjfunuLOoF47+pdCgbR7o4IDPfWz5bUxsX1WtAX5j9BOOInpLZGplYFpaygv1ojpFQL+mm06zh6p/m9tlq9swyUDc53pQM/xb4pfzjq572/IMQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=infradead.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=uA1vtkwWX/GbXoHm6NhyDM1ColKr1CAUZuHE3EdQlO8=; b=edosmxUAaqOEgYt0bjgl9/AYxtNnxMtUIONxGXQmMtbW+fPSeqjG2W5lDN3aYxUfDVYCMAYW/zzcDYEtwSfEsX2YH97ICoT3n6M5UZEcCTD6grYM7irRfS0gADVXCaNzEWPQyOJaTxgJbtxNV31NwN5mabswd43gzXTbQN710uE= Received: from BN0PR08CA0009.namprd08.prod.outlook.com (2603:10b6:408:142::13) by SJ1PR12MB6243.namprd12.prod.outlook.com (2603:10b6:a03:456::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8069.28; Fri, 25 Oct 2024 11:15:12 +0000 Received: from BL6PEPF0001AB59.namprd02.prod.outlook.com (2603:10b6:408:142:cafe::d8) by BN0PR08CA0009.outlook.office365.com (2603:10b6:408:142::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.18 via Frontend Transport; Fri, 25 Oct 2024 11:15:12 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL6PEPF0001AB59.mail.protection.outlook.com (10.167.241.11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8093.14 via Frontend Transport; Fri, 25 Oct 2024 11:15:12 +0000 Received: from shatadru.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 25 Oct 2024 06:15:06 -0500 From: Dhananjay Ugwekar To: , , , , , , , , , , , , , CC: , , , , , , , "Dhananjay Ugwekar" Subject: [PATCH v6 03/10] perf/x86/rapl: Remove the cpu_to_rapl_pmu() function Date: Fri, 25 Oct 2024 11:13:41 +0000 Message-ID: <20241025111348.3810-4-Dhananjay.Ugwekar@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> References: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB59:EE_|SJ1PR12MB6243:EE_ X-MS-Office365-Filtering-Correlation-Id: 8555701b-a369-48cf-d1b6-08dcf4e64b79 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|7416014|36860700013|376014|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?R82REK5B9aaR+us3OlbIslS+09aj8HiCny76A7wT6Nlg9/Cp38zCn+qBTTXo?= =?us-ascii?Q?5RFtGpKxSjC0pfm2UZ7/tM7cA+twZZMzBSNoHpyyfxNYvzzTxzj7tbIguTHK?= =?us-ascii?Q?OZIfyCY9D2p7ifV3hq5PH5f1QNcpoL3I1jQFq/9Lz0dxvNwMvRIX8IBaQHfT?= =?us-ascii?Q?7YEaPMh6WDrvGRTsr+hAP/SYl75vOgFwYFkNgX0W75qLSs4zf/niuE92IGfQ?= =?us-ascii?Q?P3kijeANq0Ujj9NjJ8fOfVybZ3OUzYh/tDKBJ/oqrwZhMKFzDN65vjPrvuzU?= =?us-ascii?Q?K+uP+9CZbAqgtdEdqkFc+jsnAr9+f5dQ683uKKQvK3ZzLlVoOmRjW1LnYoyV?= =?us-ascii?Q?KT64yZBh+klsRB2iakA8uFgm6uknIW2E83TxTgx8n1UopMYceOnCKGb0S9bF?= =?us-ascii?Q?ftP+o8TV041uY7SJUZbs2S2IMQTwZtnhLoPQnBye3UNRc9Dc2emXB8fUGPRF?= =?us-ascii?Q?Ha14ciYEMcDXgNoFUGYQsFbpnQO372OxqCboK63yo58zNxQVIYuI3HzrjZjH?= =?us-ascii?Q?NBSVeRSwr1L4pkc3KFRTYKY4EPRNyZfyx4/KeMAw8dSzPMadTSzeE7hltOPH?= =?us-ascii?Q?eZttWeBksFAj9uRMaCiEAa89yt9i9Z05MweO+Ze9t0IrWZ4O9qbCaHoWkbFl?= =?us-ascii?Q?nWf0rmlj8upsZgRs/eL6Q7c2lULKKitcLERKatvUhUbbsVcaiqCSZxyeh927?= =?us-ascii?Q?F7i3E0oSm/BVPzAGzVqj2tWTDVt1HRLObpycqmDCmQuFtxj7zRH+lypXI5v/?= =?us-ascii?Q?JKTzN1ku2TibMW1r+pdM+dhdEhWJy+ZD+K+dLlcAAlRa6f4DFOVYxWk3EW0+?= =?us-ascii?Q?cW8zzbyES3pYSNuhWfUp0/HQ326YsFJBigfcquOG9gKiAq0DTRGdJOv/VvLW?= =?us-ascii?Q?YxzPaJaUIEwIL7iWl1VAX+1xZFvsW5f/lnAGQNuruu7LLr0I23mmYcEC0nOc?= =?us-ascii?Q?v7ndpOe8BdiXXM/svivZoa7Ik5uQ/h1cACrv+f5/RHYcVpksWfLziw6zY98v?= =?us-ascii?Q?Ebp+34sw0cbLIGA096AssNjguQxAab5/EIHbX5+OIzSZiGOMnewelhy9GTVO?= =?us-ascii?Q?+xM8NoonGQCoubygO7olFdbdAPx8oVYYzRbMCnjMRr6cb9KXMqsT3L2oyNQq?= =?us-ascii?Q?UMDzqTRtaRpBp7ZA5OG2wnPpUxNIRoz0+5oimKaJbrRCYuYNXKwJK0EEpPE7?= =?us-ascii?Q?j2Opm3aQDBZ6RcCivyieAO0xxzyMGFDZ+0Fxpkmt39MJ2j1AOGNQ9b+EVkB0?= =?us-ascii?Q?KmAjyUekFuK40hO2P68fSUynEKLGvlWE8s1jdVikGy6oFSQ9XgDRjqFTbb6W?= =?us-ascii?Q?1nn3k+9r1wZI6iBVMh+hw+/1Lh6vv1/CwWeEBXfHjT+YwikL+nh4nywdoF27?= =?us-ascii?Q?Tl3cZyjLjDU6zXNCWw6BepArHoLQULrFwGcaGKqoDeCPKWVrwN+VTtV2b99t?= =?us-ascii?Q?OrWgMSM8I8Y=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(7416014)(36860700013)(376014)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2024 11:15:12.5072 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8555701b-a369-48cf-d1b6-08dcf4e64b79 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB59.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ1PR12MB6243 Content-Type: text/plain; charset="utf-8" Prepare for the addition of RAPL core energy counter support. Post which, one CPU might be mapped to more than one rapl_pmu (package/die one and a core one). So, remove the cpu_to_rapl_pmu() function. Signed-off-by: Dhananjay Ugwekar Reviewed-by: Zhang Rui Tested-by: Zhang Rui --- arch/x86/events/rapl.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index f70c49ca0ef3..d20c5b1dd0ad 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -162,17 +162,6 @@ static inline unsigned int get_rapl_pmu_idx(int cpu) topology_logical_die_id(cpu); } =20 -static inline struct rapl_pmu *cpu_to_rapl_pmu(unsigned int cpu) -{ - unsigned int rapl_pmu_idx =3D get_rapl_pmu_idx(cpu); - - /* - * The unsigned check also catches the '-1' return value for non - * existent mappings in the topology map. - */ - return rapl_pmu_idx < rapl_pmus->nr_rapl_pmu ? rapl_pmus->pmus[rapl_pmu_i= dx] : NULL; -} - static inline u64 rapl_read_counter(struct perf_event *event) { u64 raw; @@ -348,7 +337,7 @@ static void rapl_pmu_event_del(struct perf_event *event= , int flags) static int rapl_pmu_event_init(struct perf_event *event) { u64 cfg =3D event->attr.config & RAPL_EVENT_MASK; - int bit, ret =3D 0; + int bit, rapl_pmu_idx, ret =3D 0; struct rapl_pmu *pmu; =20 /* only look at RAPL events */ @@ -376,8 +365,12 @@ static int rapl_pmu_event_init(struct perf_event *even= t) if (event->attr.sample_period) /* no sampling */ return -EINVAL; =20 + rapl_pmu_idx =3D get_rapl_pmu_idx(event->cpu); + if (rapl_pmu_idx >=3D rapl_pmus->nr_rapl_pmu) + return -EINVAL; + /* must be done before validate_group */ - pmu =3D cpu_to_rapl_pmu(event->cpu); + pmu =3D rapl_pmus->pmus[rapl_pmu_idx]; if (!pmu) return -EINVAL; event->pmu_private =3D pmu; --=20 2.34.1 From nobody Mon Nov 25 18:04:47 2024 Received: from NAM11-CO1-obe.outbound.protection.outlook.com (mail-co1nam11on2055.outbound.protection.outlook.com [40.107.220.55]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DF96C22B646; Fri, 25 Oct 2024 11:15:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.220.55 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729854943; cv=fail; b=cqbc3MGrz6ghhuJ2gYZUT8Ci45GMbW5x8rzWrqVan8Ye15y4Jr5nSNOyn0a5gf0guUHdPKhpM5VscwN5RqtTJ8TnChbu+SppBJO3b2j65w1EHPAzR/2oXbZXGdwypObzZiuVhz/r8bT9LSnP99OjEpcYYrZPZ44Q4wWcsPVf00o= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729854943; c=relaxed/simple; bh=lUQFP9ajqYt3jdT4zrMLKGRLIm0TBwc36OzZnPBzimk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=qk2I/1itQAElRC2cJSPwVKLKmbYF3G9fu8Jhydq+tWamYFWykbWRxl7XBCIm/adZdHKfP/F4Z2aTEuGCAlGmlT+FHtKumok8iYC3zWqk7pvFOyx080I/phiXX+hOulpvZUjseoPpZr7rCJ3HcObAsrsaspdFn9oVSO6MByY5yd4= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=q2tUK2qy; arc=fail smtp.client-ip=40.107.220.55 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="q2tUK2qy" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=V3zNvEe5g1TN+V40sr/s5+py23+zVKUZ1G90P1wgUo4ifz6ZMGr5NbriJdmnUJijKu6/RC+/nTCkFarToKdEsh6Csa85BN5YaF+0sV2+uEKlYHzX3QUDbl1Fr6BFVkQtZiQxg34wA9xLwsKchYk1i3DWRAAplZSvk6X4VktlFT8CgzdZNAsTuf05Y2thTSwjG/khqbqVQy9GJDkdBqIAvwOs8O+vIhd1qRlGoDEcBbC3802tcTyr0eC2YMySPyFXzoIEqm9fLUGQSnRWAm5muFHWgF5218tTvp7BDB30ll6FZoFpSO4bf97ttd0pupdYjzz5T146SHTi4quNAua38w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=O4Kxsb5RN7oeYh/h48hzuSRlwx2RkkqeDUSA/IAyzv0=; b=Y8kc3Qp//MTonsxJ9hYTOBMLK9bGrcCDN7kW/1y5Lk4/YaF7QJxoeBeSKcvMgl0TJTJc31AFTX7Gm/v4UIbYK28iuBvKQCr+oFWPLIeJGU+bt0/ULaovBp03rM4a0UpZxIr0Sl/pwcOS8x3F82FDYKza1060VN9/ANuWWfN05ZzKtQxK+AB6zrb4gW29AHnQzMow61DimC9yAGPs/FMpRm42qEllqiXxovPGQe31JxwTpSykstNeW4cEPOCj4rGSf3XHO+HubjlveuC7o3P6mjqSBWVE2sovqHqmE2E95pk/4yHQft+GWxMRiwPgst9TcZeiv97AZCM3gusDkOgnHA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=infradead.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=O4Kxsb5RN7oeYh/h48hzuSRlwx2RkkqeDUSA/IAyzv0=; b=q2tUK2qyDKuehdzES8asbnzTl31355TK7nkcf70ivoOEV7ln0CAOBFxrrLG8w5HSSn6HZaWKwDIpvOLJfvADNBI1GleGUKAhi8Q/0jmOPOUQIdaKpKGeymXbw+3JRNMpRyiCSVd2ybtBNuHALf8IcrtnG8jKAOcwvs7G47cjH2Y= Received: from BN9PR03CA0437.namprd03.prod.outlook.com (2603:10b6:408:113::22) by CYYPR12MB8854.namprd12.prod.outlook.com (2603:10b6:930:b8::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8048.21; Fri, 25 Oct 2024 11:15:36 +0000 Received: from BL6PEPF00020E65.namprd04.prod.outlook.com (2603:10b6:408:113:cafe::32) by BN9PR03CA0437.outlook.office365.com (2603:10b6:408:113::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.20 via Frontend Transport; Fri, 25 Oct 2024 11:15:36 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL6PEPF00020E65.mail.protection.outlook.com (10.167.249.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8093.14 via Frontend Transport; Fri, 25 Oct 2024 11:15:35 +0000 Received: from shatadru.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 25 Oct 2024 06:15:29 -0500 From: Dhananjay Ugwekar To: , , , , , , , , , , , , , CC: , , , , , , , "Dhananjay Ugwekar" Subject: [PATCH v6 04/10] perf/x86/rapl: Rename rapl_pmu variables Date: Fri, 25 Oct 2024 11:13:42 +0000 Message-ID: <20241025111348.3810-5-Dhananjay.Ugwekar@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> References: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E65:EE_|CYYPR12MB8854:EE_ X-MS-Office365-Filtering-Correlation-Id: cc6e3076-e836-4d02-5a1a-08dcf4e6596a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|36860700013|82310400026|7416014|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?nSD7SN48t8/BtQuqUEFMMUjsHt4ULIOXcoWl7vF+wYmuP8HhdyrTJOD6CyaQ?= =?us-ascii?Q?S8qlJGGMfos8U7vnV8L8SezwIMw0Gu5ZsW1C4Xp7ECKuEof+i48uv+G35+fT?= =?us-ascii?Q?W2pXe3FjSjHp/NxE33PghoKYVe3VDbUdbG55P8bqxKLoTmCQ/WX/0gPrg71q?= =?us-ascii?Q?CF9o1vIOKBl15foL1JWa25cV9iqQMK4PcRgptLeb+S5B0Atx2Bq8d/VvWVOC?= =?us-ascii?Q?s3iScwm+Puw5yx3f9JqUj2GB+gmqjaKk64yZAZD5TEpnLXwVLbIHzbED7qrH?= =?us-ascii?Q?0soA1HrbxWXuznGxilu2C9SOhbIo/XLLznhsaz+koe8sZZkMbDOU8OX7cGTC?= =?us-ascii?Q?7Ck14W3bRUQV6X8mAUH60UzfU3XJGkr+3DizE5QR7YaNt8ptwPSvEaZ9nyIT?= =?us-ascii?Q?4tcCdVNxyxT+ijw5iQsUhHep0sdAjWtani92pCkOlRzMba1sRIEUKNa+j0Rp?= =?us-ascii?Q?SVSwOS+rAaUAMjT7APc7XexCvhX9yV115jy0AsIruj6qeMKwGLG8QBxZO4/s?= =?us-ascii?Q?IrKt3Q6fgaehy3K2CovnIBJHGaWbHd3B01dSEfsXuTgAUB3VdHXKT9AATIjm?= =?us-ascii?Q?iYmfP16mM9DRVt/W7erEPKvQiqiO9v1j7PYJhZR1Q4YDp4Vg/D772Oh7x9p1?= =?us-ascii?Q?MCla37TEiSr9i3NqAJ0irqSUsh/ZyHmEc4A7AMwLEDOEst7lZRFAOm1VlgQV?= =?us-ascii?Q?PXlMbsRRKsD3P+Wh0I5ZpavL1YdXVVw7TVEiuNSpcQZ8D3JSKR3Zz6Ip+GUM?= =?us-ascii?Q?mbezJwfAmjWyOdbDeizXzMZrupDotPrm7zU09BkBAEsly1NURDXedSForC6Q?= =?us-ascii?Q?YNt3wnlygR1de0HhRz4p1hXrxHDpVi+S1NV7qRRu3gBe0DBqSVDHjgYOJj+l?= =?us-ascii?Q?VOKLi9WXDaqzH7j2Jm7X2APw3CLO1AY5hWb9/JVDBC5ztjxfynJ9Ssxtq6vi?= =?us-ascii?Q?yT/f0r8av0YlgLY83S/xZ7YeKpDee/E1bhRYDcHsgc1rUY28nYUN1kdQNFEY?= =?us-ascii?Q?u6AAmTCEfiqNxPKfUGF919IbHLD/YGSMT3TiteYji2DcxIahPLkiO5A2Ykqe?= =?us-ascii?Q?Er5dNNw12meiddrYqleP3DzNTszveGu/nTrMGzxgGskFg8ApRjXcao8BkKls?= =?us-ascii?Q?CCyYW3jvqgxLsuEYrAoiSA92vdy5P//5FLMDzSowkzxDevsFo8PCjjkvuHEu?= =?us-ascii?Q?XHveMGfENceNVFbzcUTF1wjPY8n6uZ+l5veBTdmB7AtpTc1Y5oe/9y/xwHXP?= =?us-ascii?Q?dToMPVMcWYgn2xNd33qt2TLeEIAZsMlGXB/UoQmQVgGTfcGjipqczEMz63yo?= =?us-ascii?Q?XNmoVWYMhXxK7vZulTQPG3qEw0ts7K++CmR0qxyLAJTXM6OieXjk5R8NMNnJ?= =?us-ascii?Q?escbenFRx3kReNaM/MhK3QOekAurx8OkMruKat6YTlV2DG+JHXmt8NynqN1G?= =?us-ascii?Q?yGNlK26p5F0=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026)(7416014)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2024 11:15:35.8940 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cc6e3076-e836-4d02-5a1a-08dcf4e6596a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E65.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYYPR12MB8854 Content-Type: text/plain; charset="utf-8" Rename struct rapl_pmu variables from "pmu" to "rapl_pmu", to avoid any confusion between the variables of two different structs pmu and rapl_pmu. As rapl_pmu also contains a pointer to struct pmu, which leads to situations in code like pmu->pmu, which is needlessly confusing. Above scenario is replaced with much more readable rapl_pmu->pmu with this change. Also rename "pmus" member in rapl_pmus struct, for same reason. No functional change. Signed-off-by: Dhananjay Ugwekar Reviewed-by: Gautham R. Shenoy Reviewed-by: Zhang Rui Tested-by: Zhang Rui --- arch/x86/events/rapl.c | 91 +++++++++++++++++++++--------------------- 1 file changed, 46 insertions(+), 45 deletions(-) diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index d20c5b1dd0ad..7387bca95018 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -129,7 +129,7 @@ struct rapl_pmu { struct rapl_pmus { struct pmu pmu; unsigned int nr_rapl_pmu; - struct rapl_pmu *pmus[] __counted_by(nr_rapl_pmu); + struct rapl_pmu *rapl_pmu[] __counted_by(nr_rapl_pmu); }; =20 enum rapl_unit_quirk { @@ -223,34 +223,34 @@ static void rapl_start_hrtimer(struct rapl_pmu *pmu) =20 static enum hrtimer_restart rapl_hrtimer_handle(struct hrtimer *hrtimer) { - struct rapl_pmu *pmu =3D container_of(hrtimer, struct rapl_pmu, hrtimer); + struct rapl_pmu *rapl_pmu =3D container_of(hrtimer, struct rapl_pmu, hrti= mer); struct perf_event *event; unsigned long flags; =20 - if (!pmu->n_active) + if (!rapl_pmu->n_active) return HRTIMER_NORESTART; =20 - raw_spin_lock_irqsave(&pmu->lock, flags); + raw_spin_lock_irqsave(&rapl_pmu->lock, flags); =20 - list_for_each_entry(event, &pmu->active_list, active_entry) + list_for_each_entry(event, &rapl_pmu->active_list, active_entry) rapl_event_update(event); =20 - raw_spin_unlock_irqrestore(&pmu->lock, flags); + raw_spin_unlock_irqrestore(&rapl_pmu->lock, flags); =20 - hrtimer_forward_now(hrtimer, pmu->timer_interval); + hrtimer_forward_now(hrtimer, rapl_pmu->timer_interval); =20 return HRTIMER_RESTART; } =20 -static void rapl_hrtimer_init(struct rapl_pmu *pmu) +static void rapl_hrtimer_init(struct rapl_pmu *rapl_pmu) { - struct hrtimer *hr =3D &pmu->hrtimer; + struct hrtimer *hr =3D &rapl_pmu->hrtimer; =20 hrtimer_init(hr, CLOCK_MONOTONIC, HRTIMER_MODE_REL); hr->function =3D rapl_hrtimer_handle; } =20 -static void __rapl_pmu_event_start(struct rapl_pmu *pmu, +static void __rapl_pmu_event_start(struct rapl_pmu *rapl_pmu, struct perf_event *event) { if (WARN_ON_ONCE(!(event->hw.state & PERF_HES_STOPPED))) @@ -258,39 +258,39 @@ static void __rapl_pmu_event_start(struct rapl_pmu *p= mu, =20 event->hw.state =3D 0; =20 - list_add_tail(&event->active_entry, &pmu->active_list); + list_add_tail(&event->active_entry, &rapl_pmu->active_list); =20 local64_set(&event->hw.prev_count, rapl_read_counter(event)); =20 - pmu->n_active++; - if (pmu->n_active =3D=3D 1) - rapl_start_hrtimer(pmu); + rapl_pmu->n_active++; + if (rapl_pmu->n_active =3D=3D 1) + rapl_start_hrtimer(rapl_pmu); } =20 static void rapl_pmu_event_start(struct perf_event *event, int mode) { - struct rapl_pmu *pmu =3D event->pmu_private; + struct rapl_pmu *rapl_pmu =3D event->pmu_private; unsigned long flags; =20 - raw_spin_lock_irqsave(&pmu->lock, flags); - __rapl_pmu_event_start(pmu, event); - raw_spin_unlock_irqrestore(&pmu->lock, flags); + raw_spin_lock_irqsave(&rapl_pmu->lock, flags); + __rapl_pmu_event_start(rapl_pmu, event); + raw_spin_unlock_irqrestore(&rapl_pmu->lock, flags); } =20 static void rapl_pmu_event_stop(struct perf_event *event, int mode) { - struct rapl_pmu *pmu =3D event->pmu_private; + struct rapl_pmu *rapl_pmu =3D event->pmu_private; struct hw_perf_event *hwc =3D &event->hw; unsigned long flags; =20 - raw_spin_lock_irqsave(&pmu->lock, flags); + raw_spin_lock_irqsave(&rapl_pmu->lock, flags); =20 /* mark event as deactivated and stopped */ if (!(hwc->state & PERF_HES_STOPPED)) { - WARN_ON_ONCE(pmu->n_active <=3D 0); - pmu->n_active--; - if (pmu->n_active =3D=3D 0) - hrtimer_cancel(&pmu->hrtimer); + WARN_ON_ONCE(rapl_pmu->n_active <=3D 0); + rapl_pmu->n_active--; + if (rapl_pmu->n_active =3D=3D 0) + hrtimer_cancel(&rapl_pmu->hrtimer); =20 list_del(&event->active_entry); =20 @@ -308,23 +308,23 @@ static void rapl_pmu_event_stop(struct perf_event *ev= ent, int mode) hwc->state |=3D PERF_HES_UPTODATE; } =20 - raw_spin_unlock_irqrestore(&pmu->lock, flags); + raw_spin_unlock_irqrestore(&rapl_pmu->lock, flags); } =20 static int rapl_pmu_event_add(struct perf_event *event, int mode) { - struct rapl_pmu *pmu =3D event->pmu_private; + struct rapl_pmu *rapl_pmu =3D event->pmu_private; struct hw_perf_event *hwc =3D &event->hw; unsigned long flags; =20 - raw_spin_lock_irqsave(&pmu->lock, flags); + raw_spin_lock_irqsave(&rapl_pmu->lock, flags); =20 hwc->state =3D PERF_HES_UPTODATE | PERF_HES_STOPPED; =20 if (mode & PERF_EF_START) - __rapl_pmu_event_start(pmu, event); + __rapl_pmu_event_start(rapl_pmu, event); =20 - raw_spin_unlock_irqrestore(&pmu->lock, flags); + raw_spin_unlock_irqrestore(&rapl_pmu->lock, flags); =20 return 0; } @@ -338,7 +338,7 @@ static int rapl_pmu_event_init(struct perf_event *event) { u64 cfg =3D event->attr.config & RAPL_EVENT_MASK; int bit, rapl_pmu_idx, ret =3D 0; - struct rapl_pmu *pmu; + struct rapl_pmu *rapl_pmu; =20 /* only look at RAPL events */ if (event->attr.type !=3D rapl_pmus->pmu.type) @@ -370,10 +370,11 @@ static int rapl_pmu_event_init(struct perf_event *eve= nt) return -EINVAL; =20 /* must be done before validate_group */ - pmu =3D rapl_pmus->pmus[rapl_pmu_idx]; - if (!pmu) + rapl_pmu =3D rapl_pmus->rapl_pmu[rapl_pmu_idx]; + if (!rapl_pmu) return -EINVAL; - event->pmu_private =3D pmu; + + event->pmu_private =3D rapl_pmu; event->hw.event_base =3D rapl_msrs[bit].msr; event->hw.config =3D cfg; event->hw.idx =3D bit; @@ -600,7 +601,7 @@ static void cleanup_rapl_pmus(void) int i; =20 for (i =3D 0; i < rapl_pmus->nr_rapl_pmu; i++) - kfree(rapl_pmus->pmus[i]); + kfree(rapl_pmus->rapl_pmu[i]); kfree(rapl_pmus); } =20 @@ -615,27 +616,27 @@ static const struct attribute_group *rapl_attr_update= [] =3D { =20 static int __init init_rapl_pmu(void) { - struct rapl_pmu *pmu; + struct rapl_pmu *rapl_pmu; int idx; =20 for (idx =3D 0; idx < rapl_pmus->nr_rapl_pmu; idx++) { - pmu =3D kzalloc(sizeof(*pmu), GFP_KERNEL); - if (!pmu) + rapl_pmu =3D kzalloc(sizeof(*rapl_pmu), GFP_KERNEL); + if (!rapl_pmu) goto free; =20 - raw_spin_lock_init(&pmu->lock); - INIT_LIST_HEAD(&pmu->active_list); - pmu->pmu =3D &rapl_pmus->pmu; - pmu->timer_interval =3D ms_to_ktime(rapl_timer_ms); - rapl_hrtimer_init(pmu); + raw_spin_lock_init(&rapl_pmu->lock); + INIT_LIST_HEAD(&rapl_pmu->active_list); + rapl_pmu->pmu =3D &rapl_pmus->pmu; + rapl_pmu->timer_interval =3D ms_to_ktime(rapl_timer_ms); + rapl_hrtimer_init(rapl_pmu); =20 - rapl_pmus->pmus[idx] =3D pmu; + rapl_pmus->rapl_pmu[idx] =3D rapl_pmu; } =20 return 0; free: for (; idx > 0; idx--) - kfree(rapl_pmus->pmus[idx - 1]); + kfree(rapl_pmus->rapl_pmu[idx - 1]); return -ENOMEM; } =20 @@ -649,7 +650,7 @@ static int __init init_rapl_pmus(void) rapl_pmu_scope =3D PERF_PMU_SCOPE_DIE; } =20 - rapl_pmus =3D kzalloc(struct_size(rapl_pmus, pmus, nr_rapl_pmu), GFP_KERN= EL); + rapl_pmus =3D kzalloc(struct_size(rapl_pmus, rapl_pmu, nr_rapl_pmu), GFP_= KERNEL); if (!rapl_pmus) return -ENOMEM; =20 --=20 2.34.1 From nobody Mon Nov 25 18:04:47 2024 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2066.outbound.protection.outlook.com [40.107.93.66]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D607122B646; Fri, 25 Oct 2024 11:15:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.93.66 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729854959; cv=fail; b=d/HzZ96BxRMJUFmlV9RK7dZVOLbVCsRGyXIpW9kjkj+WEFWKvohg3eU57tqGM0SaeZE/bcQQ5sTouQwEJIFuwa7DhdqqR2IgwGsI2cuvWh7sKowUAjOZX898H5l9SQQLw8EuynJbRut8eyE0IJEH1zlP4d0JY7zrS5lmsZ/O3hA= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729854959; c=relaxed/simple; bh=bg5/eg4HNRCp22JowWvBi0KmVZ26FIoTTwP1h+SDKGM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=SnILKd6wAho6b0rb8AnjWOUCZ4vjP/k2TNJPtV2WmqNcrKhKNHKjX5mpsluf8BlctlecxsRe2UJGsuC7SQGfOyAgd2odkQWJAVkkBykLQTjelOUEvSL7zPIJ+DM4DfTucbwW8xOTxCLPZhcINhqEHgLY8aU2Cu8lYnz8S14RKKw= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=msIcX7X7; arc=fail smtp.client-ip=40.107.93.66 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="msIcX7X7" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=a1rv3Q07yho9vE0hBwbtZyxVLsnMcWy9x+NvAChlR1v1Sf68Icl5giFdyYRujpp+KVRnd8Ff/byghTPPhFSrPPUGqH1SZfs8Bgh7nqG/iK4jp5KLSGMpxtMjrn5PhwUy14o5ih6j1z/ONTJWFYK6boz6j+4GTouFbup6Mfymy2YxIPmBJhJALTVJMwQYQH1a0hoO/qTMp7PRg5A6CwznOj1d09v119MdH/Rr5yeYPKxQnA5RNMxZFXZlm8E33DJRLIjoj0BHjYIvjL24hf0ubb/QQr/OOvDqbRvIqeNZf48JG/EZrkY4frWx4MxBJYGGZCHOiIP3SFSnPtwgoerpWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=1vZdDWyxkGu71Ke4NPvGevPKGbK6QIzSyMyUHR24Dfs=; b=RjEKXw6v7BCVjS6N7PLX605eVsuYMe9gVZ2rF7hOsQaFZ0FeDsJE6MfUOqlxnzPOjx37izAuaeS3v8uemsRx1IGfmTO6tr9JZ/gDF5nn53J73SxjsV90w+IoMiX+m3Qo5Dnt4+NiUfJqKGycBjBggIqLU+aJRfMynmrzcYRtNrO/TXXd+3VJcoeuoQ06iadHDIXlk33tPjzpB/EEdrOo8Fuu/s7rhkv8UdGU7M25tXLfZcJXtQESp1PLgpotOr/Uf1KZ4h0U+1Nr05ri2f82SDmYTWsiNZIZXQRFnL4mK2At0or92V4LcX63H4rNROGakEPpV3keq2eZTPV51Y9gbA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=infradead.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=1vZdDWyxkGu71Ke4NPvGevPKGbK6QIzSyMyUHR24Dfs=; b=msIcX7X7m0alBpty8wbO1js20xSKfHmKivF/EDJ2AFLRZCibfvZKr2OoPJZVKKMBaZN1AEF3aWvQ6nKQjMu9zrK2v9H8POBAW/wNIgUIlNIkDkwf9CXmuCE52iElMYsRf6KLLEQKoH31bX/qFEJMaM+tEdV9jL6wO1G/DC+TVMQ= Received: from BN9PR03CA0713.namprd03.prod.outlook.com (2603:10b6:408:ef::28) by DM4PR12MB6448.namprd12.prod.outlook.com (2603:10b6:8:8a::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.16; Fri, 25 Oct 2024 11:15:54 +0000 Received: from BL6PEPF00020E60.namprd04.prod.outlook.com (2603:10b6:408:ef:cafe::cb) by BN9PR03CA0713.outlook.office365.com (2603:10b6:408:ef::28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.20 via Frontend Transport; Fri, 25 Oct 2024 11:15:54 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL6PEPF00020E60.mail.protection.outlook.com (10.167.249.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8093.14 via Frontend Transport; Fri, 25 Oct 2024 11:15:54 +0000 Received: from shatadru.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 25 Oct 2024 06:15:48 -0500 From: Dhananjay Ugwekar To: , , , , , , , , , , , , , CC: , , , , , , , "Dhananjay Ugwekar" Subject: [PATCH v6 05/10] perf/x86/rapl: Make rapl_model struct global Date: Fri, 25 Oct 2024 11:13:43 +0000 Message-ID: <20241025111348.3810-6-Dhananjay.Ugwekar@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> References: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E60:EE_|DM4PR12MB6448:EE_ X-MS-Office365-Filtering-Correlation-Id: 3d6a480a-903b-466a-f0ad-08dcf4e66479 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|1800799024|82310400026|7416014|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?pW3bjVtIZxC4isrmmIVWPBIitFkZIIzINvk2F86QZg9UJjvZelIL0DrzvOcJ?= =?us-ascii?Q?/iSmXkp0a2NO8AO+m37f1mvZ4zns8qGpfFeZ5v0Vy2eRVlWMrUhArbJrBrbf?= =?us-ascii?Q?nVtdIYSbuDG4zXvGT60b2ijXPSISPLuGU3mtMuo7Wuz+xZemYlu3xHY+ob9s?= =?us-ascii?Q?DW4bIV50UQKC8OlHQ3AjXm+5oW1CkCR2CW0mN3b3yBcCCGqWSXXGZ+vR+Sm7?= =?us-ascii?Q?PxUxPSHBbPFRXgjxG3HZ5V8qI8gelvzgiOz+DRuD7NhKvYDk7+MGz77gcWJz?= =?us-ascii?Q?mvlmVRyBL0HA3TdQHgj16VXB030dY2jRHxllPpclrNLCvN3crVCnZfGtaxHq?= =?us-ascii?Q?elTq3YozLvk9wCF5RWzYbtP5weRwRE65aDmhl1P8ZKYNG3gIwwUMzdv/OwfU?= =?us-ascii?Q?Cwqt5Z4b9dtwUOSeksw0vEX6EYTOIuWdwxjJx3/UpO4Gum0tahcDPNBLzgFf?= =?us-ascii?Q?Dfdq4WrgHboi2mBqDT8LpqrZz7zPbmYpzbX6bOIw+pGIJ/pN/US957sawZej?= =?us-ascii?Q?Od1jrxjIYgQa8K0t6CET6cfgj1cHAIJnoMqF56tamNFGkvct7deTvePZnjZH?= =?us-ascii?Q?Hh9smvRgQnPD5jf8PrV3NGdZHBgAFnFfWUxE5x7ujozntSI5UPSbNghe2UY2?= =?us-ascii?Q?xquf0nDeX2+yXialrdiCffJbaY1mVSnJccgbvNG9HhEEU5qrHVkpncf5ENcq?= =?us-ascii?Q?P5Dn2IeAxc/x74hZ9EyJ5UVq7V41h5i7y6R+xw8E4S5yN5fBHQjsZObfv7G5?= =?us-ascii?Q?IknK+0s8NpJVuViY8MJ+/2ZbUoJFB4GEeCuyPw+9UnyD5T9VegO277PLZD6E?= =?us-ascii?Q?d26d/znKvAkdQl6NZa/Au9eYnGoGp/6QSk8kl5x4O57pfvbUkndxEg+7iciW?= =?us-ascii?Q?l7sRC0KTpL+rplrhRl55wt6FfRIpSLL9zW6Iw2pJaoHTRiauW5THnrqq+PIP?= =?us-ascii?Q?0aSwKf0WxPoWZPC5jiU9kePtE2bMk9Rv1dMJU8L6kVc1zDdhPgDxdCU5EiAd?= =?us-ascii?Q?WroU0sk38UTM67Q6mK++fm8AhzMkiUIML242bGHE9K+3l66AbmefFkYuF5lp?= =?us-ascii?Q?eGO4c0ADc+CrjnT9wYxgrgQOZE7+9IRNnyw+iuulZpvU0OPkpLZv2LJCgxU/?= =?us-ascii?Q?8/UTsf24EirqRLk79/tjJcXARf/JJhX4z5R44JLs6ZcFVrBqcKGMViUXrWT3?= =?us-ascii?Q?LPvkAvNdjUkNWqtp0iQgnBp+9B9dmBwKSOkC7zjNbp3WmhFZ+1ILTaqJRk4h?= =?us-ascii?Q?h0o5lcBNdVf35g1/7MQQO+50MtwLNeKRBXVjZKpJLjlbzwDW0pAarwBBCxuq?= =?us-ascii?Q?80ay9v1Lqasj+9Zlf07C4ro7N9ePXH8ohMTCyEzX7vELo6SoYsL6y7Qe5Dwp?= =?us-ascii?Q?QazdRh+TwsnSCn5Ywgaebe1bFySzZ3ZHy8yMfffMl9kQeNFS5Lmu3RCCFdrS?= =?us-ascii?Q?6zISee3zi7M=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(376014)(1800799024)(82310400026)(7416014)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2024 11:15:54.4511 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3d6a480a-903b-466a-f0ad-08dcf4e66479 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E60.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6448 Content-Type: text/plain; charset="utf-8" Prepare for the addition of RAPL core energy counter support. As there will always be just one rapl_model variable on a system, make it global, to make it easier to access it from any function. No functional change. Signed-off-by: Dhananjay Ugwekar Reviewed-by: Gautham R. Shenoy Reviewed-by: Zhang Rui Tested-by: Zhang Rui --- arch/x86/events/rapl.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index 7387bca95018..447f62caa5f9 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -151,6 +151,7 @@ static struct rapl_pmus *rapl_pmus; static unsigned int rapl_cntr_mask; static u64 rapl_timer_ms; static struct perf_msr *rapl_msrs; +static struct rapl_model *rapl_model; =20 /* * Helper function to get the correct topology id according to the @@ -536,18 +537,18 @@ static struct perf_msr amd_rapl_msrs[] =3D { [PERF_RAPL_PSYS] =3D { 0, &rapl_events_psys_group, NULL, false, 0 }, }; =20 -static int rapl_check_hw_unit(struct rapl_model *rm) +static int rapl_check_hw_unit(void) { u64 msr_rapl_power_unit_bits; int i; =20 /* protect rdmsrl() to handle virtualization */ - if (rdmsrl_safe(rm->msr_power_unit, &msr_rapl_power_unit_bits)) + if (rdmsrl_safe(rapl_model->msr_power_unit, &msr_rapl_power_unit_bits)) return -1; for (i =3D 0; i < NR_RAPL_DOMAINS; i++) rapl_hw_unit[i] =3D (msr_rapl_power_unit_bits >> 8) & 0x1FULL; =20 - switch (rm->unit_quirk) { + switch (rapl_model->unit_quirk) { /* * DRAM domain on HSW server and KNL has fixed energy unit which can be * different than the unit from power unit MSR. See @@ -792,21 +793,20 @@ MODULE_DEVICE_TABLE(x86cpu, rapl_model_match); static int __init rapl_pmu_init(void) { const struct x86_cpu_id *id; - struct rapl_model *rm; int ret; =20 id =3D x86_match_cpu(rapl_model_match); if (!id) return -ENODEV; =20 - rm =3D (struct rapl_model *) id->driver_data; + rapl_model =3D (struct rapl_model *) id->driver_data; =20 - rapl_msrs =3D rm->rapl_msrs; + rapl_msrs =3D rapl_model->rapl_msrs; =20 rapl_cntr_mask =3D perf_msr_probe(rapl_msrs, PERF_RAPL_MAX, - false, (void *) &rm->events); + false, (void *) &rapl_model->events); =20 - ret =3D rapl_check_hw_unit(rm); + ret =3D rapl_check_hw_unit(); if (ret) return ret; =20 --=20 2.34.1 From nobody Mon Nov 25 18:04:47 2024 Received: from NAM12-BN8-obe.outbound.protection.outlook.com (mail-bn8nam12on2078.outbound.protection.outlook.com [40.107.237.78]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D736F201024; Fri, 25 Oct 2024 11:16:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.237.78 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729854984; cv=fail; b=u9VKrFuv8BgOtvX4bACk8YEydWClYF9Vhoj2JOrO4yqM35rIatvHFmr97Q/VTgPMqRfXiYOEMuUFYnGI9eNYprr4j1Q0OwUwlcxVAGR7WWWLl6JufG0E4McXpZxMN7ZpWlgnWr7OQBLTumqt8lIHELOaemkIGOd2k+vWQIA4Cfc= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729854984; c=relaxed/simple; bh=iqVDNEY3IqJ/tMZAhoTIBZYxQDQtnQxaqlQFAWYGSvw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=DdJ/2hNBb4OIkFUQ71eZT2zdrPZ6M/VFyeUWmK5fIUp89G74xGVOXAEk7KDVqDRZzCwCjcDTXx+QxPYXBnBZuURozAN/jL+WLjS6k2drVMs9h+dYuQ3Cit5x8rOEcipPvLtjx2beAdiUZ07oZyaUekK9FVDht4ePqvfMeKof5z0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=Zp4cYoba; arc=fail smtp.client-ip=40.107.237.78 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="Zp4cYoba" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=FaeCyY+UL9hpu5/nwDNcoO48IX5xFLxK1tPMRi2PYzhbYkpp5/k50Dm5d49hBgo1NfUYVP1OIg+YHwSW7+PolmtKq/wCG6PfROOJX14MKne4pGml+gsPGkARE6+dT+CHDn8waEDXTPqRSTqA19dN3WDbGzam8uS8+JmQ12bOkm1Bs9WpeOG47AkS8GjV7CUOGiM0xiwHOqNJ76SR/sHx2ixZdGR0sqXNrPZr29JL+s/glpwrXgU3tVkt0sQ87HBTiojJYKSk0WAc5W9a10czdZ9NRYkgXsEBtppUFuvZFJPIrqf//Q7tkGOkO/nIPRx/JbK1OC6No16a8PBog//jjA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=N+Gi/GIoCUF413fI6Kh2bMLzJKPdLWgWodqSNDlfroY=; b=BH+zSRm9lOzjfJD5y/IxpGdrXnQwKzAFDnKSYV4uDUJW9wq5cmEmLGluhiLMJKMQpzhxaoe99D6H05x1iiXikywPWaPNyRTSlrOgAStczNybQVOw3IcNMDvsFnrRXSk+ng27ytJzBckgsoyj5G20IHc0wIehYyLqQHqQpDvLx9Qzr+VrsvqCAunh+/wowjESjamgD1iQJAIsdvfHyU9w1SbYJ3/Fkq7FZA6CKfjV84sysRxna9ayBK6SfqPPcBoQSBEBWXaLu8SU4dzhz5xTWBXT+a5ebu7WxL8nJXXeHqAFIO2EpcWxd1/in9NCgACbnPQ1TN9Bi01gmmH7zfWsvg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=infradead.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=N+Gi/GIoCUF413fI6Kh2bMLzJKPdLWgWodqSNDlfroY=; b=Zp4cYobaJfWZrdRxn8wAnHu79y4Xx2TroI3/FL1X1RHzAhzod8/OmS/+bCf7fiwwHo6Ypm7MdY3hb4ZqKk0ZfMYcC3ARICAG1+of2F+W3jc3/yrjm35JbalLFzw/EPXgBKBo/HUGlXr0rWa766aVpUHDioIXF+bSLGxryRaqxzA= Received: from MN2PR20CA0020.namprd20.prod.outlook.com (2603:10b6:208:e8::33) by SJ0PR12MB6757.namprd12.prod.outlook.com (2603:10b6:a03:449::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.18; Fri, 25 Oct 2024 11:16:18 +0000 Received: from BL6PEPF00020E64.namprd04.prod.outlook.com (2603:10b6:208:e8:cafe::53) by MN2PR20CA0020.outlook.office365.com (2603:10b6:208:e8::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8069.32 via Frontend Transport; Fri, 25 Oct 2024 11:16:17 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL6PEPF00020E64.mail.protection.outlook.com (10.167.249.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8093.14 via Frontend Transport; Fri, 25 Oct 2024 11:16:17 +0000 Received: from shatadru.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 25 Oct 2024 06:16:06 -0500 From: Dhananjay Ugwekar To: , , , , , , , , , , , , , CC: , , , , , , , "Dhananjay Ugwekar" Subject: [PATCH v6 06/10] perf/x86/rapl: Add arguments to the init and cleanup functions Date: Fri, 25 Oct 2024 11:13:44 +0000 Message-ID: <20241025111348.3810-7-Dhananjay.Ugwekar@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> References: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E64:EE_|SJ0PR12MB6757:EE_ X-MS-Office365-Filtering-Correlation-Id: e4946aee-30fd-4869-4860-08dcf4e67215 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700013|376014|7416014|82310400026|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?EqD9FzvZx1Db6Yfmf+gQbyq6Iun2IOVGLLxiG/JZIl2bwixU4kV/Qv+RBoxR?= =?us-ascii?Q?rluHg48ufZbZ19zB0MIwXaWiBKhNXwaimVDKrR3LZfgKlQtxQT5V6aWTTCug?= =?us-ascii?Q?0IsM2Lsy94YH78lMzVYBhG3h4mU8UP+RvMnpdNfFtPMb6rh00olLIY1BuR1Y?= =?us-ascii?Q?nZEX843QCYu2+yANdWzozvScgE+OtsSuqQ/mdjrt4dXwLj8uXA8sZfC3oriA?= =?us-ascii?Q?fJcFA2oivdFBUzGqxJ2gHlWGLFwvSwt4RisgMvZFg0fJ5jgBlZ/Ipl51SYG9?= =?us-ascii?Q?LkHM8Pe6Jx0QEfIFQUvZ4UscUXvgJSyrR5/YhlPvJDJAJBktPo6AX9h+tUKW?= =?us-ascii?Q?EXlCt5jJYXHbCLyFndOl6J3z9tyW7RAp8JaZwdmnKILnovfX51YjZMup80Z4?= =?us-ascii?Q?9q6D8fINa83S2JjoA54hXqzR4WJvO+J+bGdmGk/xnJBD/JBDVNsdsDWLFH4p?= =?us-ascii?Q?MQOzBVdsWHBhjq3Rz8qsllP3Ga9QbC42K2inwn0GlctIfsTMAsnkHeZFDVxI?= =?us-ascii?Q?D/hm4CidVJIHnlxTXQzqVymJ6dgnmvck/b8O2NheripTPceh5swfBIfExRML?= =?us-ascii?Q?gLBtArRHmqOkXpwB5nFyzB6Lv4cMaPiezUL1nRmySMQCws20QCKgiGrQwRz0?= =?us-ascii?Q?omFiy1aEZsUU/JYiPp7fgOd7g0Bfb32hZKZiyS5oPuj3HCAiRW4wfp8jX7T9?= =?us-ascii?Q?nJHBo6LExf9PbCL6hQGNTtztitgMcL47GOJMd0l3mBvFMVP9/XOtEUfNYOMc?= =?us-ascii?Q?sFHgSWgtBP58G+H+MV+r6buOE3IdHDNBJJ0H6DSfJOu/Bj/WpMiMTugjguRL?= =?us-ascii?Q?ymFwCHhuq3Ng01ZSMgbW8wwOoLRY1Wg6WVI+kSR4xLNfSplaKRQwB8jyeJA2?= =?us-ascii?Q?BWDPkx3j5RNzXBxd+YLpjAZNcv3XmgEdJSPEVgoiZNZeE7/iMfFiMiXbzr9R?= =?us-ascii?Q?RH9cJOMf95WtBXTOZbstXG6vv7ZVAVCeoiQYUkDHKTSk7KYwHM1ocghzPLQp?= =?us-ascii?Q?AQG2Ufc9z17orQYyNIrCFqRWATvepVZJSVGjtO6Lj/WQqT96zEMtaPwXxKZY?= =?us-ascii?Q?B6QXBI4O0tV/dxp9R2va+Din9//GzHs2uNPbNCALyJnTrfIl8fJtUTmKk9+s?= =?us-ascii?Q?+e6d1bQI/BvJuuK+AJJGugzsslcoTOLLSVgJ9/R9wxyViM/j1kuM5gAzG+nZ?= =?us-ascii?Q?n5y3jjtfuprLK3DqUCha1kFN9yargzkEZw2Bs8MJO1EdlS5ZfXvxpu0EEQCe?= =?us-ascii?Q?1360NMN5PxbpeOrV+jTD8BBCJwKRwi02NduTgGZQhc9+vatKrwMh/KDVyySG?= =?us-ascii?Q?zhyzyFbxt4+EUp03ZFat6Z3weUb7ZDMNzCWcrIU3Ow4hj0grnEUBAfWlgSfI?= =?us-ascii?Q?8e1+xgewqtVc4db9ecgqIvj+huZWIwYCMmmgqLmXWZwF8ZSA0PAsElcAPxqg?= =?us-ascii?Q?CUB5P4TkJVA=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(36860700013)(376014)(7416014)(82310400026)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2024 11:16:17.2795 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e4946aee-30fd-4869-4860-08dcf4e67215 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E64.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB6757 Content-Type: text/plain; charset="utf-8" Prepare for the addition of RAPL core energy counter support. Add arguments to the init and cleanup functions, which will help in initialization and cleaning up of two separate PMUs. No functional change. Signed-off-by: Dhananjay Ugwekar Reviewed-by: Gautham R. Shenoy Reviewed-by: Zhang Rui Tested-by: Zhang Rui --- arch/x86/events/rapl.c | 28 ++++++++++++++++------------ 1 file changed, 16 insertions(+), 12 deletions(-) diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index 447f62caa5f9..bf6fee114294 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -597,7 +597,7 @@ static void __init rapl_advertise(void) } } =20 -static void cleanup_rapl_pmus(void) +static void cleanup_rapl_pmus(struct rapl_pmus *rapl_pmus) { int i; =20 @@ -615,7 +615,7 @@ static const struct attribute_group *rapl_attr_update[]= =3D { NULL, }; =20 -static int __init init_rapl_pmu(void) +static int __init init_rapl_pmu(struct rapl_pmus *rapl_pmus) { struct rapl_pmu *rapl_pmu; int idx; @@ -641,20 +641,20 @@ static int __init init_rapl_pmu(void) return -ENOMEM; } =20 -static int __init init_rapl_pmus(void) +static int __init init_rapl_pmus(struct rapl_pmus **rapl_pmus_ptr, int rap= l_pmu_scope) { int nr_rapl_pmu =3D topology_max_packages(); - int rapl_pmu_scope =3D PERF_PMU_SCOPE_PKG; + struct rapl_pmus *rapl_pmus; =20 - if (!rapl_pmu_is_pkg_scope()) { - nr_rapl_pmu *=3D topology_max_dies_per_package(); - rapl_pmu_scope =3D PERF_PMU_SCOPE_DIE; - } + if (rapl_pmu_scope =3D=3D PERF_PMU_SCOPE_DIE) + nr_rapl_pmu *=3D topology_max_dies_per_package(); =20 rapl_pmus =3D kzalloc(struct_size(rapl_pmus, rapl_pmu, nr_rapl_pmu), GFP_= KERNEL); if (!rapl_pmus) return -ENOMEM; =20 + *rapl_pmus_ptr =3D rapl_pmus; + rapl_pmus->nr_rapl_pmu =3D nr_rapl_pmu; rapl_pmus->pmu.attr_groups =3D rapl_attr_groups; rapl_pmus->pmu.attr_update =3D rapl_attr_update; @@ -669,7 +669,7 @@ static int __init init_rapl_pmus(void) rapl_pmus->pmu.module =3D THIS_MODULE; rapl_pmus->pmu.capabilities =3D PERF_PMU_CAP_NO_EXCLUDE; =20 - return init_rapl_pmu(); + return init_rapl_pmu(rapl_pmus); } =20 static struct rapl_model model_snb =3D { @@ -793,8 +793,12 @@ MODULE_DEVICE_TABLE(x86cpu, rapl_model_match); static int __init rapl_pmu_init(void) { const struct x86_cpu_id *id; + int rapl_pmu_scope =3D PERF_PMU_SCOPE_DIE; int ret; =20 + if (rapl_pmu_is_pkg_scope()) + rapl_pmu_scope =3D PERF_PMU_SCOPE_PKG; + id =3D x86_match_cpu(rapl_model_match); if (!id) return -ENODEV; @@ -810,7 +814,7 @@ static int __init rapl_pmu_init(void) if (ret) return ret; =20 - ret =3D init_rapl_pmus(); + ret =3D init_rapl_pmus(&rapl_pmus, rapl_pmu_scope); if (ret) return ret; =20 @@ -823,7 +827,7 @@ static int __init rapl_pmu_init(void) =20 out: pr_warn("Initialization failed (%d), disabled\n", ret); - cleanup_rapl_pmus(); + cleanup_rapl_pmus(rapl_pmus); return ret; } module_init(rapl_pmu_init); @@ -831,6 +835,6 @@ module_init(rapl_pmu_init); static void __exit intel_rapl_exit(void) { perf_pmu_unregister(&rapl_pmus->pmu); - cleanup_rapl_pmus(); + cleanup_rapl_pmus(rapl_pmus); } module_exit(intel_rapl_exit); --=20 2.34.1 From nobody Mon Nov 25 18:04:47 2024 Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2086.outbound.protection.outlook.com [40.107.243.86]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B6E211DD0C7; Fri, 25 Oct 2024 11:16:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.243.86 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729854999; cv=fail; b=NSbpCVQve84/z0NZYMbyC+v5Byvhp1TKYyzAC8Dcr9QovtAXlLVstUh0gPK8XEqWnmINn3TwRRNFZI7ej4zgyDI9cp+Z31kpQLeKS4NTOVON238uG3FAAQOk1S2jOXUdUovJ+4OjHjx2R6s3+0Hcf+lnmOjSknv9DQE0vmSt5hE= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729854999; c=relaxed/simple; bh=T2viPnxqASF8vykU5oV+Hpp05frYibTTLHVAUNNgqko=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=BirnbAYGfPxgAUwMfQOsr315lmpPUmwgH+b/W629hfiwB8rsStXZ7XcxbadvdewR27zvBPpdlMxSenmqGnLsdn9yAYRYd0Wwtkb4bx3x92AmgAbnuYaVl9fipbuShlEyEmR0hAGvfHPl+X/X/5rj8Lb0ZWFUW6HBEWQJq+B8f98= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=cBsHVRgf; arc=fail smtp.client-ip=40.107.243.86 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="cBsHVRgf" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=XPN21XJ/4S8vG6iYtOjyZi3ZRDwdh3yRVf9sGlgTFG+HmactWrqVqq1K3jpaKLXknK0y7236IgwYOqx77V5LfX0rD+B/ryfHCeizRc6UsIQrxqG2j0qrmh4BqSjTf3q7wycvNnmpX56Q2Zam/CN6n9j2Tw+pZJyfFB+4WtsBWBaFCpaP55R4u2eY0XmTeIBZT5K0okqOC1QKJupgxmB0oRXViB11lNTRU6A7we16HKJsSjuwj/lbEp7oeBU5Qq1lD+rYtyrAlkqHdmeQfFwxTXlS/fuRZtL4VkW7ckDaSMLmGVoBeyal4VX9TI7SLC1748eBGmQypHWM8O/KdP8lcQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=dDLJqcMG3yI9IY8EQamJgu2ZeMWGvlzwRzs3mHRvM/Q=; b=WR0Bfe2dWFsMFDpmmlh6Q2aX7+1mDLBEZlwB/g67J/1zzED1wx/yFsI3JS2wE069tb9E7Yk3Jjv20JYF5k0HTtdjBtwo0DBOdTnsE6aidh3nkn6wXoZ0hMMHg//6Fb/j10ZGGAmkO2AMLrZ+FgzA8TSf3+zoYUGWvCiMFdinzB3qZ4jhLzzNaNnlBm2uJKW+NgNvsmZ/TyqPbNPtCn6AGu/U7XNSKmaJgmjpAlI2hOmzE/4Hj8Op/xAJX7LOFoG+bMbV/4zQna3sppzkEUigAi5XwHCslZC1WqPJY7lrH/iaN/clhxnJ6vOAlkn0KDSdIvqUrvkX5buCSsBKhdOx2w== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=infradead.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=dDLJqcMG3yI9IY8EQamJgu2ZeMWGvlzwRzs3mHRvM/Q=; b=cBsHVRgfH6b164no6kLsY4uZvnDFRiax55zvn7Do4Wf2pL3hKsu3aACS0i6+jzJOMBRbjEFT7bB7i1hZMYosoetbQvz3Me3ZsW+Z9e94tLGdCG35qVgw9DB6ogGKksiAMsSuQ7z45JmmnRQmxNnQWrY/ZqxxTaqjBalq6UmZ3Mo= Received: from BN9PR03CA0692.namprd03.prod.outlook.com (2603:10b6:408:ef::7) by PH7PR12MB7914.namprd12.prod.outlook.com (2603:10b6:510:27d::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.18; Fri, 25 Oct 2024 11:16:31 +0000 Received: from BL6PEPF00020E60.namprd04.prod.outlook.com (2603:10b6:408:ef:cafe::ec) by BN9PR03CA0692.outlook.office365.com (2603:10b6:408:ef::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.20 via Frontend Transport; Fri, 25 Oct 2024 11:16:31 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL6PEPF00020E60.mail.protection.outlook.com (10.167.249.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8093.14 via Frontend Transport; Fri, 25 Oct 2024 11:16:31 +0000 Received: from shatadru.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 25 Oct 2024 06:16:25 -0500 From: Dhananjay Ugwekar To: , , , , , , , , , , , , , CC: , , , , , , , "Dhananjay Ugwekar" Subject: [PATCH v6 07/10] perf/x86/rapl: Modify the generic variable names to *_pkg* Date: Fri, 25 Oct 2024 11:13:45 +0000 Message-ID: <20241025111348.3810-8-Dhananjay.Ugwekar@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> References: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E60:EE_|PH7PR12MB7914:EE_ X-MS-Office365-Filtering-Correlation-Id: b4cfbe03-d271-4488-39b8-08dcf4e67a72 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|7416014|36860700013|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?P/rh03CDkPwq/tUBZQfEt4cSYZznt2r8UkAzpZvR9NEoGjdiFgwyDd4+cDHC?= =?us-ascii?Q?sDYzsxxWm/HlGz4JNhSVvMQXVCc6bwZAxlxKWPaLRLi1TD/5qyX4qR1PhjiS?= =?us-ascii?Q?/OXr+hoR2D0pevlnjtTUPgfxnJL5qHIbicWaxkZ/8eCYTcX8EwwZO6Pnx4PQ?= =?us-ascii?Q?emuc3rf9Z8eaST+1c5zbI6FFisFnDgPu1zZQx7CmxYDLHV2ff0V5fKhThBnS?= =?us-ascii?Q?WXH88KL+K3ba9ay2Dd/0V66KQGcx0k3MEmyO479Cn+z1IIr41gM9sW7Jq9/o?= =?us-ascii?Q?08MEZPC0eCLR37KKB2zTE0LQc77kgASZt3y5AjyygmE5XeQIJd2l8nIKhcTq?= =?us-ascii?Q?Yb2gaI+nwQICFZQWqh/Ua4kb0eGPqoPkNsX607lWh1jUzvHOq8f/5G/NopTO?= =?us-ascii?Q?UD+DcHrjuuxJ3H8ygHngpd5LV+jyjIDZAAA9yrh/NL+8OiRUrPL7Yn2rc37Q?= =?us-ascii?Q?pJ6XNMKzco8WZEux6IX28H74LzI/q9grUgqPCJyzBiBDY7EgWSXUPHt8DVMc?= =?us-ascii?Q?2/C+ylLXTcuZaYwK6EREi4FTiIRkp+vtHgWjbTlQJqSkuAniOGuv3/LyBiTS?= =?us-ascii?Q?ZnIiGYFdCIYkDR3fRPpar3h9HziiG9wJJc/wV1nI1yd+FMEWGYiWfRrYltHs?= =?us-ascii?Q?SWKt9bmePqpseNEdmczuL26XkOoZQinPIxytZbsSYqTBLTv2JIzIXBcIe/8V?= =?us-ascii?Q?JucJa2Ew9SBKvgtuYjTg/cvcSJY1sCIqjMlcYX/eRqzE6118KIqZ/Xu9iIZ/?= =?us-ascii?Q?QtLRJGp9YVYSt7/F6J3I+s3bn28wHiPWJzOCONKrKoIm1va1gM3Wi2gX4su3?= =?us-ascii?Q?UL5ZVudeNL+A/Jq2XYQPw54NAK+fgfr9BpDT3H89ACdU1DZorxjDjwJo0Vfv?= =?us-ascii?Q?xQRLs6WiY9tWGHze5U6hrCfQICBeOcvbDERCtNd2L70Um/pm8Sp+MzdYIFgi?= =?us-ascii?Q?zYIlYN9MAjqwdam8J9DIsr6Q0+ejghr4Ku7E72K4jXzClQfaexBgRhUbFvMI?= =?us-ascii?Q?TOOULjHl3h2vHscmHo07PPLUhWNVo3z8PF8NMS+utosfWU+4zPj7fEfRc5mF?= =?us-ascii?Q?5oUqS0pGtcGTAUhaVYO+pk2o7GN15d9rj50TUO0hRP0JrfYtVH75uORHKdBg?= =?us-ascii?Q?cxqwMG6tsmPRc/+XCpiDDcVP4vpOakKvIWpV9gcTCrRgPgQgnExeiypMr9vI?= =?us-ascii?Q?o6m48S+okm5La9ObLN1T8qnsuUIm6JMKvn1RkRK9X8andSkY/pNLv9t03N4J?= =?us-ascii?Q?LPkl2yXRkQrxbCRA03RIwpIYZ8Z/SDLC3SVqm+qXr4meYJ9i9CMrm+2qYAEv?= =?us-ascii?Q?vxg5UdfzvZe8o19yYyhZri1ikW9MICZZRlkaSb34P80gL6z8Ml6nrwycsNXM?= =?us-ascii?Q?xivWSyaCI4GGauUHu/qoJyMGbExTzEyQz7yEDL7z0qs9xyEayJeu8g3Mm1C2?= =?us-ascii?Q?jVJZz6bkzuQ=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(376014)(7416014)(36860700013)(1800799024)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2024 11:16:31.3104 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b4cfbe03-d271-4488-39b8-08dcf4e67a72 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E60.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7914 Content-Type: text/plain; charset="utf-8" Prepare for the addition of RAPL core energy counter support. Replace the generic names with *_pkg*, to later on differentiate between=20 the scopes of the two different PMUs and their variables. No functional change. Signed-off-by: Dhananjay Ugwekar Reviewed-by: Gautham R. Shenoy Reviewed-by: Zhang Rui Tested-by: Zhang Rui --- arch/x86/events/rapl.c | 118 ++++++++++++++++++++--------------------- 1 file changed, 59 insertions(+), 59 deletions(-) diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index bf6fee114294..ae8b450caa9b 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -70,18 +70,18 @@ MODULE_LICENSE("GPL"); /* * RAPL energy status counters */ -enum perf_rapl_events { +enum perf_rapl_pkg_events { PERF_RAPL_PP0 =3D 0, /* all cores */ PERF_RAPL_PKG, /* entire package */ PERF_RAPL_RAM, /* DRAM */ PERF_RAPL_PP1, /* gpu */ PERF_RAPL_PSYS, /* psys */ =20 - PERF_RAPL_MAX, - NR_RAPL_DOMAINS =3D PERF_RAPL_MAX, + PERF_RAPL_PKG_EVENTS_MAX, + NR_RAPL_PKG_DOMAINS =3D PERF_RAPL_PKG_EVENTS_MAX, }; =20 -static const char *const rapl_domain_names[NR_RAPL_DOMAINS] __initconst = =3D { +static const char *const rapl_pkg_domain_names[NR_RAPL_PKG_DOMAINS] __init= const =3D { "pp0-core", "package", "dram", @@ -112,7 +112,7 @@ static struct perf_pmu_events_attr event_attr_##v =3D {= \ * considered as either pkg-scope or die-scope, and we are considering * them as die-scope. */ -#define rapl_pmu_is_pkg_scope() \ +#define rapl_pkg_pmu_is_pkg_scope() \ (boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_AMD || \ boot_cpu_data.x86_vendor =3D=3D X86_VENDOR_HYGON) =20 @@ -139,16 +139,16 @@ enum rapl_unit_quirk { }; =20 struct rapl_model { - struct perf_msr *rapl_msrs; - unsigned long events; + struct perf_msr *rapl_pkg_msrs; + unsigned long pkg_events; unsigned int msr_power_unit; enum rapl_unit_quirk unit_quirk; }; =20 /* 1/2^hw_unit Joule */ -static int rapl_hw_unit[NR_RAPL_DOMAINS] __read_mostly; -static struct rapl_pmus *rapl_pmus; -static unsigned int rapl_cntr_mask; +static int rapl_pkg_hw_unit[NR_RAPL_PKG_DOMAINS] __read_mostly; +static struct rapl_pmus *rapl_pmus_pkg; +static unsigned int rapl_pkg_cntr_mask; static u64 rapl_timer_ms; static struct perf_msr *rapl_msrs; static struct rapl_model *rapl_model; @@ -159,7 +159,7 @@ static struct rapl_model *rapl_model; */ static inline unsigned int get_rapl_pmu_idx(int cpu) { - return rapl_pmu_is_pkg_scope() ? topology_logical_package_id(cpu) : + return rapl_pkg_pmu_is_pkg_scope() ? topology_logical_package_id(cpu) : topology_logical_die_id(cpu); } =20 @@ -172,7 +172,7 @@ static inline u64 rapl_read_counter(struct perf_event *= event) =20 static inline u64 rapl_scale(u64 v, int cfg) { - if (cfg > NR_RAPL_DOMAINS) { + if (cfg > NR_RAPL_PKG_DOMAINS) { pr_warn("Invalid domain %d, failed to scale data\n", cfg); return v; } @@ -182,7 +182,7 @@ static inline u64 rapl_scale(u64 v, int cfg) * or use ldexp(count, -32). * Watts =3D Joules/Time delta */ - return v << (32 - rapl_hw_unit[cfg - 1]); + return v << (32 - rapl_pkg_hw_unit[cfg - 1]); } =20 static u64 rapl_event_update(struct perf_event *event) @@ -342,7 +342,7 @@ static int rapl_pmu_event_init(struct perf_event *event) struct rapl_pmu *rapl_pmu; =20 /* only look at RAPL events */ - if (event->attr.type !=3D rapl_pmus->pmu.type) + if (event->attr.type !=3D rapl_pmus_pkg->pmu.type) return -ENOENT; =20 /* check only supported bits are set */ @@ -352,14 +352,14 @@ static int rapl_pmu_event_init(struct perf_event *eve= nt) if (event->cpu < 0) return -EINVAL; =20 - if (!cfg || cfg >=3D NR_RAPL_DOMAINS + 1) + if (!cfg || cfg >=3D NR_RAPL_PKG_DOMAINS + 1) return -EINVAL; =20 - cfg =3D array_index_nospec((long)cfg, NR_RAPL_DOMAINS + 1); + cfg =3D array_index_nospec((long)cfg, NR_RAPL_PKG_DOMAINS + 1); bit =3D cfg - 1; =20 /* check event supported */ - if (!(rapl_cntr_mask & (1 << bit))) + if (!(rapl_pkg_cntr_mask & (1 << bit))) return -EINVAL; =20 /* unsupported modes and filters */ @@ -367,11 +367,11 @@ static int rapl_pmu_event_init(struct perf_event *eve= nt) return -EINVAL; =20 rapl_pmu_idx =3D get_rapl_pmu_idx(event->cpu); - if (rapl_pmu_idx >=3D rapl_pmus->nr_rapl_pmu) + if (rapl_pmu_idx >=3D rapl_pmus_pkg->nr_rapl_pmu) return -EINVAL; =20 /* must be done before validate_group */ - rapl_pmu =3D rapl_pmus->rapl_pmu[rapl_pmu_idx]; + rapl_pmu =3D rapl_pmus_pkg->rapl_pmu[rapl_pmu_idx]; if (!rapl_pmu) return -EINVAL; =20 @@ -525,11 +525,11 @@ static struct perf_msr intel_rapl_spr_msrs[] =3D { }; =20 /* - * Force to PERF_RAPL_MAX size due to: - * - perf_msr_probe(PERF_RAPL_MAX) + * Force to PERF_RAPL_PKG_EVENTS_MAX size due to: + * - perf_msr_probe(PERF_RAPL_PKG_EVENTS_MAX) * - want to use same event codes across both architectures */ -static struct perf_msr amd_rapl_msrs[] =3D { +static struct perf_msr amd_rapl_pkg_msrs[] =3D { [PERF_RAPL_PP0] =3D { 0, &rapl_events_cores_group, NULL, false, 0 }, [PERF_RAPL_PKG] =3D { MSR_AMD_PKG_ENERGY_STATUS, &rapl_events_pkg_group= , test_msr, false, RAPL_MSR_MASK }, [PERF_RAPL_RAM] =3D { 0, &rapl_events_ram_group, NULL, false, 0 }, @@ -545,8 +545,8 @@ static int rapl_check_hw_unit(void) /* protect rdmsrl() to handle virtualization */ if (rdmsrl_safe(rapl_model->msr_power_unit, &msr_rapl_power_unit_bits)) return -1; - for (i =3D 0; i < NR_RAPL_DOMAINS; i++) - rapl_hw_unit[i] =3D (msr_rapl_power_unit_bits >> 8) & 0x1FULL; + for (i =3D 0; i < NR_RAPL_PKG_DOMAINS; i++) + rapl_pkg_hw_unit[i] =3D (msr_rapl_power_unit_bits >> 8) & 0x1FULL; =20 switch (rapl_model->unit_quirk) { /* @@ -556,11 +556,11 @@ static int rapl_check_hw_unit(void) * of 2. Datasheet, September 2014, Reference Number: 330784-001 " */ case RAPL_UNIT_QUIRK_INTEL_HSW: - rapl_hw_unit[PERF_RAPL_RAM] =3D 16; + rapl_pkg_hw_unit[PERF_RAPL_RAM] =3D 16; break; /* SPR uses a fixed energy unit for Psys domain. */ case RAPL_UNIT_QUIRK_INTEL_SPR: - rapl_hw_unit[PERF_RAPL_PSYS] =3D 0; + rapl_pkg_hw_unit[PERF_RAPL_PSYS] =3D 0; break; default: break; @@ -575,9 +575,9 @@ static int rapl_check_hw_unit(void) * if hw unit is 32, then we use 2 ms 1/200/2 */ rapl_timer_ms =3D 2; - if (rapl_hw_unit[0] < 32) { + if (rapl_pkg_hw_unit[0] < 32) { rapl_timer_ms =3D (1000 / (2 * 100)); - rapl_timer_ms *=3D (1ULL << (32 - rapl_hw_unit[0] - 1)); + rapl_timer_ms *=3D (1ULL << (32 - rapl_pkg_hw_unit[0] - 1)); } return 0; } @@ -587,12 +587,12 @@ static void __init rapl_advertise(void) int i; =20 pr_info("API unit is 2^-32 Joules, %d fixed counters, %llu ms ovfl timer\= n", - hweight32(rapl_cntr_mask), rapl_timer_ms); + hweight32(rapl_pkg_cntr_mask), rapl_timer_ms); =20 - for (i =3D 0; i < NR_RAPL_DOMAINS; i++) { - if (rapl_cntr_mask & (1 << i)) { + for (i =3D 0; i < NR_RAPL_PKG_DOMAINS; i++) { + if (rapl_pkg_cntr_mask & (1 << i)) { pr_info("hw unit of domain %s 2^-%d Joules\n", - rapl_domain_names[i], rapl_hw_unit[i]); + rapl_pkg_domain_names[i], rapl_pkg_hw_unit[i]); } } } @@ -673,71 +673,71 @@ static int __init init_rapl_pmus(struct rapl_pmus **r= apl_pmus_ptr, int rapl_pmu_ } =20 static struct rapl_model model_snb =3D { - .events =3D BIT(PERF_RAPL_PP0) | + .pkg_events =3D BIT(PERF_RAPL_PP0) | BIT(PERF_RAPL_PKG) | BIT(PERF_RAPL_PP1), .msr_power_unit =3D MSR_RAPL_POWER_UNIT, - .rapl_msrs =3D intel_rapl_msrs, + .rapl_pkg_msrs =3D intel_rapl_msrs, }; =20 static struct rapl_model model_snbep =3D { - .events =3D BIT(PERF_RAPL_PP0) | + .pkg_events =3D BIT(PERF_RAPL_PP0) | BIT(PERF_RAPL_PKG) | BIT(PERF_RAPL_RAM), .msr_power_unit =3D MSR_RAPL_POWER_UNIT, - .rapl_msrs =3D intel_rapl_msrs, + .rapl_pkg_msrs =3D intel_rapl_msrs, }; =20 static struct rapl_model model_hsw =3D { - .events =3D BIT(PERF_RAPL_PP0) | + .pkg_events =3D BIT(PERF_RAPL_PP0) | BIT(PERF_RAPL_PKG) | BIT(PERF_RAPL_RAM) | BIT(PERF_RAPL_PP1), .msr_power_unit =3D MSR_RAPL_POWER_UNIT, - .rapl_msrs =3D intel_rapl_msrs, + .rapl_pkg_msrs =3D intel_rapl_msrs, }; =20 static struct rapl_model model_hsx =3D { - .events =3D BIT(PERF_RAPL_PP0) | + .pkg_events =3D BIT(PERF_RAPL_PP0) | BIT(PERF_RAPL_PKG) | BIT(PERF_RAPL_RAM), .unit_quirk =3D RAPL_UNIT_QUIRK_INTEL_HSW, .msr_power_unit =3D MSR_RAPL_POWER_UNIT, - .rapl_msrs =3D intel_rapl_msrs, + .rapl_pkg_msrs =3D intel_rapl_msrs, }; =20 static struct rapl_model model_knl =3D { - .events =3D BIT(PERF_RAPL_PKG) | + .pkg_events =3D BIT(PERF_RAPL_PKG) | BIT(PERF_RAPL_RAM), .unit_quirk =3D RAPL_UNIT_QUIRK_INTEL_HSW, .msr_power_unit =3D MSR_RAPL_POWER_UNIT, - .rapl_msrs =3D intel_rapl_msrs, + .rapl_pkg_msrs =3D intel_rapl_msrs, }; =20 static struct rapl_model model_skl =3D { - .events =3D BIT(PERF_RAPL_PP0) | + .pkg_events =3D BIT(PERF_RAPL_PP0) | BIT(PERF_RAPL_PKG) | BIT(PERF_RAPL_RAM) | BIT(PERF_RAPL_PP1) | BIT(PERF_RAPL_PSYS), .msr_power_unit =3D MSR_RAPL_POWER_UNIT, - .rapl_msrs =3D intel_rapl_msrs, + .rapl_pkg_msrs =3D intel_rapl_msrs, }; =20 static struct rapl_model model_spr =3D { - .events =3D BIT(PERF_RAPL_PP0) | + .pkg_events =3D BIT(PERF_RAPL_PP0) | BIT(PERF_RAPL_PKG) | BIT(PERF_RAPL_RAM) | BIT(PERF_RAPL_PSYS), .unit_quirk =3D RAPL_UNIT_QUIRK_INTEL_SPR, .msr_power_unit =3D MSR_RAPL_POWER_UNIT, - .rapl_msrs =3D intel_rapl_spr_msrs, + .rapl_pkg_msrs =3D intel_rapl_spr_msrs, }; =20 static struct rapl_model model_amd_hygon =3D { - .events =3D BIT(PERF_RAPL_PKG), + .pkg_events =3D BIT(PERF_RAPL_PKG), .msr_power_unit =3D MSR_AMD_RAPL_POWER_UNIT, - .rapl_msrs =3D amd_rapl_msrs, + .rapl_pkg_msrs =3D amd_rapl_pkg_msrs, }; =20 static const struct x86_cpu_id rapl_model_match[] __initconst =3D { @@ -793,11 +793,11 @@ MODULE_DEVICE_TABLE(x86cpu, rapl_model_match); static int __init rapl_pmu_init(void) { const struct x86_cpu_id *id; - int rapl_pmu_scope =3D PERF_PMU_SCOPE_DIE; + int rapl_pkg_pmu_scope =3D PERF_PMU_SCOPE_DIE; int ret; =20 - if (rapl_pmu_is_pkg_scope()) - rapl_pmu_scope =3D PERF_PMU_SCOPE_PKG; + if (rapl_pkg_pmu_is_pkg_scope()) + rapl_pkg_pmu_scope =3D PERF_PMU_SCOPE_PKG; =20 id =3D x86_match_cpu(rapl_model_match); if (!id) @@ -805,20 +805,20 @@ static int __init rapl_pmu_init(void) =20 rapl_model =3D (struct rapl_model *) id->driver_data; =20 - rapl_msrs =3D rapl_model->rapl_msrs; + rapl_msrs =3D rapl_model->rapl_pkg_msrs; =20 - rapl_cntr_mask =3D perf_msr_probe(rapl_msrs, PERF_RAPL_MAX, - false, (void *) &rapl_model->events); + rapl_pkg_cntr_mask =3D perf_msr_probe(rapl_msrs, PERF_RAPL_PKG_EVENTS_MAX, + false, (void *) &rapl_model->pkg_events); =20 ret =3D rapl_check_hw_unit(); if (ret) return ret; =20 - ret =3D init_rapl_pmus(&rapl_pmus, rapl_pmu_scope); + ret =3D init_rapl_pmus(&rapl_pmus_pkg, rapl_pkg_pmu_scope); if (ret) return ret; =20 - ret =3D perf_pmu_register(&rapl_pmus->pmu, "power", -1); + ret =3D perf_pmu_register(&rapl_pmus_pkg->pmu, "power", -1); if (ret) goto out; =20 @@ -827,14 +827,14 @@ static int __init rapl_pmu_init(void) =20 out: pr_warn("Initialization failed (%d), disabled\n", ret); - cleanup_rapl_pmus(rapl_pmus); + cleanup_rapl_pmus(rapl_pmus_pkg); return ret; } module_init(rapl_pmu_init); =20 static void __exit intel_rapl_exit(void) { - perf_pmu_unregister(&rapl_pmus->pmu); - cleanup_rapl_pmus(rapl_pmus); + perf_pmu_unregister(&rapl_pmus_pkg->pmu); + cleanup_rapl_pmus(rapl_pmus_pkg); } module_exit(intel_rapl_exit); --=20 2.34.1 From nobody Mon Nov 25 18:04:47 2024 Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2045.outbound.protection.outlook.com [40.107.243.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C1C61F818C; Fri, 25 Oct 2024 11:16:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.243.45 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729855014; cv=fail; b=NOYKuQN9ssmyW3bKbna7MB5ZMn80SChckAhp3sSNa1/3wfyIpPp52WcEtiXB8c4PyhmcSZkInybgoEOgzPKlHMKY0mNlit/x/N+42c4JnJlrSuTSyJboSxS3LUsAC5qUKFNg85tv/XI60bXhB/PZ0BPSKVIBiCUxIjN25RcBT4I= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729855014; c=relaxed/simple; bh=rEXqWR2Nr9lhtMd4koq1VppMZu4K6tXM31FV2TErQNw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=prSinmvBpHy4fv2KMObWYBDESy4SiqR2iGvLGtDnKfKNxsFI1rYRdGE3VmhEHiayxCkZKiHLQRQFCvGnCJiOUCmoQB1Uwrx8S53SWnUKurPmJyXw4hBWkIzug9pRRfkwQZlIbAXVZn9xOSltf9dfVByqJDaDbWCK0j3kvhxYIIo= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=Mds0J1A1; arc=fail smtp.client-ip=40.107.243.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="Mds0J1A1" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=C2yzJaQ8ekWiss4PFQtDduJah5Ii3iYd/NiZEbNcNtDb/h9aHsFP6eAqM82OtRRdTf43iNjB6nXJhZWr/FR4wPPvU69s+NOeqBd/FBPcuTkccYVRBJJzSETPCPRMf9lc6G4c16aUcSvbNbAvzQtlMMMu57GdR0Acl0TjqjkwFt+wr30CQ+J1Tvs5LBYn/wLiDJbltrJS3dn9h8MRhTMQEcYHPQmKASWqkAkYEoePwHvYWgPaDdY/rxkxdg2XziqxpM014CKDYUJaVksvtmKnI6a7fuCpTPHA2Q7MP5RqUzvL+qtjKB6PbKhgFejw9ZvxZVZfGsHcHhZm9wYz4gGymw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=FjIIQMd+3EPajImyyu5E8TqCCv/S6l+0rsDvsPYmP/A=; b=FGbuy+sAmoqRm7jbuKai62w/k7n5bwTpaw2oP73LYdEc3g5zPfiCPf0mN3FubAFut7DSHr9p8HvKtlSrTApCkNhWcPYxZ5Flk/B6B7r3ijYgYAk2AjVDIpRiUQc2Bpzjv2dC6YZ8sXCM6guWsdXQTNZTGhF6IY5RJAtoxjPf8XfxnDuU4DikP71neUT+b5wLfFOyJ1QHY/ogzpGv1xPscFy3woXMM5YB4gL9ixtCm0HwxcsFBk5ramsB09ihIvBZ3BD4g0xhRzp7V0BCElhHFfoiYcsUlvVDucBulxuvu+7+zsvcL8fqZh+2KCPEAtEzaH/kbh3kkCdjFHuasycthw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=infradead.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=FjIIQMd+3EPajImyyu5E8TqCCv/S6l+0rsDvsPYmP/A=; b=Mds0J1A18u5o12YL/NDcLT6HHj+ILZWvLRpC4rHNaAYJUmdQJRu9UkzyZj7zwYv1fkmAfmXbWlckeJ4y9t2HCd1+oIuU0m7oNK0uCXbaAduNPbXsZhKOkejLikr0wiA4Dn/IeKyq9CFioWYobMjVuJBMvP2rh+TAz7dP5PCRoao= Received: from BN9PR03CA0706.namprd03.prod.outlook.com (2603:10b6:408:ef::21) by SA1PR12MB8597.namprd12.prod.outlook.com (2603:10b6:806:251::16) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.20; Fri, 25 Oct 2024 11:16:50 +0000 Received: from BL6PEPF00020E60.namprd04.prod.outlook.com (2603:10b6:408:ef:cafe::f4) by BN9PR03CA0706.outlook.office365.com (2603:10b6:408:ef::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.20 via Frontend Transport; Fri, 25 Oct 2024 11:16:49 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL6PEPF00020E60.mail.protection.outlook.com (10.167.249.21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8093.14 via Frontend Transport; Fri, 25 Oct 2024 11:16:49 +0000 Received: from shatadru.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 25 Oct 2024 06:16:43 -0500 From: Dhananjay Ugwekar To: , , , , , , , , , , , , , CC: , , , , , , , "Dhananjay Ugwekar" Subject: [PATCH v6 08/10] perf/x86/rapl: Remove the global variable rapl_msrs Date: Fri, 25 Oct 2024 11:13:46 +0000 Message-ID: <20241025111348.3810-9-Dhananjay.Ugwekar@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> References: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E60:EE_|SA1PR12MB8597:EE_ X-MS-Office365-Filtering-Correlation-Id: 6a9c0d2b-0676-48fa-b66f-08dcf4e68576 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|1800799024|7416014|82310400026|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?8EtraLDDy5OFh/KCIfX3gbKwWqyUdn3/Yd6ANIqiuFY2Ca2J6Lzi8bH0cq0s?= =?us-ascii?Q?2Cx85nw2Vvpxju5Q3fdics/AA1wtOBnOPYUYB+jP2euaZQEnKwLiYmuhC0Rk?= =?us-ascii?Q?PQLe8NrOPo6OV3vwYwIXGc90lixKoHQ92cLiMGxnXeI7vzboFB+l29oQIOer?= =?us-ascii?Q?+tKSIU3RH9p/Gf5cGUUOFU6FbMAalPsL7U41aZQkl5hOkCGcbU8czDXNDPMH?= =?us-ascii?Q?lO1MG1Gm8hqHqnuwq8QtRjQfekMVGzIqtMs07AIo/GLvQj2SDGmPCL1xez5o?= =?us-ascii?Q?h/v9axFFJ8/b/z4ViYRhxxulYNUaaIQaJxWCQbaJuF5pwu9dSiZwgu4hPY2U?= =?us-ascii?Q?UHjFN4RCTVH41alshujimuxIA9SD3zUJAKegaX46IfIEmk9I81MCD9t6D0lI?= =?us-ascii?Q?8i6KBdj4dZe6LH2mCoQ7wCgMkaQlNcOou355KPKDahl3ZCsdOI9kM7fx7p05?= =?us-ascii?Q?fmRLM4EZELESKerqlpbwWcJ4xqLYDscUngVlj3TsuMYBM2T6bs7uZhRnsStv?= =?us-ascii?Q?gObEk5SoJl//ylMHeaxCfsnEU3gJ1wgYUUcNfFFaQOXfu+11dzCg7OJ3i5Wa?= =?us-ascii?Q?UU2Ae9R4eUxRKrkr+bjlEms7b2vAJnCIyqa+vPwX26z876hstHmCzz6gw3+7?= =?us-ascii?Q?am0Fo+TT/IVhYwFRroW1H0WUOyAMKrZH1ctnNvhgq1NdD6oUBTrc1Ha+EWw0?= =?us-ascii?Q?kXEGUUossRmNKjzAuwjKgD79vZupuzhZVJMWmKBbctWWch5L75g1iKwitQ2m?= =?us-ascii?Q?o0hVx0xAc+r+oNxNJRsYN5q0CTzc0OSD++AfhLREP3yMhyh6p/fDJw8fVsIp?= =?us-ascii?Q?38XD541/AWwwMCEezeq6Won5zB9wPc3xl9Cd1pRqFeLAM2DMWGJUmiXnSsxp?= =?us-ascii?Q?Whfc4U4Bf6dY4IsLAR3GSjBvorgl6V6GJZrPDEC8+k75Xle9luX5PH0OVyDe?= =?us-ascii?Q?8P+xwoYMKHqadQTMctkKZJY9uNJKdeD4tKhsWODLP73Qn0qcJVCtvR7AOJcc?= =?us-ascii?Q?sEbz1G4txguVuJiaE8SW6tml3XCR13Mv+7UWqAbup9ADsB/4PtTmNZwHjJHg?= =?us-ascii?Q?tX4YT4c7yNEU57TcITcXdCIoiI9E0orCg0Dc5HnaYYqIv3j4O1nr2TVv0Zb5?= =?us-ascii?Q?JajtkW6I20C67zv6GW92YWaSLD1Ow8aEQEgZYESphCQzID+l37kmeuxYJKgN?= =?us-ascii?Q?xKS3ZwbFnUYvZeTffIraUKAM1cMfVTQU5k2Hq7rTT23V0mja47eGSx7cVe0j?= =?us-ascii?Q?g00FAMbEZ6bwtMXHdvVkqEYFutT+t3NpHUKvlP/UC+yiWQ08zvFOOaGymMVt?= =?us-ascii?Q?B2pDiHaI36qzUfnrQH7AS02JA6YhiY+h4ERr2Zfpt7LMSxkEFBAzcCa1gnz2?= =?us-ascii?Q?+kZGkUFzb+8XJDSf4e0N+CFZJucoIcyrF6Wj3/pcTn1wnfiiJcrugzApWlWQ?= =?us-ascii?Q?ke4sEgEXn0E=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(376014)(1800799024)(7416014)(82310400026)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2024 11:16:49.7791 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6a9c0d2b-0676-48fa-b66f-08dcf4e68576 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E60.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB8597 Content-Type: text/plain; charset="utf-8" Prepare for the addition of RAPL core energy counter support. After making the rapl_model struct global, the rapl_msrs global variable isn't needed, so remove it. Signed-off-by: Dhananjay Ugwekar Reviewed-by: Gautham R. Shenoy Reviewed-by: Zhang Rui Tested-by: Zhang Rui --- arch/x86/events/rapl.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index ae8b450caa9b..e80b62cf9abc 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -150,7 +150,6 @@ static int rapl_pkg_hw_unit[NR_RAPL_PKG_DOMAINS] __read= _mostly; static struct rapl_pmus *rapl_pmus_pkg; static unsigned int rapl_pkg_cntr_mask; static u64 rapl_timer_ms; -static struct perf_msr *rapl_msrs; static struct rapl_model *rapl_model; =20 /* @@ -376,7 +375,7 @@ static int rapl_pmu_event_init(struct perf_event *event) return -EINVAL; =20 event->pmu_private =3D rapl_pmu; - event->hw.event_base =3D rapl_msrs[bit].msr; + event->hw.event_base =3D rapl_model->rapl_pkg_msrs[bit].msr; event->hw.config =3D cfg; event->hw.idx =3D bit; =20 @@ -805,9 +804,7 @@ static int __init rapl_pmu_init(void) =20 rapl_model =3D (struct rapl_model *) id->driver_data; =20 - rapl_msrs =3D rapl_model->rapl_pkg_msrs; - - rapl_pkg_cntr_mask =3D perf_msr_probe(rapl_msrs, PERF_RAPL_PKG_EVENTS_MAX, + rapl_pkg_cntr_mask =3D perf_msr_probe(rapl_model->rapl_pkg_msrs, PERF_RAP= L_PKG_EVENTS_MAX, false, (void *) &rapl_model->pkg_events); =20 ret =3D rapl_check_hw_unit(); --=20 2.34.1 From nobody Mon Nov 25 18:04:47 2024 Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2069.outbound.protection.outlook.com [40.107.244.69]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F3F681C0DF0; Fri, 25 Oct 2024 11:17:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.244.69 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729855037; cv=fail; b=a0l9N+L8Vz9FdW62rVsDTRpcps+RXJpRcmYiLMD3UjIIKcTdClVEQrgki/MlhKeL7ePWjmjjSaZQzOLuA4o1peKREiUYemf8VPSKB8e1G2LAwjL+ezy/wuMH4XOWe+xBWfgzPFcVj2K4ZmYTnNUU9V213uyf2GlyyQrGj508tug= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729855037; c=relaxed/simple; bh=DQmYqcsrgOfcArdRNpunEFfymyiZGPC6hw7nDglyoCk=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=tcuvkd8+jSsn1MLT98BTJ9T4Rd3pbhYrOhkqhSIXszFGl47jlzxdRhpuTm4SpjnST9DzJk4Sd8CZ5EFC2sr9tHyoWhTwyPqrwQQylojtfrI+YceWuDaUJ28axwtVY1ykXh9/+RQbIAPUrqEjPtgcNL8F+dDfW/gpZrYTVpVEomw= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=YAnQVKiE; arc=fail smtp.client-ip=40.107.244.69 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="YAnQVKiE" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=Oj7+MGcXx4MsQncAPX6yKtOpUpHY50Hnkrg3HX6Gq77EMaeFVFRhsCoTLHenqu/EonFekbUIgS0qcKcNXKOlsplEZHAG1h22Rl0fcxEwGbfJdX9iETRx3ZJTqnWdDkhqVfr6OMcMFtgnLVeEW001Qnpe6lEHxRsbG3hhLWOknMDY8TuSjIrhnsL6r0Gm912ByWMP3FQoG2ypY7jrUWhHpRt4zyATpisXtN+VgmmzAQSsiDwj63nI4yTML/xoX+frjhqgNCeJhugArJEfqeK1tIrJiDNOsX2zWT2mvYyp6YpEdbWbZ8MmI14kT+LljUENKgP/NuBrGyEZVX/Ugq73mw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=xtdfNHS/TOEDDD37toj8vqIYA0PlE7x/qtLte2HPhYE=; b=LKLg9/NFWn7NVrCYaUVmON5BSXeOZZPuLp5LE363f8LUjoBS3aAx+9y5q2SQVcTWHY8sDRHUUug5OsuNYG3fB0o3dyiziK3+lmcXBlEITXe0H/6YDGMS4nyO466WDksBCxmV6TRVrWpZkmszOJS7QKpfaTQTm9KrUsdSbAsVT6FjdsPIl+yrBJQlAtbRAL32XboYrLOYG8jWiFtU9+kWd00r38ZcfjndQ9s/8b6v1Jiwpf5E/VTgPc6j4oTdfKcLspbVbw8oySCRWeN/aNr9HyQ4WKRV0DZbDrhAe6CukrIKXFTkHC7c8+nSPCJyhcThG4f+0D/gLsw44PDL+2UYxA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=infradead.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=xtdfNHS/TOEDDD37toj8vqIYA0PlE7x/qtLte2HPhYE=; b=YAnQVKiEOukuRJri36G8+yaijr1PQWG1x9RSUxrwV58HGKUCQsQonobBRUxMCMkmUIhQSsPWkB9yguSl4J8an7+PsC85ZonrpsN1VpFSLVSyVZFshlNaU2EbqVm8Dk8dRo0PKIYDWXOhNSev1lvCDdImf5T+id3OxjnIUQphJhs= Received: from BN0PR08CA0008.namprd08.prod.outlook.com (2603:10b6:408:142::30) by DM6PR12MB4370.namprd12.prod.outlook.com (2603:10b6:5:2aa::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.21; Fri, 25 Oct 2024 11:17:09 +0000 Received: from BL6PEPF00020E5F.namprd04.prod.outlook.com (2603:10b6:408:142:cafe::ac) by BN0PR08CA0008.outlook.office365.com (2603:10b6:408:142::30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.19 via Frontend Transport; Fri, 25 Oct 2024 11:17:09 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL6PEPF00020E5F.mail.protection.outlook.com (10.167.249.20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8093.14 via Frontend Transport; Fri, 25 Oct 2024 11:17:08 +0000 Received: from shatadru.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 25 Oct 2024 06:17:02 -0500 From: Dhananjay Ugwekar To: , , , , , , , , , , , , , CC: , , , , , , , "Dhananjay Ugwekar" Subject: [PATCH v6 09/10] perf/x86/rapl: Move the cntr_mask to rapl_pmus struct Date: Fri, 25 Oct 2024 11:13:47 +0000 Message-ID: <20241025111348.3810-10-Dhananjay.Ugwekar@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> References: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E5F:EE_|DM6PR12MB4370:EE_ X-MS-Office365-Filtering-Correlation-Id: d9c5a49c-4544-4829-0a66-08dcf4e69088 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|376014|7416014|82310400026|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?aYiTbtXsq3hNG9qAvQgVEwfzf0vu3ZwuCD7SWBCFryzJRGShSrCPa3iApvke?= =?us-ascii?Q?cQiyDNaxeuqFe/ipAior6I4FI3U0poBGOW9M8aiSHoEdiztS2nckvcCVbkAP?= =?us-ascii?Q?d9nc5TAiaBjGl2KQJhd4MhgI4yURYbDr/JMqS5sdyH5G/UWFn2wo5f1axvDg?= =?us-ascii?Q?nclU4NHf8Vl4JQQYpCceibTVA8FEYMUO0Cjzy4VFy1ilSCdDwsuzFG5dUAHA?= =?us-ascii?Q?Pt/x4D2DKoPUDKxJkHe9of9wePmgUiqrtxss/mL4hC+xY0H/xOnGeWUgomJl?= =?us-ascii?Q?bArgo9ATQEO1isp+YnPBmK1XTzLVVFQ6xZrVpVyGR31WQEJQCXTzo8YSxFyd?= =?us-ascii?Q?w2AHwBP/vb43DBIlNnDBIcDrwazR5yK5nG93rGzsq0OtH9xmsnALC4/Q9Ivb?= =?us-ascii?Q?ziLpCycdcbF9MpQU2GjXz+xSaowHkbBCD6lMoL+B8t5NMaJZfdIvsyklgl7b?= =?us-ascii?Q?yFTmfYJJgkPQqNHzKIi+hH40o9kN13+4+pFr2zL1OiP/dZoSjJsZ5TqRE2Jn?= =?us-ascii?Q?3ivfMj+T7BWXAOPfbDobXrFbxiOiGzMtOWErG+aImmXL7tdpSi6/oNiBjN/7?= =?us-ascii?Q?3sxEqfdPWS3oM9B9biXIxvXo6BLnfJbpTBM9JYHvrd6cSoEm30lm0YENF6Tk?= =?us-ascii?Q?lYRJ+bWiiItMCQxcncrHIol5EZHzA1WHSEMJCZUdaGoknPyfl5VPWsqOJ85t?= =?us-ascii?Q?NP1D6RuS6hPT/Bh0Wm0EWgjHz4X9kIY5T5vLY1un5eetkjG8XdUP9+S6NC0x?= =?us-ascii?Q?C6xVcXZKWsMggotfCdt9j5u7K1DKAJRuN1Mk/LeJXmYvv0NG1Eu78qpxvGRY?= =?us-ascii?Q?6pHZi9z2cTEn58T9cxN+TEB8Lrwvn7UawZi89heAkQZXk9jYYOgbee2yjRaJ?= =?us-ascii?Q?Boitl+wxyTN1wyvbOQ1mMW+T76adDz1DvagM5UHlu3lAveWpBrdDzx8POD3O?= =?us-ascii?Q?DGjBA3aJJ/9PehoIRmpevkwOqy2CzixThlDHWaS4qiCy7pjifgk7ONLUk5hp?= =?us-ascii?Q?2sPU81GQCGudxW9a7uykxBahABg6HuAU6tYuZJ8xrtMWnD8AdPlXh+tHU3VD?= =?us-ascii?Q?jeLIVs4WUArkjhMbodj540jRgCUXaATWV4D7Jd4Ka7kmRxZ5Vn7Bxiy/ZGkq?= =?us-ascii?Q?mhYQKBDE85vO3q3b8aIm0pRhWJyxqIgvP52W44Iqbd8F6ykyhx+Qxszipo7b?= =?us-ascii?Q?HDHhIP20dJESGWDpmlYtHhByYeOPiZI3TZdDdkenKRW9+oTQX7GWdwvxyre9?= =?us-ascii?Q?qJnlS59JxX79+wpLKtRI0kyD3THRm7ymAMCAYlfSGSiEV7eF4ydUdZFeDmXf?= =?us-ascii?Q?QEwP0WNKPy1fdhOQTv3MDgWQQolFwChv9lFoXSO8FUptElWlEOEwuvinvDLU?= =?us-ascii?Q?dIXrbBMWUldHDMYnswpauUEopVTOZoxtKCRVmEqKh6pmzpy30cY1SNfnnqmZ?= =?us-ascii?Q?fAMQab8M0nc=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700013)(376014)(7416014)(82310400026)(1800799024)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2024 11:17:08.3632 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d9c5a49c-4544-4829-0a66-08dcf4e69088 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E5F.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4370 Content-Type: text/plain; charset="utf-8" Prepare for the addition of RAPL core energy counter support. Move cntr_mask to rapl_pmus struct instead of adding a new global cntr_mask for the new RAPL power_core PMU. This will also ensure that the second "core_cntr_mask" is only created if needed (i.e. in case of AMD CPUs). Signed-off-by: Dhananjay Ugwekar Reviewed-by: Gautham R. Shenoy Reviewed-by: Zhang Rui Tested-by: Zhang Rui --- arch/x86/events/rapl.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index e80b62cf9abc..d3acc70a3d31 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -129,6 +129,7 @@ struct rapl_pmu { struct rapl_pmus { struct pmu pmu; unsigned int nr_rapl_pmu; + unsigned int cntr_mask; struct rapl_pmu *rapl_pmu[] __counted_by(nr_rapl_pmu); }; =20 @@ -148,7 +149,6 @@ struct rapl_model { /* 1/2^hw_unit Joule */ static int rapl_pkg_hw_unit[NR_RAPL_PKG_DOMAINS] __read_mostly; static struct rapl_pmus *rapl_pmus_pkg; -static unsigned int rapl_pkg_cntr_mask; static u64 rapl_timer_ms; static struct rapl_model *rapl_model; =20 @@ -358,7 +358,7 @@ static int rapl_pmu_event_init(struct perf_event *event) bit =3D cfg - 1; =20 /* check event supported */ - if (!(rapl_pkg_cntr_mask & (1 << bit))) + if (!(rapl_pmus_pkg->cntr_mask & (1 << bit))) return -EINVAL; =20 /* unsupported modes and filters */ @@ -586,10 +586,10 @@ static void __init rapl_advertise(void) int i; =20 pr_info("API unit is 2^-32 Joules, %d fixed counters, %llu ms ovfl timer\= n", - hweight32(rapl_pkg_cntr_mask), rapl_timer_ms); + hweight32(rapl_pmus_pkg->cntr_mask), rapl_timer_ms); =20 for (i =3D 0; i < NR_RAPL_PKG_DOMAINS; i++) { - if (rapl_pkg_cntr_mask & (1 << i)) { + if (rapl_pmus_pkg->cntr_mask & (1 << i)) { pr_info("hw unit of domain %s 2^-%d Joules\n", rapl_pkg_domain_names[i], rapl_pkg_hw_unit[i]); } @@ -804,9 +804,6 @@ static int __init rapl_pmu_init(void) =20 rapl_model =3D (struct rapl_model *) id->driver_data; =20 - rapl_pkg_cntr_mask =3D perf_msr_probe(rapl_model->rapl_pkg_msrs, PERF_RAP= L_PKG_EVENTS_MAX, - false, (void *) &rapl_model->pkg_events); - ret =3D rapl_check_hw_unit(); if (ret) return ret; @@ -815,6 +812,10 @@ static int __init rapl_pmu_init(void) if (ret) return ret; =20 + rapl_pmus_pkg->cntr_mask =3D perf_msr_probe(rapl_model->rapl_pkg_msrs, + PERF_RAPL_PKG_EVENTS_MAX, false, + (void *) &rapl_model->pkg_events); + ret =3D perf_pmu_register(&rapl_pmus_pkg->pmu, "power", -1); if (ret) goto out; --=20 2.34.1 From nobody Mon Nov 25 18:04:47 2024 Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2072.outbound.protection.outlook.com [40.107.236.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 677D91F9EA1; Fri, 25 Oct 2024 11:17:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.236.72 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729855054; cv=fail; b=kIsmc2lk4ZUUs8Y4cMBC4IDVf9fwSfyiQ8WsyRktIP8Qe/zLSSksqbrBlIa4CfPoKEi7UyECLo3QqNmX1HtcFVTaBbyhOqyVxRsrLp6glk0R/ZFtp60uzsIKrqfS8AeFZ8h+MmqGlyYiHKw7tlZX2J3FVBaxyH0VskdwcDOyJ/8= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729855054; c=relaxed/simple; bh=UQFmXGBVWLQyrXAo5P2iJsex9h0NbHQaBxeeggVZTLE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=fqYUlO0mbAJyWUg1HXeB2MW1SX0m1ix8omKATijyrDgBJ9JbuPhzGyPvVMp7dQk3q13RaEuiKRHiriUihrzLuAmgZQwxFAYK//CuCbkU6fhNrvQ3gKKkHubgX7c+qVyh6NZfaQtI7jHCh54eKFCxUpEcxc+ZGMHL0FWYPjINk6g= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com; spf=fail smtp.mailfrom=amd.com; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b=4e/UsgP5; arc=fail smtp.client-ip=40.107.236.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=amd.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=amd.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=amd.com header.i=@amd.com header.b="4e/UsgP5" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=gUudwlajc+vhVim7ZPTUlDjAnhngUfEpWbDhfcUdOEQoXSrp+YaR3F5dt1EshH+d773S5+0RhKl251Jn0kvPgddZoltmaaTuKWGXV/SVTk9sAfQmsXQeQ+teFbSq54QK5nJBtfsLqfo9zqbtvtgzNtjoY/ZjmeDSA3CDlg6kHNBiVgr9l8BiMwmysNJ5b9rMz+lBQE88JgkgFRf+FqynvC+GntUTmnhdz3m+fGuIMKXAgR/4EBO7Zd/QLFkbMAPTiNtLeEdDeHcCXfLRbYVM/HOX8fIlcCQrXqUxJ1TG9uS6I+MoVDkvsuy0UOuk/rhLYVeYIgkRKZWMVlCRxbIFcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=CWGIdtphgUybql2H2vcEM9l+2kPm3KdKbzzcyfP37zE=; b=ZOOIeUImvdW0/hH6ICoVabkZYjROhYY9h1usaJ/9cha1YN87c0ojpFu9EtY3cYfrubzG0m8faOR0WuGirNWZuu9YIdeCpVJlqpKrwukT8g6WP4/BfSTQDtG8M9912y4v1TJUwxXJBtZGq0de5f/4NARfs7mj0Fv2oJTFMjKK8iawCpm4+IZnGIjKHXrvv5es01hDv2SdYfQ6zR6c+GQS1BeTu2fTK/Yf0JKy+58DNfRswlW1H5LxpgZKF98gf9dpX7986UP5Derbs22pbufrfQS+k6eyC7c8H19AJ8ZK9OCggzLDW1Y7LxJ9F9kY4AzSR2smgUTNLVdvDFd1neuDyA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=infradead.org smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=CWGIdtphgUybql2H2vcEM9l+2kPm3KdKbzzcyfP37zE=; b=4e/UsgP5PnrrLUt5CBmWi6FHz634RlpdH3XFYbyfAL6D8vHGgNPjuSqnZtU9aD/zJEChhUIaXxDVMl4+NOWaebI12ZkOgPTNoYePSk11t7ONWWJfvPEkY7J066XQztAR3kgPFLosBxA6LWfD+9X+cmMnQmih6jobPyCXUoJeWnc= Received: from BN0PR08CA0011.namprd08.prod.outlook.com (2603:10b6:408:142::33) by PH7PR12MB9068.namprd12.prod.outlook.com (2603:10b6:510:1f4::7) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.20; Fri, 25 Oct 2024 11:17:27 +0000 Received: from BL6PEPF00020E5F.namprd04.prod.outlook.com (2603:10b6:408:142:cafe::5f) by BN0PR08CA0011.outlook.office365.com (2603:10b6:408:142::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8093.19 via Frontend Transport; Fri, 25 Oct 2024 11:17:27 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by BL6PEPF00020E5F.mail.protection.outlook.com (10.167.249.20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8093.14 via Frontend Transport; Fri, 25 Oct 2024 11:17:27 +0000 Received: from shatadru.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Fri, 25 Oct 2024 06:17:20 -0500 From: Dhananjay Ugwekar To: , , , , , , , , , , , , , CC: , , , , , , , "Dhananjay Ugwekar" Subject: [PATCH v6 10/10] perf/x86/rapl: Add core energy counter support for AMD CPUs Date: Fri, 25 Oct 2024 11:13:48 +0000 Message-ID: <20241025111348.3810-11-Dhananjay.Ugwekar@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> References: <20241025111348.3810-1-Dhananjay.Ugwekar@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00020E5F:EE_|PH7PR12MB9068:EE_ X-MS-Office365-Filtering-Correlation-Id: b2b83bc7-3a3f-44a2-570b-08dcf4e69bc3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700013|7416014|1800799024|82310400026|921020; X-Microsoft-Antispam-Message-Info: =?us-ascii?Q?gUJIwxLlO+5abB2+lF+Sm4v/AEubqqTfc7cgYdzUBRFexLSbsghugCzmqQ9n?= =?us-ascii?Q?/c+rb9z2opLURHjCRY0E3/L+rvQx1tsgMKfISbGZoAhbYDqqzeJ/saJIsKw5?= =?us-ascii?Q?QnkGHt1IsZjVJiuPGrJwovWC69o92FiZ6hCBiQG3RKO+k0HkWkXLTqevB9hP?= =?us-ascii?Q?LqManHaeniwGwVcRax3ab/TqC153/gMakOQC5AKcFaxzY9OGjBPwDaXZ681x?= =?us-ascii?Q?TM5wTpIzdBlzW00g1JPy5zVNztQCZOwEAgG48xWHRnjWFXGZZ/6B7RpKsRWT?= =?us-ascii?Q?VH77/mk6Sp5z0ieUXdpRmYXw58qfNUIqMoHa1DEnnx6eXAJFigZ9/otFifcH?= =?us-ascii?Q?uQn143n0i42IgoNU6InTiSVXWMPc3WRLLJg3mFdbYjA6CJRdOXw7JvLCsXXM?= =?us-ascii?Q?gKK9u9HXMuZD/Ig1HfWV/aXCDqTkBLrNxoICIT4SIcsVkrD2veeWdREXpY0B?= =?us-ascii?Q?sxuxuOlpeLcwsfVRp9bQ0zEFI5l/M9r37hOWcyKJXUnkmD88F/bvbKJW/2LV?= =?us-ascii?Q?0usYuFk7e8aWkb8QCyzzrThjM9BOaU1YWh/ajPd6ZCtmNhP68GUZND8DnVQ0?= =?us-ascii?Q?uehZG16v5B3VeqPpG0FSF+sHpX0mXk3le5AVpKxDENFDBJqmDkKmaDj2AOJN?= =?us-ascii?Q?BXOclnSIzO0lpbo2oERFCLxJKEExXWtetxXn+C6G88V6RBI5J5dLcFRrM3aV?= =?us-ascii?Q?ctUtzbqKaTJOKYNKSJbI/HZzcmT/qI7LAH8mPLLNLklGOZWbdI9pkAaeb4ac?= =?us-ascii?Q?BFBJRDGh9JMyucUkYd+GPHqLlAvTKTXup3OcWR4kaXByHwarJp0hPdHLZNbA?= =?us-ascii?Q?CkYe9UXufuusesPs+mqeaUIypvw42WM4eniaUXTe9hhrJs2wdC2YNSyQMSJP?= =?us-ascii?Q?pVr6Icur03fXMp28cuI1z3Ol5NgpQebf0fcC5SVcppw6y1SU3MXSusArl0ba?= =?us-ascii?Q?09hZ/mRC+1ATnScF9vRsEQRuAHzv3lLPfqrHgjOjXfmI5vjppgFuHEyM8pKW?= =?us-ascii?Q?VzCzSVjRoW3pLh9VPf4v2BW2anO3zpEKRdAQLz1+InxJDkLyzCanMLMSwfnC?= =?us-ascii?Q?tIDbYTyBAZwugoVnlU7gfGuctN3R/iQvk406Zg34W4ndfXKlcZdPdB9psOvq?= =?us-ascii?Q?G1fSfF1rLluFHU2BuInPPjy0zHTsSWorCcug2CqtPkliEjj/WhBGzmI78Fuo?= =?us-ascii?Q?31YSnHdLWRbucssrjOtsueS3zhEC70e9dd8XaBHWL4jxaLYp5N+BWlbIr+jg?= =?us-ascii?Q?IDksPOZHV3RIcJM9Q1rFWGnHfirB1No9ov5WhzTNapCIuhUCHgyYnvqFXVXB?= =?us-ascii?Q?DDAub9zrU1o4hpauMpn9Dwus50FpBTUYCNRpglf+bA22MxsHVS4fxCBv/Fh5?= =?us-ascii?Q?uPISw0ZOF4lcvZxSC9gUMe6j2gA6iGBqHc/P5mkp8UMTryGz05d5evn7WhAM?= =?us-ascii?Q?M4nB4xmrYvQ=3D?= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700013)(7416014)(1800799024)(82310400026)(921020);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2024 11:17:27.1912 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b2b83bc7-3a3f-44a2-570b-08dcf4e69bc3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00020E5F.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB9068 Content-Type: text/plain; charset="utf-8" Add a new "power_core" PMU and "energy-core" event for monitoring=20 energy consumption by each individual core. The existing energy-cores=20 event aggregates the energy consumption of CPU cores at the package level.=20 This new event aligns with the AMD's per-core energy counters. Tested the package level and core level PMU counters with workloads pinned to different CPUs. Results with workload pinned to CPU 4 in core 4 on an AMD Zen4 Genoa machine: $ sudo perf stat --per-core -e power_core/energy-core/ -- taskset -c 4 stre= ss-ng --matrix 1 --timeout 5s stress-ng: info: [21250] setting to a 5 second run per stressor stress-ng: info: [21250] dispatching hogs: 1 matrix stress-ng: info: [21250] successful run completed in 5.00s Performance counter stats for 'system wide': S0-D0-C0 1 0.00 Joules power_core/energy-core/ S0-D0-C1 1 0.00 Joules power_core/energy-core/ S0-D0-C2 1 0.00 Joules power_core/energy-core/ S0-D0-C3 1 0.00 Joules power_core/energy-core/ S0-D0-C4 1 8.43 Joules power_core/energy-core/ S0-D0-C5 1 0.00 Joules power_core/energy-core/ S0-D0-C6 1 0.00 Joules power_core/energy-core/ S0-D0-C7 1 0.00 Joules power_core/energy-core/ S0-D1-C8 1 0.00 Joules power_core/energy-core/ S0-D1-C9 1 0.00 Joules power_core/energy-core/ S0-D1-C10 1 0.00 Joules power_core/energy-core/ Signed-off-by: Dhananjay Ugwekar Reviewed-by: Gautham R. Shenoy --- v6 changes: * Replaced the if-ladder in get_rapl_pmu_idx() with a switch case. (Gautham) * Added the error if condition in init_rapl_pmus(). * Modify the PMU name from "power_per_core" to "power_core" and event name from "event_per_core" to "event_core" --- arch/x86/events/rapl.c | 182 +++++++++++++++++++++++++++++++++-------- 1 file changed, 150 insertions(+), 32 deletions(-) diff --git a/arch/x86/events/rapl.c b/arch/x86/events/rapl.c index d3acc70a3d31..57cf15a19b7c 100644 --- a/arch/x86/events/rapl.c +++ b/arch/x86/events/rapl.c @@ -39,6 +39,10 @@ * event: rapl_energy_psys * perf code: 0x5 * + * core counter: consumption of a single physical core + * event: rapl_energy_core (power_core PMU) + * perf code: 0x1 + * * We manage those counters as free running (read-only). They may be * use simultaneously by other tools, such as turbostat. * @@ -81,6 +85,10 @@ enum perf_rapl_pkg_events { NR_RAPL_PKG_DOMAINS =3D PERF_RAPL_PKG_EVENTS_MAX, }; =20 +#define PERF_RAPL_CORE 0 /* single core */ +#define PERF_RAPL_CORE_EVENTS_MAX 1 +#define NR_RAPL_CORE_DOMAINS PERF_RAPL_CORE_EVENTS_MAX + static const char *const rapl_pkg_domain_names[NR_RAPL_PKG_DOMAINS] __init= const =3D { "pp0-core", "package", @@ -89,6 +97,8 @@ static const char *const rapl_pkg_domain_names[NR_RAPL_PK= G_DOMAINS] __initconst "psys", }; =20 +static const char *const rapl_core_domain_name __initconst =3D "core"; + /* * event code: LSB 8 bits, passed in attr->config * any other bit is reserved @@ -141,14 +151,18 @@ enum rapl_unit_quirk { =20 struct rapl_model { struct perf_msr *rapl_pkg_msrs; + struct perf_msr *rapl_core_msrs; unsigned long pkg_events; + unsigned long core_events; unsigned int msr_power_unit; enum rapl_unit_quirk unit_quirk; }; =20 /* 1/2^hw_unit Joule */ static int rapl_pkg_hw_unit[NR_RAPL_PKG_DOMAINS] __read_mostly; +static int rapl_core_hw_unit __read_mostly; static struct rapl_pmus *rapl_pmus_pkg; +static struct rapl_pmus *rapl_pmus_core; static u64 rapl_timer_ms; static struct rapl_model *rapl_model; =20 @@ -156,10 +170,18 @@ static struct rapl_model *rapl_model; * Helper function to get the correct topology id according to the * RAPL PMU scope. */ -static inline unsigned int get_rapl_pmu_idx(int cpu) +static inline unsigned int get_rapl_pmu_idx(int cpu, int scope) { - return rapl_pkg_pmu_is_pkg_scope() ? topology_logical_package_id(cpu) : - topology_logical_die_id(cpu); + switch (scope) { + case PERF_PMU_SCOPE_PKG: + return topology_logical_package_id(cpu); + case PERF_PMU_SCOPE_DIE: + return topology_logical_die_id(cpu); + case PERF_PMU_SCOPE_CORE: + return topology_logical_core_id(cpu); + default: + return -EINVAL; + } } =20 static inline u64 rapl_read_counter(struct perf_event *event) @@ -169,19 +191,20 @@ static inline u64 rapl_read_counter(struct perf_event= *event) return raw; } =20 -static inline u64 rapl_scale(u64 v, int cfg) +static inline u64 rapl_scale(u64 v, struct perf_event *event) { - if (cfg > NR_RAPL_PKG_DOMAINS) { - pr_warn("Invalid domain %d, failed to scale data\n", cfg); - return v; - } + int hw_unit =3D rapl_pkg_hw_unit[event->hw.config - 1]; + + if (event->pmu->scope =3D=3D PERF_PMU_SCOPE_CORE) + hw_unit =3D rapl_core_hw_unit; + /* * scale delta to smallest unit (1/2^32) * users must then scale back: count * 1/(1e9*2^32) to get Joules * or use ldexp(count, -32). * Watts =3D Joules/Time delta */ - return v << (32 - rapl_pkg_hw_unit[cfg - 1]); + return v << (32 - hw_unit); } =20 static u64 rapl_event_update(struct perf_event *event) @@ -208,7 +231,7 @@ static u64 rapl_event_update(struct perf_event *event) delta =3D (new_raw_count << shift) - (prev_raw_count << shift); delta >>=3D shift; =20 - sdelta =3D rapl_scale(delta, event->hw.config); + sdelta =3D rapl_scale(delta, event); =20 local64_add(sdelta, &event->count); =20 @@ -337,12 +360,13 @@ static void rapl_pmu_event_del(struct perf_event *eve= nt, int flags) static int rapl_pmu_event_init(struct perf_event *event) { u64 cfg =3D event->attr.config & RAPL_EVENT_MASK; - int bit, rapl_pmu_idx, ret =3D 0; + int bit, rapl_pmus_scope, rapl_pmu_idx, ret =3D 0; struct rapl_pmu *rapl_pmu; + struct rapl_pmus *rapl_pmus; =20 - /* only look at RAPL events */ - if (event->attr.type !=3D rapl_pmus_pkg->pmu.type) - return -ENOENT; + /* unsupported modes and filters */ + if (event->attr.sample_period) /* no sampling */ + return -EINVAL; =20 /* check only supported bits are set */ if (event->attr.config & ~RAPL_EVENT_MASK) @@ -351,31 +375,49 @@ static int rapl_pmu_event_init(struct perf_event *eve= nt) if (event->cpu < 0) return -EINVAL; =20 - if (!cfg || cfg >=3D NR_RAPL_PKG_DOMAINS + 1) + rapl_pmus =3D container_of(event->pmu, struct rapl_pmus, pmu); + if (!rapl_pmus) return -EINVAL; - - cfg =3D array_index_nospec((long)cfg, NR_RAPL_PKG_DOMAINS + 1); - bit =3D cfg - 1; - - /* check event supported */ - if (!(rapl_pmus_pkg->cntr_mask & (1 << bit))) + rapl_pmus_scope =3D rapl_pmus->pmu.scope; + + if (rapl_pmus_scope =3D=3D PERF_PMU_SCOPE_PKG || rapl_pmus_scope =3D=3D P= ERF_PMU_SCOPE_DIE) { + /* only look at RAPL package events */ + if (event->attr.type !=3D rapl_pmus_pkg->pmu.type) + return -ENOENT; + + cfg =3D array_index_nospec((long)cfg, NR_RAPL_PKG_DOMAINS + 1); + if (!cfg || cfg >=3D NR_RAPL_PKG_DOMAINS + 1) + return -EINVAL; + + bit =3D cfg - 1; + event->hw.event_base =3D rapl_model->rapl_pkg_msrs[bit].msr; + } else if (rapl_pmus_scope =3D=3D PERF_PMU_SCOPE_CORE) { + /* only look at RAPL core events */ + if (event->attr.type !=3D rapl_pmus_core->pmu.type) + return -ENOENT; + + cfg =3D array_index_nospec((long)cfg, NR_RAPL_CORE_DOMAINS + 1); + if (!cfg || cfg >=3D NR_RAPL_PKG_DOMAINS + 1) + return -EINVAL; + + bit =3D cfg - 1; + event->hw.event_base =3D rapl_model->rapl_core_msrs[bit].msr; + } else return -EINVAL; =20 - /* unsupported modes and filters */ - if (event->attr.sample_period) /* no sampling */ + /* check event supported */ + if (!(rapl_pmus->cntr_mask & (1 << bit))) return -EINVAL; =20 - rapl_pmu_idx =3D get_rapl_pmu_idx(event->cpu); - if (rapl_pmu_idx >=3D rapl_pmus_pkg->nr_rapl_pmu) + rapl_pmu_idx =3D get_rapl_pmu_idx(event->cpu, rapl_pmus_scope); + if (rapl_pmu_idx >=3D rapl_pmus->nr_rapl_pmu) return -EINVAL; - /* must be done before validate_group */ - rapl_pmu =3D rapl_pmus_pkg->rapl_pmu[rapl_pmu_idx]; + rapl_pmu =3D rapl_pmus->rapl_pmu[rapl_pmu_idx]; if (!rapl_pmu) return -EINVAL; =20 event->pmu_private =3D rapl_pmu; - event->hw.event_base =3D rapl_model->rapl_pkg_msrs[bit].msr; event->hw.config =3D cfg; event->hw.idx =3D bit; =20 @@ -392,12 +434,14 @@ RAPL_EVENT_ATTR_STR(energy-pkg , rapl_pkg, "event= =3D0x02"); RAPL_EVENT_ATTR_STR(energy-ram , rapl_ram, "event=3D0x03"); RAPL_EVENT_ATTR_STR(energy-gpu , rapl_gpu, "event=3D0x04"); RAPL_EVENT_ATTR_STR(energy-psys, rapl_psys, "event=3D0x05"); +RAPL_EVENT_ATTR_STR(energy-core, rapl_core, "event=3D0x01"); =20 RAPL_EVENT_ATTR_STR(energy-cores.unit, rapl_cores_unit, "Joules"); RAPL_EVENT_ATTR_STR(energy-pkg.unit , rapl_pkg_unit, "Joules"); RAPL_EVENT_ATTR_STR(energy-ram.unit , rapl_ram_unit, "Joules"); RAPL_EVENT_ATTR_STR(energy-gpu.unit , rapl_gpu_unit, "Joules"); RAPL_EVENT_ATTR_STR(energy-psys.unit, rapl_psys_unit, "Joules"); +RAPL_EVENT_ATTR_STR(energy-core.unit, rapl_core_unit, "Joules"); =20 /* * we compute in 0.23 nJ increments regardless of MSR @@ -407,6 +451,7 @@ RAPL_EVENT_ATTR_STR(energy-pkg.scale, rapl_pkg_scal= e, "2.3283064365386962890 RAPL_EVENT_ATTR_STR(energy-ram.scale, rapl_ram_scale, "2.3283064365386= 962890625e-10"); RAPL_EVENT_ATTR_STR(energy-gpu.scale, rapl_gpu_scale, "2.3283064365386= 962890625e-10"); RAPL_EVENT_ATTR_STR(energy-psys.scale, rapl_psys_scale, "2.3283064365386= 962890625e-10"); +RAPL_EVENT_ATTR_STR(energy-core.scale, rapl_core_scale, "2.3283064365386= 962890625e-10"); =20 /* * There are no default events, but we need to create @@ -439,6 +484,12 @@ static const struct attribute_group *rapl_attr_groups[= ] =3D { NULL, }; =20 +static const struct attribute_group *rapl_core_attr_groups[] =3D { + &rapl_pmu_format_group, + &rapl_pmu_events_group, + NULL, +}; + static struct attribute *rapl_events_cores[] =3D { EVENT_PTR(rapl_cores), EVENT_PTR(rapl_cores_unit), @@ -499,6 +550,18 @@ static struct attribute_group rapl_events_psys_group = =3D { .attrs =3D rapl_events_psys, }; =20 +static struct attribute *rapl_events_core[] =3D { + EVENT_PTR(rapl_core), + EVENT_PTR(rapl_core_unit), + EVENT_PTR(rapl_core_scale), + NULL, +}; + +static struct attribute_group rapl_events_core_group =3D { + .name =3D "events", + .attrs =3D rapl_events_core, +}; + static bool test_msr(int idx, void *data) { return test_bit(idx, (unsigned long *) data); @@ -536,6 +599,11 @@ static struct perf_msr amd_rapl_pkg_msrs[] =3D { [PERF_RAPL_PSYS] =3D { 0, &rapl_events_psys_group, NULL, false, 0 }, }; =20 +static struct perf_msr amd_rapl_core_msrs[] =3D { + [PERF_RAPL_CORE] =3D { MSR_AMD_CORE_ENERGY_STATUS, &rapl_events_core_grou= p, + test_msr, false, RAPL_MSR_MASK }, +}; + static int rapl_check_hw_unit(void) { u64 msr_rapl_power_unit_bits; @@ -547,6 +615,8 @@ static int rapl_check_hw_unit(void) for (i =3D 0; i < NR_RAPL_PKG_DOMAINS; i++) rapl_pkg_hw_unit[i] =3D (msr_rapl_power_unit_bits >> 8) & 0x1FULL; =20 + rapl_core_hw_unit =3D (msr_rapl_power_unit_bits >> 8) & 0x1FULL; + switch (rapl_model->unit_quirk) { /* * DRAM domain on HSW server and KNL has fixed energy unit which can be @@ -565,7 +635,6 @@ static int rapl_check_hw_unit(void) break; } =20 - /* * Calculate the timer rate: * Use reference of 200W for scaling the timeout to avoid counter @@ -584,9 +653,13 @@ static int rapl_check_hw_unit(void) static void __init rapl_advertise(void) { int i; + int num_counters =3D hweight32(rapl_pmus_pkg->cntr_mask); + + if (rapl_pmus_core) + num_counters +=3D hweight32(rapl_pmus_core->cntr_mask); =20 pr_info("API unit is 2^-32 Joules, %d fixed counters, %llu ms ovfl timer\= n", - hweight32(rapl_pmus_pkg->cntr_mask), rapl_timer_ms); + num_counters, rapl_timer_ms); =20 for (i =3D 0; i < NR_RAPL_PKG_DOMAINS; i++) { if (rapl_pmus_pkg->cntr_mask & (1 << i)) { @@ -594,6 +667,10 @@ static void __init rapl_advertise(void) rapl_pkg_domain_names[i], rapl_pkg_hw_unit[i]); } } + + if (rapl_pmus_core && (rapl_pmus_core->cntr_mask & (1 << PERF_RAPL_CORE))) + pr_info("hw unit of domain %s 2^-%d Joules\n", + rapl_core_domain_name, rapl_core_hw_unit); } =20 static void cleanup_rapl_pmus(struct rapl_pmus *rapl_pmus) @@ -614,6 +691,10 @@ static const struct attribute_group *rapl_attr_update[= ] =3D { NULL, }; =20 +static const struct attribute_group *rapl_core_attr_update[] =3D { + &rapl_events_core_group, +}; + static int __init init_rapl_pmu(struct rapl_pmus *rapl_pmus) { struct rapl_pmu *rapl_pmu; @@ -640,13 +721,22 @@ static int __init init_rapl_pmu(struct rapl_pmus *rap= l_pmus) return -ENOMEM; } =20 -static int __init init_rapl_pmus(struct rapl_pmus **rapl_pmus_ptr, int rap= l_pmu_scope) +static int __init init_rapl_pmus(struct rapl_pmus **rapl_pmus_ptr, int rap= l_pmu_scope, + const struct attribute_group **rapl_attr_groups, + const struct attribute_group **rapl_attr_update) { int nr_rapl_pmu =3D topology_max_packages(); struct rapl_pmus *rapl_pmus; =20 + /* + * rapl_pmu_scope must be either PKG, DIE or CORE + */ if (rapl_pmu_scope =3D=3D PERF_PMU_SCOPE_DIE) nr_rapl_pmu *=3D topology_max_dies_per_package(); + else if (rapl_pmu_scope =3D=3D PERF_PMU_SCOPE_CORE) + nr_rapl_pmu *=3D topology_num_cores_per_package(); + else if (rapl_pmu_scope !=3D PERF_PMU_SCOPE_PKG) + return -EINVAL; =20 rapl_pmus =3D kzalloc(struct_size(rapl_pmus, rapl_pmu, nr_rapl_pmu), GFP_= KERNEL); if (!rapl_pmus) @@ -735,8 +825,10 @@ static struct rapl_model model_spr =3D { =20 static struct rapl_model model_amd_hygon =3D { .pkg_events =3D BIT(PERF_RAPL_PKG), + .core_events =3D BIT(PERF_RAPL_CORE), .msr_power_unit =3D MSR_AMD_RAPL_POWER_UNIT, .rapl_pkg_msrs =3D amd_rapl_pkg_msrs, + .rapl_core_msrs =3D amd_rapl_core_msrs, }; =20 static const struct x86_cpu_id rapl_model_match[] __initconst =3D { @@ -808,7 +900,8 @@ static int __init rapl_pmu_init(void) if (ret) return ret; =20 - ret =3D init_rapl_pmus(&rapl_pmus_pkg, rapl_pkg_pmu_scope); + ret =3D init_rapl_pmus(&rapl_pmus_pkg, rapl_pkg_pmu_scope, rapl_attr_grou= ps, + rapl_attr_update); if (ret) return ret; =20 @@ -820,6 +913,27 @@ static int __init rapl_pmu_init(void) if (ret) goto out; =20 + if (rapl_model->core_events) { + ret =3D init_rapl_pmus(&rapl_pmus_core, PERF_PMU_SCOPE_CORE, + rapl_core_attr_groups, + rapl_core_attr_update); + if (ret) { + pr_warn("power-core PMU initialization failed (%d)\n", ret); + goto core_init_failed; + } + + rapl_pmus_core->cntr_mask =3D perf_msr_probe(rapl_model->rapl_core_msrs, + PERF_RAPL_CORE_EVENTS_MAX, false, + (void *) &rapl_model->core_events); + + ret =3D perf_pmu_register(&rapl_pmus_core->pmu, "power_core", -1); + if (ret) { + pr_warn("power-core PMU registration failed (%d)\n", ret); + cleanup_rapl_pmus(rapl_pmus_core); + } + } + +core_init_failed: rapl_advertise(); return 0; =20 @@ -832,6 +946,10 @@ module_init(rapl_pmu_init); =20 static void __exit intel_rapl_exit(void) { + if (rapl_pmus_core) { + perf_pmu_unregister(&rapl_pmus_core->pmu); + cleanup_rapl_pmus(rapl_pmus_core); + } perf_pmu_unregister(&rapl_pmus_pkg->pmu); cleanup_rapl_pmus(rapl_pmus_pkg); } --=20 2.34.1