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charset="utf-8" When the mutexes were reworked to guards, the caching of the oversampling_ratio values was removed by accident. The main effect of this change is that, after setting the oversampling_ratio value, reading it back would result in the initial value (of 1). The value would get sent to the device correctly though. Fixes 2956979dbd0d: ("iio: adc: ad7606: switch mutexes to guard") Signed-off-by: Alexandru Ardelean Reviewed-by: David Lechner --- drivers/iio/adc/ad7606.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index 0e830a17fc19..ae49f4ba50d9 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -753,6 +753,7 @@ static int ad7606_write_raw(struct iio_dev *indio_dev, ret =3D st->write_os(indio_dev, i); if (ret < 0) return ret; + st->oversampling =3D st->oversampling_avail[i]; =20 return 0; case IIO_CHAN_INFO_SAMP_FREQ: --=20 2.46.1 From nobody Mon Nov 25 17:25:35 2024 Received: from mail-ej1-f53.google.com (mail-ej1-f53.google.com [209.85.218.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 917311D9A5B for ; Fri, 25 Oct 2024 09:59:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.53 ARC-Seal: i=1; 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Fri, 25 Oct 2024 02:59:51 -0700 (PDT) Received: from localhost.localdomain ([188.27.128.50]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9b1f02951esm51737266b.71.2024.10.25.02.59.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Oct 2024 02:59:51 -0700 (PDT) From: Alexandru Ardelean To: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: jic23@kernel.org, krzk+dt@kernel.org, robh@kernel.org, lars@metafoo.de, michael.hennerich@analog.com, gstols@baylibre.com, dlechner@baylibre.com, conor.dooley@microchip.com, Alexandru Ardelean Subject: [PATCH v2 2/5] iio: adc: ad7606: use realbits for sign-extending in scan_direct Date: Fri, 25 Oct 2024 12:59:36 +0300 Message-ID: <20241025095939.271811-3-aardelean@baylibre.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20241025095939.271811-1-aardelean@baylibre.com> References: <20241025095939.271811-1-aardelean@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently the 'ad7606' driver supports parts with 18 and 16 bits resolutions. But when adding support for AD7607 (which has a 14-bit resolution) we should check for the 'realbits' field, to be able to sign-extend correctly. Signed-off-by: Alexandru Ardelean Reviewed-by: David Lechner --- drivers/iio/adc/ad7606.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index ae49f4ba50d9..effb98b4dc77 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -568,7 +568,7 @@ static int ad7606_scan_direct(struct iio_dev *indio_dev= , unsigned int ch, int *val) { struct ad7606_state *st =3D iio_priv(indio_dev); - unsigned int storagebits =3D st->chip_info->channels[1].scan_type.storage= bits; + unsigned int realbits =3D st->chip_info->channels[1].scan_type.realbits; const struct iio_chan_spec *chan; int ret; =20 @@ -603,15 +603,15 @@ static int ad7606_scan_direct(struct iio_dev *indio_d= ev, unsigned int ch, =20 chan =3D &indio_dev->channels[ch + 1]; if (chan->scan_type.sign =3D=3D 'u') { - if (storagebits > 16) + if (realbits > 16) *val =3D st->data.buf32[ch]; else *val =3D st->data.buf16[ch]; } else { - if (storagebits > 16) - *val =3D sign_extend32(st->data.buf32[ch], 17); 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Fri, 25 Oct 2024 02:59:53 -0700 (PDT) From: Alexandru Ardelean To: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: jic23@kernel.org, krzk+dt@kernel.org, robh@kernel.org, lars@metafoo.de, michael.hennerich@analog.com, gstols@baylibre.com, dlechner@baylibre.com, conor.dooley@microchip.com, Alexandru Ardelean Subject: [PATCH v2 3/5] iio: adc: ad7606: rework scale-available to be static Date: Fri, 25 Oct 2024 12:59:37 +0300 Message-ID: <20241025095939.271811-4-aardelean@baylibre.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20241025095939.271811-1-aardelean@baylibre.com> References: <20241025095939.271811-1-aardelean@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The main driver for this change is the AD7607 part, which has a scale of "1.220703" for the =C2=B110V range. The AD7607 has a resolution of 14-bits. So, just adding the scale-available list for that part would require some quirks to handle just that scale value. But to do it more neatly, the best approach is to rework the scale available lists to have the same format as it is returned to userspace. That way, we can also get rid of the allocation for the 'scale_avail_show' array. Signed-off-by: Alexandru Ardelean Reviewed-by: David Lechner --- drivers/iio/adc/ad7606.c | 106 ++++++++++++++++++--------------------- drivers/iio/adc/ad7606.h | 6 +-- 2 files changed, 50 insertions(+), 62 deletions(-) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index effb98b4dc77..94756bb87b95 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -33,42 +33,44 @@ =20 /* * Scales are computed as 5000/32768 and 10000/32768 respectively, - * so that when applied to the raw values they provide mV values + * so that when applied to the raw values they provide mV values. + * The scale arrays are kept as IIO_VAL_INT_PLUS_MICRO, so index + * X is the integer part and X + 1 is the fractional part. */ -static const unsigned int ad7606_16bit_hw_scale_avail[2] =3D { - 152588, 305176 +static const unsigned int ad7606_16bit_hw_scale_avail[2][2] =3D { + { 0, 152588 }, { 0, 305176 } }; =20 -static const unsigned int ad7606_18bit_hw_scale_avail[2] =3D { - 38147, 76294 +static const unsigned int ad7606_18bit_hw_scale_avail[2][2] =3D { + { 0, 38147 }, { 0, 76294 } }; =20 -static const unsigned int ad7606c_16bit_single_ended_unipolar_scale_avail[= 3] =3D { - 76294, 152588, 190735, +static const unsigned int ad7606c_16bit_single_ended_unipolar_scale_avail[= 3][2] =3D { + { 0, 76294 }, { 0, 152588 }, { 0, 190735 } }; =20 -static const unsigned int ad7606c_16bit_single_ended_bipolar_scale_avail[5= ] =3D { - 76294, 152588, 190735, 305176, 381470 +static const unsigned int ad7606c_16bit_single_ended_bipolar_scale_avail[5= ][2] =3D { + { 0, 76294 }, { 0, 152588 }, { 0, 190735 }, { 0, 305176 }, { 0, 381470 } }; =20 -static const unsigned int ad7606c_16bit_differential_bipolar_scale_avail[4= ] =3D { - 152588, 305176, 381470, 610352 +static const unsigned int ad7606c_16bit_differential_bipolar_scale_avail[4= ][2] =3D { + { 0, 152588 }, { 0, 305176 }, { 0, 381470 }, { 0, 610352 } }; =20 -static const unsigned int ad7606c_18bit_single_ended_unipolar_scale_avail[= 3] =3D { - 19073, 38147, 47684 +static const unsigned int ad7606c_18bit_single_ended_unipolar_scale_avail[= 3][2] =3D { + { 0, 19073 }, { 0, 38147 }, { 0, 47684 } }; =20 -static const unsigned int ad7606c_18bit_single_ended_bipolar_scale_avail[5= ] =3D { - 19073, 38147, 47684, 76294, 95367 +static const unsigned int ad7606c_18bit_single_ended_bipolar_scale_avail[5= ][2] =3D { + { 0, 19073 }, { 0, 38147 }, { 0, 47684 }, { 0, 76294 }, { 0, 95367 } }; =20 -static const unsigned int ad7606c_18bit_differential_bipolar_scale_avail[4= ] =3D { - 38147, 76294, 95367, 152588 +static const unsigned int ad7606c_18bit_differential_bipolar_scale_avail[4= ][2] =3D { + { 0, 38147 }, { 0, 76294 }, { 0, 95367 }, { 0, 152588 } }; =20 -static const unsigned int ad7606_16bit_sw_scale_avail[3] =3D { - 76293, 152588, 305176 +static const unsigned int ad7606_16bit_sw_scale_avail[3][2] =3D { + { 0, 76293 }, { 0, 152588 }, { 0, 305176 } }; =20 static const unsigned int ad7606_oversampling_avail[7] =3D { @@ -649,8 +651,8 @@ static int ad7606_read_raw(struct iio_dev *indio_dev, if (st->sw_mode_en) ch =3D chan->address; cs =3D &st->chan_scales[ch]; - *val =3D 0; - *val2 =3D cs->scale_avail[cs->range]; + *val =3D cs->scale_avail[cs->range][0]; + *val2 =3D cs->scale_avail[cs->range][1]; return IIO_VAL_INT_PLUS_MICRO; case IIO_CHAN_INFO_OVERSAMPLING_RATIO: *val =3D st->oversampling; @@ -667,21 +669,6 @@ static int ad7606_read_raw(struct iio_dev *indio_dev, return -EINVAL; } =20 -static ssize_t ad7606_show_avail(char *buf, const unsigned int *vals, - unsigned int n, bool micros) -{ - size_t len =3D 0; - int i; - - for (i =3D 0; i < n; i++) { - len +=3D scnprintf(buf + len, PAGE_SIZE - len, - micros ? "0.%06u " : "%u ", vals[i]); - } - buf[len - 1] =3D '\n'; - - return len; -} - static ssize_t in_voltage_scale_available_show(struct device *dev, struct device_attribute *attr, char *buf) @@ -689,8 +676,16 @@ static ssize_t in_voltage_scale_available_show(struct = device *dev, struct iio_dev *indio_dev =3D dev_to_iio_dev(dev); struct ad7606_state *st =3D iio_priv(indio_dev); struct ad7606_chan_scale *cs =3D &st->chan_scales[0]; + const unsigned int (*vals)[2] =3D cs->scale_avail; + unsigned int i; + size_t len =3D 0; =20 - return ad7606_show_avail(buf, cs->scale_avail, cs->num_scales, true); + for (i =3D 0; i < cs->num_scales; i++) + len +=3D scnprintf(buf + len, PAGE_SIZE - len, "%u.%06u ", + vals[i][0], vals[i][1]); + buf[len - 1] =3D '\n'; + + return len; } =20 static IIO_DEVICE_ATTR_RO(in_voltage_scale_available, 0); @@ -728,6 +723,7 @@ static int ad7606_write_raw(struct iio_dev *indio_dev, long mask) { struct ad7606_state *st =3D iio_priv(indio_dev); + unsigned int scale_avail_uv[AD760X_MAX_SCALES]; struct ad7606_chan_scale *cs; int i, ret, ch =3D 0; =20 @@ -738,7 +734,12 @@ static int ad7606_write_raw(struct iio_dev *indio_dev, if (st->sw_mode_en) ch =3D chan->address; cs =3D &st->chan_scales[ch]; - i =3D find_closest(val2, cs->scale_avail, cs->num_scales); + for (i =3D 0; i < cs->num_scales; i++) { + scale_avail_uv[i] =3D cs->scale_avail[i][0] * MICRO + + cs->scale_avail[i][1]; + } + val =3D (val * MICRO) + val2; + i =3D find_closest(val, scale_avail_uv, cs->num_scales); ret =3D st->write_scale(indio_dev, ch, i + cs->reg_offset); if (ret < 0) return ret; @@ -771,9 +772,15 @@ static ssize_t ad7606_oversampling_ratio_avail(struct = device *dev, { struct iio_dev *indio_dev =3D dev_to_iio_dev(dev); struct ad7606_state *st =3D iio_priv(indio_dev); + const unsigned int *vals =3D st->oversampling_avail; + unsigned int i; + size_t len =3D 0; =20 - return ad7606_show_avail(buf, st->oversampling_avail, - st->num_os_ratios, false); + for (i =3D 0; i < st->num_os_ratios; i++) + len +=3D scnprintf(buf + len, PAGE_SIZE - len, "%u ", vals[i]); + buf[len - 1] =3D '\n'; + + return len; } =20 static IIO_DEVICE_ATTR(oversampling_ratio_available, 0444, @@ -927,8 +934,8 @@ static int ad7606_read_avail(struct iio_dev *indio_dev, ch =3D chan->address; =20 cs =3D &st->chan_scales[ch]; - *vals =3D cs->scale_avail_show; - *length =3D cs->num_scales * 2; + *vals =3D (int *)cs->scale_avail; + *length =3D cs->num_scales; *type =3D IIO_VAL_INT_PLUS_MICRO; =20 return IIO_AVAIL_LIST; @@ -1051,24 +1058,9 @@ static int ad7606_chan_scales_setup(struct iio_dev *= indio_dev) indio_dev->channels =3D chans; =20 for (ch =3D 0; ch < num_channels; ch++) { - struct ad7606_chan_scale *cs; - int i; - ret =3D st->chip_info->scale_setup_cb(st, &chans[ch + 1], ch); if (ret) return ret; - - cs =3D &st->chan_scales[ch]; - - if (cs->num_scales * 2 > AD760X_MAX_SCALE_SHOW) - return dev_err_probe(st->dev, -ERANGE, - "Driver error: scale range too big"); - - /* Generate a scale_avail list for showing to userspace */ - for (i =3D 0; i < cs->num_scales; i++) { - cs->scale_avail_show[i * 2] =3D 0; - cs->scale_avail_show[i * 2 + 1] =3D cs->scale_avail[i]; - } } =20 return 0; diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index 2c629a15cc33..32c6f776c5df 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -103,8 +103,6 @@ struct ad7606_chip_info { /** * struct ad7606_chan_scale - channel scale configuration * @scale_avail pointer to the array which stores the available scales - * @scale_avail_show a duplicate of 'scale_avail' which is readily formatt= ed - * such that it can be read via the 'read_avail' hook * @num_scales number of elements stored in the scale_avail array * @range voltage range selection, selects which scale to apply * @reg_offset offset for the register value, to be applied when @@ -112,9 +110,7 @@ struct ad7606_chip_info { */ struct ad7606_chan_scale { #define AD760X_MAX_SCALES 16 -#define AD760X_MAX_SCALE_SHOW (AD760X_MAX_SCALES * 2) - const unsigned int *scale_avail; - int scale_avail_show[AD760X_MAX_SCALE_SHOW]; + const unsigned int (*scale_avail)[2]; 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Fri, 25 Oct 2024 02:59:55 -0700 (PDT) From: Alexandru Ardelean To: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Cc: jic23@kernel.org, krzk+dt@kernel.org, robh@kernel.org, lars@metafoo.de, michael.hennerich@analog.com, gstols@baylibre.com, dlechner@baylibre.com, conor.dooley@microchip.com, Alexandru Ardelean Subject: [PATCH v2 4/5] dt-bindings: iio: adc: adi,ad7606: document AD760{7,8,9} parts Date: Fri, 25 Oct 2024 12:59:38 +0300 Message-ID: <20241025095939.271811-5-aardelean@baylibre.com> X-Mailer: git-send-email 2.46.1 In-Reply-To: <20241025095939.271811-1-aardelean@baylibre.com> References: <20241025095939.271811-1-aardelean@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This change adds the AD7607, AD7608 & AD7609 parts to the binding doc of the ad7606 driver. Acked-by: Conor Dooley Signed-off-by: Alexandru Ardelean Reviewed-by: David Lechner --- .../devicetree/bindings/iio/adc/adi,ad7606.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml b/Do= cumentation/devicetree/bindings/iio/adc/adi,ad7606.yaml index 0a612844029a..ab5881d0d017 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml @@ -16,6 +16,9 @@ description: | https://www.analog.com/media/en/technical-documentation/data-sheets/AD76= 06B.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/ad76= 06c-16.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/ad76= 06c-18.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/ad76= 07.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/ad76= 08.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/ad76= 09.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD76= 16.pdf =20 properties: @@ -28,6 +31,9 @@ properties: - adi,ad7606b - adi,ad7606c-16 - adi,ad7606c-18 + - adi,ad7607 + - adi,ad7608 + - adi,ad7609 - adi,ad7616 =20 reg: @@ -250,6 +256,9 @@ allOf: - adi,ad7606-4 - adi,ad7606-6 - adi,ad7606-8 + - adi,ad7607 + - adi,ad7608 + - adi,ad7609 then: properties: adi,sw-mode: false --=20 2.46.1 From nobody Mon Nov 25 17:25:35 2024 Received: from mail-ej1-f49.google.com (mail-ej1-f49.google.com [209.85.218.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 08A831F5839 for ; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable The AD7607, AD7608 and AD7609 are some older parts of the AD7606 family. They are hardware-only, meaning that they don't have any registers accessible via SPI or Parallel interface. They are more similar to the AD7605-4 part, which is supported by the 'ad7606' driver, and are configurable via GPIOs. Like the AD7605-4 part, all 3 parts have 2 CONVST (Conversion Start) pins (CONVST A and CONVST B). But in practice, these should be tied together to make reading of samples easier via a serial line. The AD7607 has an 14-bit resolution and AD7608 & AD7609 have an 18-bit resolution. The main difference between the AD7608 & AD7609 is that the AD7609 has a larger range (=C2=B110V & =C2=B120V) vs the =C2=B15V & =C2=B11= 0V ranges for AD7608. However, unlike AD7605-4 part, these 3 parts have oversampling which is configurable (like for the AD7606 in HW-mode) via GPIOs. Datasheet: https://www.analog.com/media/en/technical-documentation/data-she= ets/ad7607.pdf Datasheet: https://www.analog.com/media/en/technical-documentation/data-she= ets/ad7608.pdf Datasheet: https://www.analog.com/media/en/technical-documentation/data-she= ets/ad7609.pdf Signed-off-by: Alexandru Ardelean Reviewed-by: David Lechner --- drivers/iio/adc/ad7606.c | 104 +++++++++++++++++++++++++++++++++++ drivers/iio/adc/ad7606.h | 3 + drivers/iio/adc/ad7606_par.c | 6 ++ drivers/iio/adc/ad7606_spi.c | 42 ++++++++++++++ 4 files changed, 155 insertions(+) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index 94756bb87b95..8b2046baaa3e 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -73,6 +73,14 @@ static const unsigned int ad7606_16bit_sw_scale_avail[3]= [2] =3D { { 0, 76293 }, { 0, 152588 }, { 0, 305176 } }; =20 +static const unsigned int ad7607_hw_scale_avail[2][2] =3D { + { 0, 610352 }, { 1, 220703 } +}; + +static const unsigned int ad7609_hw_scale_avail[2][2] =3D { + { 0, 152588 }, { 0, 305176 } +}; + static const unsigned int ad7606_oversampling_avail[7] =3D { 1, 2, 4, 8, 16, 32, 64, }; @@ -113,6 +121,30 @@ static const struct iio_chan_spec ad7606_channels_18bi= t[] =3D { AD7606_CHANNEL(7, 18), }; =20 +static const struct iio_chan_spec ad7607_channels[] =3D { + IIO_CHAN_SOFT_TIMESTAMP(8), + AD7606_CHANNEL(0, 14), + AD7606_CHANNEL(1, 14), + AD7606_CHANNEL(2, 14), + AD7606_CHANNEL(3, 14), + AD7606_CHANNEL(4, 14), + AD7606_CHANNEL(5, 14), + AD7606_CHANNEL(6, 14), + AD7606_CHANNEL(7, 14), +}; + +static const struct iio_chan_spec ad7608_channels[] =3D { + IIO_CHAN_SOFT_TIMESTAMP(8), + AD7606_CHANNEL(0, 18), + AD7606_CHANNEL(1, 18), + AD7606_CHANNEL(2, 18), + AD7606_CHANNEL(3, 18), + AD7606_CHANNEL(4, 18), + AD7606_CHANNEL(5, 18), + AD7606_CHANNEL(6, 18), + AD7606_CHANNEL(7, 18), +}; + /* * The current assumption that this driver makes for AD7616, is that it's * working in Hardware Mode with Serial, Burst and Sequencer modes activat= ed. @@ -149,6 +181,12 @@ static int ad7606c_16bit_chan_scale_setup(struct ad760= 6_state *st, struct iio_chan_spec *chan, int ch); static int ad7606_16bit_chan_scale_setup(struct ad7606_state *st, struct iio_chan_spec *chan, int ch); +static int ad7607_chan_scale_setup(struct ad7606_state *st, + struct iio_chan_spec *chan, int ch); +static int ad7608_chan_scale_setup(struct ad7606_state *st, + struct iio_chan_spec *chan, int ch); +static int ad7609_chan_scale_setup(struct ad7606_state *st, + struct iio_chan_spec *chan, int ch); =20 const struct ad7606_chip_info ad7605_4_info =3D { .channels =3D ad7605_channels, @@ -215,6 +253,39 @@ const struct ad7606_chip_info ad7606c_16_info =3D { }; EXPORT_SYMBOL_NS_GPL(ad7606c_16_info, IIO_AD7606); =20 +const struct ad7606_chip_info ad7607_info =3D { + .channels =3D ad7607_channels, + .name =3D "ad7607", + .num_adc_channels =3D 8, + .num_channels =3D 9, + .oversampling_avail =3D ad7606_oversampling_avail, + .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), + .scale_setup_cb =3D ad7607_chan_scale_setup, +}; +EXPORT_SYMBOL_NS_GPL(ad7607_info, IIO_AD7606); + +const struct ad7606_chip_info ad7608_info =3D { + .channels =3D ad7608_channels, + .name =3D "ad7608", + .num_adc_channels =3D 8, + .num_channels =3D 9, + .oversampling_avail =3D ad7606_oversampling_avail, + .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), + .scale_setup_cb =3D ad7608_chan_scale_setup, +}; +EXPORT_SYMBOL_NS_GPL(ad7608_info, IIO_AD7606); + +const struct ad7606_chip_info ad7609_info =3D { + .channels =3D ad7608_channels, + .name =3D "ad7609", + .num_adc_channels =3D 8, + .num_channels =3D 9, + .oversampling_avail =3D ad7606_oversampling_avail, + .oversampling_num =3D ARRAY_SIZE(ad7606_oversampling_avail), + .scale_setup_cb =3D ad7609_chan_scale_setup, +}; +EXPORT_SYMBOL_NS_GPL(ad7609_info, IIO_AD7606); + const struct ad7606_chip_info ad7606c_18_info =3D { .channels =3D ad7606_channels_18bit, .name =3D "ad7606c18", @@ -441,6 +512,39 @@ static int ad7606c_16bit_chan_scale_setup(struct ad760= 6_state *st, return 0; } =20 +static int ad7607_chan_scale_setup(struct ad7606_state *st, + struct iio_chan_spec *chan, int ch) +{ + struct ad7606_chan_scale *cs =3D &st->chan_scales[ch]; + + cs->range =3D 0; + cs->scale_avail =3D ad7607_hw_scale_avail; + cs->num_scales =3D ARRAY_SIZE(ad7607_hw_scale_avail); + return 0; +} + +static int ad7608_chan_scale_setup(struct ad7606_state *st, + struct iio_chan_spec *chan, int ch) +{ + struct ad7606_chan_scale *cs =3D &st->chan_scales[ch]; + + cs->range =3D 0; + cs->scale_avail =3D ad7606_18bit_hw_scale_avail; + cs->num_scales =3D ARRAY_SIZE(ad7606_18bit_hw_scale_avail); + return 0; +} + +static int ad7609_chan_scale_setup(struct ad7606_state *st, + struct iio_chan_spec *chan, int ch) +{ + struct ad7606_chan_scale *cs =3D &st->chan_scales[ch]; + + cs->range =3D 0; + cs->scale_avail =3D ad7609_hw_scale_avail; + cs->num_scales =3D ARRAY_SIZE(ad7609_hw_scale_avail); + return 0; +} + static int ad7606_reg_access(struct iio_dev *indio_dev, unsigned int reg, unsigned int writeval, diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index 32c6f776c5df..998814a92b82 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -237,6 +237,9 @@ extern const struct ad7606_chip_info ad7606_4_info; extern const struct ad7606_chip_info ad7606b_info; extern const struct ad7606_chip_info ad7606c_16_info; extern const struct ad7606_chip_info ad7606c_18_info; +extern const struct ad7606_chip_info ad7607_info; +extern const struct ad7606_chip_info ad7608_info; +extern const struct ad7606_chip_info ad7609_info; extern const struct ad7606_chip_info ad7616_info; =20 #ifdef CONFIG_PM_SLEEP diff --git a/drivers/iio/adc/ad7606_par.c b/drivers/iio/adc/ad7606_par.c index 4e729777d373..a25182a3daa7 100644 --- a/drivers/iio/adc/ad7606_par.c +++ b/drivers/iio/adc/ad7606_par.c @@ -211,6 +211,9 @@ static const struct platform_device_id ad7606_driver_id= s[] =3D { { .name =3D "ad7606-6", .driver_data =3D (kernel_ulong_t)&ad7606_6_info, = }, { .name =3D "ad7606-8", .driver_data =3D (kernel_ulong_t)&ad7606_8_info, = }, { .name =3D "ad7606b", .driver_data =3D (kernel_ulong_t)&ad7606b_info, }, + { .name =3D "ad7607", .driver_data =3D (kernel_ulong_t)&ad7607_info, }, + { .name =3D "ad7608", .driver_data =3D (kernel_ulong_t)&ad7608_info, }, + { .name =3D "ad7609", .driver_data =3D (kernel_ulong_t)&ad7609_info, }, { } }; MODULE_DEVICE_TABLE(platform, ad7606_driver_ids); @@ -221,6 +224,9 @@ static const struct of_device_id ad7606_of_match[] =3D { { .compatible =3D "adi,ad7606-6", .data =3D &ad7606_6_info }, { .compatible =3D "adi,ad7606-8", .data =3D &ad7606_8_info }, { .compatible =3D "adi,ad7606b", .data =3D &ad7606b_info }, + { .compatible =3D "adi,ad7607", .data =3D &ad7607_info }, + { .compatible =3D "adi,ad7608", .data =3D &ad7608_info }, + { .compatible =3D "adi,ad7609", .data =3D &ad7609_info }, { } }; MODULE_DEVICE_TABLE(of, ad7606_of_match); diff --git a/drivers/iio/adc/ad7606_spi.c b/drivers/iio/adc/ad7606_spi.c index 44c6031e9e9a..0662300cde8d 100644 --- a/drivers/iio/adc/ad7606_spi.c +++ b/drivers/iio/adc/ad7606_spi.c @@ -132,6 +132,19 @@ static int ad7606_spi_read_block(struct device *dev, return 0; } =20 +static int ad7606_spi_read_block14to16(struct device *dev, + int count, void *buf) +{ + struct spi_device *spi =3D to_spi_device(dev); + struct spi_transfer xfer =3D { + .bits_per_word =3D 14, + .len =3D count * sizeof(u16), + .rx_buf =3D buf, + }; + + return spi_sync_transfer(spi, &xfer, 1); +} + static int ad7606_spi_read_block18to32(struct device *dev, int count, void *buf) { @@ -325,6 +338,14 @@ static const struct ad7606_bus_ops ad7606_spi_bops =3D= { .read_block =3D ad7606_spi_read_block, }; =20 +static const struct ad7606_bus_ops ad7607_spi_bops =3D { + .read_block =3D ad7606_spi_read_block14to16, +}; + +static const struct ad7606_bus_ops ad7608_spi_bops =3D { + .read_block =3D ad7606_spi_read_block18to32, +}; + static const struct ad7606_bus_ops ad7616_spi_bops =3D { .read_block =3D ad7606_spi_read_block, .reg_read =3D ad7606_spi_reg_read, @@ -387,6 +408,21 @@ static const struct ad7606_bus_info ad7606c_18_bus_inf= o =3D { .bops =3D &ad7606c_18_spi_bops, }; =20 +static const struct ad7606_bus_info ad7607_bus_info =3D { + .chip_info =3D &ad7607_info, + .bops =3D &ad7607_spi_bops, +}; + +static const struct ad7606_bus_info ad7608_bus_info =3D { + .chip_info =3D &ad7608_info, + .bops =3D &ad7608_spi_bops, +}; + +static const struct ad7606_bus_info ad7609_bus_info =3D { + .chip_info =3D &ad7609_info, + .bops =3D &ad7608_spi_bops, +}; + static const struct ad7606_bus_info ad7616_bus_info =3D { .chip_info =3D &ad7616_info, .bops =3D &ad7616_spi_bops, @@ -408,6 +444,9 @@ static const struct spi_device_id ad7606_id_table[] =3D= { { "ad7606b", (kernel_ulong_t)&ad7606b_bus_info }, { "ad7606c-16", (kernel_ulong_t)&ad7606c_16_bus_info }, { "ad7606c-18", (kernel_ulong_t)&ad7606c_18_bus_info }, + { "ad7607", (kernel_ulong_t)&ad7607_bus_info }, + { "ad7608", (kernel_ulong_t)&ad7608_bus_info }, + { "ad7609", (kernel_ulong_t)&ad7609_bus_info }, { "ad7616", (kernel_ulong_t)&ad7616_bus_info }, { } }; @@ -421,6 +460,9 @@ static const struct of_device_id ad7606_of_match[] =3D { { .compatible =3D "adi,ad7606b", .data =3D &ad7606b_bus_info }, { .compatible =3D "adi,ad7606c-16", .data =3D &ad7606c_16_bus_info }, { .compatible =3D "adi,ad7606c-18", .data =3D &ad7606c_18_bus_info }, + { .compatible =3D "adi,ad7607", .data =3D &ad7607_bus_info }, + { .compatible =3D "adi,ad7608", .data =3D &ad7608_bus_info }, + { .compatible =3D "adi,ad7609", .data =3D &ad7609_bus_info }, { .compatible =3D "adi,ad7616", .data =3D &ad7616_bus_info }, { } }; --=20 2.46.1