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Signed-off-by: Devi Priya Signed-off-by: Manikanta Mylavarapu --- Changes in V8: - Add cmn_pll NSS_1200MHZ_CLK and PPE_353MHZ_CLK arch/arm64/boot/dts/qcom/ipq9574.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qc= om/ipq9574.dtsi index 93f66bb83c5a..34f3510ea7ec 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -12,6 +12,8 @@ #include #include #include +#include +#include #include =20 / { @@ -774,6 +776,26 @@ frame@b128000 { status =3D "disabled"; }; }; + + nsscc: clock-controller@39b00000 { + compatible =3D "qcom,ipq9574-nsscc"; + reg =3D <0x39b00000 0x80000>; + clocks =3D <&xo_board_clk>, + <&cmn_pll NSS_1200MHZ_CLK>, + <&cmn_pll PPE_353MHZ_CLK>, + <&gcc GPLL0_OUT_AUX>, + <0>, + <0>, + <0>, + <0>, + <0>, + <0>, + <&gcc GCC_NSSCC_CLK>; + #clock-cells =3D <1>; + #reset-cells =3D <1>; + #power-domain-cells =3D <1>; + #interconnect-cells =3D <1>; + }; }; =20 thermal-zones { --=20 2.34.1