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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241025-dpu-virtual-wide-v6-5-0310fd519765@linaro.org> References: <20241025-dpu-virtual-wide-v6-0-0310fd519765@linaro.org> In-Reply-To: <20241025-dpu-virtual-wide-v6-0-0310fd519765@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=9791; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=+rSm0xbjyQOWKxEArZ7JwwHMnZNApSRY3kaipRjNhm0=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnGuQ6xICphr3p0KsuRoF8RtMUMiUK+n+REHf81 HCvrmA92ceJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZxrkOgAKCRCLPIo+Aiko 1XdIB/9W4o/DsUOsuWzEKpZB4pHEtTM/x5Tud0H45o2674jdTZU6dTDcVno5GgxvVWJwtc//CZ1 ZgcxfAYNQC+jc1nlxHCaqmzgRUYSI4Y63czescpD643UcU/+Jk4snPhDaSol+foh4rNkd2l4FKI qlwFcXlkTR535nL2xl4X4z0eCKzx1ndHekeVdUGEbw2UYnr2s4KnRMLr6fnOeBTE+bN6en8QKO/ 8fVILY2+1Hdu7wzII3728KEqshi8Awwv4O32MpuaWnCIP3QTCCSqEXw8BvmhS188aG/S4PAVqkC 8D/tgFqA3epnBmrnFDm3XRaxxI2b4F/Us9tIaCXOAm5Swcc2 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Split dpu_plane_atomic_check() function into two pieces: dpu_plane_atomic_check_nosspp() performing generic checks on the pstate, without touching the associated SSPP blocks, and dpu_plane_atomic_check_sspp(), which takes into account used SSPPs. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 178 +++++++++++++++++++-------= ---- 1 file changed, 112 insertions(+), 66 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/ms= m/disp/dpu1/dpu_plane.c index 8a9e8a430da7..a5f29851361f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -780,49 +780,22 @@ static int dpu_plane_atomic_check_pipe(struct dpu_pla= ne *pdpu, #define MAX_UPSCALE_RATIO 20 #define MAX_DOWNSCALE_RATIO 4 =20 -static int dpu_plane_atomic_check(struct drm_plane *plane, - struct drm_atomic_state *state) +static int dpu_plane_atomic_check_nosspp(struct drm_plane *plane, + struct drm_plane_state *new_plane_state, + const struct drm_crtc_state *crtc_state) { - struct drm_plane_state *new_plane_state =3D drm_atomic_get_new_plane_stat= e(state, - plane); int i, ret =3D 0, min_scale, max_scale; struct dpu_plane *pdpu =3D to_dpu_plane(plane); struct dpu_kms *kms =3D _dpu_plane_get_kms(&pdpu->base); u64 max_mdp_clk_rate =3D kms->perf.max_core_clk_rate; struct dpu_plane_state *pstate =3D to_dpu_plane_state(new_plane_state); - struct dpu_sw_pipe *pipe =3D &pstate->pipe; - struct dpu_sw_pipe *r_pipe =3D &pstate->r_pipe; - const struct drm_crtc_state *crtc_state =3D NULL; - const struct msm_format *fmt; struct dpu_sw_pipe_cfg *pipe_cfg =3D &pstate->pipe_cfg; struct dpu_sw_pipe_cfg *r_pipe_cfg =3D &pstate->r_pipe_cfg; struct drm_rect fb_rect =3D { 0 }; uint32_t max_linewidth; - unsigned int rotation; - uint32_t supported_rotations; - const struct dpu_sspp_cfg *pipe_hw_caps; - const struct dpu_sspp_sub_blks *sblk; - - if (new_plane_state->crtc) - crtc_state =3D drm_atomic_get_new_crtc_state(state, - new_plane_state->crtc); - - pipe->sspp =3D dpu_rm_get_sspp(&kms->rm, pdpu->pipe); - r_pipe->sspp =3D NULL; =20 - if (!pipe->sspp) - return -EINVAL; - - pipe_hw_caps =3D pipe->sspp->cap; - sblk =3D pipe->sspp->cap->sblk; - - if (sblk->scaler_blk.len) { - min_scale =3D FRAC_16_16(1, MAX_UPSCALE_RATIO); - max_scale =3D MAX_DOWNSCALE_RATIO << 16; - } else { - min_scale =3D DRM_PLANE_NO_SCALING; - max_scale =3D DRM_PLANE_NO_SCALING; - } + min_scale =3D FRAC_16_16(1, MAX_UPSCALE_RATIO); + max_scale =3D MAX_DOWNSCALE_RATIO << 16; =20 ret =3D drm_atomic_helper_check_plane_state(new_plane_state, crtc_state, min_scale, @@ -835,11 +808,6 @@ static int dpu_plane_atomic_check(struct drm_plane *pl= ane, if (!new_plane_state->visible) return 0; =20 - pipe->multirect_index =3D DPU_SSPP_RECT_SOLO; - pipe->multirect_mode =3D DPU_SSPP_MULTIRECT_NONE; - r_pipe->multirect_index =3D DPU_SSPP_RECT_SOLO; - r_pipe->multirect_mode =3D DPU_SSPP_MULTIRECT_NONE; - pstate->stage =3D DPU_STAGE_0 + pstate->base.normalized_zpos; if (pstate->stage >=3D pdpu->catalog->caps->max_mixer_blendstages) { DPU_ERROR("> %d plane stages assigned\n", @@ -873,8 +841,6 @@ static int dpu_plane_atomic_check(struct drm_plane *pla= ne, if (pstate->layout.plane_pitch[i] > DPU_SSPP_MAX_PITCH_SIZE) return -E2BIG; =20 - fmt =3D msm_framebuffer_format(new_plane_state->fb); - max_linewidth =3D pdpu->catalog->caps->max_linewidth; =20 drm_rect_rotate(&pipe_cfg->src_rect, @@ -883,6 +849,78 @@ static int dpu_plane_atomic_check(struct drm_plane *pl= ane, =20 if ((drm_rect_width(&pipe_cfg->src_rect) > max_linewidth) || _dpu_plane_calc_clk(&crtc_state->adjusted_mode, pipe_cfg) > max_mdp_= clk_rate) { + if (drm_rect_width(&pipe_cfg->src_rect) > 2 * max_linewidth) { + DPU_DEBUG_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u\n", + DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth); + return -E2BIG; + } + + *r_pipe_cfg =3D *pipe_cfg; + pipe_cfg->src_rect.x2 =3D (pipe_cfg->src_rect.x1 + pipe_cfg->src_rect.x2= ) >> 1; + pipe_cfg->dst_rect.x2 =3D (pipe_cfg->dst_rect.x1 + pipe_cfg->dst_rect.x2= ) >> 1; + r_pipe_cfg->src_rect.x1 =3D pipe_cfg->src_rect.x2; + r_pipe_cfg->dst_rect.x1 =3D pipe_cfg->dst_rect.x2; + } else { + memset(r_pipe_cfg, 0, sizeof(*r_pipe_cfg)); + } + + drm_rect_rotate_inv(&pipe_cfg->src_rect, + new_plane_state->fb->width, new_plane_state->fb->height, + new_plane_state->rotation); + if (r_pipe_cfg->src_rect.x1 !=3D 0) + drm_rect_rotate_inv(&r_pipe_cfg->src_rect, + new_plane_state->fb->width, new_plane_state->fb->height, + new_plane_state->rotation); + + pstate->needs_qos_remap =3D drm_atomic_crtc_needs_modeset(crtc_state); + + return 0; +} + +static int dpu_plane_atomic_check_sspp(struct drm_plane *plane, + struct drm_atomic_state *state, + const struct drm_crtc_state *crtc_state) +{ + struct drm_plane_state *new_plane_state =3D + drm_atomic_get_new_plane_state(state, plane); + struct dpu_plane *pdpu =3D to_dpu_plane(plane); + struct dpu_plane_state *pstate =3D to_dpu_plane_state(new_plane_state); + struct dpu_sw_pipe *pipe =3D &pstate->pipe; + struct dpu_sw_pipe *r_pipe =3D &pstate->r_pipe; + const struct msm_format *fmt; + struct dpu_sw_pipe_cfg *pipe_cfg =3D &pstate->pipe_cfg; + struct dpu_sw_pipe_cfg *r_pipe_cfg =3D &pstate->r_pipe_cfg; + uint32_t max_linewidth; + unsigned int rotation; + uint32_t supported_rotations; + const struct dpu_sspp_cfg *pipe_hw_caps; + const struct dpu_sspp_sub_blks *sblk; + int ret =3D 0; + + pipe_hw_caps =3D pipe->sspp->cap; + sblk =3D pipe->sspp->cap->sblk; + + /* + * We already have verified scaling against platform limitations. + * Now check if the SSPP supports scaling at all. + */ + if (!sblk->scaler_blk.len && + ((drm_rect_width(&new_plane_state->src) >> 16 !=3D + drm_rect_width(&new_plane_state->dst)) || + (drm_rect_height(&new_plane_state->src) >> 16 !=3D + drm_rect_height(&new_plane_state->dst)))) + return -ERANGE; + + fmt =3D msm_framebuffer_format(new_plane_state->fb); + + max_linewidth =3D pdpu->catalog->caps->max_linewidth; + + ret =3D dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg, fmt, + &crtc_state->adjusted_mode); + if (ret) + return ret; + + if (drm_rect_width(&r_pipe_cfg->src_rect) !=3D 0) { /* * In parallel multirect case only the half of the usual width * is supported for tiled formats. If we are here, we know that @@ -896,12 +934,6 @@ static int dpu_plane_atomic_check(struct drm_plane *pl= ane, return -E2BIG; } =20 - if (drm_rect_width(&pipe_cfg->src_rect) > 2 * max_linewidth) { - DPU_DEBUG_PLANE(pdpu, "invalid src " DRM_RECT_FMT " line:%u\n", - DRM_RECT_ARG(&pipe_cfg->src_rect), max_linewidth); - return -E2BIG; - } - if (drm_rect_width(&pipe_cfg->src_rect) !=3D drm_rect_width(&pipe_cfg->d= st_rect) || drm_rect_height(&pipe_cfg->src_rect) !=3D drm_rect_height(&pipe_cfg-= >dst_rect) || (!test_bit(DPU_SSPP_SMART_DMA_V1, &pipe->sspp->cap->features) && @@ -923,26 +955,6 @@ static int dpu_plane_atomic_check(struct drm_plane *pl= ane, r_pipe->multirect_index =3D DPU_SSPP_RECT_1; r_pipe->multirect_mode =3D DPU_SSPP_MULTIRECT_PARALLEL; =20 - *r_pipe_cfg =3D *pipe_cfg; - pipe_cfg->src_rect.x2 =3D (pipe_cfg->src_rect.x1 + pipe_cfg->src_rect.x2= ) >> 1; - pipe_cfg->dst_rect.x2 =3D (pipe_cfg->dst_rect.x1 + pipe_cfg->dst_rect.x2= ) >> 1; - r_pipe_cfg->src_rect.x1 =3D pipe_cfg->src_rect.x2; - r_pipe_cfg->dst_rect.x1 =3D pipe_cfg->dst_rect.x2; - } - - drm_rect_rotate_inv(&pipe_cfg->src_rect, - new_plane_state->fb->width, new_plane_state->fb->height, - new_plane_state->rotation); - if (r_pipe->sspp) - drm_rect_rotate_inv(&r_pipe_cfg->src_rect, - new_plane_state->fb->width, new_plane_state->fb->height, - new_plane_state->rotation); - - ret =3D dpu_plane_atomic_check_pipe(pdpu, pipe, pipe_cfg, fmt, &crtc_stat= e->adjusted_mode); - if (ret) - return ret; - - if (r_pipe->sspp) { ret =3D dpu_plane_atomic_check_pipe(pdpu, r_pipe, r_pipe_cfg, fmt, &crtc_state->adjusted_mode); if (ret) @@ -965,11 +977,45 @@ static int dpu_plane_atomic_check(struct drm_plane *p= lane, } =20 pstate->rotation =3D rotation; - pstate->needs_qos_remap =3D drm_atomic_crtc_needs_modeset(crtc_state); =20 return 0; } =20 +static int dpu_plane_atomic_check(struct drm_plane *plane, + struct drm_atomic_state *state) +{ + struct drm_plane_state *new_plane_state =3D drm_atomic_get_new_plane_stat= e(state, + plane); + int ret =3D 0; + struct dpu_plane *pdpu =3D to_dpu_plane(plane); + struct dpu_plane_state *pstate =3D to_dpu_plane_state(new_plane_state); + struct dpu_kms *dpu_kms =3D _dpu_plane_get_kms(plane); + struct dpu_sw_pipe *pipe =3D &pstate->pipe; + struct dpu_sw_pipe *r_pipe =3D &pstate->r_pipe; + const struct drm_crtc_state *crtc_state =3D NULL; + + if (new_plane_state->crtc) + crtc_state =3D drm_atomic_get_new_crtc_state(state, + new_plane_state->crtc); + + pipe->sspp =3D dpu_rm_get_sspp(&dpu_kms->rm, pdpu->pipe); + r_pipe->sspp =3D NULL; + + ret =3D dpu_plane_atomic_check_nosspp(plane, new_plane_state, crtc_state); + if (ret) + return ret; + + if (!new_plane_state->visible) + return 0; + + pipe->multirect_index =3D DPU_SSPP_RECT_SOLO; + pipe->multirect_mode =3D DPU_SSPP_MULTIRECT_NONE; + r_pipe->multirect_index =3D DPU_SSPP_RECT_SOLO; + r_pipe->multirect_mode =3D DPU_SSPP_MULTIRECT_NONE; + + return dpu_plane_atomic_check_sspp(plane, state, crtc_state); +} + static void dpu_plane_flush_csc(struct dpu_plane *pdpu, struct dpu_sw_pipe= *pipe) { const struct msm_format *format =3D --=20 2.39.5