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charset="utf-8" Add pinctrl node and related pin configuration for SG2042 SoC. Signed-off-by: Inochi Amaoto --- .../boot/dts/sophgo/sg2042-milkv-pioneer.dts | 72 +++++++++++++++++++ arch/riscv/boot/dts/sophgo/sg2042.dtsi | 6 ++ 2 files changed, 78 insertions(+) diff --git a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts b/arch/ris= cv/boot/dts/sophgo/sg2042-milkv-pioneer.dts index a3f9d6f22566..0654bcf00a52 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts +++ b/arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts @@ -27,6 +27,8 @@ &cgi_dpll1 { }; =20 &emmc { + pinctrl-0 =3D <&emmc_cfg>; + pinctrl-names =3D "default"; bus-width =3D <4>; no-sdio; no-sd; @@ -36,6 +38,8 @@ &emmc { }; =20 &i2c1 { + pinctrl-0 =3D <&i2c1_cfg>; + pinctrl-names =3D "default"; status =3D "okay"; =20 mcu: syscon@17 { @@ -45,7 +49,73 @@ mcu: syscon@17 { }; }; =20 +&pinctrl { + emmc_cfg: sdhci-emmc-cfg { + sdhci-emmc-wp-pins { + pinmux =3D ; + bias-disable; + drive-strength-microamp =3D <21200>; + input-schmitt-disable; + }; + + sdhci-emmc-cd-pins { + pinmux =3D ; + bias-pull-up; + drive-strength-microamp =3D <21200>; + input-schmitt-enable; + }; + + sdhci-emmc-rst-pwr-pins { + pinmux =3D , + ; + bias-disable; + drive-strength-microamp =3D <21200>; + input-schmitt-disable; + }; + }; + + i2c1_cfg: i2c1-cfg { + i2c1-pins { + pinmux =3D , + ; + bias-pull-up; + drive-strength-microamp =3D <21200>; + input-schmitt-enable; + }; + }; + + sd_cfg: sdhci-sd-cfg { + sdhci-sd-cd-wp-pins { + pinmux =3D , + ; + bias-pull-up; + drive-strength-microamp =3D <21200>; + input-schmitt-enable; + }; + + sdhci-sd-rst-pwr-pins { + pinmux =3D , + ; + bias-disable; + drive-strength-microamp =3D <21200>; + input-schmitt-disable; + }; + }; + + uart0_cfg: uart0-cfg { + uart0-rx-pins { + pinmux =3D , + ; + bias-pull-up; + drive-strength-microamp =3D <21200>; + input-schmitt-enable; + }; + }; +}; + &sd { + pinctrl-0 =3D <&sd_cfg>; + pinctrl-names =3D "default"; bus-width =3D <4>; no-sdio; no-mmc; @@ -54,6 +124,8 @@ &sd { }; =20 &uart0 { + pinctrl-0 =3D <&uart0_cfg>; + pinctrl-names =3D "default"; status =3D "okay"; }; =20 diff --git a/arch/riscv/boot/dts/sophgo/sg2042.dtsi b/arch/riscv/boot/dts/s= ophgo/sg2042.dtsi index 4e5fa6591623..107565f22f79 100644 --- a/arch/riscv/boot/dts/sophgo/sg2042.dtsi +++ b/arch/riscv/boot/dts/sophgo/sg2042.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include #include =20 #include "sg2042-cpus.dtsi" @@ -181,6 +182,11 @@ rpgate: clock-controller@7030010368 { #clock-cells =3D <1>; }; =20 + pinctrl: pinctrl@7030011000 { + compatible =3D "sophgo,sg2042-pinctrl"; + reg =3D <0x70 0x30011000 0x0 0x1000>; + }; + clkgen: clock-controller@7030012000 { compatible =3D "sophgo,sg2042-clkgen"; reg =3D <0x70 0x30012000 0x0 0x1000>; --=20 2.47.0