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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241024-starqltechn_integration_upstream-v7-1-78eaf21ecee9@gmail.com> References: <20241024-starqltechn_integration_upstream-v7-0-78eaf21ecee9@gmail.com> In-Reply-To: <20241024-starqltechn_integration_upstream-v7-0-78eaf21ecee9@gmail.com> To: Bjorn Andersson , Michael Turquette , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, Dzmitry Sankouski X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1729764800; l=1073; i=dsankouski@gmail.com; s=20240619; h=from:subject:message-id; bh=cU9P4qzHC4jP9o3v4wIQ+UaeV1Ek/oCy3Sa5T8uuL30=; b=EG5fpZM9D8fDjigq3ofy2poFvugR54iI3hQVzMkeD7fnBC/JoUZDspdxfhEl3QYDnC3MXRaVm Zm4bQ5tX8ruCGxTyxfHfDuOYr/0tKLDN8No3IqRH/UTc4FJB0miIBqB X-Developer-Key: i=dsankouski@gmail.com; a=ed25519; pk=YJcXFcN1EWrzBYuiE2yi5Mn6WLn6L1H71J+f7X8fMag= Update calc_rate docs to reflect, that pre_div is not pure divisor, but a register value, and requires conversion. Signed-off-by: Dzmitry Sankouski --- drivers/clk/qcom/clk-rcg2.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index bf26c5448f00..0fc23a87b432 100644 --- a/drivers/clk/qcom/clk-rcg2.c +++ b/drivers/clk/qcom/clk-rcg2.c @@ -153,7 +153,14 @@ static int clk_rcg2_set_parent(struct clk_hw *hw, u8 i= ndex) * * parent_rate m * rate =3D ----------- x --- - * hid_div n + * pre_div n + * + * @param rate - Parent rate. + * @param m - Multiplier. + * @param n - Divisor. + * @param mode - Use zero to ignore m/n calculation. + * @param hid_div - Pre divisor register value. Pre divisor value + * relates to hid_div as pre_div =3D (hid_div + 1) / 2 */ static unsigned long calc_rate(unsigned long rate, u32 m, u32 n, u32 mode, u32 hid_div) --=20 2.39.2