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([77.85.230.22]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9a913704easm449177466b.107.2024.10.23.02.18.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 23 Oct 2024 02:18:06 -0700 (PDT) From: Ivaylo Ivanov To: Krzysztof Kozlowski , Andi Shyti , Mark Brown , Alim Akhtar , Rob Herring , Conor Dooley , Daniel Lezcano , Thomas Gleixner Cc: linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/5] arm64: dts: exynos8895: Add spi_0/1 nodes Date: Wed, 23 Oct 2024 12:17:34 +0300 Message-ID: <20241023091734.538682-6-ivo.ivanov.ivanov1@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241023091734.538682-1-ivo.ivanov.ivanov1@gmail.com> References: <20241023091734.538682-1-ivo.ivanov.ivanov1@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add nodes for spi_0 (SPI_CAM0) and spi_1 (SPI_CAM1), which allows using them. Signed-off-by: Ivaylo Ivanov --- arch/arm64/boot/dts/exynos/exynos8895.dtsi | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/arch/arm64/boot/dts/exynos/exynos8895.dtsi b/arch/arm64/boot/d= ts/exynos/exynos8895.dtsi index ad50cd4f6..ee393f4f0 100644 --- a/arch/arm64/boot/dts/exynos/exynos8895.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos8895.dtsi @@ -282,6 +282,36 @@ pinctrl_peric1: pinctrl@10980000 { interrupts =3D ; }; =20 + spi_0: spi@109d0000 { + compatible =3D "samsung,exynos8895-spi", + "samsung,exynos850-spi"; + reg =3D <0x109d0000 0x100>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM0_PCLK>, + <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM0_SPI_EXT_CLK>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi0_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + + spi_1: spi@109e0000 { + compatible =3D "samsung,exynos8895-spi", + "samsung,exynos850-spi"; + reg =3D <0x109e0000 0x100>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clocks =3D <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM1_PCLK>, + <&cmu_peric1 CLK_GOUT_PERIC1_SPI_CAM1_SPI_EXT_CLK>; + clock-names =3D "spi", "spi_busclk0"; + interrupts =3D ; + pinctrl-0 =3D <&spi1_bus>; + pinctrl-names =3D "default"; + status =3D "disabled"; + }; + cmu_fsys0: clock-controller@11000000 { compatible =3D "samsung,exynos8895-cmu-fsys0"; reg =3D <0x11000000 0x8000>; --=20 2.43.0