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[173.79.56.208]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-460d3c62f4dsm33845841cf.28.2024.10.22.14.34.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Oct 2024 14:34:52 -0700 (PDT) From: Gregory Price To: x86@kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-mm@kvack.org Cc: linux-cxl@kvack.org, Jonathan.Cameron@huawei.com, dan.j.williams@intel.com, rrichter@amd.com, Terry.Bowman@amd.com, dave.jiang@intel.com, ira.weiny@intel.com, alison.schofield@intel.com, gourry@gourry.net, dave.hansen@linux.intel.com, luto@kernel.org, peterz@infradead.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, rafael@kernel.org, lenb@kernel.org, david@redhat.com, osalvador@suse.de, gregkh@linuxfoundation.org, akpm@linux-foundation.org, rppt@kernel.org Subject: [PATCH v3 1/3] memory: implement memory_block_advise/probe_max_size Date: Tue, 22 Oct 2024 17:34:48 -0400 Message-ID: <20241022213450.15041-2-gourry@gourry.net> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241022213450.15041-1-gourry@gourry.net> References: <20241022213450.15041-1-gourry@gourry.net> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Hotplug memory sources may have opinions on what the memblock size should be - usually for alignment purposes. For example, CXL memory extents can be 256MB with a matching alignment. If this size/alignment is smaller than the block size, it can result in stranded capacity. Implement memory_block_advise_max_size for use prior to allocator init, for software to advise the system on the max block size. Implement memory_block_probe_max_size for use by arch init code to calculate the best block size. Use of advice is architecture defined. The probe value can never change after first probe. Calls to advise after probe will return -EBUSY to aid debugging. On systems without hotplug, always return -ENODEV and 0 respectively. Suggested-by: Ira Weiny Signed-off-by: Gregory Price Suggested-by: Dan Williams Suggested-by: David Hildenbrand --- drivers/base/memory.c | 43 ++++++++++++++++++++++++++++++++++++++++++ include/linux/memory.h | 10 ++++++++++ 2 files changed, 53 insertions(+) diff --git a/drivers/base/memory.c b/drivers/base/memory.c index 67858eeb92ed..a0fd9e1451aa 100644 --- a/drivers/base/memory.c +++ b/drivers/base/memory.c @@ -110,6 +110,49 @@ static void memory_block_release(struct device *dev) kfree(mem); } =20 +/* + * @size: suggestion for maximum block size. must be aligned on power of 2. + * + * Early boot software (pre-allocator init) may advise archs on the max bl= ock + * size.This value can only decrease after initialization, as the intent i= s to + * identify the largest supported alignment for all sources. + * + * Use of this value is arch dependent, as is min/max block size. + * + * Returns: 0 on success + * -EINVAL if size is 0 or not pow2 aligned + * -EBUSY if value has already been probed + */ +static size_t memory_block_advised_sz; +static bool memory_block_size_probed; +int memory_block_advise_max_size(size_t bz) +{ + if (!bz || (bz & (bz - 1)) !=3D 0) + return -EINVAL; + + if (memory_block_size_probed) + return -EBUSY; + + if (memory_block_advised_sz) + memory_block_advised_sz =3D min(bz, memory_block_advised_sz); + else + memory_block_advised_sz =3D bz; + + return 0; +} + +/* + * memory_block_probe_max_size provides a suggested maximum memory block + * size value. After the first call, the value can never change. + * + * Returns: advised size in bytes, or 0 if never set. + */ +size_t memory_block_probe_max_size(void) +{ + memory_block_size_probed =3D true; + return memory_block_advised_sz; +} + unsigned long __weak memory_block_size_bytes(void) { return MIN_MEMORY_BLOCK_SIZE; diff --git a/include/linux/memory.h b/include/linux/memory.h index c0afee5d126e..47c00d6e1165 100644 --- a/include/linux/memory.h +++ b/include/linux/memory.h @@ -149,6 +149,14 @@ static inline int hotplug_memory_notifier(notifier_fn_= t fn, int pri) { return 0; } +static inline int memory_block_advise_max_size(size_t size) +{ + return -ENODEV; +} +static inline size_t memory_block_probe_max_size(void) +{ + return 0; +} #else /* CONFIG_MEMORY_HOTPLUG */ extern int register_memory_notifier(struct notifier_block *nb); extern void unregister_memory_notifier(struct notifier_block *nb); @@ -181,6 +189,8 @@ int walk_dynamic_memory_groups(int nid, walk_memory_gro= ups_func_t func, void memory_block_add_nid(struct memory_block *mem, int nid, enum meminit_context context); #endif /* CONFIG_NUMA */ +int memory_block_advise_max_size(size_t size); +size_t memory_block_probe_max_size(void); #endif /* CONFIG_MEMORY_HOTPLUG */ =20 /* --=20 2.43.0 From nobody Tue Nov 26 01:38:54 2024 Received: from mail-qt1-f169.google.com (mail-qt1-f169.google.com [209.85.160.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 266A91FEFBC for ; Tue, 22 Oct 2024 21:34:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.160.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729632899; cv=none; b=u4SdX+s82105VQGJhOrwqB+KIxoF2pIYAScI5j03JM4rfHUH6ToitAcJl59Lk8HXltflgUqle79AG+J49SmBxiQBrvWngGn5vkPrvekNI/7ZrsDp7CpYQ0bniG8RhAmyoD/SL0DITmGAsZrTBNjyKvaPrwuGLVbjQi+nohKS90g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729632899; c=relaxed/simple; bh=W1pk87B56sY3NmTWTw0fYcdlm0GNbCNKUts7riRYlbg=; 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[173.79.56.208]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-460d3c62f4dsm33845841cf.28.2024.10.22.14.34.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Oct 2024 14:34:55 -0700 (PDT) From: Gregory Price To: x86@kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-mm@kvack.org Cc: linux-cxl@kvack.org, Jonathan.Cameron@huawei.com, dan.j.williams@intel.com, rrichter@amd.com, Terry.Bowman@amd.com, dave.jiang@intel.com, ira.weiny@intel.com, alison.schofield@intel.com, gourry@gourry.net, dave.hansen@linux.intel.com, luto@kernel.org, peterz@infradead.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, rafael@kernel.org, lenb@kernel.org, david@redhat.com, osalvador@suse.de, gregkh@linuxfoundation.org, akpm@linux-foundation.org, rppt@kernel.org Subject: [PATCH v3 2/3] x86: probe memory block size advisement value during mm init Date: Tue, 22 Oct 2024 17:34:49 -0400 Message-ID: <20241022213450.15041-3-gourry@gourry.net> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241022213450.15041-1-gourry@gourry.net> References: <20241022213450.15041-1-gourry@gourry.net> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Systems with hotplug may provide an advisement value on what the memblock size should be. Probe this value when the rest of the configuration values are considered. The new heuristic is as follows 1) set_memory_block_size_order value if already set (cmdline param) 2) minimum block size if memory is less than large block limit 3) if no hotplug advice: Max block size if system is bare-metal, otherwise use end of memory alignment. 4) if hotplug advice: lesser of advice and end of memory alignment. Suggested-by: David Hildenbrand Signed-off-by: Gregory Price Acked-by: David Hildenbrand Suggested-by: Dan Williams Suggested-by: Ira Weiny --- arch/x86/mm/init_64.c | 14 +++++++++----- 1 file changed, 9 insertions(+), 5 deletions(-) diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index ff253648706f..93d669f467f7 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c @@ -1452,13 +1452,17 @@ static unsigned long probe_memory_block_size(void) } =20 /* - * Use max block size to minimize overhead on bare metal, where - * alignment for memory hotplug isn't a concern. + * When hotplug alignment is not a concern, maximize blocksize + * to minimize overhead. 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[173.79.56.208]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-460d3c62f4dsm33845841cf.28.2024.10.22.14.34.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Oct 2024 14:34:58 -0700 (PDT) From: Gregory Price To: x86@kernel.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-mm@kvack.org Cc: linux-cxl@kvack.org, Jonathan.Cameron@huawei.com, dan.j.williams@intel.com, rrichter@amd.com, Terry.Bowman@amd.com, dave.jiang@intel.com, ira.weiny@intel.com, alison.schofield@intel.com, gourry@gourry.net, dave.hansen@linux.intel.com, luto@kernel.org, peterz@infradead.org, tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, hpa@zytor.com, rafael@kernel.org, lenb@kernel.org, david@redhat.com, osalvador@suse.de, gregkh@linuxfoundation.org, akpm@linux-foundation.org, rppt@kernel.org Subject: [PATCH v3 3/3] acpi,srat: give memory block size advice based on CFMWS alignment Date: Tue, 22 Oct 2024 17:34:50 -0400 Message-ID: <20241022213450.15041-4-gourry@gourry.net> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241022213450.15041-1-gourry@gourry.net> References: <20241022213450.15041-1-gourry@gourry.net> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Capacity is stranded when CFMWS regions are not aligned to block size. On x86, block size increases with capacity (2G blocks @ 64G capacity). Use CFMWS base/size to report memory block size alignment advice. After the alignment, the acpi code begins populating numa nodes with memblocks, so probe the value just prior to lock it in. All future callers should be providing advice prior to this point. Suggested-by: Dan Williams Signed-off-by: Gregory Price Suggested-by: David Hildenbrand Suggested-by: Ira Weiny --- drivers/acpi/numa/srat.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/acpi/numa/srat.c b/drivers/acpi/numa/srat.c index 44f91f2c6c5d..35e6f7c17f60 100644 --- a/drivers/acpi/numa/srat.c +++ b/drivers/acpi/numa/srat.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -333,6 +334,29 @@ acpi_parse_memory_affinity(union acpi_subtable_headers= *header, return 0; } =20 +/* Advise memblock on maximum block size to avoid stranded capacity. */ +static int __init acpi_align_cfmws(union acpi_subtable_headers *header, + void *arg, const unsigned long table_end) +{ + struct acpi_cedt_cfmws *cfmws =3D (struct acpi_cedt_cfmws *)header; + u64 start =3D cfmws->base_hpa; + u64 size =3D cfmws->window_size; + unsigned long bz; + + for (bz =3D SZ_64T; bz >=3D SZ_256M; bz >>=3D 1) { + if (IS_ALIGNED(start, bz) && IS_ALIGNED(size, bz)) + break; + } + + if (bz >=3D SZ_256M) { + if (memory_block_advise_max_size(bz) < 0) + pr_warn("CFMWS: memblock size advise failed\n"); + } else + pr_err("CFMWS: [BIOS BUG] base/size alignment violates spec\n"); + + return 0; +} + static int __init acpi_parse_cfmws(union acpi_subtable_headers *header, void *arg, const unsigned long table_end) { @@ -545,6 +569,15 @@ int __init acpi_numa_init(void) * Initialize a fake_pxm as the first available PXM to emulate. */ =20 + /* Align memblock size to CFMW regions if possible */ + acpi_table_parse_cedt(ACPI_CEDT_TYPE_CFMWS, acpi_align_cfmws, NULL); + + /* + * Nodes start populating with blocks after this, so probe the max + * block size to prevent it from changing in the future. + */ + memory_block_probe_max_size(); + /* fake_pxm is the next unused PXM value after SRAT parsing */ for (i =3D 0, fake_pxm =3D -1; i < MAX_NUMNODES; i++) { if (node_to_pxm_map[i] > fake_pxm) --=20 2.43.0