From nobody Tue Nov 26 03:35:38 2024 Received: from mx08-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1EB5319D07E; Tue, 22 Oct 2024 15:59:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=91.207.212.93 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729612800; cv=none; b=RiCfqUpLJD0aaf63Rb6LmwLAzgtHyl2ynaj8sGZZGmGkG9PGKaH69iP7XY7LYln3Yn7+ujKK3Q0aPkbRTpC7VgEHgZS0aZEARQFsnIFiAI5/idx3FjjKihL46rdQcqK5ZNKs1CUzh16r7AZ1eY6FH92g3wlWXkFO6Nqmhi1C3y4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729612800; c=relaxed/simple; bh=7FLEYz3Fdgve7gX6gafBnx5E4dK8KtoE4e6AzKM/aHM=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=UZZKOjToF48FP2E4M3Qw0fmIhF+6nrx845TpBfOV+kllMaXaeDoxmlKHCRtLj3fwqYqbQijF/Jxo3YMdGSSn+QL/Zr5swsijz5Q1+yM8Yy6KFrPStcxoYsBdSMFODS2iF/HvH+6OueFmbizIbKNERLhJGLK5HP+zXbhYt5emRmY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com; spf=pass smtp.mailfrom=foss.st.com; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b=vT4FUUvN; arc=none smtp.client-ip=91.207.212.93 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=foss.st.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=foss.st.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=foss.st.com header.i=@foss.st.com header.b="vT4FUUvN" Received: from pps.filterd (m0369457.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 49MBM6Jx009686; Tue, 22 Oct 2024 17:59:44 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=selector1; bh= IPb8iKoLm6aPEXvEfhIiGG9B6WnT9HIMeAmj2PtezsA=; b=vT4FUUvNUXxUpmS0 qyFwvGxHHc2pVAMtdZ4RHIF0egIT9xkKuVpb3QvS7hhrEHtr4vo5bUh8fP3iM+O+ /TuAqZINkNQNw5VKfDPRBTB8O+v0hXi+AjtB26Sj/nMWEIMLjpez64HD55sHuCz5 DqzMyMwYdXWXgj3Jy6j1stSEfE2TAEhA5hsTq27hUM5YeDLhvRI2TUCy2QqwW3xH vc70/+vKKog25+1X2bB14qdcj7ViURLJwnpyhFoPiJM0wa0EwU+WGrdPNO3XJO3J b0EwLS5uJUEvGU1OE3DAPArbYuBxR0bkeELydQ0LE+TwAZw+t38jWBwjaxjMZeaF qoa4Ww== Received: from beta.dmz-ap.st.com (beta.dmz-ap.st.com [138.198.100.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 42cqqhuvb5-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 22 Oct 2024 17:59:43 +0200 (MEST) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-ap.st.com (STMicroelectronics) with ESMTP id D77BC40055; Tue, 22 Oct 2024 17:58:34 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id A578B26E862; Tue, 22 Oct 2024 17:57:32 +0200 (CEST) Received: from localhost (10.48.87.33) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.37; Tue, 22 Oct 2024 17:57:32 +0200 From: Antonio Borneo To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Catalin Marinas , Will Deacon , , , CC: Antonio Borneo , , =?UTF-8?q?Cl=C3=A9ment=20Le=20Goffic?= , Stephane Danieau , Amelie Delaunay , Fabien Dessenne , Valentin Caron , Gatien Chevallier , Cheick Traore , Subject: [PATCH 09/14] pinctrl: stm32: Allow compile as module for stm32mp257 Date: Tue, 22 Oct 2024 17:56:53 +0200 Message-ID: <20241022155658.1647350-10-antonio.borneo@foss.st.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241022155658.1647350-1-antonio.borneo@foss.st.com> References: <20241022155658.1647350-1-antonio.borneo@foss.st.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: SAFCAS1NODE2.st.com (10.75.90.13) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 Content-Type: text/plain; charset="utf-8" From: Stephane Danieau Add ability to build pinctrl for stm32mp257 as a kernel module. Add kernel-doc to the exported symbols. Drop the Kconfig symbol MACH_STM32MP25, as it has never been defined. Signed-off-by: Stephane Danieau Signed-off-by: Antonio Borneo --- arch/arm64/Kconfig.platforms | 1 - drivers/pinctrl/stm32/Kconfig | 6 +++--- drivers/pinctrl/stm32/pinctrl-stm32.c | 7 +++++++ drivers/pinctrl/stm32/pinctrl-stm32.h | 14 ++++++++++++++ drivers/pinctrl/stm32/pinctrl-stm32mp257.c | 11 ++++++----- 5 files changed, 30 insertions(+), 9 deletions(-) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 6c6d11536b42e..ab77cc49b4ed7 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -308,7 +308,6 @@ config ARCH_STM32 bool "STMicroelectronics STM32 SoC Family" select GPIOLIB select PINCTRL - select PINCTRL_STM32MP257 select ARM_SMC_MBOX select ARM_SCMI_PROTOCOL select REGULATOR diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig index 2656d3d3ae402..6c18ac9cdeec2 100644 --- a/drivers/pinctrl/stm32/Kconfig +++ b/drivers/pinctrl/stm32/Kconfig @@ -2,7 +2,7 @@ if ARCH_STM32 || COMPILE_TEST =20 config PINCTRL_STM32 - bool + tristate depends on OF select PINMUX select GENERIC_PINCONF @@ -53,8 +53,8 @@ config PINCTRL_STM32MP157 select PINCTRL_STM32 =20 config PINCTRL_STM32MP257 - bool "STMicroelectronics STM32MP257 pin control" if COMPILE_TEST && !MACH= _STM32MP25 + tristate "STMicroelectronics STM32MP257 pin control" depends on OF && HAS_IOMEM - default MACH_STM32MP25 + default ARM64 || COMPILE_TEST select PINCTRL_STM32 endif diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/= pinctrl-stm32.c index b6e7e34508592..5da2114b81420 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c @@ -1954,6 +1954,7 @@ int stm32_pctl_probe(struct platform_device *pdev) =20 return 0; } +EXPORT_SYMBOL(stm32_pctl_probe); =20 static int __maybe_unused stm32_pinctrl_restore_advcfgr(struct stm32_gpio_= bank *bank, int offset, u32 bpos) @@ -2062,6 +2063,7 @@ int __maybe_unused stm32_pinctrl_suspend(struct devic= e *dev) =20 return 0; } +EXPORT_SYMBOL(stm32_pinctrl_suspend); =20 int __maybe_unused stm32_pinctrl_resume(struct device *dev) { @@ -2077,3 +2079,8 @@ int __maybe_unused stm32_pinctrl_resume(struct device= *dev) =20 return 0; } +EXPORT_SYMBOL(stm32_pinctrl_resume); + +MODULE_AUTHOR("Alexandre Torgue "); +MODULE_DESCRIPTION("STM32 core pinctrl driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.h b/drivers/pinctrl/stm32/= pinctrl-stm32.h index b8caebc55cfc5..d17cbdbba4482 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.h +++ b/drivers/pinctrl/stm32/pinctrl-stm32.h @@ -68,8 +68,22 @@ struct stm32_pinctrl_match_data { bool rif_control; }; =20 +/** + * stm32_pctl_probe() - Common probe for stm32 pinctrl drivers. + * @pdev: Pinctrl platform device. + */ int stm32_pctl_probe(struct platform_device *pdev); + +/** + * stm32_pinctrl_suspend() - Common suspend for stm32 pinctrl drivers. + * @dev: Pinctrl device. + */ int stm32_pinctrl_suspend(struct device *dev); + +/** + * stm32_pinctrl_resume() - Common resume for stm32 pinctrl drivers. + * @dev: Pinctrl device. + */ int stm32_pinctrl_resume(struct device *dev); =20 #endif /* __PINCTRL_STM32_H */ diff --git a/drivers/pinctrl/stm32/pinctrl-stm32mp257.c b/drivers/pinctrl/s= tm32/pinctrl-stm32mp257.c index a374918030788..6709bddd97186 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32mp257.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32mp257.c @@ -4,6 +4,7 @@ * Author: Alexandre Torgue for STMicroelec= tronics. */ #include +#include #include #include =20 @@ -2566,6 +2567,7 @@ static const struct of_device_id stm32mp257_pctrl_mat= ch[] =3D { }, { } }; +MODULE_DEVICE_TABLE(of, stm32mp257_pctrl_match); =20 static const struct dev_pm_ops stm32_pinctrl_dev_pm_ops =3D { SET_LATE_SYSTEM_SLEEP_PM_OPS(stm32_pinctrl_suspend, stm32_pinctrl_resume) @@ -2579,9 +2581,8 @@ static struct platform_driver stm32mp257_pinctrl_driv= er =3D { .pm =3D &stm32_pinctrl_dev_pm_ops, }, }; +module_platform_driver(stm32mp257_pinctrl_driver); =20 -static int __init stm32mp257_pinctrl_init(void) -{ - return platform_driver_register(&stm32mp257_pinctrl_driver); -} -arch_initcall(stm32mp257_pinctrl_init); +MODULE_AUTHOR("Alexandre Torgue "); +MODULE_DESCRIPTION("STM32MP257 pinctrl driver"); +MODULE_LICENSE("GPL"); --=20 2.34.1