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charset="utf-8" The nxp,battery-switch-over property is used to control the switch-over, battery low detection and extra power fail detection functions. The PCF2131 has a different default value for the PWRMNG bits. It is set to 0x7: battery switch-over function is disabled, only one power supply (VDD); battery low detection function is disabled. This is the opposite of the default of the PCF2127/PCA2129 and PCF2129. With the nxp,battery-switch-over the behavior can be controlled through the device tree. Signed-off-by: Philipp Rosenberger --- Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml b/Docum= entation/devicetree/bindings/rtc/nxp,pcf2127.yaml index 2d9fe5a75b06..5739c3e371e7 100644 --- a/Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml +++ b/Documentation/devicetree/bindings/rtc/nxp,pcf2127.yaml @@ -30,6 +30,16 @@ properties: reset-source: true + nxp,battery-switch-over: + description: + Battery and power related configuration. This property is used to se= t the + PWRMNG bits of the Control_3 register to control the battery switch-= over, + battery low detection and extra power fail detection functions. + The actual supported functions depend on the device capabilities. + $ref: /schemas/types.yaml#/definitions/uint8 + minimum: 0 + maximum: 7 + required: - compatible - reg -- 2.39.5 ---------------------------------------------------------------------------= ------ sps Smart Production Solutions Nuremberg, 12 - 14 November 2024 Visit us: Hall 5, Booth 228 ---------------------------------------------------------------------------= ------ From nobody Tue Nov 26 02:44:58 2024 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2092.outbound.protection.outlook.com [40.107.21.92]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 538D21547C4; Tue, 22 Oct 2024 08:02:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" The battery switch-over function of the PCF2127, PCA2129 and PCF2129 have the opposite default behavior as the PCF2131. If the PCF2131 is used as replacement for one of the others, the battery switch-over will be disabled. Add nxp,battery-switch-over as an optional devicetree property to configure the battery switch-over, battery low detection and extra power fail detection functions. The property reflects the value of the PWRMNG bits of the Control_3 register. Signed-off-by: Philipp Rosenberger --- drivers/rtc/rtc-pcf2127.c | 61 +++++++++++++++++++++++++++++---------- 1 file changed, 46 insertions(+), 15 deletions(-) diff --git a/drivers/rtc/rtc-pcf2127.c b/drivers/rtc/rtc-pcf2127.c index 9c04c4e1a49c..812764b65b34 100644 --- a/drivers/rtc/rtc-pcf2127.c +++ b/drivers/rtc/rtc-pcf2127.c @@ -48,6 +48,7 @@ #define PCF2127_BIT_CTRL3_BLF BIT(2) #define PCF2127_BIT_CTRL3_BF BIT(3) #define PCF2127_BIT_CTRL3_BTSE BIT(4) +#define PCF2127_BIT_CTRL3_PWRMNG_MASK (BIT(5) | BIT(6) | BIT(7)) /* Time and date registers */ #define PCF2127_REG_TIME_BASE 0x03 #define PCF2127_BIT_SC_OSF BIT(7) @@ -529,6 +530,49 @@ static int pcf2127_watchdog_init(struct device *dev, s= truct pcf2127 *pcf2127) return devm_watchdog_register_device(dev, &pcf2127->wdd); } +static int pcf2127_battery_init(struct device *dev, struct pcf2127 *pcf212= 7) +{ + u8 val =3D 0xff; + int ret; + + /* + * Disable battery low/switch-over timestamp and interrupts. + * Clear battery interrupt flags which can block new trigger events. + * Note: This is the default chip behaviour but added to ensure + * correct tamper timestamp and interrupt function. + */ + ret =3D regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3, + PCF2127_BIT_CTRL3_BTSE | + PCF2127_BIT_CTRL3_BIE | + PCF2127_BIT_CTRL3_BLIE, 0); + if (ret) { + dev_err(dev, "%s: interrupt config (ctrl3) failed\n", + __func__); + return ret; + } + + ret =3D device_property_read_u8(dev, "nxp,battery-switch-over", &va= l); + if (ret < 0) + return 0; + + if (val > 7) { + dev_warn(dev, + "%s: ignoring invalid value for nxp,battery-switch= -over: %u\n", + __func__, val); + return 0; + }; + ret =3D regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3, + PCF2127_BIT_CTRL3_PWRMNG_MASK, val << 5); + if (ret) { + dev_err(dev, + "%s: battery switch-over config (ctrl3) failed\n", + __func__); + return ret; + } + + return 0; +} + /* Alarm */ static int pcf2127_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *a= lrm) { @@ -1224,22 +1268,9 @@ static int pcf2127_probe(struct device *dev, struct = regmap *regmap, } pcf2127_watchdog_init(dev, pcf2127); - - /* - * Disable battery low/switch-over timestamp and interrupts. - * Clear battery interrupt flags which can block new trigger events. - * Note: This is the default chip behaviour but added to ensure - * correct tamper timestamp and interrupt function. - */ - ret =3D regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3, - PCF2127_BIT_CTRL3_BTSE | - PCF2127_BIT_CTRL3_BIE | - PCF2127_BIT_CTRL3_BLIE, 0); - if (ret) { - dev_err(dev, "%s: interrupt config (ctrl3) failed\n", - __func__); + ret =3D pcf2127_battery_init(dev, pcf2127); + if (ret < 0) return ret; - } /* * Enable timestamp functions 1 to 4. -- 2.39.5 ---------------------------------------------------------------------------= ------ sps Smart Production Solutions Nuremberg, 12 - 14 November 2024 Visit us: Hall 5, Booth 228 ---------------------------------------------------------------------------= ------