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([2403:c300:5f03:e344:fc14:f963:5d41:9c55]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71ec1312c84sm4028187b3a.6.2024.10.22.00.02.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Oct 2024 00:02:38 -0700 (PDT) From: Tony Chung To: johan@kernel.org Cc: linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Tony Chung Subject: [PATCH] usb: serial: mos7840: Add more kinds of baud rate Date: Tue, 22 Oct 2024 15:01:28 +0800 Message-Id: <20241022070127.66083-1-tony467913@gmail.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch adds more kinds of baud rate support. also fix all the coding style errors & warnings shown by /scripts/checkpatc= h.pl The mos7840 hardware had several clock source which can be selected from re= gisters below. 1. Clk_Select_Reg: 30M, 96M, External Clock 2. SP_Reg[6:4]: 1.846M, 3.692M, 4.615M, 7.384M, 12.923M, 14.769M, 24M, 48M and the maximum boudrate can be set to 6Mbits with 96M clock source. Signed-off-by: Tony Chung --- drivers/usb/serial/mos7840.c | 323 +++++++++++++++++++++++++++++++---- 1 file changed, 288 insertions(+), 35 deletions(-) diff --git a/drivers/usb/serial/mos7840.c b/drivers/usb/serial/mos7840.c index ca3da79af..3ced3d4e5 100644 --- a/drivers/usb/serial/mos7840.c +++ b/drivers/usb/serial/mos7840.c @@ -144,6 +144,10 @@ =20 #define SERIAL_LCR_DLAB ((__u16)(0x0080)) =20 +#define CLOCK_SELECT_REG1 ((__u16)(0x13)) +#define CLOCK_SELECT_REG2 ((__u16)(0x14)) + + /* * URB POOL related defines */ @@ -173,6 +177,7 @@ static const struct usb_device_id id_table[] =3D { { MCS_DEVICE(0x9710, 0x7820, MCS_PORTS(2)) }, /* MosChip MCS7820 */ { MCS_DEVICE(0x9710, 0x7840, MCS_PORTS(4)) }, /* MosChip MCS7840 */ { MCS_DEVICE(0x9710, 0x7843, MCS_PORTS(3)) }, /* ASIX MCS7840 3 port */ + { MCS_DEVICE(0x9710, 0x7841, MCS_PORTS(4)) }, /* ASIX MCS7840 4 port */ { USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_2) }, { USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_2P) }, { USB_DEVICE(USB_VENDOR_ID_BANDB, BANDB_DEVICE_ID_USO9ML2_4) }, @@ -220,16 +225,17 @@ struct moschip_port { =20 /* * mos7840_set_reg_sync - * To set the Control register by calling usb_fill_control_urb function - * by passing usb_sndctrlpipe function as parameter. + * To set the Control register by calling usb_fill_control_urb function + * by passing usb_sndctrlpipe function as parameter. */ =20 static int mos7840_set_reg_sync(struct usb_serial_port *port, __u16 reg, __u16 val) { struct usb_device *dev =3D port->serial->dev; + val =3D val & 0x00ff; - dev_dbg(&port->dev, "mos7840_set_reg_sync offset is %x, value %x\n", reg,= val); + dev_dbg(&port->dev, "%s offset is %x, value %x\n", __func__, reg, val); =20 return usb_control_msg(dev, usb_sndctrlpipe(dev, 0), MCS_WRREQ, MCS_WR_RTYPE, val, reg, NULL, 0, @@ -238,8 +244,8 @@ static int mos7840_set_reg_sync(struct usb_serial_port = *port, __u16 reg, =20 /* * mos7840_get_reg_sync - * To set the Uart register by calling usb_fill_control_urb function by - * passing usb_rcvctrlpipe function as parameter. + * To set the Uart register by calling usb_fill_control_urb function by + * passing usb_rcvctrlpipe function as parameter. */ =20 static int mos7840_get_reg_sync(struct usb_serial_port *port, __u16 reg, @@ -278,11 +284,12 @@ static int mos7840_get_reg_sync(struct usb_serial_por= t *port, __u16 reg, static int mos7840_set_uart_reg(struct usb_serial_port *port, __u16 reg, __u16 val) { - struct usb_device *dev =3D port->serial->dev; + val =3D val & 0x00ff; /* For the UART control registers, the application number need - to be Or'ed */ + * to be Or'ed + */ if (port->serial->num_ports =3D=3D 2 && port->port_number !=3D 0) val |=3D ((__u16)port->port_number + 2) << 8; else @@ -448,6 +455,7 @@ static void mos7840_bulk_in_callback(struct urb *urb) =20 if (urb->actual_length) { struct tty_port *tport =3D &mos7840_port->port->port; + tty_insert_flip_string(tport, data, urb->actual_length); tty_flip_buffer_push(tport); port->icount.rx +=3D urb->actual_length; @@ -742,6 +750,7 @@ static unsigned int mos7840_chars_in_buffer(struct tty_= struct *tty) for (i =3D 0; i < NUM_URBS; ++i) { if (mos7840_port->busy[i]) { struct urb *urb =3D mos7840_port->write_urb_pool[i]; + chars +=3D urb->transfer_buffer_length; } } @@ -915,8 +924,9 @@ static int mos7840_write(struct tty_struct *tty, struct= usb_serial_port *port, =20 if (status) { mos7840_port->busy[i] =3D 0; - dev_err_console(port, "%s - usb_submit_urb(write bulk) failed " - "with status =3D %d\n", __func__, status); + dev_err_console(port, + "%s - usb_submit_urb(write bulk) failed with status =3D %d\n", + __func__, status); bytes_sent =3D status; goto exit; } @@ -943,6 +953,7 @@ static void mos7840_throttle(struct tty_struct *tty) /* if we are implementing XON/XOFF, send the stop character */ if (I_IXOFF(tty)) { unsigned char stop_char =3D STOP_CHAR(tty); + status =3D mos7840_write(tty, port, &stop_char, 1); if (status <=3D 0) return; @@ -972,6 +983,7 @@ static void mos7840_unthrottle(struct tty_struct *tty) /* if we are implementing XON/XOFF, send the start character */ if (I_IXOFF(tty)) { unsigned char start_char =3D START_CHAR(tty); + status =3D mos7840_write(tty, port, &start_char, 1); if (status <=3D 0) return; @@ -1060,11 +1072,147 @@ static int mos7840_calc_baud_rate_divisor(struct u= sb_serial_port *port, { dev_dbg(&port->dev, "%s - %d\n", __func__, baudRate); =20 - if (baudRate <=3D 115200) { + // divisor =3D (256*DLM)+DLL + // baudrate =3D InputCLK/(16*Divisor) + if (baudRate =3D=3D 50) { + *divisor =3D (256*0x09)+0x04; // DLM=3D0x09, DLL=3D0x04 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 75) { + *divisor =3D (256*0x06)+0x02; // DLM=3D0x06, DLL=3D0x02 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 110) { + *divisor =3D (256*0x04)+0x19; // DLM=3D0x04, DLL=3D0x19 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 134) { + *divisor =3D (256*0x03)+0x5d; // DLM=3D0x03, DLL=3D0x5d + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 150) { + *divisor =3D (256*0x03)+0x01; // DLM=3D0x03, DLL=3D0x01 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 300) { + *divisor =3D (256*0x01)+0x81; // DLM=3D0x01, DLL=3D0x81 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 600) { + *divisor =3D 0xc0; // DLM=3D0, DLL=3D0xc0 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 1200) { + *divisor =3D 0x60; // DLM=3D0, DLL=3D0x60 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 1800) { + *divisor =3D 0x40; // DLM=3D0, DLL=3D0x40 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 2400) { + *divisor =3D 0x30; // DLM=3D0, DLL=3D0x30 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 4800) { + *divisor =3D 0x18; // DLM=3D0, DLL=3D0x18 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 7200) { + *divisor =3D 0x10; // DLM=3D0, DLL=3D0x10 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 9600) { + *divisor =3D 0x0c; // DLM=3D0, DLL=3D0x0c + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 14400) { + *divisor =3D 0x08; // DLM=3D0, DLL=3D0x08 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 19200) { + *divisor =3D 0x06; // DLM=3D0, DLL=3D0x06 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 28800) { + *divisor =3D 0x04; // DLM=3D0, DLL=3D0x04 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 38400) { + *divisor =3D 0x03; // DLM=3D0, DLL=3D0x03 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 57600) { + *divisor =3D 0x02; // DLM=3D0, DLL=3D0x02 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 115200) { + *divisor =3D 0x01; // DLM=3D0, DLL=3D0x01 + *clk_sel_val =3D 0x0; // clock source =3D 1.846153846M + } else if (baudRate =3D=3D 230400) { + *divisor =3D 0x01; // DLM=3D0, DLL=3D0x01 + *clk_sel_val =3D 0x10; // clock source =3D 3.692307692M + } else if (baudRate =3D=3D 460800) { + *divisor =3D 0x01; // DLM=3D0, DLL=3D0x01 + *clk_sel_val =3D 0x30; // clock source =3D 7.384615384M + } else if (baudRate =3D=3D 806400) { + *divisor =3D 0x01; // DLM=3D0, DLL=3D0x01 + *clk_sel_val =3D 0x40; // clock source =3D 12.923076922M + } else if (baudRate =3D=3D 921600) { + *divisor =3D 0x01; // DLM=3D0, DLL=3D0x01 + *clk_sel_val =3D 0x50; // clock source =3D 14.769230768M + } else if (baudRate =3D=3D 25000) { + *divisor =3D 0x78; // DLM=3D0, DLL=3D0x78 + *clk_sel_val =3D 0x70; // clock source=3D48M + } else if (baudRate =3D=3D 50000) { + *divisor =3D 0x3c; // DLM=3D0, DLL=3D0x3c + *clk_sel_val =3D 0x70; // clock source=3D48M + } else if (baudRate =3D=3D 75000) { + *divisor =3D 0x28; // DLM=3D0, DLL=3D0x28 + *clk_sel_val =3D 0x70; // clock source=3D48M + } else if (baudRate =3D=3D 100000) { + *divisor =3D 0x1e; // DLM=3D0, DLL=3D0x1e + *clk_sel_val =3D 0x70; // clock source=3D48M + } else if (baudRate =3D=3D 250000) { + *divisor =3D 0x0c; // DLM=3D0, DLL=3D0x0c + *clk_sel_val =3D 0x70; // clock source=3D48M + } else if (baudRate =3D=3D 300000) { + *divisor =3D 0x0a; // DLM=3D0, DLL=3D0x0a + *clk_sel_val =3D 0x70; // clock source=3D48M + } else if (baudRate =3D=3D 500000) { + *divisor =3D 0x06; // DLM=3D0, DLL=3D0x06 + *clk_sel_val =3D 0x70; // clock source=3D48M + } else if (baudRate =3D=3D 600000) { + *divisor =3D 0x05; // DLM=3D0, DLL=3D0x05 + *clk_sel_val =3D 0x70; // clock source=3D48M + } else if (baudRate =3D=3D 1000000) { + *divisor =3D 0x03; // DLM=3D0, DLL=3D0x03 + *clk_sel_val =3D 0x70; // clock source=3D48M + } else if (baudRate =3D=3D 3000000) { + *divisor =3D 0x01; // DLM=3D0, DLL=3D0x01 + *clk_sel_val =3D 0x70; // clock source=3D48M + + } else if (baudRate =3D=3D 1500000) { + *divisor =3D 0x01; // DLM=3D0, DLL=3D0x01 + *clk_sel_val =3D 0x60; // clock source=3D24M + + /* below are using 96M or 30M clock source + * will determine the clock source later + * in function mos7840_send_cmd_write_baud_rate + */ + } else if (baudRate =3D=3D 6000000) { + *divisor =3D 0x01; // DLM=3D0, DLL=3D0x01 + *clk_sel_val =3D 0x80; // DUMMY val, clock source =3D 96M + } else if (baudRate =3D=3D 2000000) { + *divisor =3D 0x03; // DLM=3D0, DLL=3D0x03 + *clk_sel_val =3D 0x80; // DUMMY val, clock source =3D 96M + } else if (baudRate =3D=3D 403200) { + *divisor =3D 0x0f; // DLM=3D0, DLL=3D0x0f + *clk_sel_val =3D 0x80; // DUMMY val, clock source =3D 96M + } else if (baudRate =3D=3D 225000) { + *divisor =3D 0x1b; // DLM=3D0, DLL=3D0x1b + *clk_sel_val =3D 0x80; // DUMMY val, clock source =3D 96M + } else if (baudRate =3D=3D 153600) { + *divisor =3D 0x27; // DLM=3D0, DLL=3D0x27 + *clk_sel_val =3D 0x80; // DUMMY val, clock source =3D 96M + + } else if (baudRate =3D=3D 10000) { + *divisor =3D 0xbb; // DLM=3D0, DLL=3D0xbb + *clk_sel_val =3D 0x80; // DUMMY val, clock source =3D 30M + } else if (baudRate =3D=3D 125000) { + *divisor =3D 0x0f; // DLM=3D0, DLL=3D0x0f + *clk_sel_val =3D 0x80; // DUMMY val, clock source =3D 30M + } else if (baudRate =3D=3D 625000) { + *divisor =3D 0x03; // DLM=3D0, DLL=3D0x03 + *clk_sel_val =3D 0x80; // DUMMY val, clock source =3D 30M + + + } else if (baudRate <=3D 115200) { *divisor =3D 115200 / baudRate; *clk_sel_val =3D 0x0; - } - if ((baudRate > 115200) && (baudRate <=3D 230400)) { + } else if ((baudRate > 115200) && (baudRate <=3D 230400)) { *divisor =3D 230400 / baudRate; *clk_sel_val =3D 0x10; } else if ((baudRate > 230400) && (baudRate <=3D 403200)) { @@ -1085,6 +1233,9 @@ static int mos7840_calc_baud_rate_divisor(struct usb_= serial_port *port, } else if ((baudRate > 1572864) && (baudRate <=3D 3145728)) { *divisor =3D 3145728 / baudRate; *clk_sel_val =3D 0x70; + } else { + dev_dbg(&port->dev, "func: %s -baudrate %d not supported.\n", __func__, = baudRate); + return -1; } return 0; } @@ -1135,24 +1286,122 @@ static int mos7840_send_cmd_write_baud_rate(struct= moschip_port *mos7840_port, =20 } =20 - if (1) { /* baudRate <=3D 115200) */ + if (1) { clk_sel_val =3D 0x0; Data =3D 0x0; status =3D mos7840_calc_baud_rate_divisor(port, baudRate, &divisor, - &clk_sel_val); - status =3D mos7840_get_reg_sync(port, mos7840_port->SpRegOffset, - &Data); + &clk_sel_val); if (status < 0) { - dev_dbg(&port->dev, "reading spreg failed in set_serial_baud\n"); + dev_dbg(&port->dev, "mos7840_calc_baud_rate_divisor failed in set_seria= l_baud\n"); return -1; } - Data =3D (Data & 0x8f) | clk_sel_val; - status =3D mos7840_set_reg_sync(port, mos7840_port->SpRegOffset, - Data); - if (status < 0) { - dev_dbg(&port->dev, "Writing spreg failed in set_serial_baud\n"); - return -1; + + /* Write clk_sel_val to SP_Reg or Clk_Select_Reg*/ + // check clk_sel_val before setting the clk_sel_val + if (clk_sel_val =3D=3D 0x80) { // clk_sel_val is DUMMY value -> Write th= e corresponding value to Clk_Select_Reg + // 0x01:30M, 0x02:96M, 0x05:External Clock + if (baudRate =3D=3D 125000 || baudRate =3D=3D 625000 || baudRate =3D=3D= 10000) { + clk_sel_val =3D 0x01; + } else if (baudRate =3D=3D 153600 || baudRate =3D=3D 225000 || baudRate= =3D=3D 403200 || + baudRate =3D=3D 2000000 || baudRate =3D=3D 6000000) { + clk_sel_val =3D 0x02; + } else { + clk_sel_val =3D 0x05; // externel clk for custom case. + } + + // needs to set clock source through Clk_Select_Reg1(offset 0x13) & Clk= _Select_Reg2(offset 0x14) + // Clk_Select_Reg1 for port1,2 Clk_Select_Reg2 for port3,4 + if (mos7840_port->port_num <=3D 2) { + status =3D mos7840_get_reg_sync(port, CLOCK_SELECT_REG1, &Data); + if (status < 0) { + dev_dbg(&port->dev, "reading Clk_Select_Reg failed in set_serial_baud= \n"); + return -1; + } + if (mos7840_port->port_num =3D=3D 1) { + Data =3D (Data & 0xf8) | clk_sel_val; + status =3D mos7840_set_reg_sync(port, CLOCK_SELECT_REG1, Data); + } else if (mos7840_port->port_num =3D=3D 2) { + Data =3D (Data & 0xc7) | (clk_sel_val<<3); + status =3D mos7840_set_reg_sync(port, CLOCK_SELECT_REG1, Data); + } + if (status < 0) { + dev_dbg(&port->dev, "setting Clk_Select_Reg failed\n"); + return -1; + } + } else if (mos7840_port->port_num <=3D 4) { + status =3D mos7840_get_reg_sync(port, CLOCK_SELECT_REG2, &Data); + if (status < 0) { + dev_dbg(&port->dev, "reading Clk_Select_Reg failed in set_serial_baud= \n"); + return -1; + } + if (mos7840_port->port_num =3D=3D 3) { + Data =3D (Data & 0xf8) | clk_sel_val; + status =3D mos7840_set_reg_sync(port, CLOCK_SELECT_REG2, Data); + } else if (mos7840_port->port_num =3D=3D 4) { + Data =3D (Data & 0xc7) | (clk_sel_val<<3); + status =3D mos7840_set_reg_sync(port, CLOCK_SELECT_REG2, Data); + } + if (status < 0) { + dev_dbg(&port->dev, "setting Clk_Select_Reg failed\n"); + return -1; + } + } + } else {=20 + // needs to set default value to Clk_Select_Reg + // Clk_Select_Reg1 for port1,2 Clk_Select_Reg2 for port3,4 + if (mos7840_port->port_num <=3D 2) { + status =3D mos7840_get_reg_sync(port, CLOCK_SELECT_REG1, &Data); + if (status < 0) { + dev_dbg(&port->dev, "reading Clk_Select_Reg failed in set_serial_baud= \n"); + return -1; + } + if (mos7840_port->port_num =3D=3D 1) { + Data =3D (Data & 0xf8) | 0x00; + status =3D mos7840_set_reg_sync(port, CLOCK_SELECT_REG1, Data); + } else if (mos7840_port->port_num =3D=3D 2) { + Data =3D (Data & 0xc7) | (0x00<<3); + status =3D mos7840_set_reg_sync(port, CLOCK_SELECT_REG1, Data); + } + if (status < 0) { + dev_dbg(&port->dev, "setting Clk_Select_Reg failed\n"); + return -1; + } + } else if (mos7840_port->port_num <=3D 4) { + status =3D mos7840_get_reg_sync(port, CLOCK_SELECT_REG2, &Data); + if (status < 0) { + dev_dbg(&port->dev, "reading Clk_Select_Reg failed in set_serial_baud= \n"); + return -1; + } + if (mos7840_port->port_num =3D=3D 3) { + Data =3D (Data & 0xf8) | 0x00; + status =3D mos7840_set_reg_sync(port, CLOCK_SELECT_REG2, Data); + } else if (mos7840_port->port_num =3D=3D 4) { + Data =3D (Data & 0xc7) | (0x00<<3); + status =3D mos7840_set_reg_sync(port, CLOCK_SELECT_REG2, Data); + } + if (status < 0) { + dev_dbg(&port->dev, "setting Clk_Select_Reg failed\n"); + return -1; + } + } + // select clock source by writing clk_sel_val to SPx_Reg + status =3D mos7840_get_reg_sync(port, mos7840_port->SpRegOffset, + &Data); + if (status < 0) { + dev_dbg(&port->dev, "reading spreg failed in set_serial_baud\n"); + return -1; + } + Data =3D (Data & 0x8f) | clk_sel_val; + status =3D mos7840_set_reg_sync(port, mos7840_port->SpRegOffset, + Data); + if (status < 0) { + dev_dbg(&port->dev, "Writing spreg failed in set_serial_baud\n"); + return -1; + } } +////..................................................... + + /* Calculate the Divisor */ =20 if (status) { @@ -1194,7 +1443,7 @@ static void mos7840_change_port_settings(struct tty_s= truct *tty, { struct usb_serial_port *port =3D mos7840_port->port; int baud; - unsigned cflag; + unsigned int cflag; __u8 lData; __u8 lParity; __u8 lStop; @@ -1356,11 +1605,11 @@ static void mos7840_set_termios(struct tty_struct *= tty, * mos7840_get_lsr_info - get line status register info * * Purpose: Let user call ioctl() to get info when the UART physically - * is emptied. On bus types like RS485, the transmitter must - * release the bus after transmitting. This must be done when - * the transmit shift register is empty, not be done when the - * transmit holding register is empty. This functionality - * allows an RS485 driver to be written in user space. + * is emptied. On bus types like RS485, the transmitter must + * release the bus after transmitting. This must be done when + * the transmit shift register is empty, not be done when the + * transmit holding register is empty. This functionality + * allows an RS485 driver to be written in user space. *************************************************************************= ****/ =20 static int mos7840_get_lsr_info(struct tty_struct *tty, @@ -1539,8 +1788,8 @@ static int mos7840_port_probe(struct usb_serial_port = *port) int pnum; __u16 Data; =20 - /* we set up the pointers to the endpoints in the mos7840_open * - * function, as the structures aren't created yet. */ + /* we set up the pointers to the endpoints in the mos7840_open */ + /* function, as the structures aren't created yet. */ =20 pnum =3D port->port_number; =20 @@ -1551,14 +1800,16 @@ static int mos7840_port_probe(struct usb_serial_por= t *port) =20 /* Initialize all port interrupt end point to port 0 int * endpoint. Our device has only one interrupt end point - * common to all port */ + * common to all port + */ =20 mos7840_port->port =3D port; spin_lock_init(&mos7840_port->pool_lock); =20 /* minor is not initialised until later by * usb-serial.c:get_free_serial() and cannot therefore be used - * to index device instances */ + * to index device instances + */ mos7840_port->port_num =3D pnum + 1; dev_dbg(&port->dev, "port->minor =3D %d\n", port->minor); dev_dbg(&port->dev, "mos7840_port->port_num =3D %d\n", mos7840_port->port= _num); @@ -1591,7 +1842,8 @@ static int mos7840_port_probe(struct usb_serial_port = *port) dev_dbg(&port->dev, "ControlReg Reading success val is %x, status%d\n", = Data, status); Data |=3D 0x08; /* setting driver done bit */ Data |=3D 0x04; /* sp1_bit to have cts change reflect in - modem status reg */ + * modem status reg + */ =20 /* Data |=3D 0x20; //rx_disable bit */ status =3D mos7840_set_reg_sync(port, @@ -1603,7 +1855,8 @@ static int mos7840_port_probe(struct usb_serial_port = *port) dev_dbg(&port->dev, "ControlReg Writing success(rx_disable) status%d\n",= status); =20 /* Write default values in DCR (i.e 0x01 in DCR0, 0x05 in DCR2 - and 0x24 in DCR3 */ + * and 0x24 in DCR3 + */ Data =3D 0x01; status =3D mos7840_set_reg_sync(port, (__u16) (mos7840_port->DcrRegOffset + 0), Data); --=20 2.34.1