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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241022-dts-qcom-label-v3-7-0505bc7d2c56@linaro.org> References: <20241022-dts-qcom-label-v3-0-0505bc7d2c56@linaro.org> In-Reply-To: <20241022-dts-qcom-label-v3-0-0505bc7d2c56@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , cros-qcom-dts-watchers@chromium.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=12413; i=krzysztof.kozlowski@linaro.org; h=from:subject:message-id; bh=VUslH+m2Mx1BtwG011I/Ooby0XfmI/ZPcWy+fsQobhU=; b=owEBbQKS/ZANAwAKAcE3ZuaGi4PXAcsmYgBnF8kaVOyIyXL+dkosPvUCGA/c0hsqj2OoecSQo C9PqLsPYkGJAjMEAAEKAB0WIQTd0mIoPREbIztuuKjBN2bmhouD1wUCZxfJGgAKCRDBN2bmhouD 1xClD/sFWyxi1SQDjnyzDvKLlqoQwMA2dUpz2pddT2XHhNjRP20J1JkNR02a2Ek7uYF3rVLrnCc 3MSvekbttjuX8xxXS4LoAn0ZT1wE0Sqvg4KyeuKZRohkPNBpSiTkpwVg+OJPtxsHTxlP8nQOTlt naJmmfGHdQKkWkkqEI3FQBzIBSrqfYA5uA6cO5yu0XBEnDivmKLQ9OpPWfrZMKt7yau7B0nm/KC Tg0lYp2cKPD8yZQp4IeBrV2Vso+wVXR1Kd5CYjcBi+S9ajxr3GmducMd0FaaVf7DX5I5mY9u7E/ D6doXVeEkpQUer3z7/Ko/1EpKLsiK0pWmpUrP9jDgyRg8nTCUQ3JSxQfC6wTehbsfst11K1henM cvaE58lHsT+uxIXjbG51J71JS+IvGuRxrsvCBEs4SDZVPPjJ2NrdFLu3L+cLhPlzYL3egedxFsX FI0Xagq6nkiEiP33Z+Qg9godOdHYlGrP4LEC0kI77oGrY3ixKazTFzXu8PjiLUwVquHIC9aJPS1 4eFsbLzLzzrnypN9YQIV/RY+VYb6y6mgPYGDMyG8sTpZteb1MKm2PZBJz5Tx5BKWx24iQFOl6Fu 4zhP9s1a6S3I9guZfZOKHyDDX+SblPZdol47R3FMyCWfXAOWkr06/wIqPCBAZN5SU9KnlchPAlV itbCBnSG4IDUxXQ== X-Developer-Key: i=krzysztof.kozlowski@linaro.org; a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B DTS coding style expects labels to be lowercase. No functional impact. Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff). Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm4250.dtsi | 16 ++-- arch/arm64/boot/dts/qcom/sm6115.dtsi | 152 +++++++++++++++++--------------= ---- 2 files changed, 84 insertions(+), 84 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm4250.dtsi b/arch/arm64/boot/dts/qco= m/sm4250.dtsi index c5add8f44fc0f28bc775e392f1d5418eeb25b480..a0ed61925e12d63f8b9d2fb5d31= cc7480c85a66f 100644 --- a/arch/arm64/boot/dts/qcom/sm4250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4250.dtsi @@ -5,34 +5,34 @@ =20 #include "sm6115.dtsi" =20 -&CPU0 { +&cpu0 { compatible =3D "qcom,kryo240"; }; =20 -&CPU1 { +&cpu1 { compatible =3D "qcom,kryo240"; }; =20 -&CPU2 { +&cpu2 { compatible =3D "qcom,kryo240"; }; =20 -&CPU3 { +&cpu3 { compatible =3D "qcom,kryo240"; }; =20 -&CPU4 { +&cpu4 { compatible =3D "qcom,kryo240"; }; =20 -&CPU5 { +&cpu5 { compatible =3D "qcom,kryo240"; }; =20 -&CPU6 { +&cpu6 { compatible =3D "qcom,kryo240"; }; =20 -&CPU7 { +&cpu7 { compatible =3D "qcom,kryo240"; }; diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qco= m/sm6115.dtsi index 41216cc319d65e34737b2e1e4376c6ac6bc1a646..abaabeb414396ff3c8dd001b474= 901f16cb722bf 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -40,7 +40,7 @@ cpus { #address-cells =3D <2>; #size-cells =3D <0>; =20 - CPU0: cpu@0 { + cpu0: cpu@0 { device_type =3D "cpu"; compatible =3D "qcom,kryo260"; reg =3D <0x0 0x0>; @@ -48,18 +48,18 @@ CPU0: cpu@0 { capacity-dmips-mhz =3D <1024>; dynamic-power-coefficient =3D <100>; enable-method =3D "psci"; - next-level-cache =3D <&L2_0>; + next-level-cache =3D <&l2_0>; qcom,freq-domain =3D <&cpufreq_hw 0>; - power-domains =3D <&CPU_PD0>; + power-domains =3D <&cpu_pd0>; power-domain-names =3D "psci"; - L2_0: l2-cache { + l2_0: l2-cache { compatible =3D "cache"; cache-level =3D <2>; cache-unified; }; }; =20 - CPU1: cpu@1 { + cpu1: cpu@1 { device_type =3D "cpu"; compatible =3D "qcom,kryo260"; reg =3D <0x0 0x1>; @@ -67,13 +67,13 @@ CPU1: cpu@1 { capacity-dmips-mhz =3D <1024>; dynamic-power-coefficient =3D <100>; enable-method =3D "psci"; - next-level-cache =3D <&L2_0>; + next-level-cache =3D <&l2_0>; qcom,freq-domain =3D <&cpufreq_hw 0>; - power-domains =3D <&CPU_PD1>; + power-domains =3D <&cpu_pd1>; power-domain-names =3D "psci"; }; =20 - CPU2: cpu@2 { + cpu2: cpu@2 { device_type =3D "cpu"; compatible =3D "qcom,kryo260"; reg =3D <0x0 0x2>; @@ -81,13 +81,13 @@ CPU2: cpu@2 { capacity-dmips-mhz =3D <1024>; dynamic-power-coefficient =3D <100>; enable-method =3D "psci"; - next-level-cache =3D <&L2_0>; + next-level-cache =3D <&l2_0>; qcom,freq-domain =3D <&cpufreq_hw 0>; - power-domains =3D <&CPU_PD2>; + power-domains =3D <&cpu_pd2>; power-domain-names =3D "psci"; }; =20 - CPU3: cpu@3 { + cpu3: cpu@3 { device_type =3D "cpu"; compatible =3D "qcom,kryo260"; reg =3D <0x0 0x3>; @@ -95,13 +95,13 @@ CPU3: cpu@3 { capacity-dmips-mhz =3D <1024>; dynamic-power-coefficient =3D <100>; enable-method =3D "psci"; - next-level-cache =3D <&L2_0>; + next-level-cache =3D <&l2_0>; qcom,freq-domain =3D <&cpufreq_hw 0>; - power-domains =3D <&CPU_PD3>; + power-domains =3D <&cpu_pd3>; power-domain-names =3D "psci"; }; =20 - CPU4: cpu@100 { + cpu4: cpu@100 { device_type =3D "cpu"; compatible =3D "qcom,kryo260"; reg =3D <0x0 0x100>; @@ -109,18 +109,18 @@ CPU4: cpu@100 { enable-method =3D "psci"; capacity-dmips-mhz =3D <1638>; dynamic-power-coefficient =3D <282>; - next-level-cache =3D <&L2_1>; + next-level-cache =3D <&l2_1>; qcom,freq-domain =3D <&cpufreq_hw 1>; - power-domains =3D <&CPU_PD4>; + power-domains =3D <&cpu_pd4>; power-domain-names =3D "psci"; - L2_1: l2-cache { + l2_1: l2-cache { compatible =3D "cache"; cache-level =3D <2>; cache-unified; }; }; =20 - CPU5: cpu@101 { + cpu5: cpu@101 { device_type =3D "cpu"; compatible =3D "qcom,kryo260"; reg =3D <0x0 0x101>; @@ -128,13 +128,13 @@ CPU5: cpu@101 { capacity-dmips-mhz =3D <1638>; dynamic-power-coefficient =3D <282>; enable-method =3D "psci"; - next-level-cache =3D <&L2_1>; + next-level-cache =3D <&l2_1>; qcom,freq-domain =3D <&cpufreq_hw 1>; - power-domains =3D <&CPU_PD5>; + power-domains =3D <&cpu_pd5>; power-domain-names =3D "psci"; }; =20 - CPU6: cpu@102 { + cpu6: cpu@102 { device_type =3D "cpu"; compatible =3D "qcom,kryo260"; reg =3D <0x0 0x102>; @@ -142,13 +142,13 @@ CPU6: cpu@102 { capacity-dmips-mhz =3D <1638>; dynamic-power-coefficient =3D <282>; enable-method =3D "psci"; - next-level-cache =3D <&L2_1>; + next-level-cache =3D <&l2_1>; qcom,freq-domain =3D <&cpufreq_hw 1>; - power-domains =3D <&CPU_PD6>; + power-domains =3D <&cpu_pd6>; power-domain-names =3D "psci"; }; =20 - CPU7: cpu@103 { + cpu7: cpu@103 { device_type =3D "cpu"; compatible =3D "qcom,kryo260"; reg =3D <0x0 0x103>; @@ -156,46 +156,46 @@ CPU7: cpu@103 { capacity-dmips-mhz =3D <1638>; dynamic-power-coefficient =3D <282>; enable-method =3D "psci"; - next-level-cache =3D <&L2_1>; + next-level-cache =3D <&l2_1>; qcom,freq-domain =3D <&cpufreq_hw 1>; - power-domains =3D <&CPU_PD7>; + power-domains =3D <&cpu_pd7>; power-domain-names =3D "psci"; }; =20 cpu-map { cluster0 { core0 { - cpu =3D <&CPU0>; + cpu =3D <&cpu0>; }; =20 core1 { - cpu =3D <&CPU1>; + cpu =3D <&cpu1>; }; =20 core2 { - cpu =3D <&CPU2>; + cpu =3D <&cpu2>; }; =20 core3 { - cpu =3D <&CPU3>; + cpu =3D <&cpu3>; }; }; =20 cluster1 { core0 { - cpu =3D <&CPU4>; + cpu =3D <&cpu4>; }; =20 core1 { - cpu =3D <&CPU5>; + cpu =3D <&cpu5>; }; =20 core2 { - cpu =3D <&CPU6>; + cpu =3D <&cpu6>; }; =20 core3 { - cpu =3D <&CPU7>; + cpu =3D <&cpu7>; }; }; }; @@ -203,7 +203,7 @@ core3 { idle-states { entry-method =3D "psci"; =20 - LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { + little_cpu_sleep_0: cpu-sleep-0-0 { compatible =3D "arm,idle-state"; idle-state-name =3D "silver-rail-power-collapse"; arm,psci-suspend-param =3D <0x40000003>; @@ -213,7 +213,7 @@ LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 { local-timer-stop; }; =20 - BIG_CPU_SLEEP_0: cpu-sleep-1-0 { + big_cpu_sleep_0: cpu-sleep-1-0 { compatible =3D "arm,idle-state"; idle-state-name =3D "gold-rail-power-collapse"; arm,psci-suspend-param =3D <0x40000003>; @@ -225,7 +225,7 @@ BIG_CPU_SLEEP_0: cpu-sleep-1-0 { }; =20 domain-idle-states { - CLUSTER_0_SLEEP_0: cluster-sleep-0-0 { + cluster_0_sleep_0: cluster-sleep-0-0 { /* GDHS */ compatible =3D "domain-idle-state"; arm,psci-suspend-param =3D <0x40000022>; @@ -234,7 +234,7 @@ CLUSTER_0_SLEEP_0: cluster-sleep-0-0 { min-residency-us =3D <782>; }; =20 - CLUSTER_0_SLEEP_1: cluster-sleep-0-1 { + cluster_0_sleep_1: cluster-sleep-0-1 { /* Power Collapse */ compatible =3D "domain-idle-state"; arm,psci-suspend-param =3D <0x41000044>; @@ -243,7 +243,7 @@ CLUSTER_0_SLEEP_1: cluster-sleep-0-1 { min-residency-us =3D <7376>; }; =20 - CLUSTER_1_SLEEP_0: cluster-sleep-1-0 { + cluster_1_sleep_0: cluster-sleep-1-0 { /* GDHS */ compatible =3D "domain-idle-state"; arm,psci-suspend-param =3D <0x40000042>; @@ -252,7 +252,7 @@ CLUSTER_1_SLEEP_0: cluster-sleep-1-0 { min-residency-us =3D <660>; }; =20 - CLUSTER_1_SLEEP_1: cluster-sleep-1-1 { + cluster_1_sleep_1: cluster-sleep-1-1 { /* Power Collapse */ compatible =3D "domain-idle-state"; arm,psci-suspend-param =3D <0x41000044>; @@ -306,62 +306,62 @@ psci { compatible =3D "arm,psci-1.0"; method =3D "smc"; =20 - CPU_PD0: power-domain-cpu0 { + cpu_pd0: power-domain-cpu0 { #power-domain-cells =3D <0>; - power-domains =3D <&CLUSTER_0_PD>; - domain-idle-states =3D <&LITTLE_CPU_SLEEP_0>; + power-domains =3D <&cluster_0_pd>; + domain-idle-states =3D <&little_cpu_sleep_0>; }; =20 - CPU_PD1: power-domain-cpu1 { + cpu_pd1: power-domain-cpu1 { #power-domain-cells =3D <0>; - power-domains =3D <&CLUSTER_0_PD>; - domain-idle-states =3D <&LITTLE_CPU_SLEEP_0>; + power-domains =3D <&cluster_0_pd>; + domain-idle-states =3D <&little_cpu_sleep_0>; }; =20 - CPU_PD2: power-domain-cpu2 { + cpu_pd2: power-domain-cpu2 { #power-domain-cells =3D <0>; - power-domains =3D <&CLUSTER_0_PD>; - domain-idle-states =3D <&LITTLE_CPU_SLEEP_0>; + power-domains =3D <&cluster_0_pd>; + domain-idle-states =3D <&little_cpu_sleep_0>; }; =20 - CPU_PD3: power-domain-cpu3 { + cpu_pd3: power-domain-cpu3 { #power-domain-cells =3D <0>; - power-domains =3D <&CLUSTER_0_PD>; - domain-idle-states =3D <&LITTLE_CPU_SLEEP_0>; + power-domains =3D <&cluster_0_pd>; + domain-idle-states =3D <&little_cpu_sleep_0>; }; =20 - CPU_PD4: power-domain-cpu4 { + cpu_pd4: power-domain-cpu4 { #power-domain-cells =3D <0>; - power-domains =3D <&CLUSTER_1_PD>; - domain-idle-states =3D <&BIG_CPU_SLEEP_0>; + power-domains =3D <&cluster_1_pd>; + domain-idle-states =3D <&big_cpu_sleep_0>; }; =20 - CPU_PD5: power-domain-cpu5 { + cpu_pd5: power-domain-cpu5 { #power-domain-cells =3D <0>; - power-domains =3D <&CLUSTER_1_PD>; - domain-idle-states =3D <&BIG_CPU_SLEEP_0>; + power-domains =3D <&cluster_1_pd>; + domain-idle-states =3D <&big_cpu_sleep_0>; }; =20 - CPU_PD6: power-domain-cpu6 { + cpu_pd6: power-domain-cpu6 { #power-domain-cells =3D <0>; - power-domains =3D <&CLUSTER_1_PD>; - domain-idle-states =3D <&BIG_CPU_SLEEP_0>; + power-domains =3D <&cluster_1_pd>; + domain-idle-states =3D <&big_cpu_sleep_0>; }; =20 - CPU_PD7: power-domain-cpu7 { + cpu_pd7: power-domain-cpu7 { #power-domain-cells =3D <0>; - power-domains =3D <&CLUSTER_1_PD>; - domain-idle-states =3D <&BIG_CPU_SLEEP_0>; + power-domains =3D <&cluster_1_pd>; + domain-idle-states =3D <&big_cpu_sleep_0>; }; =20 - CLUSTER_0_PD: power-domain-cpu-cluster0 { + cluster_0_pd: power-domain-cpu-cluster0 { #power-domain-cells =3D <0>; - domain-idle-states =3D <&CLUSTER_0_SLEEP_0>, <&CLUSTER_0_SLEEP_1>; + domain-idle-states =3D <&cluster_0_sleep_0>, <&cluster_0_sleep_1>; }; =20 - CLUSTER_1_PD: power-domain-cpu-cluster1 { + cluster_1_pd: power-domain-cpu-cluster1 { #power-domain-cells =3D <0>; - domain-idle-states =3D <&CLUSTER_1_SLEEP_0>, <&CLUSTER_1_SLEEP_1>; + domain-idle-states =3D <&cluster_1_sleep_0>, <&cluster_1_sleep_1>; }; }; =20 @@ -2405,7 +2405,7 @@ etm@9040000 { clock-names =3D "apb_pclk"; arm,coresight-loses-context-with-cpu; =20 - cpu =3D <&CPU0>; + cpu =3D <&cpu0>; =20 status =3D "disabled"; =20 @@ -2426,7 +2426,7 @@ etm@9140000 { clock-names =3D "apb_pclk"; arm,coresight-loses-context-with-cpu; =20 - cpu =3D <&CPU1>; + cpu =3D <&cpu1>; =20 status =3D "disabled"; =20 @@ -2447,7 +2447,7 @@ etm@9240000 { clock-names =3D "apb_pclk"; arm,coresight-loses-context-with-cpu; =20 - cpu =3D <&CPU2>; + cpu =3D <&cpu2>; =20 status =3D "disabled"; =20 @@ -2468,7 +2468,7 @@ etm@9340000 { clock-names =3D "apb_pclk"; arm,coresight-loses-context-with-cpu; =20 - cpu =3D <&CPU3>; + cpu =3D <&cpu3>; =20 status =3D "disabled"; =20 @@ -2489,7 +2489,7 @@ etm@9440000 { clock-names =3D "apb_pclk"; arm,coresight-loses-context-with-cpu; =20 - cpu =3D <&CPU4>; + cpu =3D <&cpu4>; =20 status =3D "disabled"; =20 @@ -2510,7 +2510,7 @@ etm@9540000 { clock-names =3D "apb_pclk"; arm,coresight-loses-context-with-cpu; =20 - cpu =3D <&CPU5>; + cpu =3D <&cpu5>; =20 status =3D "disabled"; =20 @@ -2531,7 +2531,7 @@ etm@9640000 { clock-names =3D "apb_pclk"; arm,coresight-loses-context-with-cpu; =20 - cpu =3D <&CPU6>; + cpu =3D <&cpu6>; =20 status =3D "disabled"; =20 @@ -2552,7 +2552,7 @@ etm@9740000 { clock-names =3D "apb_pclk"; arm,coresight-loses-context-with-cpu; =20 - cpu =3D <&CPU7>; + cpu =3D <&cpu7>; =20 status =3D "disabled"; =20 --=20 2.43.0