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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2024 05:58:57.2833 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5e161e39-94b3-4048-566c-08dcf19573c1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001D1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB8842 Content-Type: text/plain; charset="utf-8" In virtualized environments running on modern CPUs, the underlying platforms guarantees to have a stable, always running TSC, i.e. that the TSC is a superior timesource as compared to other clock sources (such as kvmclock, HPET, ACPI timer, APIC, etc.). Upgrade the rating of the early and regular clock source to prefer TSC over other clock sources when TSC is invariant, non-stop and stable. Cc: Alexey Makhalov Cc: Juergen Gross Cc: Boris Ostrovsky Suggested-by: Thomas Gleixner Signed-off-by: Nikunj A Dadhania --- arch/x86/kernel/tsc.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index c83f1091bb4f..27faf121fb78 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1264,6 +1264,21 @@ static void __init check_system_tsc_reliable(void) tsc_disable_clocksource_watchdog(); } =20 +static void __init upgrade_clock_rating(struct clocksource *tsc_early, + struct clocksource *tsc) +{ + /* + * Upgrade the clock rating for TSC early and regular clocksource when + * the underlying platform provides non-stop, invaraint and stable TSC. + */ + if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && + boot_cpu_has(X86_FEATURE_NONSTOP_TSC) && + !tsc_unstable) { + tsc_early->rating =3D 449; + tsc->rating =3D 450; + } +} + /* * Make an educated guess if the TSC is trustworthy and synchronized * over all CPUs. @@ -1565,6 +1580,8 @@ void __init tsc_init(void) if (tsc_clocksource_reliable || no_tsc_watchdog) tsc_disable_clocksource_watchdog(); =20 + upgrade_clock_rating(&clocksource_tsc_early, &clocksource_tsc); + clocksource_register_khz(&clocksource_tsc_early, tsc_khz); detect_art(); } --=20 2.34.1