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AJvYcCViCdjgPso426FLeDOQG8TRvESJQJF9JeIctFyqD1JNMpgbE/9eFJaNZCcdyFuCfmkjKuov5+6FRVKQ@vger.kernel.org, AJvYcCXYdyhx6AyFZxgfxCe0vzhyWAh84UrPR1vlhx1/0He6HbPFd4sqUZ41QXyCm8wzxvXuzd9vIZ4JEJLPq0iJ@vger.kernel.org X-Gm-Message-State: AOJu0Ywm1T7EyxSSJkT/5q+IPIpWdNTGKTt08DbXYLWXmgzuBxoaA7fu VPFPbEZdo5xyj+fiI7mjyKlnEt3fbS8FAF/phD/7uB0uv/vHf46Z X-Google-Smtp-Source: AGHT+IFxdNKHpEyAEhs+OtgWVnS/3mbcUWbugIHe2isaXwnze/x4LhRIbxctqs3KZKUSftj8na/ugw== X-Received: by 2002:a05:6a00:21ce:b0:71e:8023:c718 with SMTP id d2e1a72fcca58-71ea31f627bmr10972565b3a.8.1729426251183; Sun, 20 Oct 2024 05:10:51 -0700 (PDT) Received: from localhost ([121.250.214.124]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71ec13eb08asm1097140b3a.173.2024.10.20.05.10.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Oct 2024 05:10:50 -0700 (PDT) From: Inochi Amaoto To: Chen Wang , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , Palmer Dabbelt , Albert Ou , Peter Zijlstra , Inochi Amaoto , Guo Ren , Geert Uytterhoeven , Lad Prabhakar , Heikki Krogerus , Yangyu Chen , Hal Feng Cc: Yixun Lan , Inochi Amaoto , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Conor Dooley Subject: [PATCH v3 1/3] dt-bindings: interrupt-controller: Add Sophgo SG2044 ACLINT SSWI Date: Sun, 20 Oct 2024 20:10:28 +0800 Message-ID: <20241020121030.1012572-2-inochiama@gmail.com> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241020121030.1012572-1-inochiama@gmail.com> References: <20241020121030.1012572-1-inochiama@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Sophgo SG2044 has a new version of T-HEAD C920, which implement a fully featured ACLINT device. This ACLINT has an extra SSWI field to support fast S-mode IPI. Add necessary compatible string for the T-HEAD ACLINT sswi device. Signed-off-by: Inochi Amaoto Reviewed-by: Conor Dooley --- .../thead,c900-aclint-sswi.yaml | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/= thead,c900-aclint-sswi.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/thead,c= 900-aclint-sswi.yaml b/Documentation/devicetree/bindings/interrupt-controll= er/thead,c900-aclint-sswi.yaml new file mode 100644 index 000000000000..0106fbf3ea1f --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/thead,c900-acl= int-sswi.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/thead,c900-aclint-= sswi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo sg2044 ACLINT Supervisor-level Software Interrupt Device + +maintainers: + - Inochi Amaoto + +description: + The SSWI device is a part of the riscv ACLINT device. It provides + supervisor-level IPI functionality for a set of HARTs on a RISC-V + platform. It provides a register to set an IPI (SETSSIP) for each + HART connected to the SSWI device. + +properties: + compatible: + items: + - enum: + - sophgo,sg2044-aclint-sswi + - const: thead,c900-aclint-sswi + + reg: + maxItems: 1 + + "#interrupt-cells": + const: 0 + + interrupt-controller: true + + interrupts-extended: + minItems: 1 + maxItems: 4095 + +additionalProperties: false + +required: + - compatible + - reg + - "#interrupt-cells" + - interrupt-controller + - interrupts-extended + +examples: + - | + interrupt-controller@94000000 { + compatible =3D "sophgo,sg2044-aclint-sswi", "thead,c900-aclint-sswi"; + reg =3D <0x94000000 0x00004000>; + #interrupt-cells =3D <0>; + interrupt-controller; + interrupts-extended =3D <&cpu1intc 1>, + <&cpu2intc 1>, + <&cpu3intc 1>, + <&cpu4intc 1>; + }; +... --=20 2.47.0