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[71.34.69.82]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2e5ad355bebsm2337008a91.7.2024.10.20.19.36.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 20 Oct 2024 19:36:54 -0700 (PDT) From: Drew Fustini Date: Sun, 20 Oct 2024 19:36:00 -0700 Subject: [PATCH net-next v4 1/3] dt-bindings: net: Add T-HEAD dwmac support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20241020-th1520-dwmac-v4-1-c77acd33ccef@tenstorrent.com> References: <20241020-th1520-dwmac-v4-0-c77acd33ccef@tenstorrent.com> In-Reply-To: <20241020-th1520-dwmac-v4-0-c77acd33ccef@tenstorrent.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alexandre Torgue , Giuseppe Cavallaro , Jose Abreu , Maxime Coquelin , Emil Renner Berthing , Jisheng Zhang , Guo Ren , Fu Wei , Paul Walmsley , Palmer Dabbelt , Albert Ou , Andrew Lunn , Drew Fustini Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-riscv@lists.infradead.org, Drew Fustini , linux-stm32@st-md-mailman.stormreply.com X-Mailer: b4 0.14.1 From: Jisheng Zhang Add documentation to describe the DesginWare-based GMAC controllers in the T-HEAD TH1520 SoC. Signed-off-by: Jisheng Zhang Signed-off-by: Emil Renner Berthing [drew: rename compatible, add apb registers as second reg of gmac node, add clocks and interrupts poroperties] Signed-off-by: Drew Fustini Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/net/snps,dwmac.yaml | 1 + .../devicetree/bindings/net/thead,th1520-gmac.yaml | 115 +++++++++++++++++= ++++ MAINTAINERS | 1 + 3 files changed, 117 insertions(+) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Docume= ntation/devicetree/bindings/net/snps,dwmac.yaml index 4e2ba1bf788c..474ade185033 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -99,6 +99,7 @@ properties: - snps,dwxgmac-2.10 - starfive,jh7100-dwmac - starfive,jh7110-dwmac + - thead,th1520-gmac =20 reg: minItems: 1 diff --git a/Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml b= /Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml new file mode 100644 index 000000000000..cea652ff6255 --- /dev/null +++ b/Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml @@ -0,0 +1,115 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/thead,th1520-gmac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: T-HEAD TH1520 GMAC Ethernet controller + +maintainers: + - Drew Fustini + +description: | + The TH1520 GMAC is described in the TH1520 Peripheral Interface User Man= ual + https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs + + Features include + - Compliant with IEEE802.3 Specification + - IEEE 1588-2008 standard for precision networked clock synchronization + - Supports 10/100/1000Mbps data transfer rate + - Supports RGMII/MII interface + - Preamble and start of frame data (SFD) insertion in Transmit path + - Preamble and SFD deletion in the Receive path + - Automatic CRC and pad generation options for receive frames + - MDIO master interface for PHY device configuration and management + + The GMAC Registers consists of two parts + - APB registers are used to configure clock frequency/clock enable/clo= ck + direction/PHY interface type. + - AHB registers are use to configure GMAC core (DesignWare Core part). + GMAC core register consists of DMA registers and GMAC registers. + +select: + properties: + compatible: + contains: + enum: + - thead,th1520-gmac + required: + - compatible + +allOf: + - $ref: snps,dwmac.yaml# + +properties: + compatible: + items: + - enum: + - thead,th1520-gmac + - const: snps,dwmac-3.70a + + reg: + items: + - description: DesignWare GMAC IP core registers + - description: GMAC APB registers + + reg-names: + items: + - const: dwmac + - const: apb + + clocks: + items: + - description: GMAC main clock + - description: Peripheral registers interface clock + + clock-names: + items: + - const: stmmaceth + - const: pclk + + interrupts: + items: + - description: Combined signal for various interrupt events + + interrupt-names: + items: + - const: macirq + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - interrupt-names + - phy-mode + +unevaluatedProperties: false + +examples: + - | + gmac0: ethernet@e7070000 { + compatible =3D "thead,th1520-gmac", "snps,dwmac-3.70a"; + reg =3D <0xe7070000 0x2000>, <0xec003000 0x1000>; + reg-names =3D "dwmac", "apb"; + clocks =3D <&clk 1>, <&clk 2>; + clock-names =3D "stmmaceth", "pclk"; + interrupts =3D <66>; + interrupt-names =3D "macirq"; + phy-mode =3D "rgmii-id"; + snps,fixed-burst; + snps,axi-config =3D <&stmmac_axi_setup>; + snps,pbl =3D <32>; + phy-handle =3D <&phy0>; + + mdio { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "snps,dwmac-mdio"; + + phy0: ethernet-phy@0 { + reg =3D <0>; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index a858224b59d5..a16418d68383 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20066,6 +20066,7 @@ L: linux-riscv@lists.infradead.org S: Maintained T: git https://github.com/pdp7/linux.git F: Documentation/devicetree/bindings/clock/thead,th1520-clk-ap.yaml +F: Documentation/devicetree/bindings/net/thead,th1520-gmac.yaml F: Documentation/devicetree/bindings/pinctrl/thead,th1520-pinctrl.yaml F: arch/riscv/boot/dts/thead/ F: drivers/clk/thead/clk-th1520-ap.c --=20 2.34.1