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([82.78.167.23]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37ecf0eccbasm3898731f8f.81.2024.10.19.01.47.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 19 Oct 2024 01:48:00 -0700 (PDT) From: Claudiu X-Google-Original-From: Claudiu To: geert+renesas@glider.be, mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, alexandre.belloni@bootlin.com, magnus.damm@gmail.com, p.zabel@pengutronix.de Cc: linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rtc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, claudiu.beznea@tuxon.dev, Claudiu Beznea Subject: [PATCH v4 06/12] dt-bindings: rtc: renesas,rzg3s-rtc: Document the Renesas RTCA-3 IP Date: Sat, 19 Oct 2024 11:47:32 +0300 Message-Id: <20241019084738.3370489-7-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20241019084738.3370489-1-claudiu.beznea.uj@bp.renesas.com> References: <20241019084738.3370489-1-claudiu.beznea.uj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Claudiu Beznea Document the RTC IP (RTCA-3) available on the Renesas RZ/G3S SoC. The RTC IP available on Renesas RZ/V2H is almost identical with the one found on Renesas RZ/G3S (it misses the time capture functionality which is not yet implemented on proposed driver). For this, added also a generic compatible that will be used at the moment as fallback for both RZ/G3S and RZ/V2H. Reviewed-by: Rob Herring (Arm) Signed-off-by: Claudiu Beznea --- Changes in v4: - collected tags - dropped the assigned-clocks, assigned-clock-parents properties from the example, along with r9a08g045-vbattb.h inclusion; these were moved to the VBATTB example as it fits better in there since these are related to the VBATTB but not to the RTC; Rob, I haven't dropped your Rb tag for this; please let me know if you consider it otherwise. Changes in v3: - added RTC bus clock, reset and power-domain; it has been detected by reverse engineering that RTC and VBATTB clock, reset and power domain are shared; HW manual doesn't mention it - updated example with these and with assigned-clock properties needed to configure the VBATTCLK MUX with proper parent - updated example section with dt-bindings/clock/r9a08g045-cpg.h and dt-bindings/clock/r9a08g045-vbattb.h includes - for all these, dropped Conor's Rb tag Changes in v2: - updated patch description and title - included reference to rtc.yaml - updated compatible list with a generic compatible as explained in patch description; with this the node in examples section has also been updated - used items to describe interrupts, interrupt-names, clock, clock-names - updated title section .../bindings/rtc/renesas,rz-rtca3.yaml | 83 +++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.= yaml diff --git a/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml b/= Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml new file mode 100644 index 000000000000..f1e9d01633c7 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/renesas,rz-rtca3.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/renesas,rz-rtca3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RTCA-3 Real Time Clock + +maintainers: + - Claudiu Beznea + +allOf: + - $ref: rtc.yaml# + +properties: + compatible: + items: + - enum: + - renesas,r9a08g045-rtca3 # RZ/G3S + - const: renesas,rz-rtca3 + + reg: + maxItems: 1 + + interrupts: + items: + - description: Alarm interrupt + - description: Periodic interrupt + - description: Carry interrupt + + interrupt-names: + items: + - const: alarm + - const: period + - const: carry + + clocks: + items: + - description: RTC bus clock + - description: RTC counter clock + + clock-names: + items: + - const: bus + - const: counter + + power-domains: + maxItems: 1 + + resets: + items: + - description: VBATTB module reset + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - power-domains + - resets + +additionalProperties: false + +examples: + - | + #include + #include + #include + + rtc@1004ec00 { + compatible =3D "renesas,r9a08g045-rtca3", "renesas,rz-rtca3"; + reg =3D <0x1004ec00 0x400>; + interrupts =3D , + , + ; + interrupt-names =3D "alarm", "period", "carry"; + clocks =3D <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattclk VBATTB_V= BATTCLK>; + clock-names =3D "bus", "counter"; + power-domains =3D <&cpg>; + resets =3D <&cpg R9A08G045_VBAT_BRESETN>; + }; --=20 2.39.2