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AJvYcCXjPlxiBLIxr8XCRHQL8Mawdwt8WxKzlawBCIPkGTyRxlL3DczoeriXxzPAyMbOPVoJ/RNpv0Cun8zc@vger.kernel.org, AJvYcCXy5pp0eKXNBR6A09mpSPoSBaMyBEy5wd1/tUQABV6N/xJb7yfQS0pC25QoyLcqHo7dgIoZIOEtI/ajNR0=@vger.kernel.org X-Gm-Message-State: AOJu0YxS7Px4Jc+0j9GlAh3bR9iqnZvrx2jTEQPEMwI8tf4eYua8LjrP +q/1eHLY0uFkw/EP+SqAPi31WbsMZIgbFPDBWAxtoDuKLNhVAgl9 X-Google-Smtp-Source: AGHT+IFy+FfUBWUgsF+te5eNb1txluGoVKFLXLnrvrx8BjdXoDOY7NlHg2+3bpRImMOEoXcQpksJLA== X-Received: by 2002:a05:6a21:2d88:b0:1d2:ef5c:13f6 with SMTP id adf61e73a8af0-1d92c597d59mr7155759637.34.1729317727448; Fri, 18 Oct 2024 23:02:07 -0700 (PDT) Received: from localhost.localdomain ([113.30.217.221]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71ea333e94fsm2424237b3a.69.2024.10.18.23.02.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Oct 2024 23:02:07 -0700 (PDT) From: Anand Moon To: Shawn Lin , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , Philipp Zabel , linux-pci@vger.kernel.org (open list:PCIE DRIVER FOR ROCKCHIP), linux-rockchip@lists.infradead.org (open list:PCIE DRIVER FOR ROCKCHIP), linux-arm-kernel@lists.infradead.org (moderated list:ARM/Rockchip SoC support), linux-kernel@vger.kernel.org (open list) Cc: Anand Moon Subject: [PATCH v10 1/3] PCI: rockchip: Simplify clock handling by using clk_bulk*() function Date: Sat, 19 Oct 2024 11:31:33 +0530 Message-ID: <20241019060141.2489-2-linux.amoon@gmail.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: <20241019060141.2489-1-linux.amoon@gmail.com> References: <20241019060141.2489-1-linux.amoon@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Currently, the driver acquires clks and prepare enable/disable unprepare the clks individually thereby making the driver complex to read. But this can be simplified by using the clk_bulk*() APIs. Use devm_clk_bulk_get_all() API to acquire all the clks and use clk_bulk_prepare_enable() to prepare enable clks and clk_bulk_disable_unprepare() APIs disable unprepare them in bulk. Reviewed-by: Manivannan Sadhasivam Signed-off-by: Anand Moon --- V10: None v9: Re write the commmit message. v8: Improve the description of the code changes in commit messagee. Add Rb: Manivannan v7: Update the functional change in commmit message. v6: None. v5: switch to use use devm_clk_bulk_get_all()? gets rid of hardcoding the clock names in driver. v4: use dev_err_probe for error patch. v3: Fix typo in commit message, dropped reported by. v2: Fix compilation error reported by Intel test robot. --- drivers/pci/controller/pcie-rockchip.c | 65 +++----------------------- drivers/pci/controller/pcie-rockchip.h | 7 ++- 2 files changed, 10 insertions(+), 62 deletions(-) diff --git a/drivers/pci/controller/pcie-rockchip.c b/drivers/pci/controlle= r/pcie-rockchip.c index c07d7129f1c7..2777ef0cb599 100644 --- a/drivers/pci/controller/pcie-rockchip.c +++ b/drivers/pci/controller/pcie-rockchip.c @@ -127,29 +127,9 @@ int rockchip_pcie_parse_dt(struct rockchip_pcie *rockc= hip) "failed to get ep GPIO\n"); } =20 - rockchip->aclk_pcie =3D devm_clk_get(dev, "aclk"); - if (IS_ERR(rockchip->aclk_pcie)) { - dev_err(dev, "aclk clock not found\n"); - return PTR_ERR(rockchip->aclk_pcie); - } - - rockchip->aclk_perf_pcie =3D devm_clk_get(dev, "aclk-perf"); - if (IS_ERR(rockchip->aclk_perf_pcie)) { - dev_err(dev, "aclk_perf clock not found\n"); - return PTR_ERR(rockchip->aclk_perf_pcie); - } - - rockchip->hclk_pcie =3D devm_clk_get(dev, "hclk"); - if (IS_ERR(rockchip->hclk_pcie)) { - dev_err(dev, "hclk clock not found\n"); - return PTR_ERR(rockchip->hclk_pcie); - } - - rockchip->clk_pcie_pm =3D devm_clk_get(dev, "pm"); - if (IS_ERR(rockchip->clk_pcie_pm)) { - dev_err(dev, "pm clock not found\n"); - return PTR_ERR(rockchip->clk_pcie_pm); - } + rockchip->num_clks =3D devm_clk_bulk_get_all(dev, &rockchip->clks); + if (rockchip->num_clks < 0) + return dev_err_probe(dev, err, "failed to get clocks\n"); =20 return 0; } @@ -372,39 +352,11 @@ int rockchip_pcie_enable_clocks(struct rockchip_pcie = *rockchip) struct device *dev =3D rockchip->dev; int err; =20 - err =3D clk_prepare_enable(rockchip->aclk_pcie); - if (err) { - dev_err(dev, "unable to enable aclk_pcie clock\n"); - return err; - } - - err =3D clk_prepare_enable(rockchip->aclk_perf_pcie); - if (err) { - dev_err(dev, "unable to enable aclk_perf_pcie clock\n"); - goto err_aclk_perf_pcie; - } - - err =3D clk_prepare_enable(rockchip->hclk_pcie); - if (err) { - dev_err(dev, "unable to enable hclk_pcie clock\n"); - goto err_hclk_pcie; - } - - err =3D clk_prepare_enable(rockchip->clk_pcie_pm); - if (err) { - dev_err(dev, "unable to enable clk_pcie_pm clock\n"); - goto err_clk_pcie_pm; - } + err =3D clk_bulk_prepare_enable(rockchip->num_clks, rockchip->clks); + if (err) + return dev_err_probe(dev, err, "failed to enable clocks\n"); =20 return 0; - -err_clk_pcie_pm: - clk_disable_unprepare(rockchip->hclk_pcie); -err_hclk_pcie: - clk_disable_unprepare(rockchip->aclk_perf_pcie); -err_aclk_perf_pcie: - clk_disable_unprepare(rockchip->aclk_pcie); - return err; } EXPORT_SYMBOL_GPL(rockchip_pcie_enable_clocks); =20 @@ -412,10 +364,7 @@ void rockchip_pcie_disable_clocks(void *data) { struct rockchip_pcie *rockchip =3D data; =20 - clk_disable_unprepare(rockchip->clk_pcie_pm); - clk_disable_unprepare(rockchip->hclk_pcie); - clk_disable_unprepare(rockchip->aclk_perf_pcie); - clk_disable_unprepare(rockchip->aclk_pcie); + clk_bulk_disable_unprepare(rockchip->num_clks, rockchip->clks); } EXPORT_SYMBOL_GPL(rockchip_pcie_disable_clocks); =20 diff --git a/drivers/pci/controller/pcie-rockchip.h b/drivers/pci/controlle= r/pcie-rockchip.h index 6111de35f84c..bebab80c9553 100644 --- a/drivers/pci/controller/pcie-rockchip.h +++ b/drivers/pci/controller/pcie-rockchip.h @@ -11,6 +11,7 @@ #ifndef _PCIE_ROCKCHIP_H #define _PCIE_ROCKCHIP_H =20 +#include #include #include #include @@ -299,10 +300,8 @@ struct rockchip_pcie { struct reset_control *pm_rst; struct reset_control *aclk_rst; struct reset_control *pclk_rst; - struct clk *aclk_pcie; - struct clk *aclk_perf_pcie; - struct clk *hclk_pcie; - struct clk *clk_pcie_pm; + struct clk_bulk_data *clks; + int num_clks; struct regulator *vpcie12v; /* 12V power supply */ struct regulator *vpcie3v3; /* 3.3V power supply */ struct regulator *vpcie1v8; /* 1.8V power supply */ --=20 2.44.0