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charset="utf-8" Add the Low Power Audio SubSystem Low Power Island (LPASS LPI) pin controller device node required for audio subsystem on Qualcomm QRB4210 RB2. Cc: Srinivas Kandagatla Signed-off-by: Alexey Klimov --- arch/arm64/boot/dts/qcom/sm6115.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qco= m/sm6115.dtsi index b211a49982d6..4fc6978d105b 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -16,6 +16,7 @@ #include #include #include +#include #include =20 / { @@ -810,6 +811,20 @@ data-pins { }; }; =20 + lpass_tlmm: pinctrl@a7c0000 { + compatible =3D "qcom,sm6115-lpass-lpi-pinctrl"; + reg =3D <0x0 0x0a7c0000 0x0 0x20000>, + <0x0 0x0a950000 0x0 0x10000>; + + clocks =3D <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO= >; + clock-names =3D "audio"; + + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&lpass_tlmm 0 0 19>; + + }; + gcc: clock-controller@1400000 { compatible =3D "qcom,gcc-sm6115"; reg =3D <0x0 0x01400000 0x0 0x1f0000>; --=20 2.45.2